Commit Graph

46 Commits

Author SHA1 Message Date
Thomas Gleixner 1a59d1b8e0 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 156
Based on 1 normalized pattern(s):

  this program is free software you can redistribute it and or modify
  it under the terms of the gnu general public license as published by
  the free software foundation either version 2 of the license or at
  your option any later version this program is distributed in the
  hope that it will be useful but without any warranty without even
  the implied warranty of merchantability or fitness for a particular
  purpose see the gnu general public license for more details you
  should have received a copy of the gnu general public license along
  with this program if not write to the free software foundation inc
  59 temple place suite 330 boston ma 02111 1307 usa

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-or-later

has been chosen to replace the boilerplate/reference in 1334 file(s).

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Allison Randal <allison@lohutok.net>
Reviewed-by: Richard Fontana <rfontana@redhat.com>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190527070033.113240726@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-05-30 11:26:35 -07:00
Paul Bolle 66de4859e3 MIPS: BCM1480: Remove checks for CONFIG_SIBYTE_BCM1480_PROF
There are two checks for CONFIG_SIBYTE_BCM1480_PROF in the tree since
v2.6.15. The related Kconfig symbol has never been added to the tree. So
these checks have always evaluated to false. Besides, one of these
checks guards a call of sbprof_cpu_intr(). But that function is not
defined. Remove all this.

Signed-off-by: Paul Bolle <pebolle@tiscali.nl>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/6981/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-05-23 15:12:40 +02:00
Thomas Gleixner 421d1563c6 mips: Validate online cpus in irq_set_affinity() callbacks
The [user space] interface does not filter out offline cpus. It merily
guarantees that the mask contains at least one online cpu.

So the selector in the irq chip implementation needs to make sure to
pick only an online cpu because otherwise:

     Offline Core 1
     Set affinity to 0xe (is valid due to online mask 0xd)
     cpumask_first will pick core 1, which is offline

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: linux-mips@linux-mips.org
Link: http://lkml.kernel.org/r/20140304203100.744800502@linutronix.de
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2014-03-12 13:07:40 +01:00
Ralf Baechle 7034228792 MIPS: Whitespace cleanup.
Having received another series of whitespace patches I decided to do this
once and for all rather than dealing with this kind of patches trickling
in forever.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-02-01 10:00:22 +01:00
David Howells b81947c646 Disintegrate asm/system.h for MIPS
Disintegrate asm/system.h for MIPS.

Signed-off-by: David Howells <dhowells@redhat.com>
Acked-by: Ralf Baechle <ralf@linux-mips.org>
cc: linux-mips@linux-mips.org
2012-03-28 18:30:02 +01:00
Thomas Gleixner e4ec7989b4 MIPS: Convert the irq functions to the new names
Scripted with coccinelle.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2011-03-29 14:48:07 +02:00
Thomas Gleixner d6d5d5c4af MIPS: Sibyte: Convert to new irq_chip functions
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2205/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-03-25 18:45:19 +01:00
Jiri Kosina 6c9468e9eb Merge branch 'master' into for-next 2010-04-23 02:08:44 +02:00
Tejun Heo 5a0e3ad6af include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h
percpu.h is included by sched.h and module.h and thus ends up being
included when building most .c files.  percpu.h includes slab.h which
in turn includes gfp.h making everything defined by the two files
universally available and complicating inclusion dependencies.

percpu.h -> slab.h dependency is about to be removed.  Prepare for
this change by updating users of gfp and slab facilities include those
headers directly instead of assuming availability.  As this conversion
needs to touch large number of source files, the following script is
used as the basis of conversion.

  http://userweb.kernel.org/~tj/misc/slabh-sweep.py

The script does the followings.

* Scan files for gfp and slab usages and update includes such that
  only the necessary includes are there.  ie. if only gfp is used,
  gfp.h, if slab is used, slab.h.

* When the script inserts a new include, it looks at the include
  blocks and try to put the new include such that its order conforms
  to its surrounding.  It's put in the include block which contains
  core kernel includes, in the same order that the rest are ordered -
  alphabetical, Christmas tree, rev-Xmas-tree or at the end if there
  doesn't seem to be any matching order.

* If the script can't find a place to put a new include (mostly
  because the file doesn't have fitting include block), it prints out
  an error message indicating which .h file needs to be added to the
  file.

The conversion was done in the following steps.

1. The initial automatic conversion of all .c files updated slightly
   over 4000 files, deleting around 700 includes and adding ~480 gfp.h
   and ~3000 slab.h inclusions.  The script emitted errors for ~400
   files.

2. Each error was manually checked.  Some didn't need the inclusion,
   some needed manual addition while adding it to implementation .h or
   embedding .c file was more appropriate for others.  This step added
   inclusions to around 150 files.

3. The script was run again and the output was compared to the edits
   from #2 to make sure no file was left behind.

4. Several build tests were done and a couple of problems were fixed.
   e.g. lib/decompress_*.c used malloc/free() wrappers around slab
   APIs requiring slab.h to be added manually.

5. The script was run on all .h files but without automatically
   editing them as sprinkling gfp.h and slab.h inclusions around .h
   files could easily lead to inclusion dependency hell.  Most gfp.h
   inclusion directives were ignored as stuff from gfp.h was usually
   wildly available and often used in preprocessor macros.  Each
   slab.h inclusion directive was examined and added manually as
   necessary.

6. percpu.h was updated not to include slab.h.

7. Build test were done on the following configurations and failures
   were fixed.  CONFIG_GCOV_KERNEL was turned off for all tests (as my
   distributed build env didn't work with gcov compiles) and a few
   more options had to be turned off depending on archs to make things
   build (like ipr on powerpc/64 which failed due to missing writeq).

   * x86 and x86_64 UP and SMP allmodconfig and a custom test config.
   * powerpc and powerpc64 SMP allmodconfig
   * sparc and sparc64 SMP allmodconfig
   * ia64 SMP allmodconfig
   * s390 SMP allmodconfig
   * alpha SMP allmodconfig
   * um on x86_64 SMP allmodconfig

8. percpu.h modifications were reverted so that it could be applied as
   a separate patch and serve as bisection point.

Given the fact that I had only a couple of failures from tests on step
6, I'm fairly confident about the coverage of this conversion patch.
If there is a breakage, it's likely to be something in one of the arch
headers which should be easily discoverable easily on most builds of
the specific arch.

Signed-off-by: Tejun Heo <tj@kernel.org>
Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
2010-03-30 22:02:32 +09:00
Gilles Espinasse f77f13e22d Fix comment and Kconfig typos for 'require' and 'fragment'
Signed-off-by: Gilles Espinasse <g.esp@free.fr>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
2010-03-29 15:41:47 +02:00
Ralf Baechle ed14bbb24e MIPS: SB1480: Convert IRQ controller lock to raw spinlock.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-27 12:53:32 +01:00
Ralf Baechle 4a8a738de6 MIPS: Make various locks static.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-27 12:53:30 +01:00
Ralf Baechle 0863be2e8e MIPS: BCM1480: Re-apply patch lost due to bad resolution of merge conflict.
Patch 14275ccdb1e4b487cca745aba994699c426a31ee and
d5dedd4507 are conflicting and the
conflict was resolved badly in merge
92241940be501f798cb21db344bbb3d1ec3c4f1c resulting in the BCM1480 changes
of 14275ccdb1e4b487cca745aba994699c426a31ee getting lost.  Sort out the
damage.

Reported and initial patch by Mark Mason <mmason@upwardaccess.com>.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-09-30 21:46:59 +02:00
Ralf Baechle 631330f584 MIPS: Build fix - include <linux/smp.h> into all smp_processor_id() users.
Some of the were relying into smp.h being dragged in by another header
which of course is fragile.  <asm/cpu-info.h> uses smp_processor_id()
only in macros and including smp.h there leads to an include loop, so
don't change cpu-info.h.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-06-24 18:34:39 +01:00
Ingo Molnar 3d58f48ba0 Merge branch 'linus' into irq/numa
Conflicts:
	arch/mips/sibyte/bcm1480/irq.c
	arch/mips/sibyte/sb1250/irq.c

Merge reason: we gathered a few conflicts plus update to latest upstream fixes.

Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-06-01 21:06:21 +02:00
Thomas Bogendoerfer 5d81b83d03 MIPS: Sibyte: Fix locking in set_irq_affinity
Locking of irq_desc is now done in irq_set_affinity; don't lock it again
in chip specific set_affinity function.

Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-05-14 13:50:30 +01:00
Yinghai Lu d5dedd4507 irq: change ->set_affinity() to return status
according to Ingo, change set_affinity() in irq_chip should return int,
because that way we can handle failure cases in a much cleaner way, in
the genirq layer.

v2: fix two typos

[ Impact: extend API ]

Signed-off-by: Yinghai Lu <yinghai@kernel.org>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Suresh Siddha <suresh.b.siddha@intel.com>
Cc: "Eric W. Biederman" <ebiederm@xmission.com>
Cc: Rusty Russell <rusty@rustcorp.com.au>
Cc: linux-arch@vger.kernel.org
LKML-Reference: <49F654E9.4070809@kernel.org>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-04-28 12:21:16 +02:00
Ralf Baechle c87e09096d MIPS: Enable GENERIC_HARDIRQS_NO__DO_IRQ for all platforms
__do_IRQ() is deprecated and will go away.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-03-30 14:49:44 +02:00
Rusty Russell 0de26520c7 cpumask: make irq_set_affinity() take a const struct cpumask
Impact: change existing irq_chip API

Not much point with gentle transition here: the struct irq_chip's
setaffinity method signature needs to change.

Fortunately, not widely used code, but hits a few architectures.

Note: In irq_select_affinity() I save a temporary in by mangling
irq_desc[irq].affinity directly.  Ingo, does this break anything?

(Folded in fix from KOSAKI Motohiro)

Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
Signed-off-by: Mike Travis <travis@sgi.com>
Reviewed-by: Grant Grundler <grundler@parisc-linux.org>
Acked-by: Ingo Molnar <mingo@redhat.com>
Cc: ralf@linux-mips.org
Cc: grundler@parisc-linux.org
Cc: jeremy@xensource.com
Cc: KOSAKI Motohiro <kosaki.motohiro@jp.fujitsu.com>
2008-12-13 21:20:26 +10:30
Jason Wessel 8d60a903d9 [MIPS] kgdb: Remove existing implementation
This patch explicitly removes the kgdb implementation, for mips which
is intended to be followed by a patch that adds a kgdb implementation
for MIPS that makes use of the kgdb core in the kernel.

Signed-off-by: Jason Wessel <jason.wessel@windriver.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-07-30 21:54:42 +01:00
Ralf Baechle 33b75e5c51 [MIPS] Sibyte: Replace use of removed IO_SPACE_BASE with IOADDR.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-11-15 23:21:49 +00:00
Ralf Baechle a8401fa57f [MIPS] BCM1480: Remove duplicate acknowledge of timer interrupt.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-11-15 23:21:49 +00:00
Ralf Baechle faf2782bf3 [MIPS] Sibyte: Remove blank line.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-11-02 16:13:47 +00:00
Ralf Baechle 9e32a510af [MIPS] Sibyte: Build fixes / dead code removal.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-11-02 16:13:46 +00:00
Ralf Baechle 11ca25aa31 [MIPS] Sibyte: Delete {sb1250,bcm1480}_steal_irq().
They break the timer interrupt initialization and only seem to be a kludge
for initialization happening in the wrong order.  Further testing done by
Thiemo confirms the suspicion that the other invocations also seem to have
useless.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-29 19:35:35 +00:00
Ralf Baechle d04533650f [MIPS] time: SMP-proofing of Sibyte clockevent/clocksource code.
The BCM148 has 4 cores but there are also just 4 generic timers available
so use the ZBbus cycle counter instead of it.  In addition the ZBbus
counter also offers a much higher resolution and 64-bit counting so I'm
considering a later complete conversion to it once I figure out if all
members of the Sibyte SOC family support it - the docs seem to agree but
the headers files seem to disagree ...

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-22 22:09:00 +01:00
Ralf Baechle 21a151d8ca [MIPS] checkfiles: Fix "need space after that ','" errors.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-11 23:46:15 +01:00
Ralf Baechle 7bcf7717b6 [MIPS] Implement clockevents for R4000-style cp0 count/compare interrupt
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-11 23:46:09 +01:00
Ralf Baechle fbd0ed37c8 [MIPS] BCM1480: Fix computation of interrupt mask address register.
CC      arch/mips/sibyte/bcm1480/irq.o
arch/mips/sibyte/bcm1480/irq.c: In function 'bcm1480_mask_irq':
arch/mips/sibyte/bcm1480/irq.c:112: warning: cast to pointer from integer of different size
arch/mips/sibyte/bcm1480/irq.c:114: warning: cast to pointer from integer of different size
arch/mips/sibyte/bcm1480/irq.c: In function 'bcm1480_unmask_irq':
arch/mips/sibyte/bcm1480/irq.c:130: warning: cast to pointer from integer of different size
arch/mips/sibyte/bcm1480/irq.c:132: warning: cast to pointer from integer of different size

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-09-10 21:25:27 +01:00
Ralf Baechle 477f949e0a [MIPS] Sibyte: CONFIG_SIBYTE_SB1250_DUART -> CONFIG_SERIAL_SB1250_DUART
This is needed since the Sibyte serial driver was exchanged.

Issue report by Imre Kaloz <kaloz@openwrt.org>.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-08-27 02:16:51 +01:00
Mark Mason 6c9fde4bff [MIPS] BCM1480: Fix setting of irq affinity.
Signed-off-by: Mark Mason <mason@broadcom.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-03-29 23:46:36 +01:00
Ralf Baechle 36a885306f [MIPS] Fix and cleanup the mess that a dozen prom_printf variants are.
early_printk is a so much saner thing.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-03-04 19:02:37 +00:00
Atsushi Nemoto 70d21cdeef [MIPS] use name instead of typename for each irq_chip
The "typename" field was obsoleted by the "name" field.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-02-06 16:53:14 +00:00
Atsushi Nemoto 1603b5aca4 [MIPS] IRQ cleanups
This is a big irq cleanup patch.

* Use set_irq_chip() to register irq_chip.
* Initialize .mask, .unmask, .mask_ack field.  Functions for these
  method are already exist in most case.
* Do not initialize .startup, .shutdown, .enable, .disable fields if
  default routines provided by irq_chip_set_defaults() were suitable.
* Remove redundant irq_desc initializations.
* Remove unnecessary local_irq_save/local_irq_restore, spin_lock.

With this cleanup, it would be easy to switch to slightly lightwait
irq flow handlers (handle_level_irq(), etc.) instead of __do_IRQ().

Though whole this patch is quite large, changes in each irq_chip are
not quite simple.  Please review and test on your platform.  Thanks.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-11-30 01:14:46 +00:00
Ralf Baechle 27f768192f [MIPS] Cleanup unnecessary <asm/ptrace.h> inclusions.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-10-09 00:15:28 +01:00
Ralf Baechle 937a801576 [MIPS] Complete fixes after removal of pt_regs argument to int handlers.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-10-08 02:38:28 +01:00
Ralf Baechle 34c2dd01fd [MIPS] BCM1480: Mask pending interrupts against c0_status.im.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-10-03 17:59:17 +01:00
Ralf Baechle dc41fb4396 [MIPS] Fix 32-bit kernel by replacing 64-bit-only code.
dclz() expects its 64-bit argument being passed as a single register
but on 32-bit kernels it'll actually be in a register pair.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27 13:37:35 +01:00
Thiemo Seufer 5af1c7a4d4 [MIPS] BCM1480: Fix fatal typo in the rewritten interrupt handler.
Signed-off-by: Thiemo Seufer <ths@networkno.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-07-13 21:26:05 +01:00
Thiemo Seufer 6e61e85b09 [MIPS] Sibyte: Improve interrupt latency again for sb1250/bcm1480
this patch restores the behaviour of the old (assembly-written)
interrupt handler, the handler is left as soon as a single interrupt
cause is handled.

Signed-off-by: Thiemo Seufer <ths@networkno.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-07-13 21:26:05 +01:00
Ralf Baechle 94dee171df [MIPS] Eleminate interrupt migration helper use.
> #define hw_interrupt_type       irq_chip
> typedef struct irq_chip         hw_irq_controller;
> #define no_irq_type             no_irq_chip
> typedef struct irq_desc         irq_desc_t;

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-07-13 21:25:58 +01:00
Jörn Engel 6ab3d5624e Remove obsolete #include <linux/config.h>
Signed-off-by: Jörn Engel <joern@wohnheim.fh-wedel.de>
Signed-off-by: Adrian Bunk <bunk@stusta.de>
2006-06-30 19:25:36 +02:00
Ingo Molnar d1bef4ed5f [PATCH] genirq: rename desc->handler to desc->chip
This patch-queue improves the generic IRQ layer to be truly generic, by adding
various abstractions and features to it, without impacting existing
functionality.

While the queue can be best described as "fix and improve everything in the
generic IRQ layer that we could think of", and thus it consists of many
smaller features and lots of cleanups, the one feature that stands out most is
the new 'irq chip' abstraction.

The irq-chip abstraction is about describing and coding and IRQ controller
driver by mapping its raw hardware capabilities [and quirks, if needed] in a
straightforward way, without having to think about "IRQ flow"
(level/edge/etc.) type of details.

This stands in contrast with the current 'irq-type' model of genirq
architectures, which 'mixes' raw hardware capabilities with 'flow' details.
The patchset supports both types of irq controller designs at once, and
converts i386 and x86_64 to the new irq-chip design.

As a bonus side-effect of the irq-chip approach, chained interrupt controllers
(master/slave PIC constructs, etc.) are now supported by design as well.

The end result of this patchset intends to be simpler architecture-level code
and more consolidation between architectures.

We reused many bits of code and many concepts from Russell King's ARM IRQ
layer, the merging of which was one of the motivations for this patchset.

This patch:

rename desc->handler to desc->chip.

Originally i did not want to do this, because it's a big patch.  But having
both "desc->handler", "desc->handle_irq" and "action->handler" caused a
large degree of confusion and made the code appear alot less clean than it
truly is.

I have also attempted a dual approach as well by introducing a
desc->chip alias - but that just wasnt robust enough and broke
frequently.

So lets get over with this quickly.  The conversion was done automatically
via scripts and converts all the code in the kernel.

This renaming patch is the first one amongst the patches, so that the
remaining patches can stay flexible and can be merged and split up
without having some big monolithic patch act as a merge barrier.

[akpm@osdl.org: build fix]
[akpm@osdl.org: another build fix]
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-06-29 10:26:21 -07:00
Ralf Baechle e4ac58afdf [MIPS] Rewrite all the assembler interrupt handlers to C.
Saves like 1,600 lines of code, is way easier to debug, compilers
frequently do a better job than the cut and paste type of handlers many
boards had.  And finally having all the stuff done in a single place
also means alot of bug potencial for the MT ASE is gone.

The only surviving handler in assembler is the DECstation one; I hope
Maciej will rewrite it.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-04-19 04:14:21 +02:00
Martin Michlmayr 76e1daee7d [MIPS] Fix compiler warnings in arch/mips/sibyte/bcm1480/irq.c
Fix the following compiler warnings:
    
  CC      arch/mips/sibyte/bcm1480/irq.o
arch/mips/sibyte/bcm1480/irq.c: In function ‘bcm1480_set_affinity’:
arch/mips/sibyte/bcm1480/irq.c:168: warning: ISO C90 forbids mixed declarations and code
arch/mips/sibyte/bcm1480/irq.c: In function ‘ack_bcm1480_irq’:
arch/mips/sibyte/bcm1480/irq.c:230: warning: ISO C90 forbids mixed declarations and code
    
Signed-off-by: Martin Michlmayr <tbm@cyrius.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-02-21 16:58:23 +00:00
Andrew Isaacson f137e463b5 Add support for BCM1480 family of chips.
- Kconfig and Makefile changes
 - arch/mips/sibyte/bcm1480/
 - changes to sibyte common code to support 1480
    
Signed-Off-By: Andy Isaacson <adi@broadcom.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:32:47 +01:00