Commit Graph

5 Commits

Author SHA1 Message Date
Thomas Gleixner 97fb5e8d9b treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 284
Based on 1 normalized pattern(s):

  this program is free software you can redistribute it and or modify
  it under the terms of the gnu general public license version 2 and
  only version 2 as published by the free software foundation this
  program is distributed in the hope that it will be useful but
  without any warranty without even the implied warranty of
  merchantability or fitness for a particular purpose see the gnu
  general public license for more details

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-only

has been chosen to replace the boilerplate/reference in 294 file(s).

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Allison Randal <allison@lohutok.net>
Reviewed-by: Alexios Zavras <alexios.zavras@intel.com>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190529141900.825281744@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-06-05 17:36:37 +02:00
Timur Tabi e508099084 pinctrl: qcom: qdf2xxx: add support for new ACPI HID QCOM8002
Newer versions of the firmware for the Qualcomm Datacenter Technologies
QDF2400 restricts access to a subset of the GPIOs on the TLMM.  To
prevent older kernels from accidentally accessing the restricted GPIOs,
we change the ACPI HID for the TLMM block from QCOM8001 to QCOM8002,
and introduce a new property "gpios".  This property is an array of
specific GPIOs that are accessible.  When an older kernel boots on
newer (restricted) firmware, it will fail to probe.

To implement the sparse GPIO map, we register all of the GPIOs, but
fill in the data only for available GPIOs.  This ensures that the driver
cannot accidentally access an unavailable GPIO.

The pinctrl-msm driver also scans the "gpios" property to determine
which pins are available, and ensure that only those can be registered.

Support for QCOM8001 is removed as there is no longer any firmware that
implements it.

Signed-off-by: Timur Tabi <timur@codeaurora.org>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-05-02 14:36:08 +02:00
Timur Tabi a9ee6bd44c pinctrl: qcom: qdf2xxx: add names to the gpios
The sysfs and debugfs entries for pin control drivers work better when
the individual pins are given real names, even if they are all just
"gpio0", "gpio1", etc.

Signed-off-by: Timur Tabi <timur@codeaurora.org>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-03-16 16:39:04 +01:00
Timur Tabi beee39099b pinctrl: qcom: qdf2xxx: improve error checking and reporting
The driver doesn't report an error message if the ACPI tables are missing
the num-gpios property (which indicates how many GPIOs there are on this
SOC), and it didn't check to ensure that the mallocs didn't fail.

Signed-off-by: Timur Tabi <timur@codeaurora.org>
Reviewed-by: Björn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-12-01 09:59:02 +01:00
Timur Tabi 8f1338cd80 pinctrl: add support for Qualcomm Technologies QDF2xxx ARM64 SoCs
Add the pinctrl driver for the Qualcomm Technologies QDF2xxx ARM64 SoCs,
which uses the Qualcomm Technologies TLMM pinctrl/gpio device.  This
driver is probed via ACPI and uses the pinctrl-msm.c backend driver.

This driver is intended to be used only an ACPI-enabled system.  As such,
UEFI will handle all pin control configuration, so this driver does not
provide pin control functions.  It is effectively a GPIO-only driver.

Signed-off-by: Timur Tabi <timur@codeaurora.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-07-17 21:56:14 +02:00