Commit Graph

873686 Commits

Author SHA1 Message Date
LeoLiu-oc 2c24189e6f ALSA: hda: Add support of Zhaoxin NB HDAC codec
zhaoxin inclusion
category: feature

-------------------

Add Zhaoxin NB HDAC codec support.

Signed-off-by: LeoLiu-oc <leoliu-oc@zhaoxin.com>
2024-10-21 14:04:43 +08:00
LeoLiu-oc 2fa2a551f9 ALSA: hda: Add support of Zhaoxin NB HDAC
zhaoxin inclusion
category: feature

-------------------

Add the new PCI ID 0x1d17 0x9141/0x9142/0x9144 Zhaoxin NB HDAC
support. And add some special initialization for Zhaoxin NB HDAC.

Signed-off-by: LeoLiu-oc <leoliu-oc@zhaoxin.com>
2024-10-21 14:02:07 +08:00
leoliu-oc 67bfb6833c ALSA: hda: Add support of Zhaoxin SB HDAC
zhaoxin inclusion
category: feature

-------------------

Add some special initialization for Zhaoxin SB HDAC.

Signed-off-by: leoliu-oc <leoliu-oc@zhaoxin.com>
2024-10-21 13:50:13 +08:00
chinaljp030 74935aa083
!235 Phytium: Support for Multiple Code Copies
Merge pull request !235 from 5.4-duptext-phytium
2024-10-16 08:08:54 +00:00
wangzhimin e007f5685f duptext: export fault data structure, add mmu notifier when memory unmap and add an offset to heap segment
Signed-off-by: wangzhimin1179@phytium.com.cn
2024-10-08 10:20:31 +08:00
Jianping Liu 23fc10f227 dist,sepc: supprot kernel-debug in core and modules and devel rpm
When CONFIG="generic-release", %{rpm_name} is kernel, when
CONFIG="generic-debug", %{rpm_name} is kernel-debug.

Provides: kernel-debug-core in kernel-debug-core rpm
Provides: kernel-debug-modules in kernel-debug-modules rpm
Provides: kernel-debug-devel in kernel-debug-devel rpm

Signed-off-by: Jianping Liu <frankjpliu@tencent.com>
Reviewed-by: Yongliang Gao <leonylgao@tencent.com>
2024-09-27 11:12:29 +08:00
Jianping Liu 57c24f79d0 dist,Makefile: generic-debug config only build kernel rpm
We intend to archive kernle-debug rpm in yum. Release kernel will
build perf/tools/bpf-tools rpm, to avoid kernle-debug build the same
rpm, disable them.

Signed-off-by: Jianping Liu <frankjpliu@tencent.com>
2024-09-25 19:07:13 +08:00
刘诗 007360a952
!227 [linux-5.4/next] Fix some xHCI issues for Zhaoxin CPUs
Merge pull request !227 from LeoLiu-oc/linux-5.4-next-09-10-11-12-xhci
2024-09-20 08:16:22 +00:00
刘诗 b650f3d75f
!225 [linux-5.4/next] x86: Kconfig: make X86_UMIP to cover Zhaoxin CPUs
Merge pull request !225 from LeoLiu-oc/linux-5.4-next-06-umip-kconfig
2024-09-20 08:13:58 +00:00
刘诗 acbd9812fc
!224 [linux-5.4/next] x86/speculation/swapgs: Exclude Zhaoxin CPUs from SWAPGS vulnerability
Merge pull request !224 from LeoLiu-oc/linux-5.4-next-05-x86-bugs
2024-09-20 08:03:18 +00:00
刘诗 6b0e4a25e5
!223 [linux-5.4-next] Add MCA support for Zhaoxin CPUs
Merge pull request !223 from LeoLiu-oc/linux-5.4-next-04-mce
2024-09-20 08:02:54 +00:00
刘诗 16c28e88fd
!222 [linux-5.4/next] ACPI, x86: Improve Zhaoxin processors support for NONSTOP TSC
Merge pull request !222 from LeoLiu-oc/linux-5.4-next-02-nonstop-tsc
2024-09-20 08:00:49 +00:00
刘诗 2b42d3f326
!221 [linux-5.4/next] Add support for Zhaoxin CPUs
Merge pull request !221 from LeoLiu-oc/linux-5.4-next-01-zhaoxin-support
2024-09-20 08:00:23 +00:00
leoliu-oc 4513f0a9b1 x86/cpu: Add detect extended topology for Zhaoxin CPUs
zhaoxin inclusion
category: feature
version: v3.0.6

-------------------

Detect the extended topology information of Zhaoxin CPUs if available.

Signed-off-by: leoliu-oc <leoliu-oc@zhaoxin.com>
2024-09-20 14:28:32 +08:00
leoliu-oc a51cde26d6 x86/cpufeatures: Add Zhaoxin feature bits
zhaoxin inclusion
category: feature

-------------------

Add Zhaoxin feature bits on Zhaoxin CPUs.

Signed-off-by: leoliu-oc <leoliu-oc@zhaoxin.com>
2024-09-20 14:27:09 +08:00
Jianping Liu b2be5c757d README.md: add images about README.md 2024-09-09 19:24:09 +08:00
Jianping Liu 6a8f6c32d9 README.md: update README.md
Update README.md with OC Kernel features introduce.
2024-09-09 19:00:59 +08:00
Jianping Liu e9367f76c5 dist: set with_ofed to 0 in OC8 kernel
OC need not compile mlnx commercial drivers.
2024-08-30 16:28:40 +08:00
leoliu-oc b35f54c488 xhci: Add ZHAOXIN xHCI host U1/U2 feature support
mainline inclusion
from mainline-v6.4-rc5
commit <d5e234ff08a45a7a08a52173ed793b3c125ab88d>

-------------------

Add U1/U2 feature support of xHCI for ZHAOXIN.
Since both INTEL and ZHAOXIN need to check the tier where the device is
located to determine whether to enabled U1/U2, remove the previous INTEL
U1/U2 tier policy and add common policy in xhci_check_tier_policy.
If vendor has specific U1/U2 enable policy,quirks can be add to declare.

Suggested-by: Mathias Nyman <mathias.nyman@linux.intel.com>
Signed-off-by: Weitao Wang <WeitaoWang-oc@zhaoxin.com>
Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
Message-ID: <20230602144009.1225632-12-mathias.nyman@linux.intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

Signed-off-by: leoliu-oc <leoliu-oc@zhaoxin.com>
2024-08-28 17:46:01 +08:00
leoliu-oc e62d48d0a1 xhci: Show ZHAOXIN xHCI root hub speed correctly
mainline inclusion
from mainline-v6.4-rc5
commit <d9b0328d0b8b8298dfdc97cd8e0e2371d4bcc97b>

-------------------

Some ZHAOXIN xHCI controllers follow usb3.1 spec, but only support
gen1 speed 5Gbps. While in Linux kernel, if xHCI suspport usb3.1,
root hub speed will show on 10Gbps.
To fix this issue of ZHAOXIN xHCI platforms, read usb speed ID
supported by xHCI to determine root hub speed. And add a quirk
XHCI_ZHAOXIN_HOST for this issue.

[fix warning about uninitialized symbol -Mathias]

Suggested-by: Mathias Nyman <mathias.nyman@linux.intel.com>
Cc: stable@vger.kernel.org
Signed-off-by: Weitao Wang <WeitaoWang-oc@zhaoxin.com>
Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
Message-ID: <20230602144009.1225632-11-mathias.nyman@linux.intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

Signed-off-by: leoliu-oc <leoliu-oc@zhaoxin.com>
2024-08-28 17:41:56 +08:00
leoliu-oc ac01ca6191 xhci: Fix TRB prefetch issue of ZHAOXIN hosts
mainline inclusion
from mainline-v6.4-rc5
commit <2a865a652299f5666f3b785cbe758c5f57453036>

-------------------

On some ZHAOXIN hosts, xHCI will prefetch TRB for performance
improvement. However this TRB prefetch mechanism may cross page boundary,
which may access memory not allocated by xHCI driver. In order to fix
this issue, two pages was allocated for a segment and only the first
page will be used. And add a quirk XHCI_ZHAOXIN_TRB_FETCH for this issue.

Cc: stable@vger.kernel.org
Signed-off-by: Weitao Wang <WeitaoWang-oc@zhaoxin.com>
Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
Message-ID: <20230602144009.1225632-10-mathias.nyman@linux.intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

Signed-off-by: leoliu-oc <leoliu-oc@zhaoxin.com>
2024-08-28 17:39:45 +08:00
leoliu-oc 13c6608619 xhci: Fix resume issue of some ZHAOXIN hosts
mainline inclusion
from mainline-v6.4-rc5
commit <f927728186f0de1167262d6a632f9f7e96433d1a>

-------------------

On ZHAOXIN ZX-100 project, xHCI can't work normally after resume
from system Sx state. To fix this issue, when resume from system
Sx state, reinitialize xHCI instead of restore.
So, Add XHCI_RESET_ON_RESUME quirk for ZX-100 to fix issue of
resuming from system Sx state.

Cc: stable@vger.kernel.org
Signed-off-by: Weitao Wang <WeitaoWang-oc@zhaoxin.com>
Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
Message-ID: <20230602144009.1225632-9-mathias.nyman@linux.intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

Signed-off-by: leoliu-oc <leoliu-oc@zhaoxin.com>
2024-08-28 17:34:23 +08:00
leoliu-oc c7164d37b8 x86/Kconfig: Drop vendor dependency for X86_UMIP
mainline inclusion
from mainline-v5.6-rc2
commit <bdb04a1abbf92c998f1afb5f00a037f2edaec1f7>

-------------------

Some Centaur family 7 CPUs and Zhaoxin family 7 CPUs support the UMIP
feature too. The text size growth which UMIP adds is ~1K and distro
kernels enable it anyway so remove the vendor dependency.

 [ bp: Rewrite commit message. ]

Signed-off-by: Tony W Wang-oc <TonyWWang-oc@zhaoxin.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Link: https://lkml.kernel.org/r/1583733990-2587-1-git-send-email-TonyWWang-oc@zhaoxin.com

Signed-off-by: leoliu-oc <leoliu-oc@zhaoxin.com>
2024-08-28 17:02:13 +08:00
leoliu-oc a2d613deb6 x86/Kconfig: Rename UMIP config parameter
mainline inclusion
from mainline-v5.4-rc1
commit <b971880fe79f4042aaaf426744a5b19521bf77b3>

-------------------

AMD 2nd generation EPYC processors support the UMIP (User-Mode
Instruction Prevention) feature. So, rename X86_INTEL_UMIP to
generic X86_UMIP and modify the text to cover both Intel and AMD.

 [ bp: take of the disabled-features.h copy in tools/ too. ]

Signed-off-by: Babu Moger <babu.moger@amd.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Cc: Andy Lutomirski <luto@kernel.org>
Cc: "H. Peter Anvin" <hpa@zytor.com>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Ricardo Neri <ricardo.neri-calderon@linux.intel.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: "x86@kernel.org" <x86@kernel.org>
Link: https://lkml.kernel.org/r/157298912544.17462.2018334793891409521.stgit@naples-babu.amd.com

Signed-off-by: leoliu-oc <leoliu-oc@zhaoxin.com>
2024-08-28 16:46:35 +08:00
Huang Cun e5646556fd
!218 [next-5.4]scsi: hisi_sas: Modify the deadline for ata_wait_after_reset()
Merge pull request !218 from chenyi/linux-5.4/cy
2024-08-28 02:25:38 +00:00
leoliu-oc 236e1d8d58 x86/speculation/swapgs: Exclude Zhaoxin CPUs from SWAPGS vulnerability
mainline inclusion
from mainline-v5.5-rc6
commit <a84de2fa962c1b0551653fe245d6cb5f6129179c>

-------------------

New Zhaoxin family 7 CPUs are not affected by the SWAPGS vulnerability. So
mark these CPUs in the cpu vulnerability whitelist accordingly.

Signed-off-by: Tony W Wang-oc <TonyWWang-oc@zhaoxin.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Link: https://lore.kernel.org/r/1579227872-26972-3-git-send-email-TonyWWang-oc@zhaoxin.com

Signed-off-by: leoliu-oc <leoliu-oc@zhaoxin.com>
2024-08-26 18:00:33 +08:00
leoliu-oc 92eeccad98 x86/mce: Add Centaur MCA support
zhaoxin inclusion
category: feature

-------------------

Add MCA support for some Zhaoxin CPUs which use X86_VENDOR_CENTAUR
as vendor ID.

Signed-off-by: leoliu-oc <leoliu-oc@zhaoxin.com>
2024-08-26 17:51:29 +08:00
leoliu-oc 606c99c0a8 x86/mce: Add Zhaoxin LMCE support
mainline inclusion
from mainline-v5.4-rc1
commit <70f0c230031dfef3c9b3e37b2a8c18d3f7186fb2>
category: feature

-------------------

Newer Zhaoxin CPUs support LMCE compatible with Intel. Add support for
that.

 [ bp: Export functions and massage. ]

Signed-off-by: Tony W Wang-oc <TonyWWang-oc@zhaoxin.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Cc: CooperYan@zhaoxin.com
Cc: DavidWang@zhaoxin.com
Cc: HerryYang@zhaoxin.com
Cc: "H. Peter Anvin" <hpa@zytor.com>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: linux-edac <linux-edac@vger.kernel.org>
Cc: QiyuanWang@zhaoxin.com
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Tony Luck <tony.luck@intel.com>
Cc: x86-ml <x86@kernel.org>
Link: https://lkml.kernel.org/r/1568787573-1297-5-git-send-email-TonyWWang-oc@zhaoxin.com

Signed-off-by: leoliu-oc <leoliu-oc@zhaoxin.com>
2024-08-26 17:44:59 +08:00
leoliu-oc 917b905e6c x86/mce: Add Zhaoxin CMCI support
mainline inclusion
from mainline-v5.4-rc1
commit <5a3d56a034be9e8e87a6cb9ed3f2928184db1417>
category: feature

-------------------

All newer Zhaoxin CPUs support CMCI and are compatible with Intel's
Machine-Check Architecture. Add that support for Zhaoxin CPUs.

 [ bp: Massage comments and export intel_init_cmci(). ]

Signed-off-by: Tony W Wang-oc <TonyWWang-oc@zhaoxin.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Cc: CooperYan@zhaoxin.com
Cc: DavidWang@zhaoxin.com
Cc: HerryYang@zhaoxin.com
Cc: "H. Peter Anvin" <hpa@zytor.com>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: linux-edac <linux-edac@vger.kernel.org>
Cc: QiyuanWang@zhaoxin.com
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Tony Luck <tony.luck@intel.com>
Cc: x86-ml <x86@kernel.org>
Link: https://lkml.kernel.org/r/1568787573-1297-4-git-send-email-TonyWWang-oc@zhaoxin.com

Signed-off-by: leoliu-oc <leoliu-oc@zhaoxin.com>
2024-08-26 17:44:56 +08:00
leoliu-oc 48e4acdaec x86/mce: Add Zhaoxin MCE support
mainline inclusion
from mainline-v5.4-rc1
commit <6e898d2bf67a82df0aa0c955adc9278faba9a635>
category: feature

-------------------

All newer Zhaoxin CPUs are compatible with Intel's Machine-Check
Architecture, so add support for them.

 [ bp: Reflow comment in vendor_disable_error_reporting() and massage
   commit message. ]

Signed-off-by: Tony W Wang-oc <TonyWWang-oc@zhaoxin.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Cc: CooperYan@zhaoxin.com
Cc: DavidWang@zhaoxin.com
Cc: HerryYang@zhaoxin.com
Cc: "H. Peter Anvin" <hpa@zytor.com>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: linux-edac <linux-edac@vger.kernel.org>
Cc: QiyuanWang@zhaoxin.com
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Tony Luck <tony.luck@intel.com>
Cc: x86-ml <x86@kernel.org>
Link: https://lkml.kernel.org/r/1568787573-1297-2-git-send-email-TonyWWang-oc@zhaoxin.com

Signed-off-by: leoliu-oc <leoliu-oc@zhaoxin.com>
2024-08-26 17:44:54 +08:00
leoliu-oc 2363e45b68 ACPI, x86: Improve Zhaoxin processors support for NONSTOP TSC
mainline inclusion
from mainline-v6.4-rc6
commit <b72f301c5bdce11ef32a7363bdc05edd4fc3b386>
category: feature

-------------------

Zhaoxin CPUs which use CENTAUR as vendor id, also have NONSTOP TSC
feature. So enable the ACPI driver support for it too.

Signed-off-by: leoliu-oc <leoliu-oc@zhaoxin.com>
2024-08-26 17:25:20 +08:00
leoliu-oc 8beb9ef189 x86/cpu/centaur: Add Centaur family >=7 CPUs initialization support
mainline inclusion
from mainline-v5.9-rc1
commit <33b4711df4c1b3aec7c267c60fc24abccfadd40c>
category: feature

-------------------
Add Centaur family >=7 CPUs specific initialization support.

Signed-off-by: Tony W Wang-oc <TonyWWang-oc@zhaoxin.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Link: https://lkml.kernel.org/r/1599562666-31351-3-git-send-email-TonyWWang-oc@zhaoxin.com

Signed-off-by: leoliu-oc <leoliu-oc@zhaoxin.com>
2024-08-26 16:54:08 +08:00
leoliu-oc 0e070b4bb8 x86/cpu/centaur: Replace two-condition switch-case with an if statement
mainline inclusion
from mainline-v5.9-rc1
commit <8687bdc04128b2bd16faaae11db10128ad0da7b8>
category: feature

-------------------

Use a normal if statements instead of a two-condition switch-case.

 [ bp: Massage commit message. ]

Signed-off-by: Tony W Wang-oc <TonyWWang-oc@zhaoxin.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Link: https://lkml.kernel.org/r/1599562666-31351-2-git-send-email-TonyWWang-oc@zhaoxin.com

Signed-off-by: leoliu-oc <leoliu-oc@zhaoxin.com>
2024-08-26 16:54:06 +08:00
leoliu-oc adbb2ac925 x86/cpu: Remove redundant cpu_detect_cache_sizes() call
mainline inclusion
from mainline-v5.5-rc1
commit <283bab9809786cf41798512f5c1e97f4b679ba96>
category: feature

-------------------

Both functions call init_intel_cacheinfo() which computes L2 and L3 cache
sizes from CPUID(4). But then they also call cpu_detect_cache_sizes() a
bit later which computes ->x86_tlbsize and L2 size from CPUID(80000006).

However, the latter call is not needed because

 - on these CPUs, CPUID(80000006).EBX for ->x86_tlbsize is reserved

 - CPUID(80000006).ECX for the L2 size has the same result as CPUID(4)

Therefore, remove the latter call to simplify the code.

 [ bp: Rewrite commit message. ]

Signed-off-by: Tony W Wang-oc <TonyWWang-oc@zhaoxin.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Link: https://lkml.kernel.org/r/1579075257-6985-1-git-send-email-TonyWWang-oc@zhaoxin.com

Signed-off-by: leoliu-oc <leoliu-oc@zhaoxin.com>
2024-08-26 16:42:42 +08:00
leoliu-oc 62982bda95 x86/zhaoxin: Use common IA32_FEAT_CTL MSR initialization
mainline inclusion
from mainline-v5.5-rc1
commit <7d37953ba81121c8725f99356f7ee9762d4c3ed9>
category: feature

-------------------

Use the recently added IA32_FEAT_CTL MSR initialization sequence to
opportunistically enable VMX support when running on a Zhaoxin CPU.

Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Link: https://lkml.kernel.org/r/20191221044513.21680-8-sean.j.christopherson@intel.com

Signed-off-by: leoliu-oc <leoliu-oc@zhaoxin.com>
2024-08-26 16:38:35 +08:00
leoliu-oc dd1d37a84b x86/centaur: Use common IA32_FEAT_CTL MSR initialization
mainline inclusion
from mainline-v5.5-rc1
commit <501444905fcb4166589fda99497c273ac5efc65e>
category: feature

-------------------

Use the recently added IA32_FEAT_CTL MSR initialization sequence to
opportunistically enable VMX support when running on a Centaur CPU.

Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Link: https://lkml.kernel.org/r/20191221044513.21680-7-sean.j.christopherson@intel.com

Signed-off-by: leoliu-oc <leoliu-oc@zhaoxin.com>
2024-08-26 16:37:04 +08:00
Yihang Li f69b22de11 scsi: hisi_sas: Modify the deadline for ata_wait_after_reset()
driver inclusion
category: bugfix
bugzilla: https://gitee.com/openeuler/kernel/issues/I96KNQ
CVE: NA

----------------------------------------------------------------------

We found that the second parameter of function ata_wait_after_reset() is
incorrectly used. We call smp_ata_check_ready_type() to poll the device
type until the 30s timeout, so the correct deadline should be (jiffies +
30000).

Fixes: 3c2673a09c ("scsi: hisi_sas: Fix SATA devices missing issue during I_T nexus reset")
Signed-off-by: xiabing <xiabing12@h-partners.com>
Signed-off-by: Yihang Li <liyihang9@huawei.com>
Reviewed-by: Xiang Chen <chenxiang66@hisilicon.com>
Signed-off-by: Bing Xia <xiabing12@h-partners.com>
Signed-off-by: chenyi <chenyi211@huawei.com>
2024-08-20 04:26:38 -04:00
Huang Cun 2bf5a747a0 gpu: phytium: add depends on ARM64 and ARCH_PHYTIUM
Signed-off-by: Huang Cun <cunhuang@tencent.com>
2024-08-13 17:30:31 +08:00
Huang Cun a4ffb5a429 sssnic: adapting compilation for tencentos
Signed-off-by: Huang Cun <cunhuang@tencent.com>
2024-08-13 17:19:32 +08:00
Huang Cun 37c2f83262 cpufreq: CPPC: Add support for frequency invariance's divide-by zero part
fix ampere cpu kernel warning:
cpufreg: cpufreg_online: ->get() failed
refer upstream 1eb5dde674 (cpufreq: CPPC: Add support for frequency invariance)
backport this commit's divide-by zero part

Signed-off-by: Huang Cun <cunhuang@tencent.com>
2024-08-13 14:22:59 +08:00
Huang Cun 4ad0c632c2 update arm-cmn.c from tkernel5
This is the original code update from tkernel5 master tree with commit id 1f87429485

Signed-off-by: Huang Cun <cunhuang@tencent.com>
2024-08-13 14:22:37 +08:00
Robin Murphy c649df6d2d perf: Add Arm CMN-600 PMU driver
config: set CONFIG_ARM_CMN=m

To support arm-cmn.ko for performance debug
‘for’ loop initial declarations are only allowed in C99 or C11 mode
so set CFLAGS_arm-cmn.o += -std=gnu99

commit 0ba64770a2 upstream.

Initial driver for PMU event counting on the Arm CMN-600 interconnect.
CMN sports an obnoxiously complex distributed PMU system as part of
its debug and trace features, which can do all manner of things like
sampling, cross-triggering and generating CoreSight trace. This driver
covers the PMU functionality, plus the relevant aspects of watchpoints
for simply counting matching flits.

Tested-by: Tsahi Zidenberg <tsahee@amazon.com>
Tested-by: Tuan Phan <tuanphan@os.amperecomputing.com>
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Will Deacon <will@kernel.org>
Signed-off-by: Huang Cun <cunhuang@tencent.com>
2024-08-13 14:21:45 +08:00
Bartosz Golaszewski b264ba41b2 devres: provide devm_krealloc()
add this patch for arm-cmn
commit f82485722e upstream.

Implement the managed variant of krealloc(). This function works with
all memory allocated by devm_kmalloc() (or devres functions using it
implicitly like devm_kmemdup(), devm_kstrdup() etc.).

Managed realloc'ed chunks can be manually released with devm_kfree().

Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20200824173859.4910-2-brgl@bgdev.pl
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Huang Cun <cunhuang@tencent.com>
2024-08-13 11:43:51 +08:00
Bartosz Golaszewski ac3e23db87 devres: move the size check from alloc_dr() into a separate function
add this patch for arm-cmn
commit dc2a633ccb upstream.

We will perform the same size check in devm_krealloc(). Move the relevant
code into a separate helper.

Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Link: https://lore.kernel.org/r/20200629065008.27620-3-brgl@bgdev.pl
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Huang Cun <cunhuang@tencent.com>
2024-08-13 11:43:24 +08:00
Jianping Liu 8698752488 config-readme: update config-readme
Describe how to generate and change kernel config.

Signed-off-by: Jianping Liu <frankjpliu@tencent.com>
Reviewed-by: Yongliang Gao <leonylgao@tencent.com>
2024-07-16 16:35:01 +08:00
Jianping Liu 3a5b595eca thirdparty/bnxt: set -Wframe-larger-than=2144 in Makefile
To fix compile error when building debug kernel:
bnxt/tfc_v3/tfc_tbl_scope.c: In function 'tfc_tbl_scope_mem_alloc':
bnxt/tfc_v3/tfc_tbl_scope.c:1185:1: error: the frame size of 2144 bytes is larger than 2048 bytes [-Werror=frame-larger-than=]

Signed-off-by: Jianping Liu <frankjpliu@tencent.com>
Reviewed-by: Yongliang Gao <leonylgao@tencent.com>
2024-07-16 16:35:01 +08:00
Jianping Liu a61b032d57 thirdpaty/bnxt: update bnxt_en driver to 230
For details, the version is bnxt_en-1.10.3-230.2.52.0 . Note, bnxt_en
doesn't support RDMA, which needing bnxt_re driver.

Makefile in thirdpaty/bnxt have been modified:
add line 54: BNXT_SRC=$(srctree)/drivers/thirdparty/bnxt
add line 1420: src=$(BNXT_SRC)

Without line 1420, make dist-rpm will compile error as below:
drivers/thirdparty/bnxt/bnxt.c:111:10: fatal error: tfc.h: No such file or directory
 #include "tfc.h"

Signed-off-by: Jianping Liu <frankjpliu@tencent.com>
Reviewed-by: Yongliang Gao <leonylgao@tencent.com>
2024-07-16 16:35:01 +08:00
chinaljp030 701790887b
!195 [next-5.4] DRM phytium Add Phytium Display Engine support
Merge pull request !195 from xuyan213/5.4-test
2024-07-15 10:55:27 +00:00
xuyan 3a51cb695a DRM: Fix Phytium DRM build fail
Fix error :modpost "__sanitizer_cov_trace_cmpf"

Reviewed-by: Jiakun Shuai<shuaijiakun1288@phytium.com.cn>
Signed-off-by: Yang Xun <yangxun@phytium.com.cn>
Signed-off-by: Chen Baozi <chenbaozi@phytium.com.cn>
Signed-off-by: xuyan <xuyan1481@phytium.com.cn>
2024-07-15 10:39:05 +08:00
Jason Xing 2f729cf216 sssnic: add one dependency in Kconfig
Getting rid of prefix 'CONFIG_' can solve the issue. In the
previous patch, I missed one place.

Most importantly, I added dependency on CONFIG_PCI_ATS since
This drivers relys on CONFIG_PCI_ATS, so we need to adjust in
Kconfig files.

Fixes: ee280c4189a13 ("sssnic: support this new driver")
Signed-off-by: Jason Xing <kernelxing@tencent.com>
2024-06-27 11:04:15 +08:00