Commit Graph

5 Commits

Author SHA1 Message Date
Benjamin Gaignard 9eba381bf8 iio: make stm32 trigger driver use INDIO_HARDWARE_TRIGGERED mode
Add validate function to be use to use the correct trigger.
Add an attribute to configure device mode like for quadrature and
enable modes

Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2017-06-11 15:59:05 +01:00
Fabrice Gasnier 6fb34812c2 iio: stm32 trigger: Add support for TRGO2 triggers
Add support for TRGO2 trigger that can be found on STM32F7.
Add additional master modes supported by TRGO2.
Register additional "tim[1/8]_trgo2" triggers for timer1 & timer8.
Detect TRGO2 timer capability (master mode selection 2).

Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Acked-by: Benjamin Gaignard <benjamin.gaignard@linaro.org>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2017-05-07 16:08:10 +01:00
Benjamin Gaignard 2a830a45ff iio: stm32 trigger: Add counter enable modes
Device counting could be controlled by the level or the edges of
a trigger.
in_count0_enable_mode attibute allow to set the control mode.

Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2017-04-14 15:09:04 +01:00
Benjamin Gaignard 4adec7da05 iio: stm32 trigger: Add quadrature encoder device
One of the features of STM32 trigger hardware block is a quadrature
encoder that can counts up/down depending of the levels and edges
of the selected external pins.

This patch allow to read/write the counter, get it direction,
set/get quadrature modes and get scale factor.

When counting up preset value is the limit of the counter.
When counting down the counter start from preset value down to 0.
This preset value could be set/get by using
/sys/bus/iio/devices/iio:deviceX/in_count0_preset attribute.

Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com>
Reviewed-by: William Breathitt Gray <vilhelm.gray@gmail.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2017-04-14 15:08:31 +01:00
Benjamin Gaignard 93fbe91b55 iio: Add STM32 timer trigger driver
Timers IPs can be used to generate triggers for other IPs like
DAC or ADC.
Each trigger may result of timer internals signals like counter enable,
reset or edge, this configuration could be done through "master_mode"
device attribute.

Since triggers could be used by DAC or ADC their names are defined
in include/ nux/iio/timer/stm32-timer-trigger.h and is_stm32_iio_timer_trigger
function could be used to check if the trigger is valid or not.

"trgo" trigger have a "sampling_frequency" attribute which allow to configure
timer sampling frequency.

version 8:
- change kernel version from 4.10 to 4.11 in ABI documentation

version 7:
- remove all iio_device related code
- move driver into trigger directory

version 5:
- simplify tables of triggers
- only create an IIO device when needed

version 4:
- get triggers configuration from "reg" in DT
- add tables of triggers
- sampling frequency is enable/disable when writing in trigger
  sampling_frequency attribute
- no more use of interruptions

version 3:
- change compatible to "st,stm32-timer-trigger"
- fix attributes access right
- use string instead of int for master_mode and slave_mode
- document device attributes in sysfs-bus-iio-timer-stm32

version 2:
- keep only one compatible
- use st,input-triggers-names and st,output-triggers-names
  to know which triggers are accepted and/or create by the device

Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com>
Acked-by: Jonathan Cameron <jic23@kernel.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
2017-01-25 16:11:56 +00:00