Commit Graph

103 Commits

Author SHA1 Message Date
Jon Lin 2758bd093a
spi: rockchip: Wait for STB status in slave mode tx_xfer
After ROCKCHIP_SPI_VER2_TYPE2, SR->STB is a more accurate judgment
bit for spi slave transmition.

Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
Link: https://lore.kernel.org/r/20210621104800.19088-5-jon.lin@rock-chips.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2021-06-23 12:35:42 +01:00
Jon Lin 4a47fcdb5f
spi: rockchip: Set rx_fifo interrupt waterline base on transfer item
The error here is to calculate the width as 8 bits. In fact, 16 bits
should be considered.

Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
Link: https://lore.kernel.org/r/20210621104800.19088-4-jon.lin@rock-chips.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2021-06-23 12:35:41 +01:00
Jon Lin 0f4f58b847
spi: rockchip: add compatible string for rv1126
Add compatible string for rv1126 for potential applications.

Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
Link: https://lore.kernel.org/r/20210621104800.19088-3-jon.lin@rock-chips.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2021-06-23 12:35:40 +01:00
Jay Fang 0262179996
spi: rockchip: Fix code indent should use tabs where possible
Fix checkpatch errors:

  ERROR: code indent should use tabs where possible
  #484: FILE: spi-rockchip.c:484:
  +^I        | CR0_BHT_8BIT << CR0_BHT_OFFSET$
  ERROR: code indent should use tabs where possible
  #485: FILE: spi-rockchip.c:485:
  +^I        | CR0_SSD_ONE  << CR0_SSD_OFFSET$
  ERROR: code indent should use tabs where possible
  #486: FILE: spi-rockchip.c:486:
  +^I        | CR0_EM_BIG   << CR0_EM_OFFSET;$

Signed-off-by: Jay Fang <f.fangjian@huawei.com>
Link: https://lore.kernel.org/r/1616566602-13894-11-git-send-email-f.fangjian@huawei.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2021-03-24 19:51:11 +00:00
Arnd Bergmann e50989527f
spi: rockchip: avoid objtool warning
Building this file with clang leads to a an unreachable code path
causing a warning from objtool:

drivers/spi/spi-rockchip.o: warning: objtool: rockchip_spi_transfer_one()+0x2e0: sibling call from callable instruction with modified stack frame

Change the unreachable() into an error return that can be
handled if it ever happens, rather than silently crashing
the kernel.

Fixes: 65498c6ae2 ("spi: rockchip: support 4bit words")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Pratyush Yadav <p.yadav@ti.com>
Link: https://lore.kernel.org/r/20210226140109.3477093-1-arnd@kernel.org
Signed-off-by: Mark Brown <broonie@kernel.org>
2021-03-10 12:46:52 +00:00
Vincent Pelletier 6bd2c867cd
spi: rockchip: Call the dedicated transfer completion function.
spi_finalize_current_transfer currently only calls "complete", so no
functional change is expected.

Signed-off-by: Vincent Pelletier <plr.vincent@gmail.com>
Link: https://lore.kernel.org/r/f3e1cf19a7dcdd77adc0a719adf46449b84ccadd.1610062884.git.plr.vincent@gmail.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2021-01-14 14:27:40 +00:00
Alexander Kochetkov 940f3bbf3d
spi: rockchip: enable autosuspend feature
If SPI is used for periodic polling any sensor, significant delays
sometimes appear. Switching on module clocks during resume lead to delays.
Enabling autosuspend mode causes the controller to not suspend between
SPI transfers and the delays disappear.

Signed-off-by: Alexander Kochetkov <al.kochet@gmail.com>
Link: https://lore.kernel.org/r/20201016085014.31667-1-al.kochet@gmail.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2020-10-26 23:29:04 +00:00
Jon Lin 4294e4accf
spi: rockchip: Fix error in SPI slave pio read
The RXFLR is possible larger than rx_left in Rockchip SPI, fix it.

Fixes: 01b59ce5da ("spi: rockchip: use irq rather than polling")
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
Tested-by: Emil Renner Berthing <kernel@esmil.dk>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Emil Renner Berthing <kernel@esmil.dk>
Link: https://lore.kernel.org/r/20200723004356.6390-3-jon.lin@rock-chips.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2020-07-28 17:29:31 +01:00
Jon Lin 13a96935e6
spi: rockchip: Support 64-location deep FIFOs
The FIFO depth of SPI V2 is 64 instead of 32, add support for it.

Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
Tested-by: Emil Renner Berthing <kernel@esmil.dk>
Reviewed-by: Emil Renner Berthing <kernel@esmil.dk>
Link: https://lore.kernel.org/r/20200723004356.6390-2-jon.lin@rock-chips.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2020-07-28 17:29:31 +01:00
Jon Lin 4d9ca632c8
spi: rockchip: Config spi rx dma burst size depend on xfer length
The burst length can be adjusted according to the transmission
length to improve the transmission rate

Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
Tested-by: Emil Renner Berthing <kernel@esmil.dk>
Reviewed-by: Emil Renner Berthing <kernel@esmil.dk>
Link: https://lore.kernel.org/r/20200723004356.6390-1-jon.lin@rock-chips.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2020-07-28 17:29:30 +01:00
Chris Ruehl eb1262e3cc
spi: spi-rockchip: use num-cs property and ctlr->enable_gpiods
The original implementation set num_chipselect to ROCKCHIP_SPI_MAX_CS_NUM (2)
which seems wrong here. spi0 has 2 native cs, all others just one. With
enable and use of cs_gpiods / GPIO CS, its correct to set the num_chipselect
from the num-cs property and set max_native_cs with the define.
If num-cs is missing the default set to num_chipselect = 1.

Signed-off-by: Chris Ruehl <chris.ruehl@gtsys.com.hk>
Link: https://lore.kernel.org/r/20200511083022.23678-4-chris.ruehl@gtsys.com.hk
Signed-off-by: Mark Brown <broonie@kernel.org>
2020-05-15 18:50:06 +01:00
Chris Ruehl d065f41a3f
spi: spi-rockchip: add support for spi slave mode
Add support for spi slave mode in spi-rockchip. The register map has an entry
for it. If spi-slave is set in dts, set this corresponding bit and add to
mode_bits the SPI_NO_CS, allow slave mode without explicit CS use.
Slave abort function had been added.

Signed-off-by: Chris Ruehl <chris.ruehl@gtsys.com.hk>
Link: https://lore.kernel.org/r/20200511083022.23678-3-chris.ruehl@gtsys.com.hk
Signed-off-by: Mark Brown <broonie@kernel.org>
2020-05-15 18:50:05 +01:00
Chris Ruehl d66571a20f
spi: spi-rockchip: cleanup use struct spi_controller
Cleanup, move from the compatibily layer struct spi_master over
to struct spi_controller, and rename the related function calls.

Signed-off-by: Chris Ruehl <chris.ruehl@gtsys.com.hk>
Link: https://lore.kernel.org/r/20200511083022.23678-2-chris.ruehl@gtsys.com.hk
Signed-off-by: Mark Brown <broonie@kernel.org>
2020-05-15 18:50:04 +01:00
Johan Jonker c6486eadb4
spi: rockchip: add compatible string for px30 rk3308 rk3328
The Rockchip spi binding is updated to yaml and new models
were added. The spi on px30,rk3308 and rk3328 are the same as
other Rockchip based SoCs, so add compatible string for it.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20200309151004.7780-1-jbx6244@gmail.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2020-03-10 14:30:56 +00:00
Mark Brown 4343f61103 Linux 5.2-rc4
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Merge tag 'v5.2-rc4' into spi-5.3

Linux 5.2-rc4
2019-06-10 18:52:53 +01:00
Thomas Gleixner 2025cf9e19 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 288
Based on 1 normalized pattern(s):

  this program is free software you can redistribute it and or modify
  it under the terms and conditions of the gnu general public license
  version 2 as published by the free software foundation this program
  is distributed in the hope it will be useful but without any
  warranty without even the implied warranty of merchantability or
  fitness for a particular purpose see the gnu general public license
  for more details

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-only

has been chosen to replace the boilerplate/reference in 263 file(s).

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Allison Randal <allison@lohutok.net>
Reviewed-by: Alexios Zavras <alexios.zavras@intel.com>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190529141901.208660670@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-06-05 17:36:37 +02:00
Mark Brown eceb995e04 Linux 5.2-rc1
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Merge tag 'v5.2-rc1' into spi-5.3

Linux 5.2-rc1
2019-05-20 11:54:21 +01:00
Suren Baghdasaryan 8af0c18af1 include/: refactor headers to allow kthread.h inclusion in psi_types.h
kthread.h can't be included in psi_types.h because it creates a circular
inclusion with kthread.h eventually including psi_types.h and
complaining on kthread structures not being defined because they are
defined further in the kthread.h.  Resolve this by removing psi_types.h
inclusion from the headers included from kthread.h.

Link: http://lkml.kernel.org/r/20190319235619.260832-7-surenb@google.com
Signed-off-by: Suren Baghdasaryan <surenb@google.com>
Acked-by: Johannes Weiner <hannes@cmpxchg.org>
Cc: Dennis Zhou <dennis@kernel.org>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Jens Axboe <axboe@kernel.dk>
Cc: Li Zefan <lizefan@huawei.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Tejun Heo <tj@kernel.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2019-05-14 19:52:48 -07:00
Emil Renner Berthing 47300728fb
spi: rockchip: turn down tx dma bursts
This fixes tx and bi-directional dma transfers on rk3399-gru-kevin.

It seems the SPI fifo must have room for 2 bursts when the dma_tx_req
signal is generated or it might skip some words. This in turn makes
the rx dma channel never complete for bi-directional transfers.

Fix it by setting tx burst length to fifo_len / 4 and the dma
watermark to fifo_len / 2.

However the rk3399 TRM says (sic):
"DMAC support incrementing-address burst and fixed-address burst. But in
the case of access SPI and UART at byte or halfword size, DMAC only
support fixed-address burst and the address must be aligned to word."

So this relies on fifo_len being a multiple of 16 such that the
burst length (= fifo_len / 4) is a multiple of 4 and the addresses
will be word-aligned.

Fixes: dcfc861d24 ("spi: rockchip: adjust dma watermark and burstlen")
Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
Signed-off-by: Mark Brown <broonie@kernel.org>
2019-05-08 19:32:28 +09:00
Emil Renner Berthing 04290192f7
spi: rockchip: support lsb-first mode
Add missing support for lsb-first mode.

Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
Tested-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Mark Brown <broonie@kernel.org>
2018-11-05 11:42:43 +00:00
Emil Renner Berthing 65498c6ae2
spi: rockchip: support 4bit words
The hardware supports 4, 8 and 16bit spi words,
so add the missing support for 4bit words.

Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
Tested-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Mark Brown <broonie@kernel.org>
2018-11-05 11:42:39 +00:00
Emil Renner Berthing 01b59ce5da
spi: rockchip: use irq rather than polling
Register an interrupt handler to fill/empty the
tx and rx fifos rather than busy-looping.

Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
Tested-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Mark Brown <broonie@kernel.org>
2018-11-05 11:42:35 +00:00
Emil Renner Berthing 74b7efa82b
spi: rockchip: precompute rx sample delay
Now that we no longer potentially change spi clock
at runtime we can precompute the rx sample delay
at probe time rather than for each transfer.

Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
Tested-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Mark Brown <broonie@kernel.org>
2018-11-05 11:42:32 +00:00
Emil Renner Berthing 420b82f842
spi: rockchip: set min/max speed
The driver previously checked each transfer if the
requested speed was higher than possible with the
current spi clock rate and raised the clock rate
accordingly.

However, there is no check to see if the spi clock
was actually set that high and no way to dynamically
lower the spi clock rate again.

So it seems any potiential users of this functionality
are better off just setting the spi clock rate at init
using the assigned-clock-rates devicetree property.

Removing this dynamic spi clock rate raising allows
us let the spi framework handle min/max speeds
for us.

Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
Tested-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Mark Brown <broonie@kernel.org>
2018-11-05 11:42:27 +00:00
Emil Renner Berthing eff0275e52
spi: rockchip: simplify use_dma logic
We only need to know if we're using dma when setting
up the transfer, so just use a local variable for
that.

Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
Tested-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Mark Brown <broonie@kernel.org>
2018-11-05 11:42:23 +00:00
Emil Renner Berthing d790c342e6
spi: rockchip: remove master pointer from dev data
In almost all cases we already have a pointer to the
spi master structure where we have the driver data.

The only exceptions are the dma callbacks which are
easily fixed by passing them the master and using
spi_master_get_devdata to retrieve the driver data.

Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
Tested-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Mark Brown <broonie@kernel.org>
2018-11-05 11:42:17 +00:00
Emil Renner Berthing eee06a9ee2
spi: rockchip: don't store dma channels twice
The spi master (aka spi controller) structure already
has two fields for storing the rx and tx dma channels.
Just use them rather than duplicating them in driver data.

Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
Tested-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Mark Brown <broonie@kernel.org>
2018-11-05 11:42:13 +00:00
Emil Renner Berthing fc1ad8ee33
spi: rockchip: read transfer info directly
Just read transfer info directly from the spi device
and transfer structures rather than storing it in
driver data first.

Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
Tested-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Mark Brown <broonie@kernel.org>
2018-11-05 11:42:10 +00:00
Emil Renner Berthing ce386100d9
spi: rockchip: disable spi on error
Successful transfers leave the spi disabled, so if
we just make sure to disable the spi on error
there should be no need to disable the spi from
master->unprepare_message.

This also flushes the tx and rx fifos,
so no need to do that manually.

Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
Tested-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Mark Brown <broonie@kernel.org>
2018-11-05 11:42:06 +00:00
Emil Renner Berthing fab3e4871f
spi: rockchip: use atomic_t state
The state field is currently only used to make sure
only the last of the tx and rx dma callbacks issue
an spi_finalize_current_transfer.
Rather than using a spinlock we can get away
with just turning the state field into an atomic_t.

Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
Tested-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Mark Brown <broonie@kernel.org>
2018-11-05 11:42:02 +00:00
Emil Renner Berthing 2410d6a3c3
spi: rockchip: always use SPI mode
The hardware supports 3 different variants of SPI
and there were some code around it, but nothing
to actually set it to anything but "Motorola SPI".
Just drop that code and always use that mode.

Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
Tested-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Mark Brown <broonie@kernel.org>
2018-11-05 11:41:58 +00:00
Emil Renner Berthing 31bcb57be1
spi: rockchip: use designated init for dma config
Use C99 designated initializers for dma slave config
structures. This also makes sure uninitialized fields
are zeroed so we don't need an explicit memset.

Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
Tested-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Mark Brown <broonie@kernel.org>
2018-11-05 11:41:50 +00:00
Emil Renner Berthing 30688e4e67
spi: rockchip: make spi_enable_chip take bool
The spi_enable_chip function takes a boolean
argument. Change the type to reflect that.

Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
Tested-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Mark Brown <broonie@kernel.org>
2018-11-05 11:41:46 +00:00
Mark Brown 4b51c747e4
Merge branch 'spi-4.20' into spi-next 2018-10-21 17:00:14 +01:00
Emil Renner Berthing a3c174021c
spi: rockchip: simplify spi enable logic
Let the dma/non-dma code paths handle the spi enable
flag themselves. This removes some logic to determine
if the flag should be turned on before or after dma
and also don't leave the spi enabled if the dma path
fails.

Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
Signed-off-by: Mark Brown <broonie@kernel.org>
2018-10-11 15:17:45 +01:00
Emil Renner Berthing d9071b7e9f
spi: rockchip: directly use direction constants
The dma direction for the tx and rx dma channels never
change, so just use the constants directly rather
than storing them in device data.

Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
Signed-off-by: Mark Brown <broonie@kernel.org>
2018-10-11 15:17:31 +01:00
Emil Renner Berthing f340b92051
spi: rockchip: mark use_dma as bool
The driver data has a u32 field use_dma which is
only ever used as a boolean, so change its type
to reflect that.

Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
Signed-off-by: Mark Brown <broonie@kernel.org>
2018-10-11 15:17:16 +01:00
Emil Renner Berthing 058f7c509e
spi: rockchip: remove unneeded dma_caps
We no longer need the dma_caps since the dma driver
already clamps the burst length to the hardware limit,
so don't request and store dma_caps in device data.

Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
Signed-off-by: Mark Brown <broonie@kernel.org>
2018-10-11 15:17:01 +01:00
Huibin Hong dcfc861d24
spi: rockchip: adjust dma watermark and burstlen
Signal tx dma when spi fifo is less than half full,
and limit tx bursts to half the fifo length.

Clamp rx burst length to 1 to avoid alignment issues.

Signed-off-by: Huibin Hong <huibin.hong@rock-chips.com>
Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
Signed-off-by: Mark Brown <broonie@kernel.org>
2018-10-11 15:14:37 +01:00
Huibin Hong dd8fd2cbc7
spi: rockchip: initialize dma_slave_config properly
The rxconf and txconf structs are allocated on the
stack, so make sure we zero them before filling out
the relevant fields.

Signed-off-by: Huibin Hong <huibin.hong@rock-chips.com>
Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
Signed-off-by: Mark Brown <broonie@kernel.org>
2018-10-11 15:11:45 +01:00
Huibin Hong 04b37d2d02 spi: rockchip: configure CTRLR1 according to size and data frame
CTRLR1 is number of data frames, when rx only.
When data frame is 8 bit, CTRLR1 is len-1.
When data frame is 16 bit, CTRLR1 is (len/2)-1.

Signed-off-by: Huibin Hong <huibin.hong@rock-chips.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2017-08-16 11:58:23 +01:00
Andy Yan 6b860e69e8 spi: rockchip: add compatible string for rv1108 spi
The spi on rv1108 is the same as other rockchip based
socs, add compatible string for it.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
2017-08-14 17:24:02 +01:00
Jeffy Chen d38c4ae194 spi: rockchip: Fix clock handling in suspend/resume
The runtime suspend callback might be called by pm domain framework at
suspend_noirq stage. It would try to disable the clocks which already
been disabled by rockchip_spi_suspend.

Call pm_runtime_force_suspend/pm_runtime_force_resume when
suspend/resume to avoid that.

Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2017-08-07 16:44:13 +01:00
Jeffy Chen 6a06e895b2 spi: rockchip: Fix clock handling in remove
We are assuming clocks enabled when calling rockchip_spi_remove, which
is not always true. Those clocks might already been disabled by the
runtime PM at that time.

Call pm_runtime_get_sync before trying to disable clocks to avoid that.

Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2017-08-07 16:44:10 +01:00
Jeffy Chen 43de979ddc spi: rockchip: Slightly rework return value handling
Slightly rework return value handling, no functional changes.

Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2017-08-07 16:44:07 +01:00
Jeffy Chen aa099382ac spi: rockchip: Disable Runtime PM when chip select is asserted
The rockchip spi would stop driving pins when runtime suspended, which
might break slave's xfer(for example cros_ec).

Since we have pullups on those pins, we only need to care about this
when the CS asserted.

So let's keep the spi alive when chip select is asserted.

Also use pm_runtime_put instead of pm_runtime_put_sync.

Suggested-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
2017-06-28 19:43:18 +01:00
Jeffy Chen c863795c4c spi: rockchip: Set GPIO_SS flag to enable Slave Select with GPIO CS
The rockchip spi still requires slave selection when using GPIO CS.

Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
2017-06-28 19:43:11 +01:00
Jeffy Chen c351587e25 spi: rockchip: fix error handling when probe
After failed to request dma tx chain, we need to disable pm_runtime.
Also cleanup error labels for better readability.

Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>
Reviewed-by: Brian Norris <briannorris@chromium.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
2017-06-13 20:12:30 +01:00
Brian Norris 23e291c2e4 spi: rockchip: support "sleep" pin configuration
In the pattern of many other devices, support a system-sleep pin
configuration.

Signed-off-by: Brian Norris <briannorris@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Tested-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2016-12-19 13:29:27 +00:00
Mark Brown 9a4506b60d Merge remote-tracking branches 'spi/topic/pxa2xx', 'spi/topic/rockchip', 'spi/topic/s3c64xx', 'spi/topic/sh' and 'spi/topic/sh-msiof' into spi-next 2016-07-24 22:08:25 +01:00