Commit Graph

5 Commits

Author SHA1 Message Date
Yixun Lan 88e2da8124 clk: meson: aoclk: refactor common code into dedicated file
We try to refactor the common code into one dedicated file,
while preparing to add new Meson-AXG aoclk driver, this would
help us to better share the code by all aoclk drivers.

Suggested-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
2018-05-15 14:19:42 +02:00
Jerome Brunet 1f932d9971 clk: meson: remove superseded aoclk_gate_regmap
aoclk_gate_regmap has been replaced by meson's clk_regmap.
It is no longer necessary so, remove it

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2018-03-13 10:03:59 +01:00
Jerome Brunet 81c7fcac9b clk: meson: switch gxbb ao_clk to clk_regmap
Drop the gxbb ao specific regmap based clock and use the
meson clk_regmap based clock instead.

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2018-03-13 10:03:59 +01:00
Neil Armstrong 62ec0b9754 clk: meson: gxbb-aoclk: Add CEC 32k clock
The CEC 32K AO Clock is a dual divider with dual counter to provide a more
precise 32768Hz clock for the CEC subsystem from the external xtal.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2017-08-04 18:02:02 +02:00
Neil Armstrong ffb13e3b84 clk: meson: gxbb-aoclk: Switch to regmap for register access
Switch the aoclk driver to use the new bindings and switch all the
registers access to regmap only.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2017-08-04 18:02:01 +02:00