Commit Graph

11 Commits

Author SHA1 Message Date
Lad Prabhakar 707344c8a1 dt-bindings: interrupt-controller: arm,gic-v3: Fix typo in description of msi-controller property
Fix typo functionnality -> functionality.

Signed-off-by: Lad Prabhakar <prabhakar.csengg@gmail.com>
Link: https://lore.kernel.org/r/20230130234335.13952-1-prabhakar.csengg@gmail.com
Signed-off-by: Rob Herring <robh@kernel.org>
2023-02-02 17:10:58 -06:00
Jean-Philippe Brucker 92572a8ec3 dt-bindings: interrupt-controller: arm,gic-v3: Make 'interrupts' optional
A GICv3 implementation without virtualization, such as the base QEMU
virt machine (without -M virtualization=on), does not issue maintenance
interrupts. Therefore its device-tree node does not need an 'interrupts'
property. Currently, validating the QEMU virt device-tree throws a
warning that 'interrupts' is missing. Make it optional.

Signed-off-by: Jean-Philippe Brucker <jean-philippe@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220822152224.507497-3-jean-philippe@linaro.org
2022-08-23 10:41:21 -05:00
Marc Zyngier 4053b6b43f dt-bindings: interrupt-controller: arm,gic-v3: Make the v2 compat requirements explicit
A common mistake when writing a device tree for a platform that is using
GICv3 with ancient CPUs is to overlook the MMIO frames that implement
the GICv2 compatibility feature, because this feature is implemented by
the CPUs and not by the GIC itself.

The compatibility feature itself is optional (all the modern
implementations have dropped it), but is present in all the ARM Ltd
implementations of the ARMv8.0 architecture (A3x, A53, A57, A72, A73),
and many others from various implementers.

Make it explicit that GICC, GICH and GICV are required for these CPUs.
Also take this opportunity to update my email address, as people keep
sending them to the wrong place...

Signed-off-by: Marc Zyngier <maz@kernel.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Krzysztof Kozlowski <krzk+dt@kernel.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220409101617.268796-1-maz@kernel.org
2022-05-04 15:43:12 +01:00
Rob Herring 39bd2b6a37 dt-bindings: Improve phandle-array schemas
The 'phandle-array' type is a bit ambiguous. It can be either just an
array of phandles or an array of phandles plus args. Many schemas for
phandle-array properties aren't clear in the schema which case applies
though the description usually describes it.

The array of phandles case boils down to needing:

items:
  maxItems: 1

The phandle plus args cases should typically take this form:

items:
  - items:
      - description: A phandle
      - description: 1st arg cell
      - description: 2nd arg cell

With this change, some examples need updating so that the bracketing of
property values matches the schema.

Signed-off-by: Rob Herring <robh@kernel.org>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Vinod Koul <vkoul@kernel.org>
Acked-by: Ulf Hansson <ulf.hansson@linaro.org>
Acked-by: Georgi Djakov <djakov@kernel.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Mark Brown <broonie@kernel.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Acked-by: Marc Kleine-Budde <mkl@pengutronix.de>
Link: https://lore.kernel.org/r/20220119015038.2433585-1-robh@kernel.org
2022-02-04 09:43:42 -06:00
Rob Herring e3a3356d17 dt-bindings: interrupt-controller: arm,gic-v3: Fix 'interrupts' cell size in example
The 2nd example has an interrupts cells size of 4, but the 'interrupts'
property has 3 cells. The example should also be separate since the cell
size differs in each example.

Signed-off-by: Rob Herring <robh@kernel.org>
Acked-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20220106182518.1435497-5-robh@kernel.org
2022-01-11 11:54:35 -06:00
Lad Prabhakar 4e08a559a1 dt-bindings: interrupt-controller: arm,gic-v3: Describe GICv3 optional properties
Describe the optional GICv3 properties:
- clocks
- clock-names
- power-domains
- resets

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20210609155108.16590-1-prabhakar.mahadev-lad.rj@bp.renesas.com
2021-06-11 14:26:31 +01:00
Rob Herring 3d21a46093 dt-bindings: Remove cases of 'allOf' containing a '$ref'
json-schema versions draft7 and earlier have a weird behavior in that
any keywords combined with a '$ref' are ignored (silently). The correct
form was to put a '$ref' under an 'allOf'. This behavior is now changed
in the 2019-09 json-schema spec and '$ref' can be mixed with other
keywords. The json-schema library doesn't yet support this, but the
tooling now does a fixup for this and either way works.

This has been a constant source of review comments, so let's change this
treewide so everyone copies the simpler syntax.

Scripted with ruamel.yaml with some manual fixups. Some minor whitespace
changes from the script.

Signed-off-by: Rob Herring <robh@kernel.org>
Acked-by: Maxime Ripard <mripard@kernel.org>
Acked-by: Lee Jones <lee.jones@linaro.org>
Acked-By: Vinod Koul <vkoul@kernel.org>
Acked-by: Mark Brown <broonie@kernel.org>
Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Acked-by: Wolfram Sang <wsa@the-dreams.de> # for I2C
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> #for-iio
Reviewed-by: Stephen Boyd <sboyd@kernel.org> # clock
Signed-off-by: Rob Herring <robh@kernel.org>
2020-05-03 11:10:41 -05:00
Rob Herring cf7d88fb86 dt-bindings: interrupt-controller: arm,gic-v3: Add missing type to interrupt-partition-* nodes
Add missing 'type: object' schema to interrupt-partition-* nodes. Found
with fix to meta-schema checks.

Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Jason Cooper <jason@lakedaemon.net>
Acked-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Rob Herring <robh@kernel.org>
2019-11-26 12:29:33 -07:00
Marc Zyngier 4b049063e0 dt-bindings: interrupt-controller: arm,gic-v3: Describe EPPI range support
Update the GICv3 binding to allow interrupts in the EPPI range.

Signed-off-by: Marc Zyngier <maz@kernel.org>
2019-08-20 10:23:35 +01:00
Marc Zyngier 8662465348 dt-bindings: interrupt-controller: arm,gic-v3: Describe ESPI range support
GICv3.1 introduces support for new interrupt ranges, one of them being
the Extended SPI range (ESPI). The DT binding is extended to deal with
it as a new interrupt class.

Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
2019-08-20 10:04:09 +01:00
Rob Herring 36c79bc7ef dt-bindings: interrupt-controller: Convert ARM GICv3 to json-schema
Convert the ARM GICv3 binding document to DT schema format using
json-schema.

Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Rob Herring <robh@kernel.org>
2019-02-13 09:58:14 -06:00