Commit Graph

54 Commits

Author SHA1 Message Date
Dave Airlie 9a1123e894 drm/tegra: Changes for v4.5-rc1
This adds support for the version of host1x found on Tegra210 SoCs. It
 also makes use of the new atomic suspend/resume functionality to bring
 this feature to Tegra.
 
 Other than that it's mostly small fixes and cleanups, with some prep-
 work for things that will hopefully get merged for the next release.
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Merge tag 'drm/tegra/for-4.5-rc1' of git://anongit.freedesktop.org/tegra/linux into drm-next

drm/tegra: Changes for v4.5-rc1

This adds support for the version of host1x found on Tegra210 SoCs. It
also makes use of the new atomic suspend/resume functionality to bring
this feature to Tegra.

Other than that it's mostly small fixes and cleanups, with some prep-
work for things that will hopefully get merged for the next release.

* tag 'drm/tegra/for-4.5-rc1' of git://anongit.freedesktop.org/tegra/linux:
  drm/tegra: Advertise DRIVER_ATOMIC
  drm/tegra: Use DRIVER level for IOMMU aperture message
  drm/tegra: checking for IS_ERR() instead of NULL
  drm/tegra: dc: Add missing of_node_put()
  drm/tegra: Implement subsystem-level suspend/resume
  drm/tegra: sor: Remove unnecessary conditional
  drm/tegra: sor: Operate on struct drm_dp_aux *
  drm/tegra: Use drm_gem_object_unreference_unlocked()
  drm/tegra: Don't take dev->struct_mutex in mmap offset ioctl
  drm/tegra: Use unlocked gem unreferencing
  drm/tegra: Use new multi-driver module helpers
  gpu: host1x: Add Tegra210 support
  gpu: host1x: Remove core driver on unregister
  gpu: host1x: Use platform_register/unregister_drivers()
2015-12-17 08:38:57 +10:00
Dan Carpenter db8b42fbfc drm/tegra: checking for IS_ERR() instead of NULL
The tegra_sor_hdmi_find_settings() function returns NULL on error and
not an ERR_PTR.

Fixes: 459cc2c680 ('drm/tegra: sor: Add HDMI support')
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-12-14 14:37:25 +01:00
Thierry Reding 01b9bea0c2 drm/tegra: sor: Remove unnecessary conditional
Checking for sor->aux in eDP specific code is unnecessary because eDP
inherently requires a valid AUX channel.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-12-14 10:50:38 +01:00
Thierry Reding 9542c2376e drm/tegra: sor: Operate on struct drm_dp_aux *
Instead of getting a pointer to the driver-specific wrapper of AUX
channels, use the AUX channel objects directly to avoid hackish casting
between the two types.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-12-14 10:50:37 +01:00
Ville Syrjälä 13a3d91f17 drm: Pass 'name' to drm_encoder_init()
Done with coccinelle for the most part. However, it thinks '...' is
part of the semantic patch, so I put an 'int DOTDOTDOT' placeholder
in its place and got rid of it with sed afterwards.

@@
identifier dev, encoder, funcs;
@@
 int drm_encoder_init(struct drm_device *dev,
                      struct drm_encoder *encoder,
                      const struct drm_encoder_funcs *funcs,
                      int encoder_type
+                     ,const char *name, int DOTDOTDOT
                      )
{ ... }

@@
identifier dev, encoder, funcs;
@@
 int drm_encoder_init(struct drm_device *dev,
                      struct drm_encoder *encoder,
                      const struct drm_encoder_funcs *funcs,
                      int encoder_type
+                     ,const char *name, int DOTDOTDOT
                      );

@@
expression E1, E2, E3, E4;
@@
 drm_encoder_init(E1, E2, E3, E4
+                 ,NULL
                  )

v2: Add ', or NULL...' to @name kernel doc (Jani)
    Annotate the function with __printf() attribute (Jani)

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/1449670818-2966-1-git-send-email-ville.syrjala@linux.intel.com
2015-12-11 09:13:20 +01:00
Andrew Morton 79211c8ed1 remove abs64()
Switch everything to the new and more capable implementation of abs().
Mainly to give the new abs() a bit of a workout.

Cc: Michal Nazarewicz <mina86@mina86.com>
Cc: John Stultz <john.stultz@linaro.org>
Cc: Ingo Molnar <mingo@kernel.org>
Cc: Steven Rostedt <rostedt@goodmis.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Masami Hiramatsu <masami.hiramatsu.pt@hitachi.com>
Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2015-11-09 15:11:24 -08:00
Thierry Reding 459cc2c680 drm/tegra: sor: Add HDMI support
The SOR1 introduced on Tegra210 supports HDMI 2.0 and DisplayPort. Add
HDMI support and name the debugfs node after the type of SOR. The SOR
introduced with Tegra124 is known simply as "sor", whereas the
additional SOR found on Tegra210 is known as "sor1".

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-08-13 13:49:37 +02:00
Thierry Reding 3309ac8362 drm/tegra: sor: Add Tegra210 eDP support
The SOR found on Tegra210 is very similar to the version found on
Tegra124, except that it no longer supports LVDS.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-08-13 13:49:36 +02:00
Thierry Reding 850bab4480 drm/tegra: sor: Restore DPMS
In order to restore DPMS with atomic mode-setting, move all code from
the ->mode_set() callback into ->enable(). At the same time, rename the
->prepare() callback to ->disable() to use the names preferred by atomic
mode-setting. This simplifies the calling sequence and will allow DPMS
to use runtime PM in subsequent patches.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-08-13 13:49:35 +02:00
Thierry Reding 530239a8b8 drm/tegra: sor: Use DRM debugfs infrastructure for CRC
Instead of duplicating most of the code to set up a debugfs file, use
the existing DRM core debugfs infrastructure instead.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-08-13 13:47:57 +02:00
Thierry Reding 51511d05de drm/tegra: sor: Write correct head state registers
The head state registers are per head, so they must be properly indexed.
This has worked fine so far because all boards with eDP use it as the
primary output, so it is very likely to end up attached to head 0.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-08-13 13:47:56 +02:00
Thierry Reding 8044449556 drm/tegra: sor: Constify display mode
The data structure is always only read, never written, and can hence be
referred to by a const pointer.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-08-13 13:47:56 +02:00
Thierry Reding 066d30f8c7 drm/tegra: sor: Reset the correct debugfs fields
When tearing down debugfs support, make sure to reset the fields to NULL
in the correct order, otherwise the debugfs root will not be properly
removed.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-08-13 13:47:55 +02:00
Thierry Reding 3ff1f22c88 drm/tegra: sor: Set minor after debugfs initialization
The DRM minor is needed to teardown debugfs, so it needs to be tracked
to prevent a crash on driver removal.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-08-13 13:47:53 +02:00
Thierry Reding 4dbdc740c4 drm/tegra: sor: Provide error messages in probe
When probing the SOR device fails, output proper error messages to help
diagnose the cause of the failure.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-08-13 13:47:51 +02:00
Thierry Reding a9a9e4fd7c drm/tegra: sor: Rename registers for consistency
The TRM lists indexed registers without an underscore to separate name
from index. Use that convention in the driver for consistency.

While at it, rename some of the field names to the names used in the
TRM.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-08-13 13:47:50 +02:00
Tomeu Vizoso 535a65db48 drm/tegra: sor: Reset during initialization
As there isn't a way for the firmware on the Nyan Chromebooks to hand
over the display to the kernel, and the kernel isn't redoing the whole
configuration at present.

With this patch, the SOR is brought to a known state and we get correct
display on every boot.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-04-02 18:49:24 +02:00
Thierry Reding dab163366a drm/tegra: sor: Dump registers via debugfs
Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-04-02 18:46:18 +02:00
Thierry Reding 28fe207600 drm/tegra: sor: Registers are 32-bit
Use a sized unsigned 32-bit data type (u32) to store register contents.
The SOR registers are 32 bits wide irrespective of the architecture's
data width.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-04-02 18:46:16 +02:00
Thierry Reding 666cb87332 drm/tegra: dc: Unify enabling the display controller
Previously output drivers would enable continuous display mode and power
up the display controller at various points during the initialization.
This is suboptimal because it accesses display controller registers in
output drivers and duplicates a bit of code.

Move this code into the display controller driver and enable the display
controller as the final step of the ->mode_set_nofb() implementation.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:58 +01:00
Thierry Reding 3f0fb52ef0 drm/tegra: Remove unused ->mode_fixup() callbacks
All output drivers have now been converted to use the ->atomic_check()
callback, so the ->mode_fixup() callbacks are no longer used.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:56 +01:00
Thierry Reding 82f1511c35 drm/tegra: sor: Implement ->atomic_check()
The implementation of the ->atomic_check() callback precomputes all
parameters to check if the given configuration can be applied. If so the
precomputed values are stored in the atomic state object for the encoder
and applied during modeset. In that way the modeset no longer needs to
perform any checking but simply program values into registers.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:54 +01:00
Thierry Reding 9d44189f55 drm/tegra: Atomic conversion, phase 2
Hook up the default ->reset() and ->atomic_duplicate_state() helpers.
This ensures that state objects are properly created and framebuffer
reference counts correctly maintained.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:51 +01:00
Thierry Reding 4aa3df7149 drm/tegra: Atomic conversion, phase 1
Implement initial atomic state handling. Hook up the CRTCs, planes' and
connectors' ->atomic_destroy_state() callback to ensure that the atomic
state objects don't leak.

Furthermore the CRTC now implements the ->mode_set_nofb() callback that
is used by new helpers to implement ->mode_set() and ->mode_set_base().
These new helpers also make use of the new plane helper functions which
the driver now provides.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:50 +01:00
Thierry Reding 328ec69e7f drm/tegra: Output cleanup functions cannot fail
The tegra_output_exit() and tegra_output_remove() functions cannot fail,
so make them return void.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:49 +01:00
Thierry Reding ea130b240d drm/tegra: Remove remnants of the output midlayer
The tegra_output midlayer is now completely gone and output drivers use
it purely as a helper library.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:49 +01:00
Thierry Reding 4009c22420 drm/tegra: debugfs cleanup cannot fail
The debugfs cleanup code never fails, so no error is returned. Therefore
the functions can all return void instead.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:48 +01:00
Thierry Reding 6fad8f66d7 drm/tegra: sor: Demidlayer
Implement encoder and connector within the eDP driver itself using the
Tegra output helpers rather than using the Tegra output as midlayer. By
doing so one level of indirection is removed and output drivers become
more flexible while keeping the majority of the advantages provided by
the common output helpers.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:48 +01:00
Thierry Reding 36904adf21 drm/tegra: Stop CRTC at CRTC disable time
Previously output drivers would all stop the display controller in their
disable path. However with the transition to atomic modesetting the
display controller needs to be kept running until all planes have been
disabled so that software can properly determine (using VBLANK counts)
when it is safe to remove the framebuffers associated with the planes.

Moving this code into the display controller's disable path also gets
rid of the duplication of this into all output drivers.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:43 +01:00
Thierry Reding 62b9e06321 drm/tegra: Use tegra_commit_dc() in output drivers
All output drivers have open-coded variants of this function, so export
it to remove some code duplication.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:43 +01:00
Linus Torvalds 44c916d58b ARM: SoC cleanups for 3.17
This merge window brings a good size of cleanups on various
 platforms. Among the bigger ones:
 
 * Removal of Samsung s5pc100 and s5p64xx platforms. Both of these have
   lacked active support for quite a while, and after asking around nobody
   showed interest in keeping them around. If needed, they could be
   resurrected in the future but it's more likely that we would prefer
   reintroduction of them as DT and multiplatform-enabled platforms
   instead.
 * OMAP4 controller code register define diet. They defined a lot of registers
   that were never actually used, etc.
 * Move of some of the Tegra platform code (PMC, APBIO, fuse, powergate)
   to drivers/soc so it can be shared with 64-bit code. This also converts them
   over to traditional driver models where possible.
 * Removal of legacy gpio-samsung driver, since the last users have been
   removed (moved to pinctrl)
 
 Plus a bunch of smaller changes for various platforms that sort of
 dissapear in the diffstat for the above. clps711x cleanups, shmobile
 header file refactoring/moves for multiplatform friendliness, some misc
 cleanups, etc.
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Merge tag 'cleanup-for-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC cleanups from Olof Johansson:
 "This merge window brings a good size of cleanups on various platforms.
  Among the bigger ones:

   - Removal of Samsung s5pc100 and s5p64xx platforms.  Both of these
     have lacked active support for quite a while, and after asking
     around nobody showed interest in keeping them around.  If needed,
     they could be resurrected in the future but it's more likely that
     we would prefer reintroduction of them as DT and
     multiplatform-enabled platforms instead.

   - OMAP4 controller code register define diet.  They defined a lot of
     registers that were never actually used, etc.

   - Move of some of the Tegra platform code (PMC, APBIO, fuse,
     powergate) to drivers/soc so it can be shared with 64-bit code.
     This also converts them over to traditional driver models where
     possible.

   - Removal of legacy gpio-samsung driver, since the last users have
     been removed (moved to pinctrl)

  Plus a bunch of smaller changes for various platforms that sort of
  dissapear in the diffstat for the above.  clps711x cleanups, shmobile
  header file refactoring/moves for multiplatform friendliness, some
  misc cleanups, etc"

* tag 'cleanup-for-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (117 commits)
  drivers: CCI: Correct use of ! and &
  video: clcd-versatile: Depend on ARM
  video: fix up versatile CLCD helper move
  MAINTAINERS: Add sdhci-st file to ARCH/STI architecture
  ARM: EXYNOS: Fix build breakge with PM_SLEEP=n
  MAINTAINERS: Remove Kirkwood
  ARM: tegra: Convert PMC to a driver
  soc/tegra: fuse: Set up in early initcall
  ARM: tegra: Always lock the CPU reset vector
  ARM: tegra: Setup CPU hotplug in a pure initcall
  soc/tegra: Implement runtime check for Tegra SoCs
  soc/tegra: fuse: fix dummy functions
  soc/tegra: fuse: move APB DMA into Tegra20 fuse driver
  soc/tegra: Add efuse and apbmisc bindings
  soc/tegra: Add efuse driver for Tegra
  ARM: tegra: move fuse exports to soc/tegra/fuse.h
  ARM: tegra: export apb dma readl/writel
  ARM: tegra: Use a function to get the chip ID
  ARM: tegra: Sort includes alphabetically
  ARM: tegra: Move includes to include/soc/tegra
  ...
2014-08-08 11:00:26 -07:00
Stephen Warren ef70728c7a drm/tegra: add MODULE_DEVICE_TABLEs
When tegra-drm.ko is built as a module, these MODULE_DEVICE_TABLEs allow
the module to be auto-loaded since the module will match the devices
instantiated from device tree.

(Notes for stable: in 3.14+, just git rm any conflicting file, since they
are added in later kernels. For 3.13 and below, manual merging will be
needed)

Cc: <stable@vger.kernel.org>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-08-04 10:07:39 +02:00
Thierry Reding 3f4f3b5fed drm/tegra: sor - Configure proper sync polarities
Program the sync signal polarities according to the display mode.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-08-04 10:07:37 +02:00
Stéphane Marchesin 054b1bd161 drm/tegra: sor - Use bits-per-color from panel
This change uses the value of bits-per-color from panel to remove one
more hardcoded value.

Signed-off-by: Stéphane Marchesin <marcheu@chromium.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-08-04 10:07:37 +02:00
Dan Carpenter 2263c460be drm/tegra: sor - missing unlock on error
We should unlock before returning the error code.

Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-08-04 10:07:33 +02:00
Thierry Reding 7232398abc ARM: tegra: Convert PMC to a driver
This commit converts the PMC support code to a platform driver. Because
the boot process needs to call into this driver very early, also set up
a minimal environment via an early initcall.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-07-17 14:58:43 +02:00
Thierry Reding 306a7f9139 ARM: tegra: Move includes to include/soc/tegra
In order to not clutter the include/linux directory with SoC specific
headers, move the Tegra-specific headers out into a separate directory.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-07-17 13:26:47 +02:00
Thierry Reding 1f64ae7c5a drm/tegra: sor - Remove obsolete comment
According to the DP specification the disparity of the first symbol
should always be negative. It is therefore safe to assume that panels
will conform to that and therefore parameterizing this field should
never be necessary.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-06-09 12:02:51 +02:00
Thierry Reding 0c90a18466 drm/tegra: sor - Enable only the necessary number of lanes
Instead of always enabling all four lanes, enable only the number probed
from the link.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-06-09 12:02:50 +02:00
Thierry Reding 899451b787 drm/tegra: sor - Power on only the necessary lanes
Power on only those lanes required for the specified link.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-06-09 12:02:50 +02:00
Thierry Reding d6922295e2 drm/tegra: sor - Do not program interlaced mode registers
Interlaced mode is currently not supported on the SOR, so don't program
any associated registers.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-06-09 12:02:49 +02:00
Thierry Reding a4263fed28 drm/tegra: sor - Do not hardcode link speed
Use the speed probed from the link at runtime rather than relying on a
hardcoded default.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-06-09 12:02:48 +02:00
Thierry Reding 7890b576ed drm/tegra: sor - Do not hardcode number of blank symbols
The number of HBLANK and VBLANK symbols can be computed at runtime so
that they can be set appropriately depending on the video mode and DP
link.

These values are used by the packet generation logic to determine how
many audio samples can be transferred during the blanking intervals.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-06-09 12:02:48 +02:00
Thierry Reding 34fa183bac drm/tegra: sor - Don't hardcode link parameters
The currently hardcoded link parameters don't work on all eDP panels, so
compute the parameters at runtime depending on the mode and panel type
to allow the driver to cope with a wider variety of panels.

Note that the number of bits per pixel of the panel is still hardcoded,
but this can be addressed in a separate patch.

This is largely based on a patch by Stéphane Marchesin but the algorithm
was largely rewritten to be more readable and concise.

Signed-off-by: Stéphane Marchesin <marcheu@chromium.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-06-09 12:02:47 +02:00
Stéphane Marchesin ca185c68ed drm/tegra: sor - Change power down ordering
Lanes are powered up in decreasing order. Power them down in increasing
order for consistency.

Signed-off-by: Stéphane Marchesin <marcheu@chromium.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-06-09 12:02:47 +02:00
Stéphane Marchesin 143b1df23e drm/tegra: sor - Fix copy/paste error
The comment above mentions link A/B but this isn't what the code does,
so let's fix that.

Signed-off-by: Stéphane Marchesin <marcheu@chromium.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-06-09 12:02:41 +02:00
Stéphane Marchesin ccb8b12c4b drm/tegra: sor - Remove pixel clock rounding
The code currently rounds up the clock to the next MHZ, which is
rounding up a 69.5MHz clock to 70MHz on my machine. This in turn
prevents the display from syncing. Removing this rounding fixes eDP
for me.

Signed-off-by: Stéphane Marchesin <marcheu@chromium.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-06-09 12:02:31 +02:00
Thierry Reding 1b0c7b4840 drm/tegra: sor - Make debugfs setup consistent
Other output drivers set up debugfs slightly differently. Bring the SOR
driver in line with those for consistency.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-06-06 08:38:31 +02:00
Thierry Reding 9578184efa drm/tegra: sor - Recursively remove debugfs tree
Removing only the root directory will fail when there are still files in
it. Instead of manually removing all files, remove the whole directory
recursively.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-06-06 08:38:30 +02:00
Thierry Reding 9910f5c455 drm/tegra: Remove host1x drm_bus implementation
The DRM core can now cope with drivers that don't have an associated
struct drm_bus, so the host1x implementation is no longer useful.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-06-05 23:14:46 +02:00