Commit Graph

20399 Commits

Author SHA1 Message Date
Geert Uytterhoeven 21b388dca1 ARM: dts: r8a7779: Remove deprecated "renesas, rcar-sata" compatible value
The "renesas,rcar-sata" compatible value was deprecated by
"renesas,sata-r8a7779" many years ago, in commit e67adb4e66
("sata_rcar: Add R-Car Gen2 SATA PHY support").  Drop it.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/20200219153929.11073-1-geert+renesas@glider.be
2020-02-24 14:04:21 +01:00
Linus Torvalds 4ef1a30c6b ARM: SoC: late updates
This is some material that we picked up into our tree late, or that had
 more complex dependencies on more than one topic branch that makes sense
 to keep separately.
 
  - TI support for secure accelerators and hwrng on OMAP4/5
 
  - TI camera changes for dra7 and am437x and SGX improvement due to better
    reset control support on am335x, am437x and dra7
 
  - Davinci moves to proper clocksource on DM365, and regulator/audio
    improvements for DM365 and DM644x eval boards
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Merge tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC late updates from Olof Johansson:
 "This is some material that we picked up into our tree late, or that
  had more complex dependencies on more than one topic branch that makes
  sense to keep separately.

   - TI support for secure accelerators and hwrng on OMAP4/5

   - TI camera changes for dra7 and am437x and SGX improvement due to
     better reset control support on am335x, am437x and dra7

   - Davinci moves to proper clocksource on DM365, and regulator/audio
     improvements for DM365 and DM644x eval boards"

* tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (32 commits)
  ARM: dts: omap4-droid4: Enable hdq for droid4 ds250x 1-wire battery nvmem
  ARM: dts: motorola-cpcap-mapphone: Configure calibration interrupt
  ARM: dts: Configure interconnect target module for am437x sgx
  ARM: dts: Configure sgx for dra7
  ARM: dts: Configure rstctrl reset for am335x SGX
  ARM: dts: dra7: Add ti-sysc node for VPE
  ARM: dts: dra7: add vpe clkctrl node
  ARM: dts: am43x-epos-evm: Add VPFE and OV2659 entries
  ARM: dts: am437x-sk-evm: Add VPFE and OV2659 entries
  ARM: dts: am43xx: add support for clkout1 clock
  arm: dts: dra76-evm: Add CAL and OV5640 nodes
  arm: dtsi: dra76x: Add CAL dtsi node
  arm: dts: dra72-evm-common: Add entries for the CSI2 cameras
  ARM: dts: DRA72: Add CAL dtsi node
  ARM: dts: dra7-l4: Add ti-sysc node for CAM
  ARM: OMAP: DRA7xx: Make CAM clock domain SWSUP only
  ARM: dts: dra7: add cam clkctrl node
  ARM: OMAP2+: Drop legacy platform data for omap4 des
  ARM: OMAP2+: Drop legacy platform data for omap4 sham
  ARM: OMAP2+: Drop legacy platform data for omap4 aes
  ...
2020-02-08 14:17:27 -08:00
Linus Torvalds 1afa9c3b7c ARM: Device-tree updates
New SoCs:
 
  - Atmel/Microchip SAM9X60 (ARM926 SoC)
 
  - OMAP 37xx gets split into AM3703/AM3715/DM3725, who are all variants
    of it with different GPU/media IP configurations.
 
  - ST stm32mp15 SoCs (1-2 Cortex-A7, CAN, GPU depending on SKU)
 
  - ST Ericsson ab8505 (variant of ab8500) and db8520 (variant of db8500)
 
  - Unisoc SC9863A SoC (8x Cortex-A55 mobile chipset w/ GPU, modem)
 
  - Qualcomm SC7180 (8-core 64bit SoC, unnamed CPU class)
 
 New boards:
 
  - Allwinner
   + Emlid Neutis SoM (H3 variant)
   + Libre Computer ALL-H3-IT
   + PineH64 Model B
 
  - Amlogic
   + Libretech Amlogic GX PC (s905d and s912-based variants)
 
  - Atmel/Microchip:
   + Kizboxmini, sam9x60 EK, sama5d27 Wireless SOM (wlsom1)
 
  - Marvell:
   + Armada 385-based SolidRun Clearfog GTR
 
  - NXP:
   + Gateworks GW59xx boards based on i.MX6/6Q/6QDL
   + Tolino Shine 3 eBook reader (i.MX6sl)
   + Embedded Artists COM (i.MX7ULP)
   + SolidRun CLearfog CX/ITX and HoneyComb (LX2160A-based systems)
   + Google Coral Edge TPU (i.MX8MQ)
 
  - Rockchip
   + Radxa Dalang Carrier (supports rk3288 and rk3399 SOMs)
   + Radxa Rock Pi N10 (RK3399Pro-based)
   + VMARC RK3399Pro SOM
 
  - ST
   + Reference boards for stm32mp15
 
  - ST Ericsson
   + Samsung Galaxy S III mini (GT-I8190)
   + HREF520 reference board for DB8520
 
  - TI OMAP
   + Gen1 Amazon Echo (OMAP3630-based)
 
  - Qualcomm
   + Inforce 6640 Single Board Computer (msm8996-based)
   + SC7180 IDP (SC7180-based)
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Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM Device-tree updates from Olof Johansson:
 "New SoCs:

   - Atmel/Microchip SAM9X60 (ARM926 SoC)

   - OMAP 37xx gets split into AM3703/AM3715/DM3725, who are all
     variants of it with different GPU/media IP configurations.

   - ST stm32mp15 SoCs (1-2 Cortex-A7, CAN, GPU depending on SKU)

   - ST Ericsson ab8505 (variant of ab8500) and db8520 (variant of
     db8500)

   - Unisoc SC9863A SoC (8x Cortex-A55 mobile chipset w/ GPU, modem)

   - Qualcomm SC7180 (8-core 64bit SoC, unnamed CPU class)

  New boards:

   - Allwinner:
      + Emlid Neutis SoM (H3 variant)
      + Libre Computer ALL-H3-IT
      + PineH64 Model B

   - Amlogic:
      + Libretech Amlogic GX PC (s905d and s912-based variants)

   - Atmel/Microchip:
      + Kizboxmini, sam9x60 EK, sama5d27 Wireless SOM (wlsom1)

   - Marvell:
      + Armada 385-based SolidRun Clearfog GTR

   - NXP:
      + Gateworks GW59xx boards based on i.MX6/6Q/6QDL
      + Tolino Shine 3 eBook reader (i.MX6sl)
      + Embedded Artists COM (i.MX7ULP)
      + SolidRun CLearfog CX/ITX and HoneyComb (LX2160A-based systems)
      + Google Coral Edge TPU (i.MX8MQ)

   - Rockchip:
      + Radxa Dalang Carrier (supports rk3288 and rk3399 SOMs)
      + Radxa Rock Pi N10 (RK3399Pro-based)
      + VMARC RK3399Pro SOM

   - ST:
      + Reference boards for stm32mp15

   - ST Ericsson:
      + Samsung Galaxy S III mini (GT-I8190)
      + HREF520 reference board for DB8520

   - TI OMAP:
      + Gen1 Amazon Echo (OMAP3630-based)

   - Qualcomm:
      + Inforce 6640 Single Board Computer (msm8996-based)
      + SC7180 IDP (SC7180-based)"

* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (623 commits)
  dt-bindings: fix compilation error of the example in marvell,mmp3-hsic-phy.yaml
  arm64: dts: ti: k3-am654-base-board: Add CSI2 OV5640 camera
  arm64: dts: ti: k3-am65-main Add CAL node
  arm64: dts: ti: k3-j721e-main: Add McASP nodes
  arm64: dts: ti: k3-am654-main: Add McASP nodes
  arm64: dts: ti: k3-j721e: DMA support
  arm64: dts: ti: k3-j721e-main: Move secure proxy and smmu under main_navss
  arm64: dts: ti: k3-j721e-main: Correct main NAVSS representation
  arm64: dts: ti: k3-j721e: Correct the address for MAIN NAVSS
  arm64: dts: ti: k3-am65: DMA support
  arm64: dts: ti: k3-am65-main: Move secure proxy under cbass_main_navss
  arm64: dts: ti: k3-am65-main: Correct main NAVSS representation
  ARM: dts: aspeed: rainier: Add UCD90320 power sequencer
  ARM: dts: aspeed: rainier: Switch PSUs to unknown version
  arm64: dts: rockchip: Kill off "simple-panel" compatibles
  ARM: dts: rockchip: Kill off "simple-panel" compatibles
  arm64: dts: rockchip: rename dwmmc node names to mmc
  ARM: dts: rockchip: rename dwmmc node names to mmc
  arm64: dts: exynos: Rename Samsung and Exynos to lowercase
  arm64: dts: uniphier: add reset-names to NAND controller node
  ...
2020-02-08 13:58:44 -08:00
Linus Torvalds d60ddd2442 ARM development updates for 5.6-rc1:
- decompressor updates
 - prevention of out-of-bounds access while stacktracing
 - fix a section mismatch warning with free_memmap()
 - make kexec depend on MMU to avoid some build errors
 - remove swapops stubs
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Merge tag 'for-linus' of git://git.armlinux.org.uk/~rmk/linux-arm

Pull ARM updates from Russell King:

 - decompressor updates

 - prevention of out-of-bounds access while stacktracing

 - fix a section mismatch warning with free_memmap()

 - make kexec depend on MMU to avoid some build errors

 - remove swapops stubs

* tag 'for-linus' of git://git.armlinux.org.uk/~rmk/linux-arm:
  ARM: 8954/1: NOMMU: remove stubs for swapops
  ARM: 8952/1: Disable kmemleak on XIP kernels
  ARM: 8951/1: Fix Kexec compilation issue.
  ARM: 8949/1: mm: mark free_memmap as __init
  ARM: 8948/1: Prevent OOB access in stacktrace
  ARM: 8945/1: decompressor: use CONFIG option instead of cc-option
  ARM: 8942/1: Revert "8857/1: efi: enable CP15 DMB instructions before cleaning the cache"
  ARM: 8941/1: decompressor: enable CP15 barrier instructions in v7 cache setup code
2020-02-04 13:12:19 +00:00
Linus Torvalds f4a6365ae8 There are a few changes to the core framework this time around, in addition to
the normal collection of driver updates to support new SoCs, fix incorrect
 data, and convert various drivers to clk_hw based APIs.
 
 In the core, we allow clk_ops::init() to return an error code now so that we
 can fail clk registration if the callback does something like fail to allocate
 memory. We also add a new "terminate" clk_op so that things done in
 clk_ops::init() can be undone, e.g. free memory. We also spit out a warning now
 when critical clks fail to enable and we support changing clk rates and
 enable/disable state through debugfs when developers compile the kernel
 themselves.
 
 On the driver front, we get support for what seems like a lot of Qualcomm and
 NXP SoCs given that those vendors dominate the diffstat. There are a couple new
 drivers for Xilinx and Amlogic SoCs too. The updates are all small things like
 fixing the way glitch free muxes switch parents, avoiding div-by-zero problems,
 or fixing data like parent names. See the updates section below for more
 details.
 
 Finally, the "basic" clk types have been converted to support specifying
 parents with clk_hw pointers. This work includes an overhaul of the fixed-rate
 clk type to be more modern by using clk_hw APIs.
 
 Core:
  - Let clk_ops::init() return an error code
  - Add a clk_ops::terminate() callback to undo clk_ops::init()
  - Warn about critical clks that fail to enable or prepare
  - Support dangerous debugfs actions on clks with dead code
 
 New Drivers:
  - Support for Xilinx Versal platform clks
  - Display clk controller on qcom sc7180
  - Video clk controller on qcom sc7180
  - Graphics clk controller on qcom sc7180
  - CPU PLLs for qcom msm8916
  - Move qcom msm8974 gfx3d clk to RPM control
  - Display port clk support on qcom sdm845 SoCs
  - Global clk controller on qcom ipq6018
  - Add a driver for BCLK of Freescale SAI cores
  - Add cam, vpe and sgx clock support for TI dra7
  - Add aess clock support for TI omap5
  - Enable clks for CPUfreq on Allwinner A64 SoCs
  - Add Amlogic meson8b DDR clock controller
  - Add input clocks to Amlogic meson8b controllers
  - Add SPIBSC (SPI FLASH) clock on Renesas RZ/A2
  - i.MX8MP clk driver support
 
 Updates:
  - Convert gpio, fixed-factor, mux, gate, divider basic clks to hw based APIs
  - Detect more PRMCU variants in ux500 driver
  - Adjust the composite clk type to new way of describing clk parents
  - Fixes for clk controllers on qcom msm8998 SoCs
  - Fix gmac main clock for TI dra7
  - Move TI dra7-atl clock header to correct location
  - Fix hidden node name dependency on TI clkctrl clocks
  - Fix Amlogic meson8b mali clock update using the glitch free mux
  - Fix Amlogic pll driver division by zero at init
  - Prepare for split of Renesas R-Car H3 ES1.x and ES2.0+ config symbols
  - Switch more i.MX clk drivers to clk_hw based APIs
  - Disable non-functional divider between pll4_audio_div and
    pll4_post_div on imx6q
  - Fix watchdog2 clock name typo in imx7ulp clock driver
  - Set CLK_GET_RATE_NOCACHE flag for DRAM related clocks on i.MX8M SoCs
  - Suppress bind attrs for i.MX8M clock driver
  - Add a big comment in imx8qxp-lpcg driver to tell why
    devm_platform_ioremap_resource() shouldn't be used for the driver
  - A correction on i.MX8MN usb1_ctrl parent clock setting
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Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
 "There are a few changes to the core framework this time around, in
  addition to the normal collection of driver updates to support new
  SoCs, fix incorrect data, and convert various drivers to clk_hw based
  APIs.

  In the core, we allow clk_ops::init() to return an error code now so
  that we can fail clk registration if the callback does something like
  fail to allocate memory. We also add a new "terminate" clk_op so that
  things done in clk_ops::init() can be undone, e.g. free memory. We
  also spit out a warning now when critical clks fail to enable and we
  support changing clk rates and enable/disable state through debugfs
  when developers compile the kernel themselves.

  On the driver front, we get support for what seems like a lot of
  Qualcomm and NXP SoCs given that those vendors dominate the diffstat.
  There are a couple new drivers for Xilinx and Amlogic SoCs too. The
  updates are all small things like fixing the way glitch free muxes
  switch parents, avoiding div-by-zero problems, or fixing data like
  parent names. See the updates section below for more details.

  Finally, the "basic" clk types have been converted to support
  specifying parents with clk_hw pointers. This work includes an
  overhaul of the fixed-rate clk type to be more modern by using clk_hw
  APIs.

  Core:
   - Let clk_ops::init() return an error code
   - Add a clk_ops::terminate() callback to undo clk_ops::init()
   - Warn about critical clks that fail to enable or prepare
   - Support dangerous debugfs actions on clks with dead code

  New Drivers:
   - Support for Xilinx Versal platform clks
   - Display clk controller on qcom sc7180
   - Video clk controller on qcom sc7180
   - Graphics clk controller on qcom sc7180
   - CPU PLLs for qcom msm8916
   - Move qcom msm8974 gfx3d clk to RPM control
   - Display port clk support on qcom sdm845 SoCs
   - Global clk controller on qcom ipq6018
   - Add a driver for BCLK of Freescale SAI cores
   - Add cam, vpe and sgx clock support for TI dra7
   - Add aess clock support for TI omap5
   - Enable clks for CPUfreq on Allwinner A64 SoCs
   - Add Amlogic meson8b DDR clock controller
   - Add input clocks to Amlogic meson8b controllers
   - Add SPIBSC (SPI FLASH) clock on Renesas RZ/A2
   - i.MX8MP clk driver support

  Updates:
   - Convert gpio, fixed-factor, mux, gate, divider basic clks to hw
     based APIs
   - Detect more PRMCU variants in ux500 driver
   - Adjust the composite clk type to new way of describing clk parents
   - Fixes for clk controllers on qcom msm8998 SoCs
   - Fix gmac main clock for TI dra7
   - Move TI dra7-atl clock header to correct location
   - Fix hidden node name dependency on TI clkctrl clocks
   - Fix Amlogic meson8b mali clock update using the glitch free mux
   - Fix Amlogic pll driver division by zero at init
   - Prepare for split of Renesas R-Car H3 ES1.x and ES2.0+ config
     symbols
   - Switch more i.MX clk drivers to clk_hw based APIs
   - Disable non-functional divider between pll4_audio_div and
     pll4_post_div on imx6q
   - Fix watchdog2 clock name typo in imx7ulp clock driver
   - Set CLK_GET_RATE_NOCACHE flag for DRAM related clocks on i.MX8M
     SoCs
   - Suppress bind attrs for i.MX8M clock driver
   - Add a big comment in imx8qxp-lpcg driver to tell why
     devm_platform_ioremap_resource() shouldn't be used for the driver
   - A correction on i.MX8MN usb1_ctrl parent clock setting"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (140 commits)
  dt/bindings: clk: fsl,plldig: Drop 'bindings' from schema id
  clk: ls1028a: Fix warning on clamp() usage
  clk: qoriq: add ls1088a hwaccel clocks support
  clk: ls1028a: Add clock driver for Display output interface
  dt/bindings: clk: Add YAML schemas for LS1028A Display Clock bindings
  clk: fsl-sai: new driver
  dt-bindings: clock: document the fsl-sai driver
  clk: composite: add _register_composite_pdata() variants
  clk: qcom: rpmh: Sort OF match table
  dt-bindings: fix warnings in validation of qcom,gcc.yaml
  dt-binding: fix compilation error of the example in qcom,gcc.yaml
  clk: zynqmp: Add support for clock with CLK_DIVIDER_POWER_OF_TWO flag
  clk: zynqmp: Fix divider calculation
  clk: zynqmp: Add support for get max divider
  clk: zynqmp: Warn user if clock user are more than allowed
  clk: zynqmp: Extend driver for versal
  dt-bindings: clock: Add bindings for versal clock driver
  clk: ti: clkctrl: Fix hidden dependency to node name
  clk: ti: add clkctrl data dra7 sgx
  clk: ti: omap5: Add missing AESS clock
  ...
2020-02-03 22:10:18 +00:00
Linus Torvalds aac9662671 USB/Thunderbolt/PHY driver updates for 5.6-rc1
Here is the big USB and Thunderbolt and PHY driver updates for 5.6-rc1.
 
 With the advent of USB4, "Thunderbolt" has really become USB4, so the
 renaming of the Kconfig option and starting to share subsystem code has
 begun, hence both subsystems coming in through the same tree here.
 
 PHY driver updates also touched USB drivers, so that is coming in
 through here as well.
 
 Major stuff included in here are:
 	- USB 4 initial support added (i.e. Thunderbolt)
 	- musb driver updates
 	- USB gadget driver updates
 	- PHY driver updates
 	- USB PHY driver updates
 	- lots of USB serial stuff fixed up
 	- USB typec updates
 	- USB-IP fixes
 	- lots of other smaller USB driver updates
 
 All of these have been in linux-next for a while now (the usb-serial
 tree is already tested in linux-next on its own before merged into
 here), with no reported issues.
 
 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Merge tag 'usb-5.6-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb

Pull USB/Thunderbolt/PHY driver updates from Greg KH:
 "Here is the big USB and Thunderbolt and PHY driver updates for
  5.6-rc1.

  With the advent of USB4, "Thunderbolt" has really become USB4, so the
  renaming of the Kconfig option and starting to share subsystem code
  has begun, hence both subsystems coming in through the same tree here.

  PHY driver updates also touched USB drivers, so that is coming in
  through here as well.

  Major stuff included in here are:
   - USB 4 initial support added (i.e. Thunderbolt)
   - musb driver updates
   - USB gadget driver updates
   - PHY driver updates
   - USB PHY driver updates
   - lots of USB serial stuff fixed up
   - USB typec updates
   - USB-IP fixes
   - lots of other smaller USB driver updates

  All of these have been in linux-next for a while now (the usb-serial
  tree is already tested in linux-next on its own before merged into
  here), with no reported issues"

[ Removed an incorrect compile test enablement for PHY_EXYNOS5250_SATA
  that causes configuration warnings    - Linus ]

* tag 'usb-5.6-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb: (207 commits)
  Doc: ABI: add usb charger uevent
  usb: phy: show USB charger type for user
  usb: cdns3: fix spelling mistake and rework grammar in text
  usb: phy: phy-gpio-vbus-usb: Convert to GPIO descriptors
  USB: serial: cyberjack: fix spelling mistake "To" -> "Too"
  USB: serial: ir-usb: simplify endpoint check
  USB: serial: ir-usb: make set_termios synchronous
  USB: serial: ir-usb: fix IrLAP framing
  USB: serial: ir-usb: fix link-speed handling
  USB: serial: ir-usb: add missing endpoint sanity check
  usb: typec: fusb302: fix "op-sink-microwatt" default that was in mW
  usb: typec: wcove: fix "op-sink-microwatt" default that was in mW
  usb: dwc3: pci: add ID for the Intel Comet Lake -V variant
  usb: typec: tcpci: mask event interrupts when remove driver
  usb: host: xhci-tegra: set MODULE_FIRMWARE for tegra186
  usb: chipidea: add inline for ci_hdrc_host_driver_init if host is not defined
  usb: chipidea: handle single role for usb role class
  usb: musb: fix spelling mistake: "periperal" -> "peripheral"
  phy: ti: j721e-wiz: Fix build error without CONFIG_OF_ADDRESS
  USB: usbfs: Always unlink URBs in reverse order
  ...
2020-01-29 10:09:44 -08:00
Stefan Wahren a1d6989bf1 ARM: dts: bcm2711: Enable thermal
This enables thermal for the BCM2711 (used on Raspberry Pi 4) by adding
the AVS monitor and a subnode for the thermal part.

Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Reviewed-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Tested-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Link: https://lore.kernel.org/r/1578941778-23321-4-git-send-email-stefan.wahren@i2se.com
2020-01-27 11:41:08 +01:00
Olof Johansson 19d52e94e0 Late omap dts changes for v5.6 merge window
This series of changes mostly configures the cameras for dra7 and
 am437x that have been pending for few months now because of waiting
 for clock dependencies to clear. So these changes are based on earlier
 dts changes with with Tero Kristo's for-5.6-ti-clk branch merged in.
 
 Then there's a series of changes to configure powervr sgx target module
 for am335x, am437x and dra7 that have been waiting to have the rstctrl
 reset driver dependencies to clear.
 
 Also included are few minor patches to configure 1-wire and coulomb
 counter calibration interrupt for droid4.
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Merge tag 'omap-for-v5.6/dt-late-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/late

Late omap dts changes for v5.6 merge window

This series of changes mostly configures the cameras for dra7 and
am437x that have been pending for few months now because of waiting
for clock dependencies to clear. So these changes are based on earlier
dts changes with with Tero Kristo's for-5.6-ti-clk branch merged in.

Then there's a series of changes to configure powervr sgx target module
for am335x, am437x and dra7 that have been waiting to have the rstctrl
reset driver dependencies to clear.

Also included are few minor patches to configure 1-wire and coulomb
counter calibration interrupt for droid4.

* tag 'omap-for-v5.6/dt-late-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (25 commits)
  ARM: dts: omap4-droid4: Enable hdq for droid4 ds250x 1-wire battery nvmem
  ARM: dts: motorola-cpcap-mapphone: Configure calibration interrupt
  ARM: dts: Configure interconnect target module for am437x sgx
  ARM: dts: Configure sgx for dra7
  ARM: dts: Configure rstctrl reset for am335x SGX
  ARM: dts: dra7: Add ti-sysc node for VPE
  ARM: dts: dra7: add vpe clkctrl node
  ARM: dts: am43x-epos-evm: Add VPFE and OV2659 entries
  ARM: dts: am437x-sk-evm: Add VPFE and OV2659 entries
  ARM: dts: am43xx: add support for clkout1 clock
  arm: dts: dra76-evm: Add CAL and OV5640 nodes
  arm: dtsi: dra76x: Add CAL dtsi node
  arm: dts: dra72-evm-common: Add entries for the CSI2 cameras
  ARM: dts: DRA72: Add CAL dtsi node
  ARM: dts: dra7-l4: Add ti-sysc node for CAM
  ARM: OMAP: DRA7xx: Make CAM clock domain SWSUP only
  ARM: dts: dra7: add cam clkctrl node
  ARM: dts: Add omap3-echo
  ARM: dts: Add dtsi files for AM3703, AM3715 and DM3725
  ARM: dts: am335x-icev2: Add support for OSD9616P0899-10 at i2c0
  ...

Link: https://lore.kernel.org/r/pull-1579896427-50330@atomide.com-3
Signed-off-by: Olof Johansson <olof@lixom.net>
2020-01-25 13:28:52 -08:00
Masahiro Yamada 9db7885273 ARM: 8945/1: decompressor: use CONFIG option instead of cc-option
The Kconfig stage (arch/Kconfig) has already evaluated whether the
compiler supports -fno-stack-protector.

You can use CONFIG_CC_HAS_STACKPROTECTOR_NONE instead of invoking
the compiler to check the flag here.

Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2020-01-25 18:18:04 +00:00
Ard Biesheuvel cf17a1e3aa ARM: 8942/1: Revert "8857/1: efi: enable CP15 DMB instructions before cleaning the cache"
This reverts commit e17b1af96b, which is
no longer necessary now that the v7 specific routines take care not to
issue CP15 barrier instructions before they are enabled in SCTLR.

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2020-01-25 18:17:57 +00:00
Ard Biesheuvel 8239fc7755 ARM: 8941/1: decompressor: enable CP15 barrier instructions in v7 cache setup code
Commit e17b1af96b

  "ARM: 8857/1: efi: enable CP15 DMB instructions before cleaning the cache"

added some explicit handling of the CP15BEN bit in the SCTLR system
register, to ensure that CP15 barrier instructions are enabled, even
if we enter the decompressor via the EFI stub.

However, as it turns out, there are other ways in which we may end up
using CP15 barrier instructions without them being enabled. I.e., when
the decompressor startup code skips the cache_on() initially, we end
up calling cache_clean_flush() with the caches and MMU off, in which
case the CP15BEN bit in SCTLR may not be programmed either. And in
fact, cache_on() itself issues CP15 barrier instructions before actually
enabling them by programming the new SCTLR value (and issuing an ISB)

Since these routines are shared between v7 CPUs and older ones that
implement the CPUID extension as well, using the ordinary v7 barrier
instructions in this code is not possible, and so we should enable the
CP15 ones explicitly before issuing them. Note that a v7 ISB is still
required between programming the SCTLR register and using the CP15 barrier
instructions, and we should take care to branch over it if the CP15BEN
bit is already set, given that in that case, the CPU may not support it.

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2020-01-25 18:17:42 +00:00
Olof Johansson 3a29339b21 UniPhier ARM SoC DT updates for v5.6
- Add pinmux nodes for I2C ch5, ch6
 
 - Add reset-names to NAND controller node
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Merge tag 'uniphier-dt-v5.6' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier into arm/dt

UniPhier ARM SoC DT updates for v5.6

- Add pinmux nodes for I2C ch5, ch6

- Add reset-names to NAND controller node

* tag 'uniphier-dt-v5.6' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier:
  ARM: dts: uniphier: add reset-names to NAND controller node
  ARM: dts: uniphier: add pinmux nodes for I2C ch5, ch6

Link: https://lore.kernel.org/r/CAK7LNARYrzv4QU-eXxqYCcC9dziJmx9F02YNZ3mMnF47EfL3fA@mail.gmail.com
Signed-off-by: Olof Johansson <olof@lixom.net>
2020-01-24 12:05:59 -08:00
Olof Johansson 6716cb162d Few minor fixes for omaps
Looks like we have wrong default memory size for beaglebone black,
 it has at least 512 MB of RAM and not 256 MB. This causes an issue
 when booted with GRUB2 that does not seem to pass memory info to
 the kernel.
 
 And for am43x-epos-evm the SPI pin directions need to be configured
 for SPI to work.
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Merge tag 'omap-for-fixes-whenever-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/fixes

Few minor fixes for omaps

Looks like we have wrong default memory size for beaglebone black,
it has at least 512 MB of RAM and not 256 MB. This causes an issue
when booted with GRUB2 that does not seem to pass memory info to
the kernel.

And for am43x-epos-evm the SPI pin directions need to be configured
for SPI to work.

* tag 'omap-for-fixes-whenever-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: dts: am43x-epos-evm: set data pin directions for spi0 and spi1
  ARM: dts: am335x-boneblack-common: fix memory size

Link: https://lore.kernel.org/r/pull-1579895109-287828@atomide.com
Signed-off-by: Olof Johansson <olof@lixom.net>
2020-01-24 12:05:33 -08:00
Tony Lindgren 2256e6f68c ARM: dts: omap4-droid4: Enable hdq for droid4 ds250x 1-wire battery nvmem
With "[PATCHv3] w1: omap-hdq: Simplify driver with PM runtime autosuspend"
we can read the droid4 battery information over 1-wire with this patch
with something like:

# modprobe omap_hdq
# hd /sys/bus/w1/devices/89-*/89-*/nvmem
...

Unfortunately the format of the battery data seems to be Motorola specific
and is currently unusable for battery charger unless somebody figures out
what it means.

Note that currently keeping omap_hdq module loaded will cause extra power
consumption as it seems to scan devices periodically.

Cc: Merlijn Wajer <merlijn@wizzup.org>
Cc: Pavel Machek <pavel@ucw.cz>
Acked-by: Pavel Machek <pavel@ucw.cz>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-01-23 10:00:01 -08:00
Tony Lindgren 36f808f2f1 ARM: dts: motorola-cpcap-mapphone: Configure calibration interrupt
We added coulomb counter calibration support With commit 0cb90f071f
("power: supply: cpcap-battery: Add basic coulomb counter calibrate
support"), but we also need to configure the related interrupt.

Without the interrupt calibration happens based on a timeout after two
seconds, with the interrupt the calibration just gets done a bit faster.

Cc: Merlijn Wajer <merlijn@wizzup.org>
Cc: Pavel Machek <pavel@ucw.cz>
Acked-by: Pavel Machek <pavel@ucw.cz>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-01-23 10:00:01 -08:00
Tony Lindgren a5ebccc822 ARM: dts: Configure interconnect target module for am437x sgx
This seems to be similar to what we have for am335x. The following can be
tested via sysfs with the to ensure the SGX module gets enabled and disabled
properly:

# echo on > /sys/bus/platform/devices/5600fe00.target-module/power/control
# rwmem 0x5600fe00              # revision register
0x5600fe00 = 0x40000000
# echo auto > /sys/bus/platform/devices/5600fe00.target-module/power/control
# rwmem 0x5000fe00
Bus error

Note that this patch depends on the PRM rstctrl driver that has
been recently posted. If the child device driver(s) need to prevent
rstctrl reset on PM runtime suspend, the drivers need to increase
the usecount for the shared rstctrl reset that can be mapped also
for the child device(s) or accessed via dev->parent.

Cc: Adam Ford <aford173@gmail.com>
Cc: Filip Matijević <filip.matijevic.pz@gmail.com>
Cc: "H. Nikolaus Schaller" <hns@goldelico.com>
Cc: Ivaylo Dimitrov <ivo.g.dimitrov.75@gmail.com>
Cc: moaz korena <moaz@korena.xyz>
Cc: Merlijn Wajer <merlijn@wizzup.org>
Cc: Paweł Chmiel <pawel.mikolaj.chmiel@gmail.com>
Cc: Philipp Rossak <embed3d@gmail.com>
Cc: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-01-23 10:00:00 -08:00
Tony Lindgren 45e118b780 ARM: dts: Configure sgx for dra7
I've tested that the interconnect target module enables and idles
just fine when probed with ti-sysc with PM runtime control via sys:

# echo on > $(find /sys -name control | grep \/5600)
# rwmem 0x5600fe00      # OCP Revision
0x5600fe00 = 0x40000000
# echo auto > $(find /sys -name control | grep \/5600)

Cc: "H. Nikolaus Schaller" <hns@goldelico.com>
Cc: Robert Nelson <robertcnelson@gmail.com>
Cc: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-01-23 10:00:00 -08:00
Tony Lindgren c3fb99f46e ARM: dts: Configure rstctrl reset for am335x SGX
The following can be tested via sysfs with the following to ensure the SGX
module gets enabled and disabled properly:

# echo on > /sys/bus/platform/devices/5600fe00.target-module/power/control
# rwmem 0x5600fe00		# revision register
0x5600fe00 = 0x40000000
# echo auto > /sys/bus/platform/devices/5600fe00.target-module/power/control
# rwmem 0x5000fe00
Bus error

Note that this patch depends on the PRM rstctrl driver that has
been recently posted. If the child device driver(s) need to prevent
rstctrl reset on PM runtime suspend, the drivers need to increase
the usecount for the shared rstctrl reset that can be mapped also
for the child device(s) or accessed via dev->parent.

Cc: Adam Ford <aford173@gmail.com>
Cc: Filip Matijević <filip.matijevic.pz@gmail.com>
Cc: "H. Nikolaus Schaller" <hns@goldelico.com>
Cc: Ivaylo Dimitrov <ivo.g.dimitrov.75@gmail.com>
Cc: moaz korena <moaz@korena.xyz>
Cc: Merlijn Wajer <merlijn@wizzup.org>
Cc: Paweł Chmiel <pawel.mikolaj.chmiel@gmail.com>
Cc: Philipp Rossak <embed3d@gmail.com>
Cc: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-01-23 10:00:00 -08:00
Tony Lindgren d7a9d45d5f Merge branch 'omap-for-v5.6/ti-sysc-dt-cam' into omap-for-v5.6/dt 2020-01-23 09:59:29 -08:00
Benoit Parrot 1a20951605 ARM: dts: dra7: Add ti-sysc node for VPE
Add VPE node as a child of l4 interconnect in order for it to probe
using ti-sysc.

Signed-off-by: Benoit Parrot <bparrot@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-01-23 09:27:40 -08:00
Benoit Parrot 79312524db ARM: dts: dra7: add vpe clkctrl node
Add clkctrl nodes for VPE module.

Note that because of the current dts node name dependency for mapping to
clock domain, we must still use "vpe-clkctrl@" naming instead of generic
"clock@" naming for the node. And because of this, it's probably best to
apply the dts node addition together along with the other clock changes.

Signed-off-by: Benoit Parrot <bparrot@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-01-23 09:27:40 -08:00
Benoit Parrot d916ab415b ARM: dts: am43x-epos-evm: Add VPFE and OV2659 entries
Add VPFE device nodes entries.
Add OmniVision OV2659 sensor device nodes and linkage.

Since Rev1.2a on this board the sensor source clock (xvclk) has a
dedicated 12Mhz oscillator instead of using clkout1.
Add 'audio_mstrclk' fixed clock object to represent it.

Signed-off-by: Benoit Parrot <bparrot@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-01-23 09:27:39 -08:00
Benoit Parrot f8404f1595 ARM: dts: am437x-sk-evm: Add VPFE and OV2659 entries
Add VPFE device nodes entries.
Add OmniVision OV2659 sensor device nodes and linkage.

The sensor clock (xvclk) is sourced from clkout1.
Add clock entries to properly select clkout1 and set its parent
clock to sys_clkin_ck.

Signed-off-by: Benoit Parrot <bparrot@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-01-23 09:27:39 -08:00
Tero Kristo 01053dadb7 ARM: dts: am43xx: add support for clkout1 clock
clkout1 clock node and its generation tree was missing. Add this based
on the data on TRM and PRCM functional spec.

commit 664ae1ab25 ("ARM: dts: am43xx: add clkctrl nodes") effectively
reverted this commit 8010f13a40 ("ARM: dts: am43xx: add support for
clkout1 clock") which is needed for the ov2659 camera sensor clock
definition hence it is being re-applied here.

Note that because of the current dts node name dependency for mapping to
clock domain, we must still use "clkout1-*ck" naming instead of generic
"clock@" naming for the node. And because of this, it's probably best to
apply the dts node addition together along with the other clock changes.

Fixes: 664ae1ab25 ("ARM: dts: am43xx: add clkctrl nodes")
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Tested-by: Benoit Parrot <bparrot@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Benoit Parrot <bparrot@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-01-23 09:27:39 -08:00
Benoit Parrot 3bd7b487a6 arm: dts: dra76-evm: Add CAL and OV5640 nodes
Add device nodes for CSI2 camera board OV5640.
Add the CAL port nodes with the necessary linkage to the ov5640 nodes.

Signed-off-by: Benoit Parrot <bparrot@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-01-23 09:14:01 -08:00
Benoit Parrot 807276375f arm: dtsi: dra76x: Add CAL dtsi node
Add the required dtsi node to support the Camera
Adaptation Layer (CAL) for the DRA76 family of devices.

Signed-off-by: Benoit Parrot <bparrot@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-01-23 09:13:55 -08:00
Benoit Parrot 414dc3d33b arm: dts: dra72-evm-common: Add entries for the CSI2 cameras
Add device nodes for CSI2 camera board OV5640.
Add the CAL port nodes with the necessary linkage to the ov5640 nodes.

Signed-off-by: Benoit Parrot <bparrot@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-01-23 09:13:50 -08:00
Benoit Parrot 86a7e226dd ARM: dts: DRA72: Add CAL dtsi node
This patch adds the required dtsi node to support the Camera
Adaptation Layer (CAL) for the DRA72 family of devices.

Signed-off-by: Benoit Parrot <bparrot@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-01-23 09:13:45 -08:00
Benoit Parrot b316172589 ARM: dts: dra7-l4: Add ti-sysc node for CAM
Add CAM nodes as a child of l4 interconnect in order for it to probe
using ti-sysc.

Signed-off-by: Benoit Parrot <bparrot@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-01-23 09:13:39 -08:00
Benoit Parrot 215d103f36 ARM: dts: dra7: add cam clkctrl node
Add clkctrl nodes for CAM domain.

Note that because of the current dts node name dependency for mapping to
clock domain, we must still use "cam-clkctrl@" naming instead of generic
"clock@" naming for the node. And because of this, it's probably best to
apply the dts node addition together along with the other clock changes.

Signed-off-by: Benoit Parrot <bparrot@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-01-23 09:12:47 -08:00
Tony Lindgren 885d21e495 Merge branch 'omap-for-v5.6/ti-sysc-omap45-rng' into omap-for-v5.6/ti-sysc-drop-pdata 2020-01-23 08:38:34 -08:00
Tony Lindgren ddf664da3b ARM: OMAP2+: Drop legacy platform data for omap4 des
We can now probe devices with ti-sysc interconnect driver and dts
data. Let's drop the related platform data and custom ti,hwmods
dts property.

As we're just dropping data, and the early platform data init
is based on the custom ti,hwmods property, we want to drop both
the platform data and ti,hwmods property in a single patch.

Cc: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-01-23 08:24:46 -08:00
Tony Lindgren bea5e90472 ARM: OMAP2+: Drop legacy platform data for omap4 sham
We can now probe devices with ti-sysc interconnect driver and dts
data. Let's drop the related platform data and custom ti,hwmods
dts property.

As we're just dropping data, and the early platform data init
is based on the custom ti,hwmods property, we want to drop both
the platform data and ti,hwmods property in a single patch.

Cc: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-01-23 08:24:46 -08:00
Tony Lindgren 814b253877 ARM: OMAP2+: Drop legacy platform data for omap4 aes
We can now probe devices with ti-sysc interconnect driver and dts
data. Let's drop the related platform data and custom ti,hwmods
dts property.

As we're just dropping data, and the early platform data init
is based on the custom ti,hwmods property, we want to drop both
the platform data and ti,hwmods property in a single patch.

Cc: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-01-23 08:24:46 -08:00
Tony Lindgren 23673f1735 ARM: dts: Configure interconnect target module for omap4 des
We can now probe devices with device tree only configuration using
ti-sysc interconnect target module driver. Let's configure the
module, but keep the legacy "ti,hwmods" peroperty to avoid new boot
time warnings. The legacy property will be removed in later patches
together with the legacy platform data.

Cc: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-01-23 08:24:46 -08:00
Tony Lindgren 316a418e28 ARM: dts: Configure interconnect target module for omap4 aes
We can now probe devices with device tree only configuration using
ti-sysc interconnect target module driver. Let's configure the
module, but keep the legacy "ti,hwmods" peroperty to avoid new boot
time warnings. The legacy property will be removed in later patches
together with the legacy platform data.

Cc: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-01-23 08:24:46 -08:00
Tony Lindgren 18c48e6d5b ARM: dts: Configure interconnect target module for omap4 sham
We can now probe devices with device tree only configuration using
ti-sysc interconnect target module driver. Let's configure the
module, but keep the legacy "ti,hwmods" peroperty to avoid new boot
time warnings. The legacy property will be removed in later patches
together with the legacy platform data.

Cc: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-01-23 08:24:17 -08:00
Tony Lindgren 30c2d7ca3f ARM: dts: Configure omap5 rng to probe with ti-sysc
This is similar to dra7 and omap4 with different clock naming
and module address.

Cc: devicetree@vger.kernel.org
Cc: Rob Herring <robh+dt@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-01-23 08:23:28 -08:00
Tony Lindgren fbb8bb8370 ARM: dts: Configure omap4 rng to probe with ti-sysc
Add RNG interconnect data for omap4 similar to what dra7 has. The
clock is OMAP4_CM_L4SEC_RNG_CLKCTRL_OFFSET at offset address 0x01c0,
which matches what dra7 also has with DRA7_L4SEC_CLKCTRL_INDEX(0x1c0).

Note that we need to also add the related l4_secure clock entries.
I've only added RNG, the others can be added as they get tested.
They are probably very similar to what we already have for dra7
in dra7_l4sec_clkctrl_regs[].

With the clock tagged CLKF_SOC_NONSEC, clock is set disabled for secure
devices and clk_get() will fail. Additionally we disable the RNG target
module on droid4 to avoid introducing new boot time warnings.

Cc: devicetree@vger.kernel.org
Cc: Rob Herring <robh+dt@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-01-23 08:23:26 -08:00
Tony Lindgren 723a567f43 ARM: dts: Add missing omap5 secure clocks
The secure clocks on omap5 are similar to what we already have for dra7
with dra7_l4sec_clkctrl_regs and documented in the omap5432 TRM in
"Table 3-1044. CORE_CM_CORE Registers Mapping Summary".

The secure clocks are part of the l4per clock manager. As the l4per
clock manager has now two clock domains as children, let's also update
the l4per clockdomain node name to follow the "clock" node naming with
a domain specific compatible property.

Compared to omap4, omap5 has more clocks working in hardare autogating
mode.

Cc: devicetree@vger.kernel.org
Cc: Rob Herring <robh+dt@kernel.org>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-01-23 08:22:57 -08:00
Tony Lindgren cfcbc2dbb7 ARM: dts: Add missing omap4 secure clocks
The secure clocks on omap4 are similar to what we already have for dra7
in dra7_l4sec_clkctrl_regs and documented in the omap4460 TRM "Table
3-1346 L4PER_CM2 Registers Mapping Summary".

The secure clocks are part of the l4_per clock manager. As the l4_per
clock manager has now two clock domains as children, let's also update
the l4_per clockdomain node name to follow the "clock" node naming with
a domain specific compatible property.

Cc: devicetree@vger.kernel.org
Cc: Rob Herring <robh+dt@kernel.org>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-01-23 08:20:17 -08:00
Raag Jadav b0b0395154 ARM: dts: am43x-epos-evm: set data pin directions for spi0 and spi1
Set d0 and d1 pin directions for spi0 and spi1 as per their pinmux.

Signed-off-by: Raag Jadav <raagjadav@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-01-23 08:12:04 -08:00
Olof Johansson 9b0b308a15 ARM: dts: zynq: DT changes for v5.6 v2
- Enable coresight topology for Zynq
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Merge tag 'zynq-dt-for-v5.6-v2' of https://github.com/Xilinx/linux-xlnx into arm/dt

ARM: dts: zynq: DT changes for v5.6 v2

- Enable coresight topology for Zynq

* tag 'zynq-dt-for-v5.6-v2' of https://github.com/Xilinx/linux-xlnx:
  ARM: dts: zynq: enablement of coresight topology

Link: https://lore.kernel.org/r/5db334df-89b5-1d07-3884-93f77b0f4e60@monstr.eu
Signed-off-by: Olof Johansson <olof@lixom.net>
2020-01-21 15:07:33 -08:00
Greg Kroah-Hartman dd7d99dc68 Merge 5.5-rc7 into usb-next
We need the USB fixes in here as well.

Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-01-21 19:36:59 +01:00
Tony Lindgren 957ad44ff5 clk: ti: add clkctrl data dra7 sgx
This is similar to what we have for omap5 except the gpu_cm address is
different, the mux clocks have one more source option, and there's no
divider clock.

Note that because of the current dts node name dependency for mapping to
clock domain, we must still use "gpu-clkctrl@" naming instead of generic
"clock@" naming for the node. And because of this, it's probably best to
apply the dts node addition together along with the other clock changes.

For accessing the GPU, we also need to configure the interconnect target
module for GPU similar to what we have for omap5, I'll send that change
separately.

Cc: Benoit Parrot <bparrot@ti.com>
Cc: "H. Nikolaus Schaller" <hns@goldelico.com>
Cc: Robert Nelson <robertcnelson@gmail.com>
Cc: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
2020-01-20 09:43:44 +02:00
Peter Ujfalusi 8e28918a85 dt-bindings: clock: Move ti-dra7-atl.h to dt-bindings/clock
Most of the clock related dt-binding header files are located in
dt-bindings/clock folder. It would be good to keep all the similar
header files at a single location.

Suggested-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
2020-01-20 09:34:37 +02:00
Olof Johansson c14e723e40 ASPEED device tree updates for 5.6
- Cleanups for dtc warnings
 
  - Ethernet hardware checksum cleanups. A bug in the driver was fixed so
  machines don't need to specify this anymore.
 
  - Misc improvements
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Merge tag 'aspeed-5.6-devicetree' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/aspeed into arm/dt

ASPEED device tree updates for 5.6

 - Cleanups for dtc warnings

 - Ethernet hardware checksum cleanups. A bug in the driver was fixed so
 machines don't need to specify this anymore.

 - Misc improvements

* tag 'aspeed-5.6-devicetree' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/aspeed:
  ARM: dts: aspeed: rainier: Add UCD90320 power sequencer
  ARM: dts: aspeed: rainier: Switch PSUs to unknown version
  ARM: dts: aspeed: Add SD card for Vesnin
  ARM: dts: aspeed: yamp: Delete no-hw-checksum
  ARM: dts: aspeed: netbmc: Delete no-hw-checksum
  ARM: dts: aspeed: AST2400 disables hw checksum
  ARM: dts: ibm-power9-dual: Add a unit address for OCC nodes
  ARM: dts: aspeed-g6: Cleanup watchdog unit address
  ARM: dts: aspeed-g5: Sort LPC child nodes by unit address
  ARM: dts: aspeed: Add reg hints to syscon children
  ARM: dts: aspeed: Cleanup lpc-ctrl and snoop regs
  ARM: dts: witherspoon: Cleanup gpio-keys-polled properties
  ARM: dts: swift: Cleanup gpio-keys-polled properties
  ARM: dts: fp5280g2: Cleanup gpio-keys-polled properties
  ARM: dts: vesnin: Add unit address for memory node
  ARM: dts: aspeed-g5: Use recommended generic node name for SDMC
  ARM: dts: aspeed-g5: Move EDAC node to APB
  dt-bindings: misc: Document reg for aspeed, p2a-ctrl nodes
  dt-bindings: pinctrl: aspeed: Add reg property as a hint

Link: https://lore.kernel.org/r/CACPK8XepSy6D4CNWjSWDDK0p7Dx_rneWne4t4uyy=di5nx3zmA@mail.gmail.com
Signed-off-by: Olof Johansson <olof@lixom.net>
2020-01-19 22:49:09 -08:00
Olof Johansson 55a03ac837 AT91 DT for 5.6 #2
- Add sam9x60 dtsi
  - New board sam9x60 Evaluation Kit
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Merge tag 'at91-5.6-dt-2' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/dt

AT91 DT for 5.6 #2

 - Add sam9x60 dtsi
 - New board sam9x60 Evaluation Kit

* tag 'at91-5.6-dt-2' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
  ARM: dts: at91: sam9x60: add device tree for soc and board
  dt-bindings: arm: add sam9x60-ek board
  dt-bindings: atmel-gpbr: add microchip,sam9x60-gpbr
  dt-bindings: atmel-smc: add microchip,sam9x60-smc
  dt-bindings: atmel-sysreg: add microchip,sam9x60-ddramc
  dt-bindings: atmel-nand: add microchip,sam9x60-pmecc
  dt-bindings: atmel-matrix: add microchip,sam9x60-matrix
  dt-bindings: at91-sama5d2_adc: add microchip,sam9x60-adc
  dt-bindings: atmel-isi: add microchip,sam9x60-isi
  dt-bindings: atmel-can: add microchip,sam9x60-can
  dt-bindings: at_xdmac: add microchip,sam9x60-dma
  dt-bindings: at_xdmac: remove wildcard

Link: https://lore.kernel.org/r/20200119234707.GA90094@piout.net
Signed-off-by: Olof Johansson <olof@lixom.net>
2020-01-19 22:48:12 -08:00
Olof Johansson b744f09879 Removal of the simple-panel compatible and some minor
additional cleanups.
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Merge tag 'v5.6-rockchip-dts32-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/dt

Removal of the simple-panel compatible and some minor
additional cleanups.

* tag 'v5.6-rockchip-dts32-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  ARM: dts: rockchip: Kill off "simple-panel" compatibles
  ARM: dts: rockchip: rename dwmmc node names to mmc
  ARM: dts: rockchip: add reg property to brcmf sub node for rk3188-bqedison2qc

Link: https://lore.kernel.org/r/3473489.DgqFdXXe5V@phil
Signed-off-by: Olof Johansson <olof@lixom.net>
2020-01-19 22:47:29 -08:00
Jim Wright 39be9e84f6 ARM: dts: aspeed: rainier: Add UCD90320 power sequencer
Change Rainier device tree to use UCD90320 chip and only bind driver to
port which excepts PMBus commands.

Signed-off-by: Jim Wright <wrightj@linux.vnet.ibm.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-01-20 15:50:57 +10:00