Commit Graph

2317 Commits

Author SHA1 Message Date
Peng Fan acad945dc2 soc: imx: gpcv2: move reset assert after requesting domain power up
The i.MX8MM VPU power up sequence is a bit special, it must follow:
1. request power up
2. reset assert
3. reset deassert

This change in this patch will not affect other domains, because
the power domain default is in asserted state, unless bootloader
deassert the reset. It also applies to GPU power domain.

Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Tested-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-05-27 09:01:36 +08:00
Lucas Stach a36cc1e512 soc: imx: gpcv2: Add support for missing i.MX8MM VPU/DISPMIX power domains
With the BLK-CTL driver now in place, let's add the missing domains.

Tested-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-05-27 09:01:36 +08:00
Lucas Stach 47f87c6280 soc: imx: gpcv2: add support for i.MX8MM power domains
This adds support for the power domains found on i.MX8MM. The 2D and 3D
GPU domains are abstracted as a single domain in the driver, as they can't
be powered up/down individually due to a shared reset.

Tested-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-05-27 09:01:36 +08:00
Luca Weiss 9bf8257fef soc: qcom: socinfo: Add more IDs
Add the IDs for the following families of chips: 8064, 8226, 8610, 8625Q

Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Link: https://lore.kernel.org/r/20210504203612.95056-1-luca@z3ntu.xyz
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-05-25 23:07:38 -05:00
Bjorn Andersson 3b1a058248 soc: qcom: rpmhpd: Add SC8180X
Add the power domains exposed by RPMH in the Qualcomm SC8180X platform.

Reviewed-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20210120225037.1611353-2-bjorn.andersson@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-05-25 23:07:38 -05:00
Martin Botka 055c9aff76 soc: qcom: smd-rpm: Add SM6125 compatible
Add a compatible for SM6125

Signed-off-by: Martin Botka <martin.botka@somainline.org>
Link: https://lore.kernel.org/r/20210523211556.731976-1-martin.botka@somainline.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-05-25 23:07:38 -05:00
Robert Marko e365257547 soc: qcom: socinfo: Add remaining IPQ6018 family ID-s
ID for IPQ6018 was previously added, but ID-s for rest of the
family are missing.
So, lets add those based on downstream driver.

Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Reviewed-by: Kathiravan T <kathirav@codeaurora.org>
Link: https://lore.kernel.org/r/20210517120034.3975027-1-robert.marko@sartura.hr
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-05-25 23:07:38 -05:00
Martin Botka eec220565b soc: qcom: socinfo: Add missing SoC ID for SM6125
Add SM6125 SoC ID to the soc_id struct

Signed-off-by: Martin Botka <martin.botka@somainline.org>
Link: https://lore.kernel.org/r/20210523212038.736445-2-martin.botka@somainline.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-05-25 23:07:33 -05:00
Lucas Stach fe58c887fb soc: imx: gpcv2: add support for optional resets
Normally the reset for the devices inside the power domain is
triggered automatically from the PGC in the power-up sequencing,
however on i.MX8MM this doesn't work for the GPU power domains.

Add support for triggering the reset explicitly during the power
up sequencing.

Tested-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-05-23 10:58:12 +08:00
Lucas Stach c0ce75395f soc: imx: gpcv2: allow domains without power-sequence control
Some of the PGC domains only control the handshake with the ADB400
and don't have any power sequence controls. Make such domains work
by allowing the pxx and map bits to be empty and skip all actions
using those controls.

Tested-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-05-23 10:58:10 +08:00
Lucas Stach 1382eb1967 soc: imx: gpcv2: add runtime PM support for power-domains
This allows to nest domains into other power domains and have the
parent domain powered up/down as required by the child domains.

Tested-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-05-23 10:58:07 +08:00
Lucas Stach 58d268619a soc: imx: gpcv2: wait for ADB400 handshake
New reference manuals show that there is actually a status bit for
the ADB400 handshake. Add a poll loop to wait for the ADB400 to
acknowledge our request.

[Peng Fan: i.MX8MM has blk ctl module, the handshake can only finish
 after setting blk ctl. The blk ctl driver will set the bus clk bit and
 the handshake will finish there. we just add a delay and suppose the
 handshake will finish after that.]

Tested-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-05-23 10:58:04 +08:00
Lucas Stach 256f07edbd soc: imx: gpcv2: split power up and power down sequence control
The current mixed function to control both power up and power down
sequences is very hard to follow and already contains some sequence
errors like triggering the ADB400 handshake at the wrong time due to
this. Split the function into two, which results in slightly more
code, but is way easier to get right.

Tested-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-05-23 10:58:01 +08:00
Lucas Stach cbca0b4fd2 soc: imx: gpcv2: switch to clk_bulk_* API
Use clk_bulk API to simplify the code a bit. Also add some error
checking to the clk_prepare_enable calls.

Tested-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-05-23 10:57:58 +08:00
Lucas Stach 4ac6317a37 soc: imx: gpcv2: move domain mapping to domain driver probe
As long as the power domain driver is active we want power control
over the domain (which is what the mapping bit requests), so there
is no point in whacking it for every power control action, simply
set the bit in driver probe and clear it when the driver is removed.

Tested-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-05-23 10:57:39 +08:00
Lucas Stach 4ed57c97b4 soc: imx: gpcv2: move to more ideomatic error handling in probe
Switch to "goto out..." error handling in domain driver probe to
avoid repeating all the error paths.

Tested-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Tested-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-05-23 10:57:16 +08:00
Jonathan Neuschäfer 22b5059b95 ARM: imx: Initialize SoC ID on i.MX50
As on i.MX51 and i.MX53, initialize the SoC ID based on the SoC
compatible string of the board.

Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-05-13 15:42:21 +08:00
Zou Wei ba96de3ae5 soc: mediatek: add missing MODULE_DEVICE_TABLE
This patch adds missing MODULE_DEVICE_TABLE definition which generates
correct modalias for automatic loading of this driver when it is built
as an external module.

Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: Zou Wei <zou_wei@huawei.com>
Link: https://lore.kernel.org/r/1620705350-104687-1-git-send-email-zou_wei@huawei.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-05-12 18:29:37 +02:00
Elaine Zhang 1782c87b44 soc: rockchip: power-domain: add rk3568 powerdomains
Add power-domains found on rk3568 socs.

Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20210417112952.8516-16-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2021-05-11 12:07:04 +02:00
Jiapeng Chong c1f512182c soc: bcm: brcmstb: remove unused variable 'brcmstb_machine_match'
Fix the following clang warning:

drivers/soc/bcm/brcmstb/common.c:17:34: warning: unused variable
'brcmstb_machine_match' [-Wunused-const-variable].

Reported-by: Abaci Robot <abaci@linux.alibaba.com>
Signed-off-by: Jiapeng Chong <jiapeng.chong@linux.alibaba.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2021-05-10 14:50:36 -07:00
Elaine Zhang 0a69452e03 soc: rockchip: power-domain: Add a meaningful power domain name
Add the power domains names to the power domain info struct so we
have meaningful name for every power domain.

Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20210417112952.8516-10-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2021-05-10 09:30:12 +02:00
Linus Torvalds 4f9701057a IOMMU Updates for Linux v5.13
Including:
 
 	- Big cleanup of almost unsused parts of the IOMMU API by
 	  Christoph Hellwig. This mostly affects the Freescale PAMU
 	  driver.
 
 	- New IOMMU driver for Unisoc SOCs
 
 	- ARM SMMU Updates from Will:
 
 	  - SMMUv3: Drop vestigial PREFETCH_ADDR support
 	  - SMMUv3: Elide TLB sync logic for empty gather
 	  - SMMUv3: Fix "Service Failure Mode" handling
     	  - SMMUv2: New Qualcomm compatible string
 
 	- Removal of the AMD IOMMU performance counter writeable check
 	  on AMD. It caused long boot delays on some machines and is
 	  only needed to work around an errata on some older (possibly
 	  pre-production) chips. If someone is still hit by this
 	  hardware issue anyway the performance counters will just
 	  return 0.
 
 	- Support for targeted invalidations in the AMD IOMMU driver.
 	  Before that the driver only invalidated a single 4k page or the
 	  whole IO/TLB for an address space. This has been extended now
 	  and is mostly useful for emulated AMD IOMMUs.
 
 	- Several fixes for the Shared Virtual Memory support in the
 	  Intel VT-d driver
 
 	- Mediatek drivers can now be built as modules
 
 	- Re-introduction of the forcedac boot option which got lost
 	  when converting the Intel VT-d driver to the common dma-iommu
 	  implementation.
 
 	- Extension of the IOMMU device registration interface and
 	  support iommu_ops to be const again when drivers are built as
 	  modules.
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEEr9jSbILcajRFYWYyK/BELZcBGuMFAmCMEIoACgkQK/BELZcB
 GuOu9xAAvg6aR0uHlxvRq6cgNnHN9Ltp5+t3qFYtRRrauY0iOPMO62k0QQli5shX
 CGeczD0e59KAZqI0zNJnQn8hMY5dg7XVkFCC5BrSzuCDCtwJZ0N5Tq3pfUlaV1rw
 BJf41t79Fd+jp7kn53tu+vRAfYZ3+sLOx/6U3c15pqKRZSkyFWbQllOtD3J5LnLu
 1PyPlfiNpMwCajiS7aQbN+fuJ/lKIFeA2MDPOsCBzhbfxiJUqJxZOKAZO3rOjFfK
 feTibqQ+3Zz6MPXt9st1cvPpy8jCosv81OY6Knqvxf/oB5q+fEdi2uNrKISonb/t
 Fw331oOIwg2A+HOpwC9MN1AumOIqiHSWWENAMk9SlP+TMIWKQ8kZreyI6IEB23dV
 +QvP3DVA+CfLwtNY/Zh0IqKh28D+IHlKbpWNU1m+9AUe468mV/MTjfwxr9Yfffhm
 LZ6C0DgFdmtqv8jPuDGUOgo3RNeN8bLnUSEHG9gHibA+RKujl5BWDjKkwILqMQTt
 Ysdsu8TiNtFIULomizqCpgqEbQfW8TLFvASXCM1VMQ/PDURxvchZPxFDJonYXy+K
 z2HGaG3eUE07YrAdRKH69aMVIbmS+sjEhvmi4xZ1Lh7wWcIE2AZVvO8qNb+Ckcp3
 4tLPPDksm/iQngnFf6gdgH3qv4rgbzE4+74GXqeANiQCjY9dSJI=
 =qF2C
 -----END PGP SIGNATURE-----

Merge tag 'iommu-updates-v5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu

Pull iommu updates from Joerg Roedel:

 - Big cleanup of almost unsused parts of the IOMMU API by Christoph
   Hellwig. This mostly affects the Freescale PAMU driver.

 - New IOMMU driver for Unisoc SOCs

 - ARM SMMU Updates from Will:
     - Drop vestigial PREFETCH_ADDR support (SMMUv3)
     - Elide TLB sync logic for empty gather (SMMUv3)
     - Fix "Service Failure Mode" handling (SMMUv3)
     - New Qualcomm compatible string (SMMUv2)

 - Removal of the AMD IOMMU performance counter writeable check on AMD.
   It caused long boot delays on some machines and is only needed to
   work around an errata on some older (possibly pre-production) chips.
   If someone is still hit by this hardware issue anyway the performance
   counters will just return 0.

 - Support for targeted invalidations in the AMD IOMMU driver. Before
   that the driver only invalidated a single 4k page or the whole IO/TLB
   for an address space. This has been extended now and is mostly useful
   for emulated AMD IOMMUs.

 - Several fixes for the Shared Virtual Memory support in the Intel VT-d
   driver

 - Mediatek drivers can now be built as modules

 - Re-introduction of the forcedac boot option which got lost when
   converting the Intel VT-d driver to the common dma-iommu
   implementation.

 - Extension of the IOMMU device registration interface and support
   iommu_ops to be const again when drivers are built as modules.

* tag 'iommu-updates-v5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu: (84 commits)
  iommu: Streamline registration interface
  iommu: Statically set module owner
  iommu/mediatek-v1: Add error handle for mtk_iommu_probe
  iommu/mediatek-v1: Avoid build fail when build as module
  iommu/mediatek: Always enable the clk on resume
  iommu/fsl-pamu: Fix uninitialized variable warning
  iommu/vt-d: Force to flush iotlb before creating superpage
  iommu/amd: Put newline after closing bracket in warning
  iommu/vt-d: Fix an error handling path in 'intel_prepare_irq_remapping()'
  iommu/vt-d: Fix build error of pasid_enable_wpe() with !X86
  iommu/amd: Remove performance counter pre-initialization test
  Revert "iommu/amd: Fix performance counter initialization"
  iommu/amd: Remove duplicate check of devid
  iommu/exynos: Remove unneeded local variable initialization
  iommu/amd: Page-specific invalidations for more than one page
  iommu/arm-smmu-v3: Remove the unused fields for PREFETCH_CONFIG command
  iommu/vt-d: Avoid unnecessary cache flush in pasid entry teardown
  iommu/vt-d: Invalidate PASID cache when root/context entry changed
  iommu/vt-d: Remove WO permissions on second-level paging entries
  iommu/vt-d: Report the right page fault address
  ...
2021-05-01 09:33:00 -07:00
Linus Torvalds 65ec0a7d24 This is the bulk of the pin control changes for the v5.13 kernel cycle
Core changes:
 
 - A semantic change to handle pinmux and pinconf in explicit order
   while up until now we depended on the semantic order in the
   device tree. The device tree is a functional programming
   language and does not imply any order, so the right thing is
   for the pin control core to provide these semantics.
 
 - Add a new pinmux-select debugfs file which makes it possible to
   go in and select functions for a pin manually (iteratively, at
   the prompt) for debugging purposes.
 
 - Fixes to gpio regmap handling for a new pin control driver
   making use of regmap-gpio.
 
 - Use octal permissions on debugfs files.
 
 New drivers:
 
 - A massive rewrite of the former custom pin control driver for
   MIPS Broadcom devices to instead use the pin control subsystem.
   New pin control drivers for BCM6345, BCM6328, BCM6358, BCM6362,
   BCM6368, BCM63268 and BCM6318 SoC variants are implemented.
 
 - Support for PM8350, PM8350B, PM8350C, PMK8350, PMR735A and
   PMR735B in the Qualcomm PMIC GPIO driver. Also the two GPIOs
   on PM8008 are supported.
 
 - Support for the Rockchip RK3568/RK3566 pin controller.
 
 - Support for Ingenic JZ4730, JZ4750, JZ4755, JZ4775 and
   X2000.
 
 - Support for Mediatek MTK8195.
 
 - Add a new Xilinx ZynqMP pin control driver.
 
 Driver improvements and non-urgent fixes:
 
 - Modularization and improvements of the Rockchip drivers.
 
 - Some new pins added to the description of new Renesas SoCs.
 
 - Clarifications of the GPIO base calculation in the Intel driver.
 
 - Fix the function names for the MPP54 and MPP55 pins in the Armada
   CP110 pin controller.
 
 - GPIO wakeup interrupt map for Qualcomm SC7280 and SM8350.
 
 - Support for ACPI probing of the Qualcomm SC8180x.
 
 - Fix interrupt clear status on rockchip
 
 - Fix some missing pins on the Ingenic JZ4770, some semantic
   fixes for the behaviour of the Ingenic pin controller.
   Add DMIC pins for JZ4780, X1000, X1500 and X1830.
 
 - A slew of janitorial like of_node_put() calls.
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEElDRnuGcz/wPCXQWMQRCzN7AZXXMFAmCL5sAACgkQQRCzN7AZ
 XXNX5RAAtdPvDrPzzWdeqNLyodnJu/SyeA2xbmsvywrSvgpSx3FojFW9AXY/sr7w
 RuhGGA5KhnrovwiabRKoZ0d0lC/JtKdx5g2o9ePFHDy+7BzFnVacBjL38UftSKy0
 4QpDNJ3zock/XTUgJdaJEsbHhP/N4fOF/SbLpguYzGz7JpybNrZ+2M73yeQSL6uE
 yuhn/AgFMLgWS47nSAH91Yt387+XCEfB75nftXyFSN9GpQ9i3VixWsG3Um/Stoma
 aR7IIknvHdpCrOHH1IKohYcdlOkE7Wh2wHXSJVv26M49Ri5KSXu17lsUknebQ/oq
 UeDYdd/2q/wFjxdEbG2tqinEYHs3e1RPmatVesgyibtYHGwjnSFo/G6UtG4948ii
 1exwBi+0fw58YWLu/z4bhnNtZx6VsOev6mJ5GF7pyYzGIJy3r5J/9KCDzOJEoLom
 YTVmgZRjzJuH/i0rPgyg3lSxlP/pdvdk1YUMlIYN1zWdPnRqj7/q+qaxPOkltqD+
 20NFkvhQuuq+dLn4jtNK9xr2+vIKxIRPClT3D/lAihEPC5MUaFw/+y/V7c1hEJfS
 d1dh5DwgHK7i55/lqLFaXeNNYsmY/SiFecoB8xyFnOJFsHlSHe/6NfjmRhOMUn6V
 IX2GG4CBAzaheIWtN/ub/DcQ1vwA2n9hO5WX+Y3CXkIxXUFPmJY=
 =QrEn
 -----END PGP SIGNATURE-----

Merge tag 'pinctrl-v5.13-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull pin control updates from Linus Walleij:
 "There is a lot going on!

  Core changes:

   - A semantic change to handle pinmux and pinconf in explicit order
     while up until now we depended on the semantic order in the device
     tree. The device tree is a functional programming language and does
     not imply any order, so the right thing is for the pin control core
     to provide these semantics.

   - Add a new pinmux-select debugfs file which makes it possible to go
     in and select functions for a pin manually (iteratively, at the
     prompt) for debugging purposes.

   - Fixes to gpio regmap handling for a new pin control driver making
     use of regmap-gpio.

   - Use octal permissions on debugfs files.

  New drivers:

   - A massive rewrite of the former custom pin control driver for MIPS
     Broadcom devices to instead use the pin control subsystem. New pin
     control drivers for BCM6345, BCM6328, BCM6358, BCM6362, BCM6368,
     BCM63268 and BCM6318 SoC variants are implemented.

   - Support for PM8350, PM8350B, PM8350C, PMK8350, PMR735A and PMR735B
     in the Qualcomm PMIC GPIO driver. Also the two GPIOs on PM8008 are
     supported.

   - Support for the Rockchip RK3568/RK3566 pin controller.

   - Support for Ingenic JZ4730, JZ4750, JZ4755, JZ4775 and X2000.

   - Support for Mediatek MTK8195.

   - Add a new Xilinx ZynqMP pin control driver.

  Driver improvements and non-urgent fixes:

   - Modularization and improvements of the Rockchip drivers.

   - Some new pins added to the description of new Renesas SoCs.

   - Clarifications of the GPIO base calculation in the Intel driver.

   - Fix the function names for the MPP54 and MPP55 pins in the Armada
     CP110 pin controller.

   - GPIO wakeup interrupt map for Qualcomm SC7280 and SM8350.

   - Support for ACPI probing of the Qualcomm SC8180x.

   - Fix interrupt clear status on rockchip

   - Fix some missing pins on the Ingenic JZ4770, some semantic fixes
     for the behaviour of the Ingenic pin controller. Add DMIC pins for
     JZ4780, X1000, X1500 and X1830.

   - A slew of janitorial like of_node_put() calls"

* tag 'pinctrl-v5.13-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (99 commits)
  pinctrl: Add Xilinx ZynqMP pinctrl driver support
  firmware: xilinx: Add pinctrl support
  pinctrl: rockchip: do coding style for mux route struct
  pinctrl: Add PIN_CONFIG_MODE_PWM to enum pin_config_param
  pinctrl: Introduce MODE group in enum pin_config_param
  pinctrl: Keep enum pin_config_param ordered by name
  dt-bindings: pinctrl: Add binding for ZynqMP pinctrl driver
  pinctrl: core: Fix kernel doc string for pin_get_name()
  pinctrl: mediatek: use spin lock in mtk_rmw
  pinctrl: add drive for I2C related pins on MT8195
  pinctrl: add pinctrl driver on mt8195
  dt-bindings: pinctrl: mt8195: add pinctrl file and binding document
  pinctrl: Ingenic: Add pinctrl driver for X2000.
  pinctrl: Ingenic: Add pinctrl driver for JZ4775.
  pinctrl: Ingenic: Add pinctrl driver for JZ4755.
  pinctrl: Ingenic: Add pinctrl driver for JZ4750.
  pinctrl: Ingenic: Add pinctrl driver for JZ4730.
  dt-bindings: pinctrl: Add bindings for new Ingenic SoCs.
  pinctrl: Ingenic: Reformat the code.
  pinctrl: Ingenic: Add DMIC pins support for Ingenic SoCs.
  ...
2021-04-30 13:04:30 -07:00
Linus Torvalds 37f00ab4a0 ARM: SoC drivers for v5.13
Updates for SoC specific drivers include a few subsystems that
 have their own maintainers but send them through the soc tree:
 
 TEE/OP-TEE:
  -  Add tracepoints around calls to secure world
 
 Memory controller drivers:
  - Minor fixes for Renesas, Exynos, Mediatek and Tegra platforms
  - Add debug statistics to Tegra20 memory controller
  - Update Tegra bindings and convert to dtschema
 
 ARM SCMI Firmware:
  - Support for modular SCMI protocols and vendor specific extensions
  - New SCMI IIO driver
  - Per-cpu DVFS
 
 The other driver changes are all from the platform maintainers
 directly and reflect the drivers that don't fit into any other
 subsystem as well as treewide changes for a particular platform.
 
 SoCFPGA:
  - Various cleanups contributed by Krzysztof Kozlowski
 
 Mediatek:
  - add MT8183 support to mutex driver
  - MMSYS: use per SoC array to describe the possible routing
  - add MMSYS support for MT8183 and MT8167
  - add support for PMIC wrapper with integrated arbiter
  - add support for MT8192/MT6873
 
 Tegra:
  - Bug fixes to PMC and clock drivers
 
 NXP/i.MX:
  - Update SCU power domain driver to keep console domain power on.
  - Add missing ADC1 power domain to SCU power domain driver.
  - Update comments for single global power domain in SCU power domain
    driver.
  - Add i.MX51/i.MX53 unique id support to i.MX SoC driver.
 
 NXP/FSL SoC driver updates for v5.13
  - Add ACPI support for RCPM driver
  - Use generic io{read,write} for QE drivers after performance optimized
    for PowerPC
  - Fix QBMAN probe to cleanup HW states correctly for kexec
  - Various cleanup and style fix for QBMAN/QE/GUTS drivers
 
 OMAP:
  - Preparation to use devicetree for genpd
  - ti-sysc needs iorange check improved when the interconnect target module
    has no control registers listed
  - ti-sysc needs to probe l4_wkup and l4_cfg interconnects first to avoid
    issues with missing resources and unnecessary deferred probe
  - ti-sysc debug option can now detect more devices
  - ti-sysc now warns if an old incomplete devicetree data is found as we
    now rely on it being complete for am3 and 4
  - soc init code needs to check for prcm and prm nodes for omap4/5 and dra7
  - omap-prm driver needs to enable autoidle retention support for omap4
  - omap5 clocks are missing gpmc and ocmc clock registers
  - pci-dra7xx now needs to use builtin_platform_driver instead of using
    builtin_platform_driver_probe for deferred probe to work
 
 Raspberry Pi:
  - Fix-up all RPi firmware drivers so as for unbind to happen in an
    orderly fashion
  - Support for RPi's PoE hat PWM bus
 
 Qualcomm
  - Improved detection for SCM calling conventions
  - Support for OEM specific wifi firmware path
  - Added drivers for SC7280/SM8350: RPMH, LLCC< AOSS QMP
 
 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmCC2JwACgkQmmx57+YA
 GNkgRg//cBtq2NyDbjiNABxFSkmGCfcc0w0C2wjVzr4cfg6BLTbuvvlpZxI912pu
 P1G2sbsdfQJ8sSeIyZos+PilWK0zHrqlaGZfKI19US45dMjpteDBgsPd7wNZwBjQ
 jbops3YLjztZK1HpY4dIdvMnfxt7yRqhBWaTbPuCwQ35c5KsOM8NHB3cP3BUINWK
 x1uuBCv9svppzwdDiPxneV93WKEzabOUo+WBMPyh5vnyvmW17Iif4BA/VKQxzymm
 mWUi8HHpKBpvntJOKwAD2hnLAdpR3SwX20SLOpyLhnJMotbzNUEqq3LdRxDNPdHk
 ry+rarJ78JGlYfpcfegf2bLf5ITNMfOyRGkjtzeYpcZIXPjufOg9DA9YtAy37k0u
 L0T/9gQ+tQ01WGMca77OyUtIqJKdblZrQMfuH/yGlR99bqFQMV7rNc7GNlX1MXp/
 zw4aOYrRWGtGEeAjx5JJWcYydvMSJpCrqxTz3YhgeJECHB2iA6YkV3NROR4TLW//
 tfxaKqxR/KmSqE6hoVOAuuQ0BLXNlql/+4EE6MKsAOBiKPJclvmJg4CyuY8G21ev
 9Su0zJnXMzai7gNu32v1pizGj26+AOhxCEgAG0mGgk2jlQSn24CKgm5e7kCUewcF
 j/1XksNPT95v/K8MsLpXe5xGvF3jhA1BlFfvjJNZOrcZywBXRxg=
 =iidq
 -----END PGP SIGNATURE-----

Merge tag 'arm-drivers-5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC driver updates from Arnd Bergmann:
 "Updates for SoC specific drivers include a few subsystems that have
  their own maintainers but send them through the soc tree:

  TEE/OP-TEE:
   - Add tracepoints around calls to secure world

  Memory controller drivers:
   - Minor fixes for Renesas, Exynos, Mediatek and Tegra platforms
   - Add debug statistics to Tegra20 memory controller
   - Update Tegra bindings and convert to dtschema

  ARM SCMI Firmware:
   - Support for modular SCMI protocols and vendor specific extensions
   - New SCMI IIO driver
   - Per-cpu DVFS

  The other driver changes are all from the platform maintainers
  directly and reflect the drivers that don't fit into any other
  subsystem as well as treewide changes for a particular platform.

  SoCFPGA:
   - Various cleanups contributed by Krzysztof Kozlowski

  Mediatek:
   - add MT8183 support to mutex driver
   - MMSYS: use per SoC array to describe the possible routing
   - add MMSYS support for MT8183 and MT8167
   - add support for PMIC wrapper with integrated arbiter
   - add support for MT8192/MT6873

  Tegra:
   - Bug fixes to PMC and clock drivers

  NXP/i.MX:
   - Update SCU power domain driver to keep console domain power on.
   - Add missing ADC1 power domain to SCU power domain driver.
   - Update comments for single global power domain in SCU power domain
     driver.
   - Add i.MX51/i.MX53 unique id support to i.MX SoC driver.

  NXP/FSL SoC driver updates for v5.13
   - Add ACPI support for RCPM driver
   - Use generic io{read,write} for QE drivers after performance
     optimized for PowerPC
   - Fix QBMAN probe to cleanup HW states correctly for kexec
   - Various cleanup and style fix for QBMAN/QE/GUTS drivers

  OMAP:
   - Preparation to use devicetree for genpd
   - ti-sysc needs iorange check improved when the interconnect target
     module has no control registers listed
   - ti-sysc needs to probe l4_wkup and l4_cfg interconnects first to
     avoid issues with missing resources and unnecessary deferred probe
   - ti-sysc debug option can now detect more devices
   - ti-sysc now warns if an old incomplete devicetree data is found as
     we now rely on it being complete for am3 and 4
   - soc init code needs to check for prcm and prm nodes for omap4/5 and
     dra7
   - omap-prm driver needs to enable autoidle retention support for
     omap4
   - omap5 clocks are missing gpmc and ocmc clock registers
   - pci-dra7xx now needs to use builtin_platform_driver instead of
     using builtin_platform_driver_probe for deferred probe to work

  Raspberry Pi:
   - Fix-up all RPi firmware drivers so as for unbind to happen in an
     orderly fashion
   - Support for RPi's PoE hat PWM bus

  Qualcomm
   - Improved detection for SCM calling conventions
   - Support for OEM specific wifi firmware path
   - Added drivers for SC7280/SM8350: RPMH, LLCC< AOSS QMP"

* tag 'arm-drivers-5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (165 commits)
  soc: aspeed: fix a ternary sign expansion bug
  memory: mtk-smi: Add device-link between smi-larb and smi-common
  memory: samsung: exynos5422-dmc: handle clk_set_parent() failure
  memory: renesas-rpc-if: fix possible NULL pointer dereference of resource
  clk: socfpga: fix iomem pointer cast on 64-bit
  soc: aspeed: Adapt to new LPC device tree layout
  pinctrl: aspeed-g5: Adapt to new LPC device tree layout
  ipmi: kcs: aspeed: Adapt to new LPC DTS layout
  ARM: dts: Remove LPC BMC and Host partitions
  dt-bindings: aspeed-lpc: Remove LPC partitioning
  soc: fsl: enable acpi support in RCPM driver
  soc: qcom: mdt_loader: Detect truncated read of segments
  soc: qcom: mdt_loader: Validate that p_filesz < p_memsz
  soc: qcom: pdr: Fix error return code in pdr_register_listener
  firmware: qcom_scm: Fix kernel-doc function names to match
  firmware: qcom_scm: Suppress sysfs bind attributes
  firmware: qcom_scm: Workaround lack of "is available" call on SC7180
  firmware: qcom_scm: Reduce locking section for __get_convention()
  firmware: qcom_scm: Make __qcom_scm_is_call_available() return bool
  Revert "soc: fsl: qe: introduce qe_io{read,write}* wrappers"
  ...
2021-04-26 12:11:52 -07:00
Linus Torvalds 01d7136894 ARM: SoC changes for v5.13
Almost all SoC code changes this time are for the TI OMAP
 platform, which continues its decade-long quest to move from
 describing a complex SoC in code to device tree.
 
 Aside from this, the Uniphier platform has a new maintainer
 and some platforms have minor bugfixes and cleanups that were
 not urgent enough for v5.12.
 
 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmCC2JoACgkQmmx57+YA
 GNk2jg/9HPrMBjoxNMEynsN066Dnc3AVBG8veYAigS0mJuMX3HzUqp+RNn5YxEak
 0SKWgocjawi5MjtuCRmM/BO0SY4wPUMOxnqx/AE4q3u6VVpfx+XJu+1bywAx7UFC
 FnqstmqFAfJDLJUe4Pfv4SuXRJYyGKBoEdRK9Xr13qSstQ1gm4ccWbtRStWCcVvv
 f4J0gPK0dw99lgbCOLbrBMfz1zuxCwhILg+qZ0+WPl9NNfxurQ2+/Cj/8P/L0IH+
 BoiZ5NaISWnvlBWaSTh6P7d3omhbA149CPjybUy2b/s84oNHdm7XLpwymVp941zt
 sM3gBIi7UDKMfXUrjWDZAXY06MZa/62BLCHQ2Fx+A1ve9TC0AqmSmUxhB4Z8xXs2
 3U97kZnTAPX9Scno9k7eDXbVXKVzlDL8zdZtGvY56x/EiAiPSJaTcaU6puNgdF9z
 7IPFKdpMbePcxHN03dC17B4HYVoSTp2gCadOSRSrBmVjAoswzYKoAOHrzibCwUzI
 knbsShhJe/BtxvLJ7e/hq0YZBTTZXUcX/3Iuw6C+j+9l9Cod/JhYOoHQM7gvqHv6
 JRz0Wt9IrMhYBMYlf0g8zHZa7IUDAq7k6x8XwLjK/M/WdeS2tI3+Cmt5ePhlgZVb
 eBPzikxcvglDojE7zTkBeC/+jlpolWQ6UfRnptSvkof1DWVPkiE=
 =YFEX
 -----END PGP SIGNATURE-----

Merge tag 'arm-soc-5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC updates from Arnd Bergmann:
 "Almost all SoC code changes this time are for the TI OMAP platform,
  which continues its decade-long quest to move from describing a
  complex SoC in code to device tree.

  Aside from this, the Uniphier platform has a new maintainer and some
  platforms have minor bugfixes and cleanups that were not urgent enough
  for v5.12"

* tag 'arm-soc-5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (96 commits)
  MAINTAINERS: Update ARM/UniPhier SoCs maintainers and status
  mailmap: Update email address for Nicolas Saenz
  MAINTAINERS: Update BCM2711/BCM2335 maintainer's mail
  ARM: exynos: correct kernel doc in platsmp
  ARM: hisi: use the correct HiSilicon copyright
  ARM: ux500: make ux500_cpu_die static
  ARM: s3c: Use pwm_get() in favour of pwm_request() in RX1950
  ARM: OMAP1: fix incorrect kernel-doc comment syntax in file
  ARM: OMAP2+: fix incorrect kernel-doc comment syntax in file
  ARM: OMAP2+: Use DEFINE_SPINLOCK() for spinlock
  ARM: at91: pm: Move prototypes to mutually included header
  ARM: OMAP2+: use true and false for bool variable
  ARM: OMAP2+: add missing call to of_node_put()
  ARM: OMAP2+: Replace DEFINE_SIMPLE_ATTRIBUTE with DEFINE_DEBUGFS_ATTRIBUTE
  ARM: imx: Kconfig: Fix typo in help
  ARM: mach-imx: Fix a spelling in the file pm-imx5.c
  bus: ti-sysc: Warn about old dtb for dra7 and omap4/5
  ARM: OMAP2+: Stop building legacy code for dra7 and omap4/5
  ARM: OMAP2+: Drop legacy platform data for omap5 hwmod
  ARM: OMAP2+: Drop legacy platform data for omap5 l3
  ...
2021-04-26 11:48:26 -07:00
Dan Carpenter 5ffa828534 soc: aspeed: fix a ternary sign expansion bug
The intent here was to return negative error codes but it actually
returns positive values.  The problem is that type promotion with
ternary operations is quite complicated.

"ret" is an int.  "copied" is a u32.  And the snoop_file_read() function
returns long.  What happens is that "ret" is cast to u32 and becomes
positive then it's cast to long and it's still positive.

Fix this by removing the ternary so that "ret" is type promoted directly
to long.

Fixes: 3772e5da44 ("drivers/misc: Aspeed LPC snoop output using misc chardev")
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Patrick Venture <venture@google.com>
Link: https://lore.kernel.org/r/YIE90PSXsMTa2Y8n@mwanda
Link: https://lore.kernel.org/r/20210423000919.1249474-1-joel@jms.id.au'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-04-23 11:16:47 +02:00
Andy Shevchenko 31f9a421a1 pinctrl: Introduce MODE group in enum pin_config_param
Better to have a MODE group of settings to keep them together
when ordered alphabetically. Hence, rename PIN_CONFIG_LOW_POWER_MODE
to PIN_CONFIG_MODE_LOW_POWER.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20210412140741.39946-2-andriy.shevchenko@linux.intel.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-04-22 02:03:01 +02:00
Linus Torvalds 5ffe04ccd6 ARM SoC fixes for v5.12, part 2
Another smaller set of fixes for three of the Arm platforms:
 
 TI OMAP:
 
     Fix swapped mmc device order also for omap3 that got changed with the
     recent PROBE_PREFER_ASYNCHRONOUS changes. While eventually the aliases
     should be board specific, all the mmc device instances are all there in
     the SoC, and we do probe them by default so that PM runtime can idle the
     devices if left enabled from the bootloader.
 
 Qualcomm Snapdragon:
 
     This bypasses the, recently introduced, interconnect handling in the
     GENI (serial engine) driver when running off ACPI, as this causes the
     GENI probe to fail and the Lenovo Yoga C630 to boot without keyboard
     and touchpad.
 
 Allwinner:
 
     One 32kHz clock fix for the beelink gs1, a CD polarity fix for the SoPine,
     some MAINTAINERS maintainance, and a clk / reset switch to our headers.
 
 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmB8hfwACgkQmmx57+YA
 GNn5QA//TBcW23bLfjYI8kPl7yJ9KSD6UdNGHXYizJry5hAoyLhvCVSq6quPmAPy
 psempGKQBYiRb0Ftewc2+v00u4XdOTxqFw2MDs6UoladfiqyYfkEJxPgXG/k0msJ
 gGIOT5ysDeRiqNAFND0wO6z/wPmlgJl37yTztOrbghWwYLvwlUkqsXzJ9B72FCzM
 MGwrv1LZfEiljuaJAT+nVNkStKxCxSWjzIvYMgC/K9xbAjjtJNZby2tNJObMiARe
 d3G2nGYmo414eQGNb+SDBx5h4aPZGR0ZxdLbzhAFrdw+uUzwlnJ1ufJQnEr6CXql
 4MziHYWRYOAF90uLVeWiH8ZEh/CbxdnenmYCooOj+LAkn6IHAErRlFeZAfjWnckh
 pwcdeebk4SQ9SNDPIWwwVYKVeGtnMM7q8HucDulMRxYmDL5sTprMhJVwxXbshivw
 dnYWzV86FUIOgegUyFgzPKSTVqHbG68dxz2yRhR8yP56pTLnzh/lsB+0DmtiHcIx
 O8chRnvtJib5/XspF6CVXqWYDrvIR5L8h7JMbSU/IetADJwQyEYz9CVh/DyNuiJQ
 +oZY8Xqt3NzC9xOP/pTP6NFDYsVvKwsQRdwT3CBoV7lEM9X4wEypHOR+QmvO8q8m
 AhddgIhx3P7olKnKgylPXS0kjQ3AuBarmnUMI9eaS2tHO2n5z/Y=
 =f2ly
 -----END PGP SIGNATURE-----

Merge tag 'arm-fixes-5.12-3' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC fixes from Arnd Bergmann:
 "Another smaller set of fixes for three of the Arm platforms:

  TI OMAP:

     Fix swapped mmc device order also for omap3 that got changed with
     the recent PROBE_PREFER_ASYNCHRONOUS changes. While eventually the
     aliases should be board specific, all the mmc device instances are
     all there in the SoC, and we do probe them by default so that PM
     runtime can idle the devices if left enabled from the bootloader.

  Qualcomm Snapdragon:

     This bypasses the recently introduced interconnect handling in
     the GENI (serial engine) driver when running off ACPI, as this
     causes the GENI probe to fail and the Lenovo Yoga C630 to boot
     without keyboard and touchpad.

  Allwinner:

     One 32kHz clock fix for the beelink gs1, a CD polarity fix for the
     SoPine, some MAINTAINERS maintainance, and a clk / reset switch to
     our headers"

* tag 'arm-fixes-5.12-3' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc:
  arm64: dts: allwinner: h6: beelink-gs1: Remove ext. 32 kHz osc reference
  MAINTAINERS: Match on allwinner keyword
  MAINTAINERS: Add our new mailing-list
  arm64: dts: allwinner: Fix SD card CD GPIO for SOPine systems
  arm64: dts: allwinner: h6: Switch to macros for RSB clock/reset indices
  ARM: OMAP2+: Fix uninitialized sr_inst
  ARM: dts: Fix swapped mmc order for omap3
  ARM: OMAP2+: Fix warning for omap_init_time_of()
  soc: qcom: geni: shield geni_icc_get() for ACPI boot
2021-04-18 13:23:26 -07:00
Joerg Roedel 49d11527e5 Merge branches 'iommu/fixes', 'arm/mediatek', 'arm/smmu', 'arm/exynos', 'unisoc', 'x86/vt-d', 'x86/amd' and 'core' into next 2021-04-16 17:16:03 +02:00
Arnd Bergmann 41c39cfc84 NXP/FSL SoC driver updates for v5.13
- Add ACPI support for RCPM driver
 - Use generic io{read,write} for QE drivers after performance optimized
   for PowerPC
 - Fix QBMAN probe to cleanup HW states correctly for kexec
 - Various cleanup and style fix for QBMAN/QE/GUTS drivers
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEhb3UXAyxp6UQ0v6khtxQDvusFVQFAmBvf7gACgkQhtxQDvus
 FVTBLxAAgo7FWiVCMD+wnMy3nceAV4U9OZljumEKfvt7g27oMN9i/AWaWwzJ+wsF
 zxMK9p0u8wCTG7PQIGbC4N1fRAaapc1w3TzDhFK4Uf5kqaoddqiFMf4IeRFmnYSF
 6GDbxgxdZkvyGpYJ31Uo750UmC1Q9zmNoh17Nrs2wN12FLFlmiABokklzOuwKBxI
 DLzdgbuTuBxGAv/6zSBmye391C0kf+ky6haOpyzHKToBnYJv/LyaGQGEGckfsnct
 uKnigu7MjU+1l0LhftAT52UoFRR6SeyguqYbq4JAFvNJd66eNpZZpyJnGX8y7hJN
 V8y4cvgeJBZl1ssVQVNA5sJSb9NCyPx0svwZqzJ3kdMWd8t8n2l4FrJSdPnjvCbz
 HRwSzoMmSrQJZp+2LJATSHsHZz5ArBp+o79fLjWf/1aYO92B6MkZvdiL45ATl9uF
 XOQJITdHI1rFWxXmu9rzUcgZx81LEf5jVP+L3GBrOIpPa6R0SQgXLInflVxoB+/l
 SaJRp5CKjBstOvswJlA0dNyMNSn07qNjiR67Gvh7UXGvIa8w0Njv41ZYms2zvErd
 6EIM1SuzrkByrq3zn+AiCNzTATgIJgU+JDq7doKwqCzBW9oBshZ9U3KKDdElqLv9
 2UjMpP5dIkdbjh9vHZ+BwutuSjDwkkJrk40deck+9Q3/ZkNPvug=
 =+DV0
 -----END PGP SIGNATURE-----

Merge tag 'soc-fsl-next-v5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/leo/linux into arm/drivers

NXP/FSL SoC driver updates for v5.13

- Add ACPI support for RCPM driver
- Use generic io{read,write} for QE drivers after performance optimized
  for PowerPC
- Fix QBMAN probe to cleanup HW states correctly for kexec
- Various cleanup and style fix for QBMAN/QE/GUTS drivers

* tag 'soc-fsl-next-v5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/leo/linux:
  soc: fsl: enable acpi support in RCPM driver
  Revert "soc: fsl: qe: introduce qe_io{read,write}* wrappers"
  tty: serial: ucc_uart: replace qe_io{read,write}* wrappers by generic io{read,write}*
  soc: fsl: qe: replace qe_io{read,write}* wrappers by generic io{read,write}*
  soc: fsl: guts: fix comment syntax in file
  soc: fsl: guts: remove unneeded semicolon
  soc: fsl: qe: Use DEFINE_SPINLOCK() for spinlock
  soc: fsl: qbman: Delete useless kfree code
  soc: fsl: qbman: Ensure device cleanup is run for kexec

Link: https://lore.kernel.org/r/20210409205719.27927-1-leoyang.li@nxp.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-04-13 11:06:03 +02:00
Arnd Bergmann 30be8446db More Qualcomm driver updates for 5.13
This improves the Qualcomm SCM driver logic related to detecting the
 calling convention, in particular on SC7180, and fixes a few small
 issues in the same.
 
 It introduces additonal sanity checks of the size of loaded segments in
 the MDT loader and adds a missing error in the return path of
 pdr_register_listener().
 
 It makes it possible to specify the OEM specific firmware path in the
 wcn36xx control (and WiFi) driver.
 
 Lastly it adds a missing path specifier in the MAINTAINERS' entry and
 fixes a bunch of kerneldoc issues in various drivers.
 -----BEGIN PGP SIGNATURE-----
 
 iQJPBAABCAA5FiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmBwfnAbHGJqb3JuLmFu
 ZGVyc3NvbkBsaW5hcm8ub3JnAAoJEAsfOT8Nma3F1CEP/R8ZxRwzXdKUpS+SCzLp
 lJoqE+bhNt7IbK4hVfw1poA+UW8iQN0xkHS/JIbAvEBefRxJ/6dikrli/6oqQM9u
 0kIpWHp30QyFOt+i8VEzhLZrNZblFmlHu+AtYjicoGftNdsF1p6TKESzoEUXM+Bo
 /m0c9Wuf00CQl+6E6/GrV04MnAJXehWum+c1BsD9drs1Er9A2BxHo/8KQmrzmagl
 cOsEh1k1PDSUhUSbbCFSqzGweShXY1R9K+UKz0KKJPW3/Wduzd+wJ6eXCiDJEZvY
 yq7Yim7hS3C8JjSoWipaNkUZFlnwgJs3BZnYcTPKv8esX+XxGUAp/fAE2/qizswv
 D6rKc876xyHMcFvh+9eXPYnXQgE3vg5Jt0Yqf/oc8iuvYncqYtf+SdrLvD5o8jEY
 GW7gIxeGRQ4cnQWoArj33usevxqLdiPp2tAliztxfEjUhNDJwm2MWPJzLgUW0BJ8
 grEl5kfkU6Q90F3NW5gObq1uVFbfF0nTxeyEbC1mIJ8/78xINh4SLnSy8fmcjNT4
 ZfPCX6sb45baYqpe7N5AeuXWXDMkl+pjQXU5UGyp2ZLDisCQlXmo1fj6hOk6tL5P
 uC1UYYaZaBBMpqEyCDyhk1Xe0POZSlHjx2nVhDL0JrZic7KbjlRhz9/RNO+Wonhs
 ypQ51qoAXeJu1PISHGmhRWwA
 =C6IS
 -----END PGP SIGNATURE-----

Merge tag 'qcom-drivers-for-5.13-2' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/drivers

More Qualcomm driver updates for 5.13

This improves the Qualcomm SCM driver logic related to detecting the
calling convention, in particular on SC7180, and fixes a few small
issues in the same.

It introduces additonal sanity checks of the size of loaded segments in
the MDT loader and adds a missing error in the return path of
pdr_register_listener().

It makes it possible to specify the OEM specific firmware path in the
wcn36xx control (and WiFi) driver.

Lastly it adds a missing path specifier in the MAINTAINERS' entry and
fixes a bunch of kerneldoc issues in various drivers.

* tag 'qcom-drivers-for-5.13-2' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
  soc: qcom: mdt_loader: Detect truncated read of segments
  soc: qcom: mdt_loader: Validate that p_filesz < p_memsz
  soc: qcom: pdr: Fix error return code in pdr_register_listener
  firmware: qcom_scm: Fix kernel-doc function names to match
  firmware: qcom_scm: Suppress sysfs bind attributes
  firmware: qcom_scm: Workaround lack of "is available" call on SC7180
  firmware: qcom_scm: Reduce locking section for __get_convention()
  firmware: qcom_scm: Make __qcom_scm_is_call_available() return bool
  soc: qcom: wcnss_ctrl: Allow reading firmware-name from DT
  soc: qcom: wcnss_ctrl: Introduce local variable "dev"
  dt-bindings: soc: qcom: wcnss: Add firmware-name property
  soc: qcom: address kernel-doc warnings
  MAINTAINERS: add another entry for ARM/QUALCOMM SUPPORT

Link: https://lore.kernel.org/r/20210409162001.775851-1-bjorn.andersson@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-04-09 21:46:15 +02:00
Arnd Bergmann d60f314b93 ASPEED LPC updates for 5.13
These patches fix the ASPEED LPC bindings and LPC-related device drivers
 so in the future the KCS driver can properly use the hardware.
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEE+nHMAt9PCBDH63wBa3ZZB4FHcJ4FAmBv7HAACgkQa3ZZB4FH
 cJ68Gg/+KQns6SXdsCxu1sXctZmaSzmOXgGNnwLqCDu6TRFjtsUQ2CaIOFOhuUjJ
 A75StHMPFqHmcciWBL5eYHH+1CwBqs3b6ZXRbXFvVq0PE709epGA1n0egzoXiVEF
 nNjUM/74JY/4r2iEZu2cFRaGJKYJYPzn8cfTMvxdDZhmflgWtXxV7MejBr0r+JpF
 3GevztzscuI8gmxH2VVs9BvvNZxp748oG3WNfHpyWUDG6kEK2/r4Y7BEmB+q6E0a
 CpbMINHOT6e/Mc55EpK3+eby+OGs9BN8yzJaU9oBSPxUirDRPVIeu1NShpjukQ7F
 wfO9OY7RR0mySmZp6u4Qj4FKnkUYoE0pzxslVoVAS68AiPy2Z6UB2nLpu+UlRQhf
 zlycloD5Tywn3hkA5uaT0FPu2zV/Kbla4MJaOT8BIGfTC+/X2andYIUQN9dbjRhC
 OyWpzYWRJar/nOLx6ergXtcPft2dn9g0KqPNRF4s414JFmrHLIjmdCXQiPePDFGQ
 pI+8bTv614wGPeTE1zAD7sMrFSv+FEU8a6ZdXwMUHKrV8E8jgKqT40+eyZ6SHGOZ
 u+ATncxGcOQTLk9/JiMFOLVlj0oUIGf4E6n+zldASwTPuFyzKlNFRSsmPxHkKF3/
 FwE/cSXCtU83Vrr3e3zhV39Pz7hkMPbeQpqLmFiMCMbs3N+Oq0o=
 =U2zj
 -----END PGP SIGNATURE-----

Merge tag 'aspeed-5.13-lpc' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/bmc into arm/drivers

ASPEED LPC updates for 5.13

These patches fix the ASPEED LPC bindings and LPC-related device drivers
so in the future the KCS driver can properly use the hardware.

* tag 'aspeed-5.13-lpc' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/bmc:
  soc: aspeed: Adapt to new LPC device tree layout
  pinctrl: aspeed-g5: Adapt to new LPC device tree layout
  ipmi: kcs: aspeed: Adapt to new LPC DTS layout
  ARM: dts: Remove LPC BMC and Host partitions
  dt-bindings: aspeed-lpc: Remove LPC partitioning

Link: https://lore.kernel.org/r/CACPK8Xcb12LsVr7CUaXXjQskKbVjb7x+jgueG1Hik-kBPWtDSg@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-04-09 09:00:59 +02:00
Chia-Wei, Wang 489774ff5d soc: aspeed: Adapt to new LPC device tree layout
Add check against LPC device v2 compatible string to
ensure that the fixed device tree layout is adopted.
The LPC register offsets are also fixed accordingly.

Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20210319062752.145730-5-andrew@aj.id.au
Signed-off-by: Joel Stanley <joel@jms.id.au>
2021-04-09 13:39:22 +09:30
Peng Ma 242b0b398c soc: fsl: enable acpi support in RCPM driver
This patch enables ACPI support in RCPM driver.

Signed-off-by: Peng Ma <peng.ma@nxp.com>
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
2021-04-08 16:34:15 -05:00
Arnd Bergmann 4a3c88952e MT8167:
- add support for mmsys subsystem
 -----BEGIN PGP SIGNATURE-----
 
 iQJLBAABCAA1FiEEUdvKHhzqrUYPB/u8L21+TfbCqH4FAmBtjTcXHG1hdHRoaWFz
 LmJnZ0BnbWFpbC5jb20ACgkQL21+TfbCqH5/Mw//TAUsfN1Qb2sDnmCuQ93O85FQ
 G1ZUxAAjR+qa8ufE6Kp3EwzFfhk0p/rk5zh0iUIsxseRfVGnR3Gm8nBrwu3hSE0O
 lD3Rac2vqAZiuJfznhmY12xJ34iAvShrkcGJiZzka6l4jmGY10k99VWdgGMlZGvN
 ttFgXISamjDI2uTd3Owx4QA/q2eesmsAViCwtvvGRkXMzRw7tP4a3N0YcH+OEUxN
 xV3FeDe5K/QeifASr6jz6bkGxza55TmzFfEDQyhB2Ey1YoFJH19a1oOQq0Wf6zVS
 XD1xb4/d1Y1ga5rv2fO8R1kz8L5lHC4sCzelOJ5vvbcDrB7oKExLwj9nEGOV/iyr
 gUtvaPLLwlGCArnenhL9W3h0ayxKReUryy9hQwwy6brT7lqokBJ/zoDoOOlHu/5s
 7dAki1MHPhoTFMPUWceFaZNUddOEpb9QYrsLagShcMfYH4OW1VRoeF0ejFK8HRKp
 pR1+9YpFs9FDRMh6gl/gzYyTRw2tITWdPgV/00+lWfZRbg1b2TKTnevwOx8NpUT5
 9n+xq9C4/ZfFqGviIiL8Yw6oekYELs36G6UhuiTpXr+Pl1ujkw6vx4G39IANF4YB
 BmyAVI8yWSdPfHDj4Nol07HRrXaaQr6o+B0WEumtjaAVs+rL4eOU0X2I2J5Q2wFi
 QEcJWZT/rgMfz8KrZpk=
 =Qyn6
 -----END PGP SIGNATURE-----

Merge tag 'v5.12-next-soc.2' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into arm/drivers

MT8167:
- add support for mmsys subsystem

* tag 'v5.12-next-soc.2' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux:
  soc: mediatek: mmsys: Add support for MT8167 SoC
  dt-bindings: mediatek: mmsys: add mt8167 binding

Link: https://lore.kernel.org/r/14104322-3a6c-e8eb-cd21-a5343a81aa0f@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-04-08 17:45:28 +02:00
Arnd Bergmann 207481077b Qualcomm driver updates for 5.13
This introduces SC7280 and SM8350 support in the RPMH power-domain
 driver, SC7280 support to the LLCC driver, SC7280 support tot he AOSS
 QMP driver, cleanups to the RPMH driver and a few smaller fixes to the
 SMEM, QMI and EBI2 drivers.
 -----BEGIN PGP SIGNATURE-----
 
 iQJPBAABCAA5FiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmBp5LYbHGJqb3JuLmFu
 ZGVyc3NvbkBsaW5hcm8ub3JnAAoJEAsfOT8Nma3FHBQP/08HEI7gyfrNkGHq0cMr
 F0tDl0wUyh06meEnBT4G9O2Pzuu2vPUxUACEW1EwB61Qo/0Rin9pscSceNLYa7ul
 BSevZKYbMu4yTylTkSTZIy9bIuTmOlcc7krk4MDpl/c8HzuGgILhm9nSTTv7pYfE
 JLtoUdoZS77ToSsv8WVaAinslQKTA4j/YoZ6EKDcTxWw9L6IzkGphfo3p/8Bs3l/
 y4iU87INu+oiINJF5TeLncB5VEBGQIDzBwIf/4R67bZ+lQiRVfPFmg44y/R7NK1f
 NwJB8Ty2oCV1on62yJ93S5YhecJjzedhcIzyn5hsULKUHQT89fneFxVngK2LHTrC
 l+aZLpH6MwC+9qAce5utmlfFFRKpzMtqnXnpexq8fT+EXt4wAnwDacOPcHDDblcS
 zskyTGPGvyt54m3UwS9DOJy3Ed9NJL2D1Xmfonx94H9G8hkFyVBEOMXuegh0Sgtf
 eYGjrYew3ajGiQeC5SaGMkd80CrLN4uUizPt9O6yHETeoQKzE4EluFkaLVlvgbEj
 eauNu6uSiN/ESUc2LvkKN4pmPBspkTh/CyDArV+15IlE/AcSNgSeylxF1lXzo335
 Msl0+3tKpW+i6AASdD8b74f6kV72VdaVflrI3rmacSwCkWP1bvO/1cWBeFzs0S+W
 FtpgLl7nyng7tdMo/9FbeKkE
 =sgiW
 -----END PGP SIGNATURE-----

Merge tag 'qcom-drivers-for-5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/drivers

Qualcomm driver updates for 5.13

This introduces SC7280 and SM8350 support in the RPMH power-domain
driver, SC7280 support to the LLCC driver, SC7280 support tot he AOSS
QMP driver, cleanups to the RPMH driver and a few smaller fixes to the
SMEM, QMI and EBI2 drivers.

* tag 'qcom-drivers-for-5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
  bus: qcom: Put child node before return
  dt-bindings: firmware: scm: Add sc7280 support
  soc: qcom: rpmh-rsc: Fold WARN_ON() into if condition
  soc: qcom: rpmh-rsc: Loop over fewer bits in irq handler
  soc: qcom: rpmh-rsc: Remove tcs_is_free() API
  soc: qcom: smem: Update max processor count
  soc: qcom: aoss: Add AOSS QMP support for SC7280
  dt-bindings: soc: qcom: aoss: Add SC7280 compatible
  soc: qcom: llcc: Add configuration data for SC7280
  dt-bindings: arm: msm: Add LLCC for SC7280
  soc: qcom: Fix typos in the file qmi_encdec.c
  soc: qcom: rpmhpd: Add sc7280 powerdomains
  dt-bindings: power: rpmpd: Add sc7280 to rpmpd binding
  soc: qcom: rpmhpd: Add SM8350 power domains
  dt-bindings: power: Add rpm power domain bindings for SM8350

Link: https://lore.kernel.org/r/20210404164951.713045-1-bjorn.andersson@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-04-08 17:41:53 +02:00
Arnd Bergmann aa68a77863 Qualcomm fix for 5.12
This bypasses the, recently introduced, interconnect handling in the
 GENI (serial engine) driver when running off ACPI, as this causes the
 GENI probe to fail and the Lenovo Yoga C630 to boot without keyboard and
 touchpad.
 -----BEGIN PGP SIGNATURE-----
 
 iQJPBAABCAA5FiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmBp2iQbHGJqb3JuLmFu
 ZGVyc3NvbkBsaW5hcm8ub3JnAAoJEAsfOT8Nma3F7JoQAN7Tp3EFeaqKVWD+N6Jf
 w0qobCdnJQ2HI34eH8TQUr6YFMzK0a/3y15uHEELlf4/f4g72myFsyvzV/ahGrv4
 SPHw/Su8f4le+5NUu9i8JmZEBTHhO/xfaJ9tc7SYjD2ivra62ZocV9nrDotxFPW8
 4LdfXAnWVIEG8GDPoAYfHaTOFPbP3znwaaETFCA6RPPqLBkGYNcs6StVgJ5SqRTG
 NrQp87ixyHtSzhIDoLbGLEY16s3ijUgrysK4Toes7Y4U9+RN2AK3LsvcF88/GQPY
 xKQCaHVNOLE8I4hZUieakVjmPxkKt1bfsN6TuicFN9Wjl13LheBVfcAk6c6cEACM
 hd1/jnv1U5Bi3ACihLBae8NDX4XInqo+YROMoEGFT94cfL4S53I/J8cNEvwHHDZ1
 fc8ZHhrCbJH9BxkDwTAON2pVLZnJCyufPuAfVuSWVGVq8JVQcsRt/7HO64vU3xvO
 x0ktm8fAi3z8ySB3HmFy9rpY/00OkLF/uhyIj56EHv3hp0erenEE+mT8ORPYadwe
 A41fRijlepbUXfrfIjjc3lK6SoA/99Cr8QVRDiYfZQJvmLumTgtUgF3ZpS9RuINV
 NH+ltvISGSj94zDK2v8QyJCzbGTVoTTRGfbZ5qXjefGpWDselFnIaa3VQswZoFaZ
 fsnd5d/TUtD0w/bi0qMuYbsO
 =w0Zm
 -----END PGP SIGNATURE-----

Merge tag 'qcom-drivers-fixes-for-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/fixes

Qualcomm fix for 5.12

This bypasses the, recently introduced, interconnect handling in the
GENI (serial engine) driver when running off ACPI, as this causes the
GENI probe to fail and the Lenovo Yoga C630 to boot without keyboard and
touchpad.

* tag 'qcom-drivers-fixes-for-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
  soc: qcom: geni: shield geni_icc_get() for ACPI boot

Link: https://lore.kernel.org/r/20210404155604.712236-1-bjorn.andersson@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-04-08 17:36:41 +02:00
Bjorn Andersson 0648c55e3a soc: qcom: mdt_loader: Detect truncated read of segments
Given that no validation of how much data the firmware loader read in
for a given segment truncated segment files would best case result in a
hash verification failure, without any indication of what went wrong.

Improve this by validating that the firmware loader did return the
amount of data requested.

Fixes: 445c2410a4 ("soc: qcom: mdt_loader: Use request_firmware_into_buf()")
Reviewed-by: Sibi Sankar <sibis@codeaurora.org>
Link: https://lore.kernel.org/r/20210107232526.716989-1-bjorn.andersson@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-04-08 10:28:59 -05:00
Bjorn Andersson 84168d1b54 soc: qcom: mdt_loader: Validate that p_filesz < p_memsz
The code validates that segments of p_memsz bytes of a segment will fit
in the provided memory region, but does not validate that p_filesz bytes
will, which means that an incorrectly crafted ELF header might write
beyond the provided memory region.

Fixes: 051fb70fd4 ("remoteproc: qcom: Driver for the self-authenticating Hexagon v5")
Reviewed-by: Sibi Sankar <sibis@codeaurora.org>
Link: https://lore.kernel.org/r/20210107233119.717173-1-bjorn.andersson@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-04-08 10:28:55 -05:00
Qinglang Miao 769738fc49 soc: qcom: pdr: Fix error return code in pdr_register_listener
Fix to return the error code -EREMOTEIO from pdr_register_listener
rather than 0.

Fixes: fbe639b44a ("soc: qcom: Introduce Protection Domain Restart helpers")
Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: Qinglang Miao <miaoqinglang@huawei.com>
Link: https://lore.kernel.org/r/20201125065034.154217-1-miaoqinglang@huawei.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-04-07 22:31:39 -05:00
Linus Torvalds 3a22981230 ARM SoC fixes for v5.12, part 2
Most of the changes again are devicetree fixes, but there are also five
 trivial build fixes for issues I found when test building with gcc-11 or
 when running 'make W=1', and some OMAP platform specific code fixups.
 
 Broadcom
   - One revert for a Raspberry pi interrupt controller change that
     caused a regression.
 
 TI OMAP:
   - Remove unused duplicate sha2md5_fck clock node that can race with the
     OMAP4_SHA2MD5_CLKCTRL clock node for disable for unused clocks
 
   - Add aliases for omap4/5 mmc to put the slots back into the right
     order again
 
   - Fix typo for bionic voltage controllers that accidentally use mpu
     for all instances instead of mpu, core and iva
 
   - Fix random hangs for droid4 caused by missing fix from TI Android
     kernel tree to do a dummy smc call on cpuidle wakeup path
 
 NXP i.MX:
   - Fix a system failure on imx6qdl-phytec-pfla02 board when booting from
     SD, by adding missing vmmc supply for SD interfaces.
 
   - Fix address typo in i.MX8MM/Q IOMUXC_SD1_DATA0_GPIO2_IO2 definition.
 
 Marvell mvebu:
   - Fix storm interrupt on Turris Omnia
 
   - Enable hardware buffer management as it should be
 
 Build fixes for PXA, Freescale, Marvell, OMAP1 an Keystone.
 
 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmBs0OgACgkQYKtH/8kJ
 UifdEBAAiD3JebS8a1jsgL+/va/ptOuBZP2l4sCH3P/bczsNKeAn+BvwAy4jNJ4b
 C55ZFnz6tX37CGY7e1Pe7LC8WhVd1LGfCm/gSreKUTkETZd/87PoR1xM4GxbhmBQ
 8HNJOVDBSes6tHgWTAgQ7rHGQQ71JoRYc9FJPOH2JDsk8SaeL8Z+Bjay3O3nlBQw
 RU0zoWv/khkdRvzt4oDTmW6pPDQh5c9twv2ORZM92+tXhSeF2AAY08GdAAmiZL5W
 Lq30YozGSJHPcIYSN+jSWPJNtzmrF3oZVTqDzqTN/aIVoH+8MFZHSmCd3iM1RWkT
 wkanNiqF7CRYAdLmC00YTToJUQxsbOYugfUMWYC04VocVbeEDAhnITFVF1zrJLZ4
 q4E/S5WSZjLPUsiDhSK+d0S2bFVrEyQUaDaFWrC6Aet5wA6pI/8X0Q3ZSMV7jzq+
 NkZYuA2oKoW0vwnH+7432/1g33CpCxKRVr/zBhesjCpB3Ymj0OWfqGeHA2fyjFQq
 fNvUnG6LyXE+NBgIfgZTGbBr1gCT/XHqd0GcYrBy4v0L3x8qJSh1ClA0qlpWr+Zl
 mY5jMC6MrGGuHXEhqIoS38mO0RTyx9i2iDjge2CrAMmRxdVR453Z4VIbDnSwGDAe
 K8lASQKHEyvRzdmJDVhaesHqwU9BDtWULY8Q2+3jKqv3wwf6d0I=
 =YY35
 -----END PGP SIGNATURE-----

Merge tag 'arm-fixes-5.11-2' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC fixes from Arnd Bergmann:
 "Most of the changes again are devicetree fixes, but there are also
  five trivial build fixes for issues I found when test building with
  gcc-11 or when running 'make W=1', and some OMAP platform specific
  code fixups.

  Broadcom:
   - One revert for a Raspberry pi interrupt controller change that
     caused a regression.

  TI OMAP:
   - Remove unused duplicate sha2md5_fck clock node that can race with
     the OMAP4_SHA2MD5_CLKCTRL clock node for disable for unused clocks

   - Add aliases for omap4/5 mmc to put the slots back into the right
     order again

   - Fix typo for bionic voltage controllers that accidentally use mpu
     for all instances instead of mpu, core and iva

   - Fix random hangs for droid4 caused by missing fix from TI Android
     kernel tree to do a dummy smc call on cpuidle wakeup path

  NXP i.MX:
   - Fix a system failure on imx6qdl-phytec-pfla02 board when booting
     from SD, by adding missing vmmc supply for SD interfaces.

   - Fix address typo in i.MX8MM/Q IOMUXC_SD1_DATA0_GPIO2_IO2
     definition.

  Marvell mvebu:
   - Fix storm interrupt on Turris Omnia

   - Enable hardware buffer management as it should be

  ... and build fixes for PXA, Freescale, Marvell, OMAP1 and Keystone"

* tag 'arm-fixes-5.11-2' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc:
  ARM: dts: turris-omnia: configure LED[2]/INTn pin as interrupt pin
  ARM: dts: turris-omnia: fix hardware buffer management
  Revert "arm64: dts: marvell: armada-cp110: Switch to per-port SATA interrupts"
  ARM: mvebu: avoid clang -Wtautological-constant warning
  ARM: pxa: mainstone: avoid -Woverride-init warning
  ARM: omap1: fix building with clang IAS
  soc/fsl: qbman: fix conflicting alignment attributes
  ARM: keystone: fix integer overflow warning
  ARM: dts: imx6: pbab01: Set vmmc supply for both SD interfaces
  arm64: dts: imx8mm/q: Fix pad control of SD1_DATA0
  ARM: OMAP4: PM: update ROM return address for OSWR and OFF
  ARM: OMAP4: Fix PMIC voltage domains for bionic
  ARM: dts: Fix moving mmc devices with aliases for omap4 & 5
  ARM: dts: Drop duplicate sha2md5_fck to fix clk_disable race
  Revert "ARM: dts: bcm2711: Add the BSC interrupt controller"
2021-04-07 09:26:50 -07:00
Christoph Hellwig 7d61cb6ff0 iommu/fsl_pamu: enable the liodn when attaching a device
Instead of a separate call to enable all devices from the list, just
enable the liodn once the device is attached to the iommu domain.

This also remove the DOMAIN_ATTR_FSL_PAMU_ENABLE iommu_attr.

Signed-off-by: Christoph Hellwig <hch@lst.de>
Acked-by: Will Deacon <will@kernel.org>
Acked-by: Li Yang <leoyang.li@nxp.com>
Link: https://lore.kernel.org/r/20210401155256.298656-11-hch@lst.de
Signed-off-by: Joerg Roedel <jroedel@suse.de>
2021-04-07 10:56:52 +02:00
Christoph Hellwig 4eeb96f6ef iommu/fsl_pamu: replace DOMAIN_ATTR_FSL_PAMU_STASH with a direct call
Add a fsl_pamu_configure_l1_stash API that qman_portal can call directly
instead of indirecting through the iommu attr API.

Signed-off-by: Christoph Hellwig <hch@lst.de>
Acked-by: Will Deacon <will@kernel.org>
Acked-by: Li Yang <leoyang.li@nxp.com>
Link: https://lore.kernel.org/r/20210401155256.298656-8-hch@lst.de
Signed-off-by: Joerg Roedel <jroedel@suse.de>
2021-04-07 10:56:52 +02:00
Christoph Hellwig 376dfd2a2f iommu/fsl_pamu: remove ->domain_window_enable
The only thing that fsl_pamu_window_enable does for the current caller
is to fill in the prot value in the only dma_window structure, and to
propagate a few values from the iommu_domain_geometry struture into the
dma_window.  Remove the dma_window entirely, hardcode the prot value and
otherwise use the iommu_domain_geometry structure instead.

Remove the now unused ->domain_window_enable iommu method.

Signed-off-by: Christoph Hellwig <hch@lst.de>
Acked-by: Li Yang <leoyang.li@nxp.com>
Link: https://lore.kernel.org/r/20210401155256.298656-7-hch@lst.de
Signed-off-by: Joerg Roedel <jroedel@suse.de>
2021-04-07 10:56:52 +02:00
Christoph Hellwig ba58d1216e iommu/fsl_pamu: remove support for multiple windows
The only domains allocated forces use of a single window.  Remove all
the code related to multiple window support, as well as the need for
qman_portal to force a single window.

Remove the now unused DOMAIN_ATTR_WINDOWS iommu_attr.

Signed-off-by: Christoph Hellwig <hch@lst.de>
Acked-by: Will Deacon <will@kernel.org>
Acked-by: Li Yang <leoyang.li@nxp.com>
Link: https://lore.kernel.org/r/20210401155256.298656-6-hch@lst.de
Signed-off-by: Joerg Roedel <jroedel@suse.de>
2021-04-07 10:56:52 +02:00
Christoph Hellwig f7641bb71d iommu/fsl_pamu: remove support for setting DOMAIN_ATTR_GEOMETRY
The default geometry is the same as the one set by qman_port given
that FSL_PAMU depends on having 64-bit physical and thus DMA addresses.

Remove the support to update the geometry and remove the now pointless
geom_size field.

Signed-off-by: Christoph Hellwig <hch@lst.de>
Acked-by: Will Deacon <will@kernel.org>
Acked-by: Li Yang <leoyang.li@nxp.com>
Link: https://lore.kernel.org/r/20210401155256.298656-4-hch@lst.de
Signed-off-by: Joerg Roedel <jroedel@suse.de>
2021-04-07 10:56:51 +02:00
Christophe Leroy 3f39f38ea9 soc: fsl: qe: replace qe_io{read,write}* wrappers by generic io{read,write}*
Commit 6ac9b61786 ("soc: fsl: qe: introduce qe_io{read,write}*
wrappers") added specific I/O accessors for qe because at that
time ioread/iowrite functions were sub-optimal on powerpc/32
compared to the architecture specific in_/out_ IO accessors.

But as ioread/iowrite accessors are now equivalent since
commit 894fa235eb ("powerpc: inline iomap accessors"),
use them in order to allow removal of the qe specific ones.

Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
2021-04-06 15:39:39 -05:00
Yang Li 9469f04bb9 soc: fsl: guts: remove unneeded semicolon
Eliminate the following coccicheck warning:
./drivers/soc/fsl/guts.c:120:2-3: Unneeded semicolon

Reported-by: Abaci Robot <abaci@linux.alibaba.com>
Signed-off-by: Yang Li <yang.lee@linux.alibaba.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
2021-04-06 15:25:50 -05:00
Zheng Yongjun 7374a3e572 soc: fsl: qe: Use DEFINE_SPINLOCK() for spinlock
spinlock can be initialized automatically with DEFINE_SPINLOCK()
rather than explicitly calling spin_lock_init().

Signed-off-by: Zheng Yongjun <zhengyongjun3@huawei.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
2021-04-06 15:24:43 -05:00
Zheng Yongjun f22c8d317a soc: fsl: qbman: Delete useless kfree code
The parameter of kfree function is NULL, so kfree code is useless, delete it.

Signed-off-by: Zheng Yongjun <zhengyongjun3@huawei.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
2021-04-06 15:17:53 -05:00
Roy Pledge c4e38b2a27 soc: fsl: qbman: Ensure device cleanup is run for kexec
Make sure that the QBMan device cleanup routines are executed
when the device was previously initialized. This is needed for
kexec since the device will keep it's state from the previous
kernel that was executing.

Signed-off-by: Roy Pledge <roy.pledge@nxp.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
2021-04-06 11:22:39 -05:00
Fabien Parent 060f7875bd soc: mediatek: mmsys: Add support for MT8167 SoC
Add routing table for DSI on MT8167 SoC. The registers are mostly
incompatible with the current defines, so new one for MT8167 are added.

Signed-off-by: Fabien Parent <fparent@baylibre.com>
Link: https://lore.kernel.org/r/20210405200354.2194930-2-fparent@baylibre.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-04-06 12:57:10 +02:00
Bjorn Andersson 82ec0c290d soc: qcom: wcnss_ctrl: Allow reading firmware-name from DT
The WLAN NV firmware blob differs between platforms, and possibly
devices, so add support in the wcnss_ctrl driver for reading the path of
this file from DT in order to allow these files to live in a generic
file system (or linux-firmware).

The new property is optional and the code falls back to the old filename
if the property isn't specified.

Tested-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Tested-by: Aníbal Limón <anibal.limon@linaro.org>
Link: https://lore.kernel.org/r/20210312003318.3273536-5-bjorn.andersson@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-04-05 22:35:06 -05:00
Bjorn Andersson ac3f278420 soc: qcom: wcnss_ctrl: Introduce local variable "dev"
Introduce a local variable to carry the struct device *, to reduce the
line lengths in the next patch.

Tested-by: Aníbal Limón <anibal.limon@linaro.org>
Link: https://lore.kernel.org/r/20210312003318.3273536-4-bjorn.andersson@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-04-05 22:34:21 -05:00
Linus Torvalds 2023a53bdf OpenRISC fix for 5.12
Includes:
  - Fix duplicate header include in Litex SOC driver
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEE2cRzVK74bBA6Je/xw7McLV5mJ+QFAmBo3SYACgkQw7McLV5m
 J+SKiw/+IFXnV8sinKvdqRHWr54tpQjjYUvZ79QBAu2IpppZK30StUXw90P2Yq3m
 NQk3lgISmh8diuwr4BKbV1oPnwOgQ5mqrEod6TAU0zVj3Ffg+L8kyhmmbxSuZEAb
 6Ie8lkhR/JdOoPNPojrKBRv5efv9aO+GcD8tYZ0QHWQAYGItn6nYLDfi4DLXY4gL
 ApABEZF7NeoBZnMRQuE1LGLdYDY66rfSDEVerUmODQlsYfye6k9oRy8dO8iTydWr
 MyDQvMo+sVqAEaLRzHRkd+MVMmoNuuswL7NOzcQW/8Ry80pbdJz+2xJhVEj0pIJg
 HMX5R2Ep91Z0eD6YBHdcGa/YWW/v66rkxt3mtxoQ0IUTo2MU8ELQiPEBOX9kozgu
 nxMoypPpE32hC/z35n0pPCPLWg5CPKzXyZHSzR0Zx8f02F+lxurIb7k6tibzHoiu
 ketv7PL65zXx8NjpVXi2ws1db6mK0XO/m5URrljiJ85jD+4BjzyNjW7k5TtmFxq4
 AT6FoYBOyw8DO+lJs6+vh5cXlhGyUG8w9IWZJ6lTA0kaFBqXsrUmCGm4NH+Hd0j7
 +sZh9UVAO67hrJewUzBYbNA+pE3GwmfA0QAT7JfGe/bC+wxwJIs5uIyAbR0hf7/N
 51QTWE0xSL4WFh1DxkfcaXjPr5Q6+E0T4BiBwlp3qZI2+SY/Z08=
 =kWrB
 -----END PGP SIGNATURE-----

Merge tag 'for-linus' of git://github.com/openrisc/linux

Pull OpenRISC fix from Stafford Horne:
 "Fix duplicate header include in Litex SOC driver"

* tag 'for-linus' of git://github.com/openrisc/linux:
  soc: litex: Remove duplicated header file inclusion
2021-04-03 15:42:45 -07:00
Zhen Lei 1683f7de65 soc: litex: Remove duplicated header file inclusion
The header file <linux/errno.h> is already included above and can be
removed here.

Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
Signed-off-by: Stafford Horne <shorne@gmail.com>
2021-04-04 05:46:46 +09:00
Linus Torvalds 0d2c5a9e15 Serial driver fix for 5.12-rc6
Here is a single serial driver fix for 5.12-rc6.  Is is a revert of a
 change that showed up in 5.9 that has been reported to cause problems.
 
 It has been in linux-next for a while with no reported issues.
 
 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
 -----BEGIN PGP SIGNATURE-----
 
 iG0EABECAC0WIQT0tgzFv3jCIUoxPcsxR9QN2y37KQUCYGhHew8cZ3JlZ0Brcm9h
 aC5jb20ACgkQMUfUDdst+ykyOQCgwM7aKSHU9MuRiyU8jVk1qEEwfHgAn3YcQ6bY
 2IWKKJ4MUo2Iks/+2HS7
 =oGYE
 -----END PGP SIGNATURE-----

Merge tag 'tty-5.12-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty

Pull serial driver fix from Greg KH:
 "Here is a single serial driver fix for 5.12-rc6. Is is a revert of a
  change that showed up in 5.9 that has been reported to cause problems.

  It has been in linux-next for a while with no reported issues"

* tag 'tty-5.12-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty:
  soc: qcom-geni-se: Cleanup the code to remove proxy votes
2021-04-03 10:00:53 -07:00
Arnd Bergmann 3e7f2f2980 - add MT8183 support to mutex driver
MMSYS:
 - use per SoC array to describe the possible routing
 - add support for MT8183
 
 Power management domains:
 - fix the case of a domain fails to get added
 - add names for each power domain to make debugging easier
 
 PMIC wrapper:
 - add support for PMIC wrapper with integrated arbiter
 - add support for MT8192/MT6873
 -----BEGIN PGP SIGNATURE-----
 
 iQJLBAABCAA1FiEEUdvKHhzqrUYPB/u8L21+TfbCqH4FAmBl0JgXHG1hdHRoaWFz
 LmJnZ0BnbWFpbC5jb20ACgkQL21+TfbCqH7R2BAArIiOQfH2+Ua71gQtPSoss4SX
 1+j7pqfTAzHsLILC7SldGR7uBjUz9KjvuHab6lrZ5SMn2A6vF8IPEpAH0vJUPrq/
 PACXese3VVlpDb3JjxcMSbFcuRW/f7Jptt1Kjss7IpwVYXgPWy/prWQdNIvX8uTn
 15wa7JwljXsMjqBJdUYvBOYHDqyTuvqXPjGkwKTxKKRK843qUZ1ZT0lr0yux0p4R
 83xh0MdqPNMzV02vNISd9fVJ4uL3Vv/k4vQXv5LOE1wnTgWKq4QPGvRxz8XOqcu9
 y6EodyxMi2igTnnMXrGJTowB3j9j0FMWWKCTj8b8UmESbrk8VxtZjV4YTUJFlwks
 EVke23hsiqQA4i4NWw+zduB9KCHRBqemt5Z20uGIEXj2I9dvUw94+ScTOkYsNE8h
 B+wsFLQgPbD4wrzfs+GkX30c2D0uV8PLDtiQFmszbGHCslvXhwmdhp9wyOkA748L
 JyZzQhkJUyq9rCDwQtsKfmdLKTfj0GDOEuzjInI22WgcZiU8n23/SKaS+dYQH6+E
 Piz1MAzQGZuqQ2Xnp+2GyBrIZutyjuID0i3KbjuamJ6DHCiwq0u8t/fqWwFNB4oe
 YlCE4Gh7IP0/8q0t1uPNyO4EC1Nr9tiq6ahUUG5w4RgzhdVwqBf9IcumohLHEKfH
 tz3S2E92w09h+z/TpKY=
 =o2Cq
 -----END PGP SIGNATURE-----

Merge tag 'v5.12-next-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into arm/drivers

- add MT8183 support to mutex driver

MMSYS:
- use per SoC array to describe the possible routing
- add support for MT8183

Power management domains:
- fix the case of a domain fails to get added
- add names for each power domain to make debugging easier

PMIC wrapper:
- add support for PMIC wrapper with integrated arbiter
- add support for MT8192/MT6873

* tag 'v5.12-next-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux:
  soc: mediatek: pm-domains: Add a power domain names for mt8167
  soc: mediatek: pm-domains: Add a power domain names for mt8192
  soc: mediatek: pm-domains: Add a power domain names for mt8183
  soc: mediatek: pm-domains: Add a meaningful power domain name
  soc: mediatek: Make symbol 'mtk_mutex_driver' static
  soc: mediatek: mmsys: Add mt8183 mmsys routing table
  soc: mediatek: pwrap: add pwrap driver for MT6873/8192 SoCs
  dt-bindings: mediatek: add compatible for MT6873/8192 pwrap
  soc: mediatek: pwrap: add arbiter capability
  soc: mediatek: pwrap: use BIT() macro
  soc: mediatek: pm-domains: Fix missing error code in scpsys_add_subdomain()
  soc: mediatek: mmsys: Use an array for setting the routing registers
  soc: mediatek: mmsys: Create struct mtk_mmsys to store context data
  soc: mediatek: add mtk mutex support for MT8183

Link: https://lore.kernel.org/r/c47d4bdd-9e05-c0de-bacb-3a262fed936d@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-04-01 22:17:12 +02:00
Arnd Bergmann 66f3431a87 soc/tegra: Changes for v5.13-rc1
Contains a couple of fixes to the PMC power domain implementation and
 exports a regmap from PMC needed to implement USB sleepwalk support.
 -----BEGIN PGP SIGNATURE-----
 
 iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAmBl/fETHHRyZWRpbmdA
 bnZpZGlhLmNvbQAKCRDdI6zXfz6zoTEaEACrlBYT0uNJIQiBBekhSz3N9Mvy/zb+
 l9NEDbhssOuwTzdNRicc+0tmzrerQ3/s4VSYYq6OQq3c84JSNLqMtZYCW2eN3qhd
 v3GecBLJQrnFPSeanTeyJRPy6hxU9M/ffrX+QvQHp9TaK6suTGFnOF52tZbEEHmA
 Xo5fnA6rEVxZQOs/yZ+cZSPI3olvHmmhfkBOvcdzYhsBclHP/vgkrpQezljV4Y0m
 HSMHUmkgKVkLjYa3xzTBmxelP+K4CbhwIbnip70h1sEmB9/XO0Xgx7gKecFoGhcp
 USllAkmTwi2NOLZHpwoZpSdEXXvUlGwiGDSntBmlTfdQ4+fzweInCfja6FfVxH5I
 QjfJBhfjrB+dU7TtdTFmK3UQWst1IswMTpNPpjdqJxqqNa3T9fKKGu9bvNX3zcqc
 XzH7kYR+8gvjvrA5dbBilFgge7MfcjCFZWX+F1J0GnwPChQJiGA27F9VNsRLW/Gu
 FDanr3AhOSMacQrq9iDPm4rhuWpn0VaUdxHRV0LknYpQi8gMT0B+rL9YRI1hjFrf
 3ni/ZcTlFJTqGLcD1pStmg8/liKkZ79m4UR4HTIMio/bc934EFnxtG6qxRtMVd0v
 nH9cgRqkl0ilmLCTVljyyvEIUtEtS5lYhdR+7Ux8Bhigm2J/G4/QRHFLHgyte1H3
 lhcpP63iKIY1Aw==
 =yqQ7
 -----END PGP SIGNATURE-----

Merge tag 'tegra-for-5.13-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/drivers

soc/tegra: Changes for v5.13-rc1

Contains a couple of fixes to the PMC power domain implementation and
exports a regmap from PMC needed to implement USB sleepwalk support.

* tag 'tegra-for-5.13-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  soc/tegra: pmc: Print out domain name when reset fails to acquire
  soc/tegra: pmc: Ensure that clock rates aren't too high
  soc/tegra: pmc: Fix completion of power-gate toggling
  soc/tegra: pmc: Fix imbalanced clock disabling in error code path
  soc/tegra: regulators: Fix locking up when voltage-spread is out of range
  soc/tegra: pmc: Provide USB sleepwalk register map

Link: https://lore.kernel.org/r/20210401172622.3352990-3-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-04-01 21:20:14 +02:00
Arnd Bergmann 62c93360ec i.MX drivers change for 5.13:
- Update SCU power domain driver to keep console domain power on.
 - Add missing ADC1 power domain to SCU power domain driver.
 - Update comments for single global power domain in SCU power domain
   driver.
 - Add i.MX51/i.MX53 unique id support to i.MX SoC driver.
 -----BEGIN PGP SIGNATURE-----
 
 iQFIBAABCgAyFiEEFmJXigPl4LoGSz08UFdYWoewfM4FAmBj4/MUHHNoYXduZ3Vv
 QGtlcm5lbC5vcmcACgkQUFdYWoewfM7SzwgAp87KmLQiV43FSrMfWCiW7+W2KkKI
 grCf702h9HzqjJQ8F+Ha6Fy+sNuK1PU3idERm8DOHULSAu7Z3oyzku16r8iU2sYm
 wfFZNUiwQi4L+ldgaLmAgqHuDJThS4vclk5TxS8WwGa4q5Wqm5Rle8Lj76/YFDFq
 vwILI/pFUnXSRC7lXb8mhcJ8+gytWgh9Vle6ZWe6roCfvGKnwTsK2n7lq5FUFvV+
 7a5mRtjTigXeVYWdNan98W3M9B0pKZSOOrOiBhRxgB2wI3f+4SIQHj/ojc2nMsXm
 eQKPLOm+1BMSRrLz6lqioUcmP72O/lMB3m+Z20fiyPdsmE5qoAdpOW1qRg==
 =75HC
 -----END PGP SIGNATURE-----

Merge tag 'imx-drivers-5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/drivers

i.MX drivers change for 5.13:

- Update SCU power domain driver to keep console domain power on.
- Add missing ADC1 power domain to SCU power domain driver.
- Update comments for single global power domain in SCU power domain
  driver.
- Add i.MX51/i.MX53 unique id support to i.MX SoC driver.

* tag 'imx-drivers-5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  firmware: imx: scu-pd: add missed ADC1 pd
  firmware: imx: scu-pd: Update comments for single global power domain
  firmware: imx: scu-pd: do not power off console domain
  soc: imx: add i.MX51/i.MX53 unique id support

Link: https://lore.kernel.org/r/20210331041019.31345-1-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-04-01 21:08:44 +02:00
Arnd Bergmann e9396d6b38 This pull request contains Broadcom ARM/ARM64/MIPS based SoCs drivers
changes for 5.13, please pull the following:
 
 - Rafal updates the Broadcom PMB binding to support BCM63138 and updates
   the code to support resetting the 63138 SATA controller
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEm+Rq3+YGJdiR9yuFh9CWnEQHBwQFAmBdAFUACgkQh9CWnEQH
 BwSGZhAAoUIKar0bR9ICESdeifnNmIa2sHYdWAWg153EjRDDk9Eypc18qX3D/Q2P
 ohK4dpsnU2cPQ5/kl5T0VlI3ITAk3Ng3zPWsLJXImBJkajS0qAwUuJZ939Z7QqeE
 WR5d+BEt7zEfq+Uj0k8lVX+TqM9T902X+AWbwzqrrt4Zk33ZHfgbFlKetW0AZAzd
 cZgzS5AESsZRMSlgmcsUdY93y3cILPWRp6WoPnSiSNa/qRCPGIL1WXLTSlekirxE
 lxCqq+DF7KZWGHuhxObn0VQSTmK+e0lddzjPs6vxtuI4g64JqNKKZbwkNGrZelyl
 +VUkgEVtXh3D3of6a3Om+vYMBcM3kL9XLYYO0415GKiVTnhhGk++RblmbHbLdt5b
 udxMc8ni1E+IvY5gEefcJPB5qnnMyFbwijDqj8MHhr0NEeL0H38SJx6621nZRkJE
 zzYZxQeDE7ouZ1etFHakg2q0MFyTaKXYk9l/b4KMaKpGHHMp+BhyK3arh///G1uw
 b6n1Grzp3VdscvSsY3tkO66aXlkXWmcYq5rroOv4PXR/xLLS0MZ3oeIsiRNOi0IA
 0QJfVxV3yWUA5/NDEMpYD0iWW+K4S6cOcRSKQUNyTUlGbXNhd93XbAUMypMp5HP0
 3ZhNwde24FqNKCeDGRqIw8EvrK7194pz4bN96bTtBxgIVrJd2XI=
 =M+kT
 -----END PGP SIGNATURE-----

Merge tag 'arm-soc/for-5.13/drivers' of https://github.com/Broadcom/stblinux into arm/drivers

This pull request contains Broadcom ARM/ARM64/MIPS based SoCs drivers
changes for 5.13, please pull the following:

- Rafal updates the Broadcom PMB binding to support BCM63138 and updates
  the code to support resetting the 63138 SATA controller

* tag 'arm-soc/for-5.13/drivers' of https://github.com/Broadcom/stblinux:
  soc: bcm: bcm-pmb: add BCM63138 SATA support
  dt-bindings: power: bcm-pmb: add BCM63138 binding

Link: https://lore.kernel.org/r/20210330184006.1451315-3-f.fainelli@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-04-01 21:07:46 +02:00
Arnd Bergmann 1d79dca631 Driver changes for omaps for genpd support for v5.13
In order to move omap4/5 and dra7 to probe with devicetree data and genpd,
 we need to patch the related drivers to prepare.
 
 These are mostly ti-sysc interconnect target module driver changes and soc
 init changes. However, there are minor changes to other drivers too. There
 are changes for pci-dra7xx probe, omap-prm idle configuration, and a omap5
 clock change:
 
 - ti-sysc needs iorange check improved when the interconnect target module
   has no control registers listed
 
 - ti-sysc needs to probe l4_wkup and l4_cfg interconnects first to avoid
   issues with missing resources and unnecessary deferred probe
 
 - ti-sysc debug option can now detect more devices
 
 - ti-sysc now warns if an old incomplete devicetree data is found as we
   now rely on it being complete for am3 and 4
 
 - soc init code needs to check for prcm and prm nodes for omap4/5 and
   dra7
 
 - omap-prm driver needs to enable autoidle retention support for omap4
 
 - omap5 clocks are missing gpmc and ocmc clock registers
 
 - pci-dra7xx now needs to use builtin_platform_driver instead of using
   builtin_platform_driver_probe for deferred probe to work
 
 There are also few minor non-urgent fixes:
 
 - soc init code pdata_quirks_init_clocks should be static
 
 - ti-sysc has few unneeded semiconon typos
 
 - ti-sysc can use kzalloc instead of kcalloc for a single element
 -----BEGIN PGP SIGNATURE-----
 
 iQJFBAABCAAvFiEEkgNvrZJU/QSQYIcQG9Q+yVyrpXMFAmBhemURHHRvbnlAYXRv
 bWlkZS5jb20ACgkQG9Q+yVyrpXPieBAA00Cpfk0s+vC4KASrq8pb2T9y14GOOwRe
 f8z9p8CDBhDtuhdJSVq//gkv3kIxUDfEN5LkOpsUWoGvbidiX6JlWcSvsA/27paV
 fzKl4xEqlqOkrZ38qGlJIKXBEvEW8yTaWXpkNnv9v83+kl3keU6Herx0RzqlCJCd
 iF7/CvKhOh0IyuaDHLjE1M+KVnBh1aKSfeLXKOQakOgdeZC+dE6eyaY700iBbBmu
 Za/Ug4XoZUJ8bn6i3S6wa3p3MhUOlXGoW4zFCDC2GeK+Mqf2iyIEbotMDsNSncL2
 uPa/CIiu4FjFuhlwLh23nXciGndEWYR7DCZRntwGs5ZJNNXqFYaE3hNKJ/WsVNj9
 lx5M5CqY5mFjJ7WMySPp7YCi3D2W7fyEcnwUl4Ptah1inYuNgF31CXWy/Xy6VbJN
 yMDFM3EBlP3DXG7t8I9O4lr8H9PzQNvJ7OdFaNLZq9Qp+wzRZ4uW2jVpriB9pSP+
 TmOmjlZI3emY852KnWeTqerERB/THmpb7J71Md9KbztXIT5LSBknzmqGW57ie6EC
 EM3ZktjV82dYzv7/OGEJVcctSVSB50tNZoCXwnVpzXagSOZYh9IiRMjPd/SMmJgt
 BZINrpsQpsLk6w5zVWF0zfhG7DFDJ862tyGqJZzAJhlCEC+av0Xs90+jl0X0n8uE
 fFq1RUxR7rU=
 =lf62
 -----END PGP SIGNATURE-----

Merge tag 'omap-for-v5.13/ti-sysc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/drivers

Driver changes for omaps for genpd support for v5.13

In order to move omap4/5 and dra7 to probe with devicetree data and genpd,
we need to patch the related drivers to prepare.

These are mostly ti-sysc interconnect target module driver changes and soc
init changes. However, there are minor changes to other drivers too. There
are changes for pci-dra7xx probe, omap-prm idle configuration, and a omap5
clock change:

- ti-sysc needs iorange check improved when the interconnect target module
  has no control registers listed

- ti-sysc needs to probe l4_wkup and l4_cfg interconnects first to avoid
  issues with missing resources and unnecessary deferred probe

- ti-sysc debug option can now detect more devices

- ti-sysc now warns if an old incomplete devicetree data is found as we
  now rely on it being complete for am3 and 4

- soc init code needs to check for prcm and prm nodes for omap4/5 and
  dra7

- omap-prm driver needs to enable autoidle retention support for omap4

- omap5 clocks are missing gpmc and ocmc clock registers

- pci-dra7xx now needs to use builtin_platform_driver instead of using
  builtin_platform_driver_probe for deferred probe to work

There are also few minor non-urgent fixes:

- soc init code pdata_quirks_init_clocks should be static

- ti-sysc has few unneeded semiconon typos

- ti-sysc can use kzalloc instead of kcalloc for a single element

* tag 'omap-for-v5.13/ti-sysc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  bus: ti-sysc: Use kzalloc for allocating only one thing
  bus: ti-sysc: remove unneeded semicolon
  ARM: OMAP2+: Make symbol 'pdata_quirks_init_clocks' static
  PCI: pci-dra7xx: Prepare for deferred probe with module_platform_driver
  clk: ti: omap5: Add missing gpmc and ocmc clkctrl
  soc: ti: omap-prm: Allow hardware supported retention when idle
  ARM: OMAP2+: Init both prm and prcm nodes early for clocks
  bus: ti-sysc: Check for old incomplete dtb
  bus: ti-sysc: Detect more modules for debugging
  bus: ti-sysc: Probe for l4_wkup and l4_cfg interconnect devices first
  bus: ti-sysc: Fix initializing module_pa for modules without sysc register
  ARM: dts: Fix moving mmc devices with aliases for omap4 & 5
  ARM: dts: Drop duplicate sha2md5_fck to fix clk_disable race
  soc: ti: omap-prm: Fix occasional abort on reset deassert for dra7 iva
  bus: ti-sysc: Fix warning on unbind if reset is not deasserted
  ARM: OMAP2+: Fix smartreflex init regression after dropping legacy data
  soc: ti: omap-prm: Fix reboot issue with invalid pcie reset map for dra7
  ARM: dts: am33xx: add aliases for mmc interfaces
  bus: omap_l3_noc: mark l3 irqs as IRQF_NO_THREAD

Link: https://lore.kernel.org/r/pull-1617004205-537424@atomide.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-04-01 21:00:00 +02:00
Arnd Bergmann 7da68c64bc Raspberry Pi driver updates for v5.13:
- Fix-up all RPi firmware drivers so as for unbind to happen in an
     orderly fashion
   - Support for RPi's PoE hat PWM bus
 -----BEGIN PGP SIGNATURE-----
 
 iQEzBAABCAAdFiEErOkkGDHCg2EbPcGjlfZmHno8x/4FAmBY1LwACgkQlfZmHno8
 x/6PjwgAuB0fgmN08RpGdyQWpsw7XUd56/g/92BtQ/p87khI9VP3ay8q+1AYGSxL
 jMhSpTu6FOyhyc3y129dtoJDUslsUh5vrXqz3S1niEyYf3CHLjcyc/JPky5/HWJN
 HlVwOowqLBKxVoX6AWGqRWc/axxtm9uMWeK2yiI4LYgDvq7DWhENSp4xwtffLt4q
 Tg5dcqw5PbCWA2npkabnZjhLuDt1XRaLb455yn9P8tCRiqwf5fQ/8zjfcJLNhYTV
 Fy/yrXyBg8RnUOlFviSbtVG0ey1BUdWkxbBd0Vxrh9iw/z+EVQdcN0DZGsKcWsXy
 bK7R2sdCHmV9hjgfc4+mLPKwWhyApQ==
 =bA9X
 -----END PGP SIGNATURE-----

Merge tag 'rpi-poe-v5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/nsaenz/linux-rpi into arm/drivers

Raspberry Pi driver updates for v5.13:
  - Fix-up all RPi firmware drivers so as for unbind to happen in an
    orderly fashion
  - Support for RPi's PoE hat PWM bus

* tag 'rpi-poe-v5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/nsaenz/linux-rpi:
  pwm: Add Raspberry Pi Firmware based PWM bus
  dt-bindings: pwm: Add binding for RPi firmware PWM bus
  input: raspberrypi-ts: Release firmware handle when not needed
  staging: vchiq: Release firmware handle on unbind
  soc: bcm: raspberrypi-power: Release firmware handle on unbind
  reset: raspberrypi: Release firmware handle on unbind
  gpio: raspberrypi-exp: Release firmware handle on unbind
  clk: bcm: rpi: Release firmware handle on unbind
  firmware: raspberrypi: Introduce devm_rpi_firmware_get()
  firmware: raspberrypi: Keep count of all consumers

Link: https://lore.kernel.org/r/20210322174232.29549-1-nsaenz@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-04-01 20:56:49 +02:00
Arnd Bergmann 040f31196e soc/fsl: qbman: fix conflicting alignment attributes
When building with W=1, gcc points out that the __packed attribute
on struct qm_eqcr_entry conflicts with the 8-byte alignment
attribute on struct qm_fd inside it:

drivers/soc/fsl/qbman/qman.c:189:1: error: alignment 1 of 'struct qm_eqcr_entry' is less than 8 [-Werror=packed-not-aligned]

I assume that the alignment attribute is the correct one, and
that qm_eqcr_entry cannot actually be unaligned in memory,
so add the same alignment on the outer struct.

Fixes: c535e923bb ("soc/fsl: Introduce DPAA 1.x QMan device driver")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Link: https://lore.kernel.org/r/20210323131530.2619900-1-arnd@kernel.org'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-04-01 16:32:37 +02:00
Enric Balletbo i Serra 60d93f64a8 soc: mediatek: pm-domains: Add a power domain names for mt8167
Add the power domains names for the mt8167 SoC.

Fixes: 207f13b419 ("soc: mediatek: pm-domains: Add support for mt8167")
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Reviewed-by: Hsin-Yi Wang <hsinyi@chromium.org>
Link: https://lore.kernel.org/r/20210225175000.824661-4-enric.balletbo@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-04-01 11:36:04 +02:00
Enric Balletbo i Serra 3edc01bc53 soc: mediatek: pm-domains: Add a power domain names for mt8192
Add the power domains names for the mt8192 SoC.

Fixes: a49d5e7a89 ("soc: mediatek: pm-domains: Add support for mt8192")
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Reviewed-by: Hsin-Yi Wang <hsinyi@chromium.org>
Link: https://lore.kernel.org/r/20210225175000.824661-3-enric.balletbo@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-04-01 11:36:04 +02:00
Enric Balletbo i Serra e57b811225 soc: mediatek: pm-domains: Add a power domain names for mt8183
Add the power domains names for the mt8183 SoC. This removes the debugfs
errors like the following:

  debugfs: Directory 'power-domain' with parent 'pm_genpd' already present!

Fixes: eb9fa767fb ("soc: mediatek: pm-domains: Add support for mt8183")
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Reviewed-by: Hsin-Yi Wang <hsinyi@chromium.org>
Link: https://lore.kernel.org/r/20210225175000.824661-2-enric.balletbo@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-04-01 11:36:04 +02:00
Enric Balletbo i Serra 022b02b450 soc: mediatek: pm-domains: Add a meaningful power domain name
Add the power domains names to the power domain struct so we
have meaningful name for every power domain. This also removes the
following debugfs error message.

  [    2.242068] debugfs: Directory 'power-domain' with parent 'pm_genpd' already present!
  [    2.249949] debugfs: Directory 'power-domain' with parent 'pm_genpd' already present!
  [    2.257784] debugfs: Directory 'power-domain' with parent 'pm_genpd' already present!
  ...

Fixes: 59b644b01c ("soc: mediatek: Add MediaTek SCPSYS power domains")
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Reviewed-by: Hsin-Yi Wang <hsinyi@chromium.org>
Link: https://lore.kernel.org/r/20210225175000.824661-1-enric.balletbo@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-04-01 11:36:04 +02:00
Wei Yongjun b23ab27b9a soc: mediatek: Make symbol 'mtk_mutex_driver' static
The sparse tool complains as follows:

drivers/soc/mediatek/mtk-mutex.c:464:24: warning:
 symbol 'mtk_mutex_driver' was not declared. Should it be static?

This symbol is not used outside of mtk-mutex.c, so this
commit marks it static.

Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com>
Reviewed-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
Link: https://lore.kernel.org/r/20210210075656.1096251-1-weiyongjun1@huawei.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-04-01 11:27:54 +02:00
Hsin-Yi Wang 1ff1270fca soc: mediatek: mmsys: Add mt8183 mmsys routing table
mt8183 has different routing registers than mt8173.

Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org>
Tested-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Link: https://lore.kernel.org/r/20210330110423.3542163-1-hsinyi@chromium.org
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-03-31 13:52:52 +02:00
Hsin-Hsiung Wang 9161385d53 soc: mediatek: pwrap: add pwrap driver for MT6873/8192 SoCs
MT6873/8192 are highly integrated SoCs and use PMIC_MT6359 for
power management. This patch adds pwrap master driver to
access PMIC_MT6359.

Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com>
Link: https://lore.kernel.org/r/1615563286-22126-5-git-send-email-hsin-hsiung.wang@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-03-30 12:24:09 +02:00
Hsin-Hsiung Wang 9d498d0b40 soc: mediatek: pwrap: add arbiter capability
Add arbiter capability for pwrap driver.
The arbiter capability uses new design to judge the priority and latency
for multi-channel.
The design with arbiter support cannot change the watchdog timer.
This patch is preparing for adding mt6873/8192 pwrap support.

Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com>
Link: https://lore.kernel.org/r/1615563286-22126-3-git-send-email-hsin-hsiung.wang@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-03-30 12:24:09 +02:00
Hsin-Hsiung Wang d337ed031d soc: mediatek: pwrap: use BIT() macro
Use a better BIT() marco for the bit definition.
No functional changes, cleanup only.

Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
Link: https://lore.kernel.org/r/1615563286-22126-2-git-send-email-hsin-hsiung.wang@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-03-30 12:24:09 +02:00
Enric Balletbo i Serra 9950588a45 soc: mediatek: pm-domains: Fix missing error code in scpsys_add_subdomain()
Adding one power domain in scpsys_add_subdomain is missing to assign an
error code when it fails. Fix that assigning an error code to 'ret',
this also fixes the follwowing smatch warning.

  drivers/soc/mediatek/mtk-pm-domains.c:492 scpsys_add_subdomain() warn: missing error code 'ret'

Fixes: dd65030295 ("soc: mediatek: pm-domains: Don't print an error if child domain is deferred")
Reported-by: kernel test robot <lkp@intel.com>
Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Link: https://lore.kernel.org/r/20210303091054.796975-1-enric.balletbo@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-03-30 11:52:44 +02:00
CK Hu 440147639a soc: mediatek: mmsys: Use an array for setting the routing registers
Actually, setting the registers for routing, use multiple 'if-else' for different
routes, but this code would be more and more complicated while we
support more and more SoCs. Change that and use a table per SoC so the
code will be more portable and clear.

Signed-off-by: CK Hu <ck.hu@mediatek.com>
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Link: https://lore.kernel.org/r/20210317181711.795245-3-enric.balletbo@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-03-30 11:07:31 +02:00
CK Hu ce15e7faa2 soc: mediatek: mmsys: Create struct mtk_mmsys to store context data
Apart from the driver data, in order to extend the driver to support more
and more SoCs, we will need to store other configuration data. So, create
a mtk_mmsys struct to encapsulate all that information.

Signed-off-by: CK Hu <ck.hu@mediatek.com>
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Reviewed-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
Link: https://lore.kernel.org/r/20210317181711.795245-2-enric.balletbo@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-03-30 11:07:31 +02:00
Roja Rani Yarubandi 29d96eb261 soc: qcom-geni-se: Cleanup the code to remove proxy votes
This reverts commit 048eb908a1 ("soc: qcom-geni-se: Add interconnect
support to fix earlycon crash")

ICC core and platforms drivers supports sync_state feature, which
ensures that the default ICC BW votes from the bootloader is not
removed until all it's consumers are probes.

The proxy votes were needed in case other QUP child drivers
I2C, SPI probes before UART, they can turn off the QUP-CORE clock
which is shared resources for all QUP driver, this causes unclocked
access to HW from earlycon.

Given above support from ICC there is no longer need to maintain
proxy votes on QUP-CORE ICC node from QUP wrapper driver for early
console usecase, the default votes won't be removed until real
console is probed.

Cc: stable@vger.kernel.org
Fixes: 266cd33b59 ("interconnect: qcom: Ensure that the floor bandwidth value is enforced")
Fixes: 7d3b0b0d81 ("interconnect: qcom: Use icc_sync_state")
Signed-off-by: Roja Rani Yarubandi <rojay@codeaurora.org>
Signed-off-by: Akash Asthana <akashast@codeaurora.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Link: https://lore.kernel.org/r/20210324101836.25272-2-rojay@codeaurora.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2021-03-26 15:16:05 +01:00
Dmitry Osipenko 366d7c643a soc/tegra: pmc: Print out domain name when reset fails to acquire
Print out domain name when reset fails to acquire for debugging purposes
and to make formatting of GENPD errors consistent in the driver.

Tested-by: Peter Geis <pgwipeout@gmail.com> # Ouya T30
Tested-by: Nicolas Chauvet <kwizart@gmail.com> # PAZ00 T20 and TK1 T124
Tested-by: Matt Merhar <mattmerhar@protonmail.com> # Ouya T30
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-03-26 13:10:25 +01:00
Dmitry Osipenko 66ee50c6e2 soc/tegra: pmc: Ensure that clock rates aren't too high
Switch all clocks of a power domain to a safe rate which is suitable
for all possible voltages in order to ensure that hardware constraints
aren't violated when power domain state toggles.

Tested-by: Peter Geis <pgwipeout@gmail.com> # Ouya T30
Tested-by: Nicolas Chauvet <kwizart@gmail.com> # PAZ00 T20 and TK1 T124
Tested-by: Matt Merhar <mattmerhar@protonmail.com> # Ouya T30
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-03-26 13:10:25 +01:00
Dmitry Osipenko c45e66a6b9 soc/tegra: pmc: Fix completion of power-gate toggling
The SW-initiated power gate toggling is dropped by PMC if there is
contention with a HW-initiated toggling, i.e. when one of CPU cores is
gated by cpuidle driver. Software should retry the toggling after 10
microseconds on Tegra20/30 SoCs, hence add the retrying. On Tegra114+ the
toggling method was changed in hardware, the TOGGLE_START bit indicates
whether PMC is busy or could accept the command to toggle, hence handle
that bit properly.

The problem pops up after enabling dynamic power gating of 3D hardware,
where 3D power domain fails to turn on/off "randomly".

The programming sequence and quirks are documented in TRMs, but PMC
driver obliviously re-used the Tegra20 logic for Tegra30+, which strikes
back now. The 10 microseconds and other timeouts aren't documented in TRM,
they are taken from downstream kernel.

Link: https://nv-tegra.nvidia.com/gitweb/?p=linux-2.6.git;a=commit;h=311dd1c318b70e93bcefec15456a10ff2b9eb0ff
Link: https://nv-tegra.nvidia.com/gitweb/?p=linux-3.10.git;a=commit;h=7f36693c47cb23730a6b2822e0975be65fb0c51d
Tested-by: Peter Geis <pgwipeout@gmail.com> # Ouya T30
Tested-by: Nicolas Chauvet <kwizart@gmail.com> # PAZ00 T20 and TK1 T124
Tested-by: Matt Merhar <mattmerhar@protonmail.com> # Ouya T30
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-03-26 13:10:25 +01:00
Dmitry Osipenko 19221e3083 soc/tegra: pmc: Fix imbalanced clock disabling in error code path
The tegra_powergate_power_up() has a typo in the error code path where it
will try to disable clocks twice, fix it. In practice that error never
happens, so this is a minor correction.

Tested-by: Peter Geis <pgwipeout@gmail.com> # Ouya T30
Tested-by: Nicolas Chauvet <kwizart@gmail.com> # PAZ00 T20 and TK1 T124
Tested-by: Matt Merhar <mattmerhar@protonmail.com> # Ouya T30
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-03-26 13:10:25 +01:00
Dmitry Osipenko ef85bb582c soc/tegra: regulators: Fix locking up when voltage-spread is out of range
Fix voltage coupler lockup which happens when voltage-spread is out
of range due to a bug in the code. The max-spread requirement shall be
accounted when CPU regulator doesn't have consumers. This problem is
observed on Tegra30 Ouya game console once system-wide DVFS is enabled
in a device-tree.

Fixes: 783807436f ("soc/tegra: regulators: Add regulators coupler for Tegra30")
Cc: stable@vger.kernel.org
Reported-by: Peter Geis <pgwipeout@gmail.com>
Tested-by: Peter Geis <pgwipeout@gmail.com> # Ouya T30
Tested-by: Matt Merhar <mattmerhar@protonmail.com> # Ouya T30
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-03-26 13:10:25 +01:00
JC Kuo 9d5e7c3e36 soc/tegra: pmc: Provide USB sleepwalk register map
This commit implements a register map which grants USB (UTMI and HSIC)
sleepwalk registers access to USB PHY drivers. The USB sleepwalk logic
is in PMC hardware block but USB PHY drivers have the best knowledge
of proper programming sequence.

Signed-off-by: JC Kuo <jckuo@nvidia.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-03-26 13:10:25 +01:00
Rafał Miłecki be6d994203 soc: bcm: bcm-pmb: add BCM63138 SATA support
BCM63138 has SATA controller that needs to be powered up using PMB.

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2021-03-25 14:24:43 -07:00
Nicolas Saenz Julienne 78add6cba7 soc: bcm: raspberrypi-power: Release firmware handle on unbind
Use devm_rpi_firmware_get() so as to make sure we release RPi's firmware
interface when unbinding the device.

Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
2021-03-22 17:59:51 +01:00
Arnd Bergmann ebccfa8a74 Fixes for omaps for v5.12-rc cycle
Regression fixes for multiple issues found mostly caused by recent changes
 to drop legacy platform data and and starting to use the new prm driver
 reset controller:
 
 - Fix ocp interconnect bus access error reporting for omap_l3_noc by
   setting IRQF_NO_THREAD
 
 - Fix changed mmc slot order regression by adding mmc aliases for am335x
 
 - Fix dra7 reboot regression caused by invalid pcie reset map
 
 - Fix smartreflex init regression caused by dropped legacy data
 
 - Fix ti-sysc driver warning on unbind if reset is not deasserted
 
 - Fix flakey reset deassert for dra7 iva
 -----BEGIN PGP SIGNATURE-----
 
 iQJFBAABCAAvFiEEkgNvrZJU/QSQYIcQG9Q+yVyrpXMFAmBA7/IRHHRvbnlAYXRv
 bWlkZS5jb20ACgkQG9Q+yVyrpXNVYBAAnQJ6JQWEXPjvAQSy3udNYugKxJtnaLSh
 1S3oxTkkxk/WO0iTUAX/in3sueGLk8+rR3jupVYjnHczz/tPvO3xN/KztmeEjZwE
 ELwSqoqPT5hIY6WioSeVbcUMiMqAid6amSv+bfkAEkdhhNKJ8ytWDSqSW9lGcPTe
 KCQYU0KkAgnkqyu+t9kI4ErH3MQWJ7krsNsSV2KxWfqETWkHB6QbtGk6KESimSBu
 j1MOZsn7WPTGuMZqA6h9Ylpvs5C+/Ub78eZT8O9w1OUgdCy2EUEKOPGCXZQq/m0E
 q+hU0w3ZJswp/HEjnhlU31IWoauq0JyAV4d4d5yLtzBlcK9rIogQQO/FVPKyiz69
 o4r+lpf8odJCtb74y2MiY3IdA+5gG5hlvdyjPnupUPZs3D1VGYWEY2lhubMlKQby
 4ix6wZrzizi3YoixGTJAhpzJ3TFALpwS7jLWgNvgHEBcWGTEI+i0vp2HnrKcV5oD
 CZeVGmfdnuXIz/dwxSHiHCyf7kBdFRoPCkmz4IYv1SEdy4nDIoUFppHe3JpOlbFn
 2AC3yA//g5QoP1bZrKQ0OZS1tNMttqjo3yWRX4hCKmqvmCzqZ8Jffca9B3smdP2/
 R9vQl9YY4vsrU0DgVcVhCtqAtIiMrNPQUAPwQr41f2eieF3XMgBranSDHOCODObh
 lM44ehpD63U=
 =sZVC
 -----END PGP SIGNATURE-----

Merge tag 'omap-for-v5.12/fixes-rc1-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/fixes

Fixes for omaps for v5.12-rc cycle

Regression fixes for multiple issues found mostly caused by recent changes
to drop legacy platform data and and starting to use the new prm driver
reset controller:

- Fix ocp interconnect bus access error reporting for omap_l3_noc by
  setting IRQF_NO_THREAD

- Fix changed mmc slot order regression by adding mmc aliases for am335x

- Fix dra7 reboot regression caused by invalid pcie reset map

- Fix smartreflex init regression caused by dropped legacy data

- Fix ti-sysc driver warning on unbind if reset is not deasserted

- Fix flakey reset deassert for dra7 iva

* tag 'omap-for-v5.12/fixes-rc1-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  soc: ti: omap-prm: Fix occasional abort on reset deassert for dra7 iva
  bus: ti-sysc: Fix warning on unbind if reset is not deasserted
  ARM: OMAP2+: Fix smartreflex init regression after dropping legacy data
  soc: ti: omap-prm: Fix reboot issue with invalid pcie reset map for dra7
  ARM: dts: am33xx: add aliases for mmc interfaces
  bus: omap_l3_noc: mark l3 irqs as IRQF_NO_THREAD

Link: https://lore.kernel.org/r/pull-1614868603-800959@atomide.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-03-18 23:52:27 +01:00
Yongqiang Niu 0412120153 soc: mediatek: add mtk mutex support for MT8183
Add mtk mutex support for MT8183 SoC.

Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com>
Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org>
Reviewed-by: CK Hu <ck.hu@mediatek.com>
Link: https://lore.kernel.org/r/20210129092209.2584718-8-hsinyi@chromium.org
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-03-17 17:30:57 +01:00
Sebastian Reichel 1168935b96 soc: imx: add i.MX51/i.MX53 unique id support
i.MX51 and i.MX53 SoCs have a 64-bit SoC unique ID stored in IIM,
which can be used as SoC serial number. The same feature is already
implemented for i.MX6/i.MX7, so this complements support to earlier
SoCs.

Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15 12:21:48 +08:00
Stephen Boyd f2590e4b3b soc: qcom: rpmh-rsc: Fold WARN_ON() into if condition
Move the WARN_ON() into the if condition so the compiler can see that
the branch is unlikely() and possibly optimize it better.

Cc: Maulik Shah <mkshah@codeaurora.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/20200521060425.24285-4-swboyd@chromium.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-03-11 20:22:21 -06:00
Stephen Boyd a07766206b soc: qcom: rpmh-rsc: Loop over fewer bits in irq handler
readl() returns a u32, and BITS_PER_LONG is different on 32-bit vs.
64-bit architectures. Let's loop over the possible bits set in that type
instead of looping over more bits than we ever may need to.

Cc: Maulik Shah <mkshah@codeaurora.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/20200521060425.24285-3-swboyd@chromium.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-03-11 20:22:20 -06:00
Stephen Boyd 814a0d4630 soc: qcom: rpmh-rsc: Remove tcs_is_free() API
This API does very little. Let's replace all the callsites with the
normal operations that would be done on top of the bitmap that
tcs_in_use is. This simplifies and reduces the code size.

Reviewed-by: Maulik Shah <mkshah@codeaurora.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Cc: Maulik Shah <mkshah@codeaurora.org>
Cc: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/20200521060425.24285-2-swboyd@chromium.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-03-11 20:22:20 -06:00
Sibi Sankar 62fef634ef soc: qcom: smem: Update max processor count
Update max processor count to reflect the number of co-processors on
SC7280 SoCs.

Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Link: https://lore.kernel.org/r/1615269111-25559-2-git-send-email-sibis@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-03-11 20:22:20 -06:00
Sai Prakash Ranjan ce6e674a58 soc: qcom: aoss: Add AOSS QMP support for SC7280
Add AOSS QMP support for SC7280 SoC.

Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Link: https://lore.kernel.org/r/d311b75428da7d87638208490fa9a64b5ef15d6f.1614244789.git.saiprakash.ranjan@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-03-11 20:22:20 -06:00
Sai Prakash Ranjan f6a07be633 soc: qcom: llcc: Add configuration data for SC7280
Add LLCC configuration data for SC7280 SoC.

Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Link: https://lore.kernel.org/r/348fcb76ea837c043f2e493c6df8aa5ebb182c92.1614244789.git.saiprakash.ranjan@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-03-11 20:22:20 -06:00
Bhaskar Chowdhury b469010d56 soc: qcom: Fix typos in the file qmi_encdec.c
Rudimentory spelling fixes throughout the file.

s/descibing/describing/
s/inforation/information/

Signed-off-by: Bhaskar Chowdhury <unixbhaskar@gmail.com>
Link: https://lore.kernel.org/r/20210306213542.19413-1-unixbhaskar@gmail.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-03-11 20:22:20 -06:00
Rajendra Nayak 9937447d83 soc: qcom: rpmhpd: Add sc7280 powerdomains
Add the power domains exposed by RPMH in the Qualcomm Technologies Inc
sc7280 platform

Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Link: https://lore.kernel.org/r/1614664092-9394-2-git-send-email-rnayak@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-03-11 20:22:20 -06:00
Vinod Koul 639c856287 soc: qcom: rpmhpd: Add SM8350 power domains
This adds the power domains found in SM8350 SoC.

Signed-off-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20210210104257.339462-2-vkoul@kernel.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-03-11 20:22:20 -06:00
Shawn Guo 0c9fdcdba6 soc: qcom: geni: shield geni_icc_get() for ACPI boot
Currently, GENI devices like i2c-qcom-geni fails to probe in ACPI boot,
if interconnect support is enabled.  That's because interconnect driver
only supports DT right now.  As interconnect is not necessarily required
for basic function of GENI devices, let's shield geni_icc_get() call,
and then all other ICC calls become nop due to NULL icc_path, so that
GENI devices keep working for ACPI boot.

Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Link: https://lore.kernel.org/r/20210114112928.11368-1-shawn.guo@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-03-11 20:22:05 -06:00
Tony Lindgren bc0b964da3 soc: ti: omap-prm: Allow hardware supported retention when idle
When moving the l4 interconnect instances to probe with simple-pm-bus and
genpd, we will have l4per and core domains stop idling unless we configure
the domain bits to allow retention when idle.

As the TI SoCs have hardware autoidle capabilities, this is safe to do.
The domains will only enter retention on WFI when none of the devices on
the domain block autoidle in the hardware. This follows what we are
already currently doing.

Cc: Santosh Shilimkar <ssantosh@kernel.org>
Cc: Tero Kristo <kristo@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 13:59:17 +02:00
Tony Lindgren 4c9f4865f4 Merge branch 'fixes-rc2' into fixes 2021-03-08 11:34:12 +02:00
Geert Uytterhoeven 1d9ffbc6b1 soc: renesas: rmobile-sysc: Mark fwnode when PM domain is added
Currently, there are two drivers binding to the R-Mobile System
Controller (SYSC):
  - The rmobile-sysc driver registers PM domains from a core_initcall(),
    and does not use a platform driver,
  - The optional rmobile-reset driver registers a reset handler, and
    does use a platform driver.

As fw_devlink only considers devices, commit bab2d712ee ("PM:
domains: Mark fwnodes when their powerdomain is added/removed") works
only for PM Domain drivers where the DT node is a real device node, and
not for PM Domain drivers using a hierarchical representation inside a
subnode.  Hence if fw_devlink is enabled, probing of on-chip devices
that are part of the SYSC PM domain is deferred until the optional
rmobile-reset driver has been bound.   If the rmobile-reset driver is
not available, this will never happen, and thus lead to complete system
boot failures.

Fix this by explicitly marking the fwnode initialized.

Suggested-by: Saravana Kannan <saravanak@google.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Saravana Kannan <saravanak@google.com>
Link: https://lore.kernel.org/r/20210216123958.3180014-1-geert+renesas@glider.be
2021-03-08 10:25:00 +01:00
Geert Uytterhoeven 2fb72440b6 soc: renesas: rmobile-sysc: Remove unneeded platform includes
As of commit b587288001 ("ARM: shmobile: R-Mobile: Remove legacy
PM Domain code"), the R-Mobile System Controller driver no longer
handles the adding of platform devices to PM Domains, but delegates that
to the PM Domain core code.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20210205132141.1920137-1-geert+renesas@glider.be
2021-03-08 10:25:00 +01:00
Linus Torvalds a3905af5be OpenRISC updates for 5.12
Include:
  - Update for Litex SoC controller to support wider width registers as
    well as reset.
  - Refactor SMP code to use device tree to define possible cpus.
  - Updates build including generating vmlinux.bin
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEE2cRzVK74bBA6Je/xw7McLV5mJ+QFAmA5bOcACgkQw7McLV5m
 J+QzlBAAl3kfYayGs286Ol5XDHQynFLkfUkGIrD8T+aHjjZS2DRJOAwoGbE+htv6
 Nt6rXciHi9FNSgTf+nuTm/aQ8qSgFlsYB0AQBjLA193Og/3+G0ifQHcMoDKKRwj/
 u/gqD9geGrsgVRAxqNQ18wBqX+rBPajq8+Mtjg3/ikJfkFc0GqugqevpIRNC7gN4
 PmttAlOhecxFrJ1H4O4qqwctooPAIZJgRXYK8FiOBvyQXOkBmPmuodh1FhdR+jEZ
 /My5PQ6vYgCaXh9FuckX2xf0B3iV5+T6FFoGMPTERjz0ntglHhFLA7P18o8gsaXT
 vUQfT9gtoR9OckmUUxXyXlF3oZft4KouMwp04+WWaiOX52nWLXJ4Jh3GV9UbprJl
 TwlnOkUtQOttRIuIkKnbzDITY91RLPjH5hlO2Suc2nKG6ExNeHNqt+btn7KoFRy9
 BDqRZKppBcz2PUSfHo+kC9MDM6/D4ZYlTlprW9b/U7Aa2xfVWa5KkxamiCT6gVec
 8/y+8VnOU4JGl+KcAr61FoBCHgWqAOVe3XLO3oyvdpVDChNtcFl7d2zYiqoS+9fc
 HDR2Xivr+qClAUpFo+JeLKfISl0j/5lu1+4t7bA6fMunv3ObFHIJUKKCFBIugLu6
 j9nM2F2fqDmvh6xGSFp6bP9PIa6Rmk79EA75R0F4HINU1rnnPKI=
 =IW6A
 -----END PGP SIGNATURE-----

Merge tag 'for-linus' of git://github.com/openrisc/linux

Pull OpenRISC updates from Stafford Horne:

 - Update for Litex SoC controller to support wider width registers as
   well as reset.

 - Refactor SMP code to use device tree to define possible cpus.

 - Update build including generating vmlinux.bin

* tag 'for-linus' of git://github.com/openrisc/linux:
  openrisc: Use devicetree to determine present cpus
  drivers/soc/litex: Add restart handler
  openrisc: add arch/openrisc/Kbuild
  drivers/soc/litex: make 'litex_[set|get]_reg()' methods private
  drivers/soc/litex: support 32-bit subregisters, 64-bit CPUs
  drivers/soc/litex: s/LITEX_REG_SIZE/LITEX_SUBREG_ALIGN/g
  drivers/soc/litex: separate MMIO from subregister offset calculation
  drivers/soc/litex: move generic accessors to litex.h
  openrisc: restart: Call common handlers before hanging
  openrisc: Add vmlinux.bin target
2021-02-26 14:16:06 -08:00
Linus Torvalds 8b83369ddc RISC-V Patches for the 5.12 Merge Window
I have a handful of new RISC-V related patches for this merge window:
 
 * A check to ensure drivers are properly using uaccess.  This isn't
   manifesting with any of the drivers I'm currently using, but may catch
   errors in new drivers.
 * Some preliminary support for the FU740, along with the HiFive
   Unleashed it will appear on.
 * NUMA support for RISC-V, which involves making the arm64 code generic.
 * Support for kasan on the vmalloc region.
 * A handful of new drivers for the Kendryte K210, along with the DT
   plumbing required to boot on a handful of K210-based boards.
 * Support for allocating ASIDs.
 * Preliminary support for kernels larger than 128MiB.
 * Various other improvements to our KASAN support, including the
   utilization of huge pages when allocating the KASAN regions.
 
 We may have already found a bug with the KASAN_VMALLOC code, but it's
 passing my tests.  There's a fix in the works, but that will probably
 miss the merge window.
 -----BEGIN PGP SIGNATURE-----
 
 iQJHBAABCgAxFiEEKzw3R0RoQ7JKlDp6LhMZ81+7GIkFAmA4hXATHHBhbG1lckBk
 YWJiZWx0LmNvbQAKCRAuExnzX7sYifryD/0SfXGOfj93Cxq7I7AYhhzCN7lJ5jvv
 iEQScTlPqU9nfvYodo4EDq0fp+5LIPpTL/XBHtqVjzv0FqRNa28Ea0K7kO8HuXc4
 BaUd0m/DqyB4Gfgm4qjc5bDneQ1ZYxVXprYERWNQ5Fj+tdWhaQGOW64N/TVodjjj
 NgJtTqbIAcjJqjUtttM8TZN5U1TgwLo+KCqw3iYW12lV1YKBBuvrwvSdD6jnFdIQ
 AzG/wRGZhxLoFxgBB/NEsZxDoSd6ztiwxLhS9lX4okZVsryyIdOE70Q/MflfiTlU
 xE+AdxQXTMUiiqYSmHeDD6PDb57GT/K3hnjI1yP+lIZpbInsi29JKow1qjyYjfHl
 9cSSKYCIXHL7jKU6pgt34G1O5N5+fgqHQhNbfKvlrQ2UPlfs/tWdKHpFIP/z9Jlr
 0vCAou7NSEB9zZGqzO63uBLXoN8yfL8FT3uRnnRvoRpfpex5dQX2QqPLQ7327D7N
 GUG31nd1PHTJPdxJ1cI4SO24PqPpWDWY9uaea+0jv7ivGClVadZPco/S3ZKloguT
 lazYUvyA4oRrSAyln785Rd8vg4CinqTxMtIyZbRMbNkgzVQARi9a8rjvu4n9qms2
 2wlXDFi8nR8B4ih5n79dSiiLM9ay9GJDxMcf9VxIxSAYZV2fJALnpK6gV2fzRBUe
 +k/uv8BIsFmlwQ==
 =CutX
 -----END PGP SIGNATURE-----

Merge tag 'riscv-for-linus-5.12-mw0' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux

Pull RISC-V updates from Palmer Dabbelt:
 "A handful of new RISC-V related patches for this merge window:

   - A check to ensure drivers are properly using uaccess. This isn't
     manifesting with any of the drivers I'm currently using, but may
     catch errors in new drivers.

   - Some preliminary support for the FU740, along with the HiFive
     Unleashed it will appear on.

   - NUMA support for RISC-V, which involves making the arm64 code
     generic.

   - Support for kasan on the vmalloc region.

   - A handful of new drivers for the Kendryte K210, along with the DT
     plumbing required to boot on a handful of K210-based boards.

   - Support for allocating ASIDs.

   - Preliminary support for kernels larger than 128MiB.

   - Various other improvements to our KASAN support, including the
     utilization of huge pages when allocating the KASAN regions.

  We may have already found a bug with the KASAN_VMALLOC code, but it's
  passing my tests. There's a fix in the works, but that will probably
  miss the merge window.

* tag 'riscv-for-linus-5.12-mw0' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux: (75 commits)
  riscv: Improve kasan population by using hugepages when possible
  riscv: Improve kasan population function
  riscv: Use KASAN_SHADOW_INIT define for kasan memory initialization
  riscv: Improve kasan definitions
  riscv: Get rid of MAX_EARLY_MAPPING_SIZE
  soc: canaan: Sort the Makefile alphabetically
  riscv: Disable KSAN_SANITIZE for vDSO
  riscv: Remove unnecessary declaration
  riscv: Add Canaan Kendryte K210 SD card defconfig
  riscv: Update Canaan Kendryte K210 defconfig
  riscv: Add Kendryte KD233 board device tree
  riscv: Add SiPeed MAIXDUINO board device tree
  riscv: Add SiPeed MAIX GO board device tree
  riscv: Add SiPeed MAIX DOCK board device tree
  riscv: Add SiPeed MAIX BiT board device tree
  riscv: Update Canaan Kendryte K210 device tree
  dt-bindings: add resets property to dw-apb-timer
  dt-bindings: fix sifive gpio properties
  dt-bindings: update sifive uart compatible string
  dt-bindings: update sifive clint compatible string
  ...
2021-02-26 10:28:35 -08:00
Palmer Dabbelt e134d426e1
soc: canaan: Sort the Makefile alphabetically
The rest of these are alphabetically sorted, and leaving it this way
causes a merge conflict.

Reviewed-by: Damien Le Moal <damien.lemoal@wdc.com>
Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
2021-02-22 18:38:47 -08:00
Damien Le Moal c6ca7616f7
clk: Add RISC-V Canaan Kendryte K210 clock driver
Add a clock provider driver for the Canaan Kendryte K210 RISC-V SoC.
This new driver with the compatible string "canaan,k210-clk" implements
support for the full clock structure of the K210 SoC. Since it is
required for the correct operation of the SoC, this driver is
selected by default for compilation when the SOC_CANAAN option is
selected.

With this change, the k210-sysctl driver is turned into a simple
platform driver which enables its power bus clock and triggers
populating its child nodes. The sysctl driver retains the SOC early
initialization code, but the implementation now relies on the new
function k210_clk_early_init() provided by the new clk-k210 driver.

The clock structure implemented and many of the coding ideas for the
driver come from the work by Sean Anderson on the K210 support for the
U-Boot project.

Cc: Stephen Boyd <sboyd@kernel.org>
Cc: Michael Turquette <mturquette@baylibre.com>
Cc: linux-clk@vger.kernel.org
Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
2021-02-22 17:51:04 -08:00
Linus Torvalds 28b9aaac4c This is all driver updates, the majority of which is a bunch of new Qualcomm
clk drivers that dominate the diffstat because we add support for six SoCs from
 that particular vendor. The other big change is the removal of various clk
 drivers that are no longer used now that the kernel is dropping support for
 those SoCs. Beyond that there's the usual non-critical fixes for existing
 drivers and a good number of patches from Lee Jones that cleanup a bunch of W=1
 enabled builds.
 
 Removed Drivers:
  - Remove efm32 clk driver
  - Remove tango4 clk driver
  - Remove zte zx clk driver
  - Remove sirf prima2/atlast clk drivers
  - Remove u300 clk driver
 
 New Drivers:
  - PLL support on MStar/SigmaStar ARMv7 SoCs
  - CPU clks for Qualcomm SDX55
  - GCC and RPMh clks for Qualcomm SC8180x and SC7280 SoCs
  - GCC clks for Qualcomm SM8350
  - GPU clks for Qualcomm SDM660/SDM630
 
 Updates:
  - Video clk fixups on Qualcomm SM8250
  - Improvements for multimedia clks on Qualcomm MSM8998
  - Fix many warnings with W=1 enabled builds under drivers/clk/
  - Support crystal load capacitance for Versaclock VC5
  - Add a "skip recall" DT binding for Silicon Labs' si570 to avoid glitches at boot
  - Convert Xilinx VCU clk driver to a proper clk provider driver
  - Expose Xilinx ZynqMP clk driver to more platforms
  - Amlogic pll driver fixup
  - Amlogic meson8b clock controller dt support clean up
  - Remove mipi clk from the Amlogic axg clock controller
  - New Rockchip rk3368 clock ids related to camera input
  - Use pr_notice() instead of pr_warn() on i.MX6Q pre-boot ldb_di_clk reparenting
  - A series from Liu Ying that adds some SCU clocks support for i.MX8qxp
    DC0/MIPI-LVDS subsystems
  - A series from Lucas Stach that adds PLL monitor clocks for i.MX8MQ, and
    clkout1/2 support for i.MX8MM/MN
  - Add I2c and Ethernet (RAVB) clocks on Renesas R-Car V3U
  - Add timer (TMU) clocks on most Renesas R-Car Gen3 SoCs
  - Add video-related (FCPVD/VSPD/VSPX), watchdog (RWDT), serial
    (HSCIF), pincontrol/GPIO (PFC/GPIO), SPI (MSIOF), SDHI, and DMA
    (SYS-DMAC) clocks on Renesas R-Car V3U
  - Add support for the USB 2.0 clock selector on Renesas RZ/G2 SoCs
  - Allwinner H616 SoC clk support
 -----BEGIN PGP SIGNATURE-----
 
 iQJFBAABCAAvFiEE9L57QeeUxqYDyoaDrQKIl8bklSUFAmAwFu8RHHNib3lkQGtl
 cm5lbC5vcmcACgkQrQKIl8bklSXiWQ/+LbMeJF5zSvK240XcWomyS+kmImqKPT6e
 +l9Lt5xEPc+KzfMFHGAv+b6vMZCYevMIjBYCleiQ3oSh3sICFJmcCI8AkwQ62aQC
 32VL0z8U956SxmlCcgIgHK3yKUDSZcNC9FtfGRIRzR6srx+Eu/8TK007RpAYn2bQ
 PZYzOjiueSjOpjTRry2WGiCvpwRaJ7XrGj7P4rshO5eKpML1hYAv84vm12QrkoTR
 j7B73x1bOYf4NUBGGzYH5kw6tDO4mZvR+0TdyjI2Yg+SvHSdkpv9pxgRSAFus6rv
 sY/EjUCmCgp+y/MuMRvMA7vk6+THTqF9v4HqE0+izUI+dIoeDmsFVPr3UXGhqmtm
 wmdsMuG/cMhj1rIFz+1aNXQjdbitwmTCyqbiyt+6fOH3NkrP4vQACzQlxeBS2n6o
 E02lMwvMEoLcBMQyWLG+IWasIYWp7L2FlTOGOHxlAkZxJwNmynfaWYafoaIfOtBk
 qtk3ZjNFo3av94AWuKieeWdOj3CY3LGhQqwVuJudOzfvcBu3UybCfceHIwXuIWk1
 msUOh2RA7CTXn7XYPszwEbOlWugKvUc46rTfDBXsmgir7sIIgVXK65SO9xPWd7Bz
 b7MDtrQwSTNYecxjI6uUPRrzKM6xSnL8I69lxaUWT1ScXFcOjqOgc6iwSfLNj4lh
 FFCMY5koKMw=
 =dDCt
 -----END PGP SIGNATURE-----

Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
 "This is all driver updates, the majority of which is a bunch of new
  Qualcomm clk drivers that dominate the diffstat because we add support
  for six SoCs from that particular vendor.

  The other big change is the removal of various clk drivers that are no
  longer used now that the kernel is dropping support for those SoCs.

  Beyond that there's the usual non-critical fixes for existing drivers
  and a good number of patches from Lee Jones that cleanup a bunch of
  W=1 enabled builds.

  Removed Drivers:
   - Remove efm32 clk driver
   - Remove tango4 clk driver
   - Remove zte zx clk driver
   - Remove sirf prima2/atlast clk drivers
   - Remove u300 clk driver

  New Drivers:
   - PLL support on MStar/SigmaStar ARMv7 SoCs
   - CPU clks for Qualcomm SDX55
   - GCC and RPMh clks for Qualcomm SC8180x and SC7280 SoCs
   - GCC clks for Qualcomm SM8350
   - GPU clks for Qualcomm SDM660/SDM630

  Updates:
   - Video clk fixups on Qualcomm SM8250
   - Improvements for multimedia clks on Qualcomm MSM8998
   - Fix many warnings with W=1 enabled builds under drivers/clk/
   - Support crystal load capacitance for Versaclock VC5
   - Add a "skip recall" DT binding for Silicon Labs' si570 to avoid
     glitches at boot
   - Convert Xilinx VCU clk driver to a proper clk provider driver
   - Expose Xilinx ZynqMP clk driver to more platforms
   - Amlogic pll driver fixup
   - Amlogic meson8b clock controller dt support clean up
   - Remove mipi clk from the Amlogic axg clock controller
   - New Rockchip rk3368 clock ids related to camera input
   - Use pr_notice() instead of pr_warn() on i.MX6Q pre-boot ldb_di_clk
     reparenting
   - A series from Liu Ying that adds some SCU clocks support for
     i.MX8qxp DC0/MIPI-LVDS subsystems
   - A series from Lucas Stach that adds PLL monitor clocks for i.MX8MQ,
     and clkout1/2 support for i.MX8MM/MN
   - Add I2c and Ethernet (RAVB) clocks on Renesas R-Car V3U
   - Add timer (TMU) clocks on most Renesas R-Car Gen3 SoCs
   - Add video-related (FCPVD/VSPD/VSPX), watchdog (RWDT), serial
     (HSCIF), pincontrol/GPIO (PFC/GPIO), SPI (MSIOF), SDHI, and DMA
     (SYS-DMAC) clocks on Renesas R-Car V3U
   - Add support for the USB 2.0 clock selector on Renesas RZ/G2 SoCs
   - Allwinner H616 SoC clk support"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (171 commits)
  clk: mstar: msc313-mpll: Fix format specifier
  clk: mstar: Allow MStar clk drivers to be compile tested
  clk: qoriq: use macros to generate pll_mask
  clk: qcom: Add Global Clock controller (GCC) driver for SC7280
  dt-bindings: clock: Add SC7280 GCC clock binding
  clk: qcom: rpmh: Add support for RPMH clocks on SC7280
  dt-bindings: clock: Add RPMHCC bindings for SC7280
  clk: qcom: gcc-sm8350: add gdsc
  dt-bindings: clock: Add QCOM SDM630 and SDM660 graphics clock bindings
  clk: qcom: Add SDM660 GPU Clock Controller (GPUCC) driver
  clk: qcom: mmcc-msm8996: Migrate gfx3d clock to clk_rcg2_gfx3d
  clk: qcom: rcg2: Stop hardcoding gfx3d pingpong parent numbers
  dt-bindings: clock: Add support for the SDM630 and SDM660 mmcc
  clk: qcom: Add SDM660 Multimedia Clock Controller (MMCC) driver
  clk: qcom: gcc-sdm660: Mark GPU CFG AHB clock as critical
  clk: qcom: gcc-sdm660: Mark MMSS NoC CFG AHB clock as critical
  clk: qcom: gpucc-msm8998: Allow fabia gpupll0 rate setting
  clk: qcom: gpucc-msm8998: Add resets, cxc, fix flags on gpu_gx_gdsc
  clk: qcom: gdsc: Implement NO_RET_PERIPH flag
  clk: mstar: MStar/SigmaStar MPLL driver
  ...
2021-02-22 09:45:23 -08:00
Linus Torvalds d99676af54 drm pull for 5.12-rc1
docs:
 - lots of updated docs
 
 core:
 - require crtc to have unique primary plane
 - fourcc macro fix
 - PCI bar quirk for bar resizing
 - don't sent hotplug on error
 - move vm code to legacy
 - nuke hose only used on old oboslete alpha
 
 dma-buf:
 - kernel doc updates
 - improved lock tracking
 
 dp/hdmi:
 - DP-HDMI2.1 protocol converter support
 
 ttm:
 - bo size handling cleanup
 - release a pinned bo warning
 - cleanup lru handler
 - avoid using pages with drm_prime_sg_to_page_addr_arrays
 
 cma-helper:
 - prime/mmap fixes
 
 bridge:
 - add DP support
 
 gma500:
 - remove gma3600 support
 
 i915:
 - try eDP fast/narrow link again with fallback
 - Intel eDP backlight control
 - replace display register read/write macros
 - refactor intel_display.c
 - display power improvements
 - HPD code cleanup
 - Rocketlake display fixes
 - Power/backlight/RPM fixes
 - DG1 display fix
 - IVB/BYT clear residuals security fix again
 - make i915 mitigations options via parameter
 - HSW GT1 GPU hangs fixes
 - DG1 workaround hang fixes
 - TGL DMAR hang avoidance
 - Lots of GT fixes
 - follow on fixes for residuals clear
 - gen7 per-engine-reset support
 - HDCP2.2 + HDCP1.4 GEN12 DP MST support
 - TGL clear color support
 - backlight refactoring
 - VRR/Adaptive sync enabling on DP/EDP for TGL+
 - async flips for all ilk+
 
 amdgpu:
 - rework IH ring handling (Vega/Navi)
 - rework HDP handling (Vega/Navi)
 - swSMU updates for renoir/vangogh
 - Sienna Cichild overdrive support
 - FP16 on DCE8-11 support
 - GPU reset on navy flounder/vangogh
 - SMU profile fixes for APU
 - SR-IOV fixes
 - Vangogh SMU fixes
 - fan speed control fixes
 
 amdkfd:
 - config handling fix
 - buffer free fix
 - recursive lock warnings fix
 
 nouveau:
 - Turing MMU fault recovery fixes
 - mDP connectors reporting fix
 - audio locking fixes
 - rework engines/instances code to support new scheme
 
 tegra:
 - VIC newer firmware support
 - display/gr2d fixes for older tegra
 - pm reference leak fix
 
 mediatek:
 - SOC MT8183 support
 - decouple sub driver + share mtk mutex driver
 
 radeon:
 - PCI resource fix for some platforms
 
 ingenic:
 - pm support
 - 8-bit delta RGB panels
 
 vmwgfx:
 - managed driver helpers
 
 vc4:
 - BCM2711 DSI1 support
 - converted to atomic helpers
 - enable 10/12 bpc outputs
 - gem prime mmap helpers
 - CEC fix
 
 omap:
 - use degamma table
 - CTM support
 - rework DSI support
 
 imx:
 - stack usage fixes
 - drm managed support
 - imx-tve clock provider leak fix
 -
 
 rcar-du:
 - default mode fixes
 - conversion to managed API
 
 hisilicon:
 - use simple encoder
 
 vkms:
 - writeback connector support
 
 d3:
 - BT2020 support
 -----BEGIN PGP SIGNATURE-----
 
 iQIcBAABAgAGBQJgL1RCAAoJEAx081l5xIa+BxoP/325goULPaGBwUKgVkSl6mTT
 Ror0r8U3ifQHrqPk57C5b4GfvNuJ8vJZC13GYiiwooPn/+sifbl8haMRQWKyH4fz
 PThm9vroIQZ8VC+fqixgrOwFKEwkKqucZ3f7dEj8paBVVcO9DcBIaSeO4QW2EAR/
 n2r7nHtFxVHYEwiOnJvIeWIh1dAmudr/U6pHyB6PnuofVgqveXHT5+mmkY51pJqF
 sn2Y+Ye3tP5+FDlKkueg8JUteyFRTGz1g7JQThxSI//b/+p4MmmRX03qcWvIIkOX
 XiNlP73Ssh7PPMcUgwFmvKbMfm9sfpwf7yX3nqzaAQAHZGufznxX0k50BRkxWyYL
 eMVxRs5/Vl5JAn3vhspAUZhc4BgOcJm9L4zazb7YqDghwpohSnXk/riunUevqFCf
 Dgsc8N63nft8WEBk3aB6loRpDDpo5rm8gVpl5LKk1YXT92o9x4eP+/B1+kf2RepM
 52H3CKD1GLK3ayJlRNa/ljE2qXaQru+PmjCxORgDPEZ7SXdb8q5bfH0MjCB4vEBp
 YIybWYIDQzRBKglN5qMQ3XNIgv95oqrxXKaDFFtp8lMEjVG0v+y2antzFHftXS2g
 Cj0aeyBx4PC3pNbZe54npEhFwVIs7NFXX9brpQnnLJvQj/Qp+GEhf8uqiCUJNnYA
 AF7qRRL0bBGTeiJGt4nM
 =TeKl
 -----END PGP SIGNATURE-----

Merge tag 'drm-next-2021-02-19' of git://anongit.freedesktop.org/drm/drm

Pull drm updates from Dave Airlie:
 "A pretty normal tree, lots of refactoring across the board, ttm, i915,
  nouveau, and bunch of features in various drivers.

  docs:
   - lots of updated docs

  core:
   - require crtc to have unique primary plane
   - fourcc macro fix
   - PCI bar quirk for bar resizing
   - don't sent hotplug on error
   - move vm code to legacy
   - nuke hose only used on old oboslete alpha

  dma-buf:
   - kernel doc updates
   - improved lock tracking

  dp/hdmi:
   - DP-HDMI2.1 protocol converter support

  ttm:
   - bo size handling cleanup
   - release a pinned bo warning
   - cleanup lru handler
   - avoid using pages with drm_prime_sg_to_page_addr_arrays

  cma-helper:
   - prime/mmap fixes

  bridge:
   - add DP support

  gma500:
   - remove gma3600 support

  i915:
   - try eDP fast/narrow link again with fallback
   - Intel eDP backlight control
   - replace display register read/write macros
   - refactor intel_display.c
   - display power improvements
   - HPD code cleanup
   - Rocketlake display fixes
   - Power/backlight/RPM fixes
   - DG1 display fix
   - IVB/BYT clear residuals security fix again
   - make i915 mitigations options via parameter
   - HSW GT1 GPU hangs fixes
   - DG1 workaround hang fixes
   - TGL DMAR hang avoidance
   - Lots of GT fixes
   - follow on fixes for residuals clear
   - gen7 per-engine-reset support
   - HDCP2.2 + HDCP1.4 GEN12 DP MST support
   - TGL clear color support
   - backlight refactoring
   - VRR/Adaptive sync enabling on DP/EDP for TGL+
   - async flips for all ilk+

  amdgpu:
   - rework IH ring handling (Vega/Navi)
   - rework HDP handling (Vega/Navi)
   - swSMU updates for renoir/vangogh
   - Sienna Cichild overdrive support
   - FP16 on DCE8-11 support
   - GPU reset on navy flounder/vangogh
   - SMU profile fixes for APU
   - SR-IOV fixes
   - Vangogh SMU fixes
   - fan speed control fixes

  amdkfd:
   - config handling fix
   - buffer free fix
   - recursive lock warnings fix

  nouveau:
   - Turing MMU fault recovery fixes
   - mDP connectors reporting fix
   - audio locking fixes
   - rework engines/instances code to support new scheme

  tegra:
   - VIC newer firmware support
   - display/gr2d fixes for older tegra
   - pm reference leak fix

  mediatek:
   - SOC MT8183 support
   - decouple sub driver + share mtk mutex driver

  radeon:
   - PCI resource fix for some platforms

  ingenic:
   - pm support
   - 8-bit delta RGB panels

  vmwgfx:
   - managed driver helpers

  vc4:
   - BCM2711 DSI1 support
   - converted to atomic helpers
   - enable 10/12 bpc outputs
   - gem prime mmap helpers
   - CEC fix

  omap:
   - use degamma table
   - CTM support
   - rework DSI support

  imx:
   - stack usage fixes
   - drm managed support
   - imx-tve clock provider leak fix
-

  rcar-du:
   - default mode fixes
   - conversion to managed API

  hisilicon:
   - use simple encoder

  vkms:
   - writeback connector support

  d3:
   - BT2020 support"

* tag 'drm-next-2021-02-19' of git://anongit.freedesktop.org/drm/drm: (1459 commits)
  drm/amdgpu: Set reference clock to 100Mhz on Renoir (v2)
  drm/radeon: OLAND boards don't have VCE
  drm/amdkfd: Fix recursive lock warnings
  drm/amd/display: Add FPU wrappers to dcn21_validate_bandwidth()
  drm/amd/display: Fix potential integer overflow
  drm/amdgpu/display: remove hdcp_srm sysfs on device removal
  drm/amdgpu: fix CGTS_TCC_DISABLE register offset on gfx10.3
  drm/i915/gt: Correct surface base address for renderclear
  drm/i915: Disallow plane x+w>stride on ilk+ with X-tiling
  drm/nouveau/top/ga100: initial support
  drm/nouveau/top: add ioctrl/nvjpg
  drm/nouveau/privring: rename from ibus
  drm/nouveau/nvkm: remove nvkm_subdev.index
  drm/nouveau/nvkm: determine subdev id/order from layout
  drm/nouveau/vic: switch to instanced constructor
  drm/nouveau/sw: switch to instanced constructor
  drm/nouveau/sec2: switch to instanced constructor
  drm/nouveau/sec: switch to instanced constructor
  drm/nouveau/pm: switch to instanced constructor
  drm/nouveau/nvenc: switch to instanced constructor
  ...
2021-02-21 14:44:44 -08:00
Linus Torvalds e767b3530a ARM: SoC drivers for v5.12
Updates for SoC specific drivers include a few subsystems that
 have their own maintainers but send them through the soc tree:
 
 SCMI firmware:
  - add support for a completion interrupt
 
 Reset controllers:
  - new driver for BCM4908
  - new devm_reset_control_get_optional_exclusive_released()
    function
 
 Memory controllers:
  - Renesas RZ/G2 support
  - Tegra124 interconnect support
  - Allow more drivers to be loadable modules
 
 TEE/optee firmware:
  - minor code cleanup
 
 The other half of this is SoC specific drivers that do not
 belong into any other subsystem, most of them living in
 drivers/soc:
 
  - Allwinner/sunxi power management work
  - Allwinner H616 support
 
  - ASpeed AST2600 system identification support
 
  - AT91 SAMA7G5 SoC ID driver
  - AT91 SoC driver cleanups
 
  - Broadcom BCM4908 power management bus support
 
  - Marvell mbus cleanups
 
  - Mediatek MT8167 power domain support
 
  - Qualcomm socinfo driver support for PMIC
  - Qualcomm SoC identification for many more products
 
  - TI Keystone driver cleanups for PRUSS and elsewhere
 
 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmApjS8ACgkQYKtH/8kJ
 UidDyw/6ArE2RWN1qk3GJbQKdCYQdqH4Ig/Nc9LA977ul2BX/BohYoEGCoveH5cG
 16FaYK8tYDCSoTfS0+w1Y8r6TgZKcV6GCM0xLSVtaihk2CO81sUfDFBIppJd614a
 2lGx9DW7205ql4vGcQsK31ncr0hVviHG2e8lOEbFc9SkQpmYuLF1dxW2JK9oWGe2
 rLXHKb20N7AvgN8Y6V0YAOGNpu9MOnx0TbTGn6SMgzIKMkpYaSs/oZY11d9jrn7Y
 m/iIahRWzLFR/lYdrD7Jowpy2A/lcwPdQlRkOiuF1s6FFCqxe1yQsrpcbt/7fXes
 UzOyE494GZFtO0zjFuwglsmiAZDMwO/fQVrIzSGV0SXF8LJpiYYTG1b3Yv5SY5Hr
 r7EF4A7GlmNmd6K1HrXTYJz9tr4oxLDw+9LZGx74JV8x0iK3cd1hRTXb1SbspA6h
 S/KRQsuEjpAyQ6xXWVp2fp6VxZkrjIpPavbcQw2RsoBnbNdrcXahTk96JfpWYGjH
 iyJkEKmCF6/w/s5+xQfy+DYepxFDO0YsPbM7kL5qhaY83KBMOHKJFCUZVWj7md5w
 QIVTeeiSewIlT5bG9XyjIfmsImq1acqTW+QCaxCnvMSsZDBbdhTMK48GwyN9U9+x
 jdQCPQye3TKL2WU6U40FPNIr08QcNy4vmJp4fMqwK5xO3+P+Zhs=
 =I2Zn
 -----END PGP SIGNATURE-----

Merge tag 'arm-drivers-v5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC driver updates from Arnd Bergmann:
 "Updates for SoC specific drivers include a few subsystems that have
  their own maintainers but send them through the soc tree:

  SCMI firmware:
   - add support for a completion interrupt

  Reset controllers:
   - new driver for BCM4908
   - new devm_reset_control_get_optional_exclusive_released() function

  Memory controllers:
   - Renesas RZ/G2 support
   - Tegra124 interconnect support
   - Allow more drivers to be loadable modules

  TEE/optee firmware:
   - minor code cleanup

  The other half of this is SoC specific drivers that do not belong into
  any other subsystem, most of them living in drivers/soc:

   - Allwinner/sunxi power management work
   - Allwinner H616 support

   - ASpeed AST2600 system identification support

   - AT91 SAMA7G5 SoC ID driver
   - AT91 SoC driver cleanups

   - Broadcom BCM4908 power management bus support

   - Marvell mbus cleanups

   - Mediatek MT8167 power domain support

   - Qualcomm socinfo driver support for PMIC
   - Qualcomm SoC identification for many more products

   - TI Keystone driver cleanups for PRUSS and elsewhere"

* tag 'arm-drivers-v5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (89 commits)
  soc: aspeed: socinfo: Add new systems
  soc: aspeed: snoop: Add clock control logic
  memory: tegra186-emc: Replace DEFINE_SIMPLE_ATTRIBUTE with DEFINE_DEBUGFS_ATTRIBUTE
  memory: samsung: exynos5422-dmc: Correct function names in kerneldoc
  memory: ti-emif-pm: Drop of_match_ptr from of_device_id table
  optee: simplify i2c access
  drivers: soc: atmel: fix type for same7
  tee: optee: remove need_resched() before cond_resched()
  soc: qcom: ocmem: don't return NULL in of_get_ocmem
  optee: sync OP-TEE headers
  tee: optee: fix 'physical' typos
  drivers: optee: use flexible-array member instead of zero-length array
  tee: fix some comment typos in header files
  soc: ti: k3-ringacc: Use of_device_get_match_data()
  soc: ti: pruss: Refactor the CFG sub-module init
  soc: mediatek: pm-domains: Don't print an error if child domain is deferred
  soc: mediatek: pm-domains: Add domain regulator supply
  dt-bindings: power: Add domain regulator supply
  soc: mediatek: cmdq: Remove cmdq_pkt_flush()
  soc: mediatek: pm-domains: Add support for mt8167
  ...
2021-02-20 18:42:28 -08:00
Linus Torvalds 5011bb9fbb ARM: SoC changes for v5.12
This is mostly 32-bit code for SoC platforms, and looks smaller
 than any such branch I remember from previous kernels, as most
 of this is now handled in other subsystems for modern platforms:
 
 - Minor bugfixes and Kconfig updates for Tegra, Broadcom, i.MX,
   Renesas, and Samsung
 
 - Updates to the MAINTAINERS listing for Actions, OMAP, and Samsung
 
 - Samsung SoC driver updates to make them loadable modules
 
 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmApkHsACgkQYKtH/8kJ
 UidKTRAA4nFode+U/cvcfDoA4HoUseDTzEHL7WmEjnQk48lEbNI3B2rONFkzXtFC
 Wa8dvZw8EQ/bx/Sfe2WHUCVPEK6iVzb8AaaYPx06Xg6yFQjSEc4qdeeBtWFaRZoC
 tmGQWMNjB3IzxhrKGwCwhbuUuVdIWN7DlKcyx+5sMjg9oPO7Ptb557VtR5f1vjQC
 UR1KB1IBag2hNuE2BRPpmbOn/Jhq0ADQRrIm0sjvWN9CmArL7Og9WiuU0pwkmbqn
 AGnzsylJ8+kR70F4O+s20SOC+NkAK1uA80+QeNDX9IeCyI2mz5ubg1tkXLb9nIQQ
 qLYoMI7tUWTnROhcO10nSLz4wqcWWLKgf+6Wsod6lhUS8DNSYC5/bDf13UYHzGu0
 fQZZxp7hEabKcD/Ub8IpY4hUfeUfpWts/h0iUVkpQfCYAreRxUG8C7ZHjIWycdg9
 cOl6GyPLe397ONfX4XER0htICjUSrSCB09EpmoFfdBDBlbw/E1eZoKjTI0emEu2J
 bvA1x7orDdlCJcQn5dPpP1L2HTh1gLC8/LFFuAHtMozuxGqp7f5pHXn+6OhiHLcA
 l5+T/+53iVGxvfC4g3/Pk+SQAEjF0RpL/cA8EZ5kA0MmxuwQPt35yo2RobCTEfRi
 7yC0dD4HavvDK1gfAJ7Af7v4lBtX3MidvY5el+dNjuGKvBJTqGg=
 =2ehx
 -----END PGP SIGNATURE-----

Merge tag 'arm-soc-v5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC updates from Arnd Bergmann:
 "This is mostly 32-bit code for SoC platforms, and looks smaller than
  any such branch I remember from previous kernels, as most of this is
  now handled in other subsystems for modern platforms:

   - Minor bugfixes and Kconfig updates for Tegra, Broadcom, i.MX,
     Renesas, and Samsung

   - Updates to the MAINTAINERS listing for Actions, OMAP, and Samsung

   - Samsung SoC driver updates to make them loadable modules"

* tag 'arm-soc-v5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc:
  MAINTAINERS: arm: samsung: include S3C headers in platform entry
  MAINTAINERS: Add linux-actions ML for Actions Semi Arch
  ARM: s3c: irq-s3c24xx: staticize local functions
  ARM: s3c: irq-s3c24xx: include headers for missing declarations
  ARM: s3c: fix fiq for clang IAS
  ARM: imx: Remove unused IMX_GPIO_NR() macro
  soc: renesas: rcar-sysc: Mark device node OF_POPULATED after init
  ARM: OMAP2+: fix spellint typo
  MAINTAINERS: Update address for OMAP GPMC driver
  soc: renesas: rcar-sysc: Use readl_poll_timeout_atomic()
  ARM: bcm: Select BRCMSTB_L2_IRQ for bcm2835
  ARM: brcmstb: Add debug UART entry for 72116
  ARM: tegra: Don't enable unused PLLs on resume from suspend
  soc: samsung: pm_domains: Convert to regular platform driver
  soc: samsung: exynos-chipid: correct helpers __init annotation
  ARM: mach-imx: imx6ul: Print SOC revision on boot
  ARM: imx: mach-imx6ul: remove 14x14 EVK specific PHY fixup
  soc: samsung: exynos-chipid: convert to driver and merge exynos-asv
  soc: samsung: exynos-asv: handle reading revision register error
  soc: samsung: exynos-asv: don't defer early on not-supported SoCs
2021-02-20 18:20:06 -08:00
Linus Torvalds 584ce3c9b4 SoC platform removal
There are a lot of platforms that have not seen any interesting code
 changes in the past five years or more.
 
 I made a list and asked around which ones are no longer in use [1], and
 received confirmation about six ARM platforms and the TI C6x architecture
 that have all reached the end of their life upstream, with no known
 users remaining:
 
  - efm32 -- added in 2011, first Cortex-M, no notable changes after 2013
  - picoxcell -- added in 2011, abandoned after 2012 acquisition
  - prima2 -- added in 20111, no notable changes since 2015
  - tango -- added in 2015, sporadic changes until 2017, but abandoned
  - u300 -- added in 2009, no notable changes since 2013
  - zx --added in 2015 for both 32, 2017 for 64 bit, no notable changes
  - arch/c6x -- added in 2011, but work stalled soon after that
 
 A number of other platforms on the original list turned out to still
 have users. In some cases there are out-of-tree patches and users
 that plan to contribute them in the future, in other cases the code
 is complete and works reliably.
 
 [1] https://lore.kernel.org/lkml/CAK8P3a2DZ8xQp7R=H=wewHnT2=a_=M53QsZOueMVEf7tOZLKNg@mail.gmail.com/
 
 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmApiR8ACgkQYKtH/8kJ
 Uifl7A//RZVyxUSlbD/StS6oEOmkZH8j0L7yeYOKkSHGZI+6Dqxo6rooKymbeflk
 jJvDVQqLcrclT/7rWsKesdN8aW+ilfWrby5nDsWivsROrTw3DdvZgkjh7KYz7tA/
 OxygKQu4W9I+ywJltR4ykTUxXohjU+duHPuZJawQk64xE3Q0MWxJlQQ2kHJYVJRu
 /rWgNDQaI2d8HFhhEVsn4PC0RLWfUuBevKEuRYqZwM/oB/HuYjY+uTUGe2RhlgWb
 sbcoD93JP2MghSypq33/UtEl4Uk7Wpdv2bshTTv8DL5ToltY7wD8qIIh+aSJk9hP
 0FG3NTia7e9dqQQR2bskspGxP73iIuSN1exAbm/Ten5sysy6IsESmzqZRxXv+7Z1
 q1Oyc4wYaotJPAxMOE00RMLiRa5domI8V6Y10I5uyOcmpRvwWK2WfCOE7D3WSQ5M
 i1JiqLnC5JtJ0vyVBeRKo99zZImeXXrmS0n+fcARGtcKwAqKSvKxFcLTmkj3KqHv
 L4Xgy5f83QrMZWmldX7IiwWjTar2geBM7pFgG/z3R6JqkaxWiDHxyok6j1WUCE7b
 MViRZ8wT7JC5sIkHuwXZ4jvAXPqHq6J1rmJreU6N/jzmv/PTQoUnQ3C/MbDNhuv8
 NDVSRgrPcd/T0BrBkzIWk3t+Oh6ikDgflWsWkqIRFG0vCNx+KdM=
 =pf3b
 -----END PGP SIGNATURE-----

Merge tag 'arm-platform-removal-v5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC platform removals from Arnd Bergmann:
 "There are a lot of platforms that have not seen any interesting code
  changes in the past five years or more.

  I made a list and asked around which ones are no longer in use, and
  received confirmation about six ARM platforms and the TI C6x
  architecture that have all reached the end of their life upstream,
  with no known users remaining:

   - efm32 - added in 2011, first Cortex-M, no notable changes after 2013

   - picoxcell - added in 2011, abandoned after 2012 acquisition

   - prima2 - added in 20111, no notable changes since 2015

   - tango - added in 2015, sporadic changes until 2017, but abandoned

   - u300 - added in 2009, no notable changes since 2013

   - zx - added in 2015 for both 32, 2017 for 64 bit, no notable changes

   - arch/c6x - added in 2011, but work stalled soon after that

  A number of other platforms on the original list turned out to still
  have users. In some cases there are out-of-tree patches and users that
  plan to contribute them in the future, in other cases the code is
  complete and works reliably"

Link: https://lore.kernel.org/lkml/CAK8P3a2DZ8xQp7R=H=wewHnT2=a_=M53QsZOueMVEf7tOZLKNg@mail.gmail.com/

* tag 'arm-platform-removal-v5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc:
  ARM: remove u300 platform
  ARM: remove tango platform
  ARM: remove zte zx platform
  ARM: remove sirf prima2/atlas platforms
  c6x: remove architecture
  MAINTAINERS: Remove deleted platform efm32
  ARM: drop efm32 platform
  ARM: Remove PicoXcell platform support
  ARM: dts: Remove PicoXcell platforms
2021-02-20 18:16:30 -08:00
Tony Lindgren effe89e400 soc: ti: omap-prm: Fix occasional abort on reset deassert for dra7 iva
On reset deassert, we must wait a bit after the rstst bit change before
we allow clockdomain autoidle again. Otherwise we get the following oops
sometimes on dra7 with iva:

Unhandled fault: imprecise external abort (0x1406) at 0x00000000
44000000.ocp:L3 Standard Error: MASTER MPU TARGET IVA_CONFIG (Read Link):
At Address: 0x0005A410 : Data Access in User mode during Functional access
Internal error: : 1406 [#1] SMP ARM
...
(sysc_write_sysconfig) from [<c0782cb0>] (sysc_enable_module+0xcc/0x260)
(sysc_enable_module) from [<c0782f0c>] (sysc_runtime_resume+0xc8/0x174)
(sysc_runtime_resume) from [<c0a3e1ac>] (genpd_runtime_resume+0x94/0x224)
(genpd_runtime_resume) from [<c0a33f0c>] (__rpm_callback+0xd8/0x180)

It is unclear what all devices this might affect, but presumably other
devices with the rstst bit too can be affected. So let's just enable the
delay for all the devices with rstst bit for now. Later on we may want to
limit the list to the know affected devices if needed.

Fixes: d30cd83f68 ("soc: ti: omap-prm: add support for denying idle for reset clockdomain")
Reported-by: Yongqin Liu <yongqin.liu@linaro.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-02-18 14:07:29 +02:00
Tony Lindgren a249ca66d1 soc: ti: omap-prm: Fix reboot issue with invalid pcie reset map for dra7
Yongqin Liu <yongqin.liu@linaro.org> reported an issue where reboot hangs
on beagleboard-x15. This started happening after commit 7078a5ba7a
("soc: ti: omap-prm: Fix boot time errors for rst_map_012 bits 0 and 1").

We now assert any 012 type resets on init to prevent unconfigured
accelerator MMUs getting enabled on init depending on the bootloader or
kexec configured state.

Turns out that we now also wrongly assert dra7 l3init domain PCIe reset
bits causing a hang during reboot. Let's fix the l3init reset bits to
use a 01 map instead of 012 map. There are only two rstctrl bits and not
three. This is documented in TRM "Table 3-1647. RM_PCIESS_RSTCTRL".

Fixes: 5a68c87afd ("soc: ti: omap-prm: dra7: add genpd support for remaining PRM instances")
Fixes: 7078a5ba7a ("soc: ti: omap-prm: Fix boot time errors for rst_map_012 bits 0 and 1")
Cc: Kishon Vijay Abraham I <kishon@ti.com>
Reported-by: Yongqin Liu <yongqin.liu@linaro.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-02-15 06:40:32 +02:00
Arnd Bergmann 4f79a8b06f ASPEED soc driver updates for 5.12
- Clock control logic for LPC snoop driver
  - New system ids for AST2600 variants
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEE+nHMAt9PCBDH63wBa3ZZB4FHcJ4FAmAjy7UACgkQa3ZZB4FH
 cJ4/2g/+OxqvJsTbgVAhkuZfCOsB/xY/2tWMuxcmaylD7QJxpxGTC4/u3WYQZyXL
 vN3jTPETJ52GomVgBlKLG/AkHjXNJ82EwnwNBk48lGgOYIYFuI4JWJOLcKtsXkFj
 hq/iQoQqOhhanYsp3jav7fssFUOgg1IYpwNCBP31hpy3P8fAjWKtJBO/v7lI/aNX
 AivLWDAQzZy+bW2E9OouyD8WMLrEcQ7bAaWza1hCmk/pakILqvhxU9ukluDcuFGc
 JRHArIXmc3h1MzfXFPRj6kVII0E1c8YA+8e4eEyPJK2YnI28CQzBej6LhotwnqH9
 KfYPVCNqJSiQjzUhW3KcqJFwooCoRhhrPFmKoi1uHhoTbhKi3koboQwsdqjcReM8
 vQ3BQuGoJfR5bJiwDP3KIrRPBRpuzcL9dgOHwhhYTZEEdJO4rXNGXVO50JsgL5Re
 mzSGsyYvs2HS9KAjctRbBfLso7SGq8tuLckQ/J2t2xJukTnpMOv1ofg6BNDUvtzs
 EzIwVuy9LoofS6sdgKSNv795RRXUC4EmFu/zcGtZ98J5ZiUwEqpC06qdwBBPwIxv
 b93ZkmLusi8+UJ/Bp9cKVSkjjwWXq0VWKb7mYiqfGSCqXGuFOUXCYxltCn4CJcob
 +/FgGf2M3uW8XOU3jTLj6JWJV1Ovu2yzUxK2y7wd9G6YsOGN9Bg=
 =1Yka
 -----END PGP SIGNATURE-----

Merge tag 'aspeed-5.12-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/aspeed into arm/drivers

ASPEED soc driver updates for 5.12

 - Clock control logic for LPC snoop driver
 - New system ids for AST2600 variants

* tag 'aspeed-5.12-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/aspeed:
  soc: aspeed: socinfo: Add new systems
  soc: aspeed: snoop: Add clock control logic

Link: https://lore.kernel.org/r/CACPK8Xf+4VkWC6rkHhsWdwhaLjy2Az=GAHaEe=SvOiUc_OGKSQ@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-02-11 15:57:56 +01:00
David S. Miller dc9d87581d Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net 2021-02-10 13:30:12 -08:00
Joel Stanley d0e72be77e soc: aspeed: socinfo: Add new systems
Aspeed's u-boot sdk has been updated with the SoC IDs for the AST2605
variant, as well as A2 and A3 variants of the 2600 family.

>From u-boot's arch/arm/mach-aspeed/ast2600/scu_info.c:

    SOC_ID("AST2600-A0", 0x0500030305000303),
    SOC_ID("AST2600-A1", 0x0501030305010303),
    SOC_ID("AST2620-A1", 0x0501020305010203),
    SOC_ID("AST2600-A2", 0x0502030305010303),
    SOC_ID("AST2620-A2", 0x0502020305010203),
    SOC_ID("AST2605-A2", 0x0502010305010103),
    SOC_ID("AST2600-A3", 0x0503030305030303),
    SOC_ID("AST2620-A3", 0x0503020305030203),
    SOC_ID("AST2605-A3", 0x0503010305030103),

Fixes: e0218dca57 ("soc: aspeed: Add soc info driver")
Link: https://lore.kernel.org/r/20210210114651.334324-1-joel@jms.id.au
Signed-off-by: Joel Stanley <joel@jms.id.au>
2021-02-10 22:25:45 +10:30
Jae Hyun Yoo 3f94cf1558 soc: aspeed: snoop: Add clock control logic
If LPC SNOOP driver is registered ahead of lpc-ctrl module, LPC
SNOOP block will be enabled without heart beating of LCLK until
lpc-ctrl enables the LCLK. This issue causes improper handling on
host interrupts when the host sends interrupt in that time frame.
Then kernel eventually forcibly disables the interrupt with
dumping stack and printing a 'nobody cared this irq' message out.

To prevent this issue, all LPC sub-nodes should enable LCLK
individually so this patch adds clock control logic into the LPC
SNOOP driver.

Fixes: 3772e5da44 ("drivers/misc: Aspeed LPC snoop output using misc chardev")
Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@intel.com>
Signed-off-by: Vernon Mauery <vernon.mauery@linux.intel.com>
Signed-off-by: John Wang <wangzhiqiang.bj@bytedance.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20201208091748.1920-1-wangzhiqiang.bj@bytedance.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
2021-02-10 20:29:31 +10:30
Arnd Bergmann 168b322e36 i.MX drivers change for 5.12:
- Change soc-imx8m to use platform driver, so that defer probe can be
   used to resolve dependency on OCOTP clock.
 -----BEGIN PGP SIGNATURE-----
 
 iQFIBAABCgAyFiEEFmJXigPl4LoGSz08UFdYWoewfM4FAmAbi2AUHHNoYXduZ3Vv
 QGtlcm5lbC5vcmcACgkQUFdYWoewfM4ahggAngVquybPfRbER44ivcaV0WHDbCRF
 bw48jEGhfaud61K6pdmnl15IzsY/RPzxWHpZ3cP+JcGFr35j7mRozr3d5J6brFgX
 xDIeKoUjnNEMGZwju24RQi8X83YU4DKI0KaRUZMmIjFrpTOtm2Vlas3J8yM9fIPh
 wH2WpHs1hrzVEPkZzHfM+TmP6bAJXfZtsApV5YyD/aStRJtaQj0V5oEf0uS6yL+P
 CLH6nQRcot+H+BV72izbKEga8505H82rOuXnrekmkyXR8ipZTk9KlJKRxpfVVRXM
 P/uAPXv+35txx1zYBlNTicu2wSmtLv1ni3OtAOfzQssohxXXPb1cKX5UjQ==
 =Dmwh
 -----END PGP SIGNATURE-----

Merge tag 'imx-drivers-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/drivers

i.MX drivers change for 5.12:

- Change soc-imx8m to use platform driver, so that defer probe can be
  used to resolve dependency on OCOTP clock.

* tag 'imx-drivers-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  soc: imx8m: change to use platform driver

Link: https://lore.kernel.org/r/20210204120150.26186-1-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-02-10 00:17:48 +01:00
Arnd Bergmann ce8ccf21c0 Qualcomm driver updates for 5.12
The socinfo driver gains support for dumping information about the platform's
 PMICs, as well as new definitions for a number of platforms. The LLCC driver
 gains SM8250 support, AOSS QMP gains SM8350 support and the RPMPD driver gains
 support for MSM8994 power domains. In addition to this it contains a few minor
 fixes in the ocmem, rpmh and llcc drivers.
 -----BEGIN PGP SIGNATURE-----
 
 iQJPBAABCAA5FiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmAbg1wbHGJqb3JuLmFu
 ZGVyc3NvbkBsaW5hcm8ub3JnAAoJEAsfOT8Nma3FYYEP/R2zxLPj1ntJmyLV/MWX
 bioEGJWXKk60b2k5lAai2nwD/iswPqMyRtI3eXub7YVoYPRVMDHVl7nuGE83hHES
 r3OUCTisiM5VCOIYjzs9ZJJx4ceGzicsXoV2eEZUabQ4pg2/VHzdbh3DmH+Yh7hL
 PTgEiAYqQRSpRlFTf7ByccuqjAMyhs1GJ3Ajrl9dACsXIrT8ktPqk1UZ6JDl7w+3
 iox86p6EzpcnzgMY1APNgAoMDqHNOMbZky5zvgWEdMXGnpBZGjY8l1XXzIG9ZjE2
 o9u9DnxnCyBJoaxqbsBeHmFux2QCNTggQc4k5fd4BI0vFLR5X4sTyhcG2rEy12st
 LUaSKP9hb4M4JTkbMCvKAgae1FrMArLXAExhsoXopa2QwV0JwbtlE1onaOE4hsGT
 9YmBuJD6auegplIroGbOEihoNrOhPWEiNCX8N9I0daPewY/ulzxqn57Blq1RVXmV
 xs3ifBVyiFTbTD/cFvyDKnLDbgPuaT1bUReG6QHZYzOO/vzshe6JkduNY/RRgRd/
 l/ENBkZ70yQRvImIcbzRgmq767u7zGa7VWrwTmLOe8+5VxxosxZD1sYBioO9N2uL
 pZ5kfAeEAfhn70SX+12SMYIMKxNuvVSCesQNNoBHyMAQX6Y0pbuAyEEyrRdcgodO
 lT1qpN+V2lkjlmzWEiokI3V0
 =rWBX
 -----END PGP SIGNATURE-----

Merge tag 'qcom-drivers-for-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/drivers

Qualcomm driver updates for 5.12

The socinfo driver gains support for dumping information about the platform's
PMICs, as well as new definitions for a number of platforms. The LLCC driver
gains SM8250 support, AOSS QMP gains SM8350 support and the RPMPD driver gains
support for MSM8994 power domains. In addition to this it contains a few minor
fixes in the ocmem, rpmh and llcc drivers.

* tag 'qcom-drivers-for-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
  soc: qcom: ocmem: don't return NULL in of_get_ocmem
  soc: qcom: socinfo: Remove unwanted le32_to_cpu()
  soc: qcom: aoss: Add SM8350 compatible
  drivers: soc: qcom: rpmpd: Add msm8994 RPM Power Domains
  soc: qcom: socinfo: Fix an off by one in qcom_show_pmic_model()
  soc: qcom: socinfo: Fix off-by-one array index bounds check
  soc: qcom: socinfo: Add MDM9607 IDs
  soc: qcom: socinfo: Add SoC IDs for APQ/MSM8998
  soc: qcom: socinfo: Add SoC IDs for 630 family
  soc: qcom: socinfo: Open read access to all for debugfs
  soc: qcom: socinfo: add info from PMIC models array
  soc: qcom: socinfo: add several PMIC IDs
  soc: qcom: socinfo: add qrb5165 SoC ID
  soc: qcom: rpmh: Remove serialization of TCS commands
  soc: qcom: smem: use %*ph to print small buffer
  dt-bindings: soc: qcom: convert qcom,smem bindings to yaml
  drivers: qcom: rpmh-rsc: Do not read back the register write on trigger
  soc: qcom: llcc-qcom: Add support for SM8250 SoC
  soc: qcom: llcc-qcom: Extract major hardware version
  dt-bindings: msm: Add LLCC for SM8250

Link: https://lore.kernel.org/r/20210204052258.388890-1-bjorn.andersson@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-02-10 00:14:14 +01:00
Michael Tretter a2fe7baa27 clk: xilinx: move xlnx_vcu clock driver from soc
The xlnx_vcu driver is actually a clock controller driver which provides
clocks that can be used by a driver for the encoder/decoder units. There
is no reason to keep this driver in soc. Move the driver to clk.

NOTE: The register mapping actually contains registers for AXI
performance monitoring, but these are not used by the driver.

Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/20210121071659.1226489-16-m.tretter@pengutronix.de
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-02-08 18:31:25 -08:00
Michael Tretter cd0cefa9c9 soc: xilinx: vcu: fix alignment to open parenthesis
Fixes the following checkpatch check:

	CHECK: Alignment should match open parenthesis
	#610: FILE: drivers/soc/xilinx/xlnx_vcu.c:610:
	+       xvcu->vcu_slcr_ba = devm_ioremap(&pdev->dev, res->start,
	+                                                resource_size(res));

Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/20210121071659.1226489-15-m.tretter@pengutronix.de
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-02-08 18:31:25 -08:00
Michael Tretter e2fb5c3b23 soc: xilinx: vcu: fix repeated word the in comment
Fixes the following checkpatch warning:

	WARNING: Possible repeated word: 'the'
	#703: FILE: drivers/soc/xilinx/xlnx_vcu.c:703:
	+       /* Add the the Gasket isolation and put the VCU in reset. */

Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/20210121071659.1226489-14-m.tretter@pengutronix.de
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-02-08 18:31:25 -08:00
Michael Tretter bc27020270 soc: xilinx: vcu: use bitfields for register definition
This makes the register accesses more readable and is closer to what is
usually used in the kernel.

Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/20210121071659.1226489-13-m.tretter@pengutronix.de
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-02-08 18:31:25 -08:00
Michael Tretter 5a9b125817 soc: xilinx: vcu: remove calculation of PLL configuration
As the consumers are now responsible for setting the clock rate via
clock framework, the clock rate is now calculated using round_rate and
the driver does not need to calculate the clock rate beforehand.

Remove the code that calculates the PLL configuration.

Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/20210121071659.1226489-12-m.tretter@pengutronix.de
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-02-08 18:31:25 -08:00
Michael Tretter 58ee6baf39 soc: xilinx: vcu: make the PLL configurable
Do not configure the PLL when probing the driver, but register the clock
in the clock framework and do the configuration based on the respective
callbacks.

This is necessary to allow the consumers, i.e., encoder and decoder
drivers, of the xlnx_vcu clock provider to set the clock rate and
actually enable the clocks without relying on some pre-configuration.

Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/20210121071659.1226489-11-m.tretter@pengutronix.de
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-02-08 18:31:25 -08:00
Michael Tretter 4472e1849d soc: xilinx: vcu: make pll post divider explicit
According to the downstream driver documentation due to timing
constraints the output divider of the PLL has to be set to 1/2. Add a
helper function for that check instead of burying the code in one large
setup function.

The bit is undocumented and marked as reserved in the register
reference.

Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/20210121071659.1226489-10-m.tretter@pengutronix.de
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-02-08 18:31:25 -08:00
Michael Tretter 9c789deea2 soc: xilinx: vcu: implement clock provider for output clocks
The VCU System-Level Control uses an internal PLL to drive the core and
MCU clock for the allegro encoder and decoder based on an external PL
clock.

In order be able to ensure that the clocks are enabled and to get their
rate from other drivers, the module must implement a clock provider and
register the clocks at the common clock framework. Other drivers are
then able to access the clock via devicetree bindings.

Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/20210121071659.1226489-9-m.tretter@pengutronix.de
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-02-08 18:31:25 -08:00
Michael Tretter 5a2b2e1341 soc: xilinx: vcu: register PLL as fixed rate clock
Currently, xvcu_pll_set_rate configures the PLL to a clock rate that is
pre-calculated when probing the driver. To still make the clock
framework aware of the PLL and to allow to configure other clocks based
on the PLL rate, register the PLL as a fixed rate clock.

Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/20210121071659.1226489-8-m.tretter@pengutronix.de
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-02-08 18:31:25 -08:00
Michael Tretter f1bc982e7c soc: xilinx: vcu: implement PLL disable
The disabling of the PLL is not fully implemented, because according to
the ZynqMP register reference the RESET, POR_IN and PWR_POR bits have to
be set to bring the PLL into reset.

Set the bits to disable the PLL.

Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/20210121071659.1226489-7-m.tretter@pengutronix.de
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-02-08 18:31:25 -08:00
Michael Tretter 354dcf7b02 soc: xilinx: vcu: add helpers for configuring PLL
The xvcu_set_vcu_pll_info function sets the rate of the PLL and enables
it, which makes it difficult to cleanly convert the driver to the common
clock framework.

Split the function and add separate functions for setting the rate,
enabling the clock and disabling the clock.

Also move the enable of the reference clock from probe to the helper
that enables the PLL.

Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/20210121071659.1226489-6-m.tretter@pengutronix.de
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-02-08 18:31:24 -08:00
Michael Tretter a3ab984bb8 soc: xilinx: vcu: add helper to wait for PLL locked
Extract a helper function to wait until the PLL is locked. Also,
disabling the bypass was buried in the exit path on the wait loop.
Separate the different steps and add a helper function to make the code
more readable.

Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/20210121071659.1226489-5-m.tretter@pengutronix.de
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-02-08 18:31:24 -08:00
Michael Tretter d387dfc43c soc: xilinx: vcu: drop coreclk from struct xlnx_vcu
The coreclk field is newer read after being written to xlnx_vcu. Remove
the coreclk field from the xlnx_vcu and use a function local variable
instead.

Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/20210121071659.1226489-4-m.tretter@pengutronix.de
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-02-08 18:31:24 -08:00
Dave Airlie 54c820d05e Mediatek DRM Next for Linux 5.12
1. Decouple Mediatek DRM sub driver
 2. Share mtk mutex driver for both DRM and MDP
 3. Add support for SoC MT8183
 -----BEGIN PGP SIGNATURE-----
 
 iQJMBAABCgA2FiEEACwLKSDmq+9RDv5P4cpzo8lZTiQFAmAcDQgYHGNodW5rdWFu
 Zy5odUBrZXJuZWwub3JnAAoJEOHKc6PJWU4kE48P/jSb7PhZYvEiPdjsPHxIEHa7
 01Qc2gNDXkYkt+circ0NtDu3CH1DB5U2b5lITUy8McMM486N4vBNisPM3oId18ik
 lCinMehSGvlVxHmxOBEJAj6G/rLrw4lBflDHnV38WrzWgPU/DFXQQy0kjI92T5R5
 YswWYG2skAU5GX3r8i8p8PibwlA3aH9aVpgE/iDsCbpljmpJktqVYkfijAuK8phP
 WVxBHQaa7N6KNxQmaVZtylz2GhtSwhx4omV/TNbJYFniLqzpTnFfxmkp161V1dL7
 eUteuXwwmBpQAb/jYIilYEkLKBff6XTsl5wGzeIn2o/eAiD2jPUp6BOrxl87OXBM
 yd61mNP56aF1mgJ3bH6Qbs/qenSP5ptVKVSl983crzLCHpDOHX4ToG39TIGX6m9M
 o7vHYEZQznLKWcAJmV40oPDKuIaKbL9I0ZxTVSjK8Lw75kOfOssbztHQlJkMJHiG
 /2FF08Klk5oMP7SsUjVgasGqrVEamv1kkmtmK218tz2QJ6cksJsydvlwhxbIVvE6
 mgH2WSVI+CRKakB4+bhCg5v1zl7tM4s5aUtoqz2cHxlMABt0mtvunoB9wt4LIIks
 z6V7myU05q5nGhD1ClmKU5F1Fnw1J6IIECb1lmrJSCOrl0mAWqlezVDSTu8v+7Yi
 7rgviHqtdRoAdZSb1u6w
 =s8K8
 -----END PGP SIGNATURE-----

Merge tag 'mediatek-drm-next-5.12' of https://git.kernel.org/pub/scm/linux/kernel/git/chunkuang.hu/linux into drm-next

Mediatek DRM Next for Linux 5.12

1. Decouple Mediatek DRM sub driver
2. Share mtk mutex driver for both DRM and MDP
3. Add support for SoC MT8183

Signed-off-by: Dave Airlie <airlied@redhat.com>

From: Chun-Kuang Hu <chunkuang.hu@kernel.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20210204151750.7550-1-chunkuang.hu@kernel.org
2021-02-05 09:25:26 +10:00
Arnd Bergmann 7deff441f5 drivers: soc: atmel: fix type for same7
A missing comma caused a build failure:

drivers/soc/atmel/soc.c:196:24: error: too few arguments provided to function-like macro invocation

Fixes: af3a10513c ("drivers: soc: atmel: add per soc id and version match masks")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-02-04 21:54:31 +01:00
CK Hu e1e4f7fea3 soc / drm: mediatek: Move mtk mutex driver to soc folder
mtk mutex is used by DRM and MDP driver, and its function is SoC-specific,
so move it to soc folder.

Signed-off-by: CK Hu <ck.hu@mediatek.com>
Signed-off-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
Acked-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-02-04 22:55:46 +08:00
Linus Torvalds 54fe3ffef0 ARM: SoC fixes for v5.11, part 3
The code fixes in this round are all for the Texas Instruments OMAP
 platform, addressing several regressions related to the ti-sysc
 interconnect changes that was merged in linux-5.11 and one recently
 introduced RCU usage warning.
 
 Tero Kristo updates his maintainer file entries as he is changing
 to a new employer.
 
 The other changes are for devicetree files across eight different
 platforms:
 
 TI OMAP:
  - multiple gpio related one-line fixes
 
 Allwinner/sunxi:
  - ARM: dts: sun7i: a20: bananapro: Fix ethernet phy-mode
  - soc: sunxi: mbus: Remove DE2 display engine compatibles
 
 NXP lpc32xx:
  - ARM: dts: lpc32xx: Revert set default clock rate of HCLK PLL
 
 STMicroelectronics stm32
  - multiple minor fixes for DHCOM/DHCOR boards
 
 NXP Layerscape:
  - Fix DCFG address range on LS1046A SoC
 
 Amlogic meson:
  - fix reboot issue on odroid C4
  - revert an ethernet change that caused a regression
  - meson-g12: Set FL-adj property value
 
 Rockchip:
  - multiple minor fixes on 64-bit rockchip machines
 
 Qualcomm:
  - Regression fixes for Lenovo Yoga touchpad and for
    interconnect configuration
  - Boot fixes for 'LPASS' clock configuration on two machines
 
 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmAamF8ACgkQmmx57+YA
 GNmc+g//f7QiGC7f4Ora6StjJEzRoFHff5n6W5BlpyldHcEjo1exDr6V/e/ASaGL
 XAVqqjvd6lI6I788PZyEu+qJ9Ekm2mUDAtCKvrKA63yuPhm540eQLF8f1tX0vziu
 TpYJIYm/g+DtBVM0EvxyNx9fTDAmcnzq+fqnOjqIOufKOFJyr0L1eJDp1nvAaNUo
 a+jILSDa8/FMkd6/W6HSBWWRyGH/p3gme+Uaz5jOj4vHkwNRnuRwFb0q64KiHBBg
 10Aehujt70LD6pKo4W90yBYUEL6w+19mkV2s01jtZZUfZjIEyyX9V5lujfRC4v4G
 DyKO5nJSvlTqBOpbUcF8kbq9FRLbo977jc29aIig4mq5dhOIZ9Xj+XwfnPG4riQp
 fDsxeqGzP73jhI3fwadEnEep7JA5Hopwj0sSW07ZjE3oqKJruvMFs+d18SHeHyOe
 IhBlrwcWXdgA1+k+5MNaTgr91cK4LmUPC5D1ZqO2Hr7qqhIy4yzIWk3cwxCO80T5
 AQC02G2awIKglYqpj4reTR0EVPutvzKiblDKMtTf2WY7l6mQlr8eeQ9jXS+U5pID
 hZ/iWCrNzQWMGUsM1L5DvA/8h+H0AEF3DknnxKS0dh6W3oYuLGrEc1Khs6bQ0c/e
 pxgqGEpAxpbxyhsO0CJhIHEgZ4q4ZDzxJMA41ho7YJNFvVCsqPc=
 =dXiS
 -----END PGP SIGNATURE-----

Merge tag 'arm-soc-fixes-v5.11-3' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC fixes from Arnd Bergmann:
 "The code fixes in this round are all for the Texas Instruments OMAP
  platform, addressing several regressions related to the ti-sysc
  interconnect changes that was merged in linux-5.11 and one recently
  introduced RCU usage warning.

  Tero Kristo updates his maintainer file entries as he is changing to a
  new employer.

  The other changes are for devicetree files across eight different
  platforms:

  TI OMAP:
   - multiple gpio related one-line fixes

  Allwinner/sunxi:
   - ARM: dts: sun7i: a20: bananapro: Fix ethernet phy-mode
   - soc: sunxi: mbus: Remove DE2 display engine compatibles

  NXP lpc32xx:
   - ARM: dts: lpc32xx: Revert set default clock rate of HCLK PLL

  STMicroelectronics stm32
   - multiple minor fixes for DHCOM/DHCOR boards

  NXP Layerscape:
   - Fix DCFG address range on LS1046A SoC

  Amlogic meson:
   - fix reboot issue on odroid C4
   - revert an ethernet change that caused a regression
   - meson-g12: Set FL-adj property value

  Rockchip:
   - multiple minor fixes on 64-bit rockchip machines

  Qualcomm:
   - Regression fixes for Lenovo Yoga touchpad and for interconnect
     configuration
   - Boot fixes for 'LPASS' clock configuration on two machines"

* tag 'arm-soc-fixes-v5.11-3' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (31 commits)
  ARM: dts: lpc32xx: Revert set default clock rate of HCLK PLL
  ARM: dts: sun7i: a20: bananapro: Fix ethernet phy-mode
  arm64: dts: ls1046a: fix dcfg address range
  soc: sunxi: mbus: Remove DE2 display engine compatibles
  arm64: dts: meson: switch TFLASH_VDD_EN pin to open drain on Odroid-C4
  Revert "arm64: dts: amlogic: add missing ethernet reset ID"
  arm64: dts: rockchip: Disable display for NanoPi R2S
  ARM: dts: omap4-droid4: Fix lost keypad slide interrupts for droid4
  arm64: dts: rockchip: remove interrupt-names property from rk3399 vdec node
  drivers: bus: simple-pm-bus: Fix compatibility with simple-bus for auxdata
  ARM: OMAP2+: Fix booting for am335x after moving to simple-pm-bus
  ARM: OMAP2+: Fix suspcious RCU usage splats for omap_enter_idle_coupled
  ARM: dts: stm32: Fix GPIO hog flags on DHCOM DRC02
  ARM: dts: stm32: Fix GPIO hog flags on DHCOM PicoITX
  ARM: dts: stm32: Fix GPIO hog names on DHCOM
  ARM: dts: stm32: Disable optional TSC2004 on DRC02 board
  ARM: dts: stm32: Disable WP on DHCOM uSD slot
  ARM: dts: stm32: Connect card-detect signal on DHCOM
  ARM: dts: stm32: Fix polarity of the DH DRC02 uSD card detect
  arm64: dts: qcom: sdm845: Reserve LPASS clocks in gcc
  ...
2021-02-03 09:50:59 -08:00
Arnd Bergmann 459630a3eb One fix for a phy-mode ethernet issue, and one to fix the display output on
SoCs with the Display Engine 2
 -----BEGIN PGP SIGNATURE-----
 
 iHUEABYIAB0WIQRcEzekXsqa64kGDp7j7w1vZxhRxQUCYBp2xgAKCRDj7w1vZxhR
 xTzSAQD93OPoQ46cIrk3g2zSdCUKNiorllwwsCmJ64A5Y4RrqwEA46aerSUprOVS
 93zKBYrFnbqvQUWbaZgs8CYUFxD/GQU=
 =dvMb
 -----END PGP SIGNATURE-----

Merge tag 'sunxi-fixes-for-5.11-2' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into arm/fixes

One fix for a phy-mode ethernet issue, and one to fix the display output on
SoCs with the Display Engine 2

* tag 'sunxi-fixes-for-5.11-2' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
  ARM: dts: sun7i: a20: bananapro: Fix ethernet phy-mode
  soc: sunxi: mbus: Remove DE2 display engine compatibles

Link: https://lore.kernel.org/r/f8298059-f9ca-43b4-9e29-35bc0e0c9b15.lettre@localhost
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-02-03 11:24:01 +01:00
Jakub Kicinski d1e1355aef Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2021-02-02 14:21:31 -08:00
Arnd Bergmann d6d58c350f pm-domains:
- add support for MT8167
 - add support for regulator needed by a PM domain
 - make error message in deferred probe case better
 
 cmdq-helper:
 - remove arch specific flush function, use mailbox rx_callback instead
 -----BEGIN PGP SIGNATURE-----
 
 iQJLBAABCAA1FiEEUdvKHhzqrUYPB/u8L21+TfbCqH4FAmAXyLMXHG1hdHRoaWFz
 LmJnZ0BnbWFpbC5jb20ACgkQL21+TfbCqH685BAAstjxiMulWYTm1NlmPYvsCnXA
 vV0e8AzvuuD4SNlicBg++XvpWpLY4cbyrKSwAv0xzF+2gct/NenGpnwS2rNIiiLI
 vAi5s9bkBjqA1TYq5IbK2c9aEsfsl/AUXE3mREV6F/nupmbu8QQGBakH9HaBhCdY
 Cg5ExURFLIQqzREESKnvnPGbofwBvKJmEOm0ExiD9i3yI+e1vQXXFEjzoXBGOXYg
 f0dOukgjHaBnYr3U6K75tDtn7zl6+1QQaQpyLnSLdbT2EAJUdwsNdzAkDX1OCCMm
 99oWDPAfwMLsSqxV/06wpxQR3ZMd9NktMndotX1zd6ck27Yfoqgwb2kOws/DMTxU
 MDLHHcUWN/io21cREPGDwkLH7PEaoyG9Dn59ru3UEmJm1btO1gb7WBXimycwbebY
 3qNKcUvwwXHW5LNVddRXZnfIYMcinYWyklZcVfNEb4+Axp9j+1CVl2QqruaAT30S
 3UCbmNM1v/ALlfxDTlI8ZBa8W3cUAjHCaSepPtsqsmaXmNEmZ80k1DHM2fqjNKNB
 RqG47rBZgObVS+jzx/H28HjK3lFMBEP+UPVjxbb8BLfpJPHENa+BPTTMsw+SZktT
 8gSRu18PiQ6JQouR7T70GRu2F0goi065+S+ygiTLYDkPfd5xScSUJdjLGgkgdBpS
 GU8m3j4zUPaU4UQ0Bqk=
 =RaHQ
 -----END PGP SIGNATURE-----

Merge tag 'v5.11-next-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into arm/drivers

pm-domains:
- add support for MT8167
- add support for regulator needed by a PM domain
- make error message in deferred probe case better

cmdq-helper:
- remove arch specific flush function, use mailbox rx_callback instead

* tag 'v5.11-next-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux:
  soc: mediatek: pm-domains: Don't print an error if child domain is deferred
  soc: mediatek: pm-domains: Add domain regulator supply
  dt-bindings: power: Add domain regulator supply
  soc: mediatek: cmdq: Remove cmdq_pkt_flush()
  soc: mediatek: pm-domains: Add support for mt8167
  dt-bindings: power: Add MT8167 power domains

Link: https://lore.kernel.org/r/5faa52c2-0ddb-b809-7444-ce6f6ff6d8ad@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-02-02 22:53:58 +01:00
Luca Weiss 01f937ffc4 soc: qcom: ocmem: don't return NULL in of_get_ocmem
If ocmem probe fails for whatever reason, of_get_ocmem returned NULL.
Without this, users must check for both NULL and IS_ERR on the returned
pointer - which didn't happen in drivers/gpu/drm/msm/adreno/adreno_gpu.c
leading to a NULL pointer dereference.

Reviewed-by: Brian Masney <masneyb@onstation.org>
Fixes: 88c1e9404f ("soc: qcom: add OCMEM driver")
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Link: https://lore.kernel.org/r/20210130142349.53335-1-luca@z3ntu.xyz
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-02-02 15:39:13 -06:00
Arnd Bergmann b04c38b666 drivers: soc: Keystone update for v5.12
Updates include:
 	- Navigator refcount correction
 	- probe fix in pm driver
 	- fix clock init for PRUSS
 	- PRUSS binding doc update
 	- of_device_get_match_data() use in ringacc
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJgF4wmAAoJEHJsHOdBp5c/wpIP/R/1Rhro+9FXCF1i9RdjUebT
 uklxB/VDM/G4TKmyGKHvEyyroa1U/fL5wxKY67Ey3sGlOjWTe+DgoXHJ97Saw2ya
 5M/wWe453DwD3JVMrzKR7GnciEf8t/QqVdoOsSLDKVFteXLWqET1Jw4hEGJ+cc3y
 EfjTQ8q+CtdJ0eEpigsNaY146WZzHCugRGhwwQORy4XKNJbrzPneQ1/BAabyfcca
 h6bDZXl4Bf9Tej7tJWq083LwS+MEPaeq+8gbmquyrrFxaOXE7nOT5BZCuJbCweGs
 /e4TT8q3iLK0l+QjcxzR0QzHzr5sSAVW6UShFHIrr+EfBkfHnn2qKJBQQ7HGqkFG
 fYn1h1O2A/60Licgn9Km1/czCf6wSsKk+AjXeadRneIeZmAgi2ZPJvxLGM02ejHC
 KixsIQLsZEsxUV5FDcjMWcAmXewmd+QiJKeg6+DSj8JWGxwWunAaFfVqAGFZjQeb
 ChRwP/k/qmHlZZP/a8lnfmFykEKr5Mm28XNLRrXo/LNr/LA95fS7lb26AwMzpH/Z
 eD8elo73TZxR0LFx7eJ+VCzlh/Yt/WHbX6dqei5iBTXgW91yqjVvh1gqoen+3xlE
 iwFt+XBlc7wROpcHp7P8KdEScM4M4zDLiU9+sGN89PJnbm11Cps6aKZFAVHDtYf2
 IVbvsyaAo+N8WT7aEb6y
 =aMV2
 -----END PGP SIGNATURE-----

Merge tag 'drivers_soc_for_5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone into arm/drivers

drivers: soc: Keystone update for v5.12

Updates include:
	- Navigator refcount correction
	- probe fix in pm driver
	- fix clock init for PRUSS
	- PRUSS binding doc update
	- of_device_get_match_data() use in ringacc

* tag 'drivers_soc_for_5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone:
  soc: ti: k3-ringacc: Use of_device_get_match_data()
  soc: ti: pruss: Refactor the CFG sub-module init
  dt-bindings: soc: ti: Update TI PRUSS bindings about schemas to include
  soc: ti: pruss: Correct the pruss_clk_init error trace text
  soc: ti: pm33xx: Fix some resource leak in the error handling paths of the probe function
  soc: ti: knav_qmss: Put refcount for dev node in failure case

Link: https://lore.kernel.org/r/1612156854-10929-1-git-send-email-santosh.shilimkar@oracle.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-02-02 22:25:40 +01:00
Arnd Bergmann 60a64da9f0 This pull request contains Broadcom SoCs drivers changes for 5.12,
please pull the following:
 
 - Rafal adds support for the Power Management Bus (PMB) which is used in
   a variety of DSL/Cable modem/STB SoCs with a primary target being the
   4908 Wi-Fi SoC from the DSL organization. He also adds empty stubs to
   get the chip identification (family and revision) to permit the
   Broadcom STB USB PHY driver from being decoupled from ARCH_BRCMSTB
 
 - Florian removes an unused function and its header
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEm+Rq3+YGJdiR9yuFh9CWnEQHBwQFAmAXKTQACgkQh9CWnEQH
 BwSyvxAAsOVmytMHBHxe4i8Pad0Yv9sUsV0AvfvJmi0lhd0a1L7HLWBhoYq+fNFO
 R6ycuVjUb9RCA5O9nps6qnWbslEar3h5of/Ku4ovev3I5xQYiGFLOPe75ivoi+sl
 I4T9PwVuWV3WDjK8upA3naUwNzEv30Zw0uFULw5J0RFZAB3W3ObITO3mF8a3aOGc
 uVNWfD+Ro/2l1hrPfO74Qm0r36XQmvRNNOFH3gpKdBZAG2nHkQpfOsoNNUGjBjYm
 amFqm/zfc7Ydxg2WzQwUUaslyq+yIKtn919rFnudR48iHpzpotVuFKgGt3CppCl5
 oF4/1+C6bRzKErPYzn3B6JGFOYwSZwg9+TleDEv7eElIo04FBSOa6pNoHNDEfPXr
 LI9U7CL0/zf8vbkoK3txQg7fdcYvwED9/ip5u2IJ8KZvhoCu175FIZbrXIO+woPC
 gTk28bSBWH4mqGh7fPOmX3fBc2zow7xd/DlTnT1SNy6IVDZL9S82czAS/b2ImBzp
 sfK0fDFrO3cPfrE2/CrKwT/OiMOUsrc0Al7g0rmpPkFHgnrh/ZCV+zQT7RSEvL1P
 Gp3ZFkSjTbrXIZwkJ04i73sJUpC8F8F8XeoFItPs3VGXxJxsapB+b6TuW09qhkvU
 WJXD3gFUL34IXI6luB1ZWNG4/fJBHgWXIrKsBnf9kpZENfHEdKs=
 =43Gr
 -----END PGP SIGNATURE-----

Merge tag 'arm-soc/for-5.12/drivers' of https://github.com/Broadcom/stblinux into arm/drivers

This pull request contains Broadcom SoCs drivers changes for 5.12,
please pull the following:

- Rafal adds support for the Power Management Bus (PMB) which is used in
  a variety of DSL/Cable modem/STB SoCs with a primary target being the
  4908 Wi-Fi SoC from the DSL organization. He also adds empty stubs to
  get the chip identification (family and revision) to permit the
  Broadcom STB USB PHY driver from being decoupled from ARCH_BRCMSTB

- Florian removes an unused function and its header

* tag 'arm-soc/for-5.12/drivers' of https://github.com/Broadcom/stblinux:
  soc: bcm: brcmstb: Remove soc_is_brcmstb()
  soc: bcm: brcmstb: add stubs for getting platform IDs
  soc: bcm: add PM driver for Broadcom's PMB
  dt-bindings: power: document Broadcom's PMB binding

Link: https://lore.kernel.org/r/20210131221721.685974-5-f.fainelli@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-02-02 22:22:03 +01:00
Arnd Bergmann 4fe05d21a9 Some new drivers changes for the Allwinner SoCs, but mostly runtime_pm and
suspend / resume  support for our RSB bus, and support for the H616
 -----BEGIN PGP SIGNATURE-----
 
 iHUEABYIAB0WIQRcEzekXsqa64kGDp7j7w1vZxhRxQUCYBbvvwAKCRDj7w1vZxhR
 xR+qAP47qmg1qUkp4I91zWoK1h2iLme3zusGI/8hRp7la5ldxQD/dEShzw9OsTBh
 cuCmbtaPXCLJw/GRiRNnBdUv/+JQRww=
 =F2ck
 -----END PGP SIGNATURE-----

Merge tag 'sunxi-drivers-for-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into arm/drivers

Some new drivers changes for the Allwinner SoCs, but mostly runtime_pm and
suspend / resume  support for our RSB bus, and support for the H616

* tag 'sunxi-drivers-for-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
  dt-bindings: bus: rsb: Add H616 compatible string
  soc: sunxi: sram: Add support for more than one EMAC clock
  dt-bindings: sram: sunxi-sram: Add H616 compatible string
  mfd/bus: sunxi-rsb: Make .remove() callback return void
  bus: sunxi-rsb: Implement runtime power management
  bus: sunxi-rsb: Implement suspend/resume/shutdown callbacks
  bus: sunxi-rsb: Split out controller init/exit functions
  bus: sunxi-rsb: Move OF match table

Link: https://lore.kernel.org/r/91f2980f-266f-41f2-ba10-5a395625498c.lettre@localhost
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-02-02 22:18:43 +01:00
Suman Anna a8fc8e5b8e soc: ti: k3-ringacc: Use of_device_get_match_data()
Simplify the retrieval of getting the match data in the probe
function by directly using of_device_get_match_data() instead
of using of_match_node() and getting data.

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
2021-01-31 20:58:49 -08:00
Suman Anna ea797f6994 soc: ti: pruss: Refactor the CFG sub-module init
The CFG sub-module is not present on some earlier SoCs like the
DA850/OMAPL-138 in the TI Davinci family. Refactor out the CFG
sub-module parse and initialization logic into a separate function
to make it easier to add logic for the PRUSS IP on the above legacy
SoC families.

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
2021-01-31 20:53:43 -08:00
Enric Balletbo i Serra dd65030295 soc: mediatek: pm-domains: Don't print an error if child domain is deferred
Child domains can be deferred by the core because one of its resources
is not available yet, in such case, it will print an error, but
later it will succeed to probe. Fix that using the dev_err_probe()
function so it only prints an error on a real error.

Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Reviewed-by: Hsin-Yi Wang <hsinyi@chromium.org>
Link: https://lore.kernel.org/r/20210113213012.67643-1-enric.balletbo@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-01-31 15:59:16 +01:00
Hsin-Yi Wang 1b18c0558d soc: mediatek: pm-domains: Add domain regulator supply
Some power domains (eg. mfg) needs to turn on power supply before power
on.

Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Link: https://lore.kernel.org/r/20210129101208.2625249-3-hsinyi@chromium.org
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-01-31 15:47:49 +01:00
Chun-Kuang Hu 1570db1da9 soc: mediatek: cmdq: Remove cmdq_pkt_flush()
rx_callback is a standard mailbox callback mechanism and could
cover the function of proprietary cmdq_task_cb, so it is better
to use the standard one instead of the proprietary one. But
register rx_callback should before mbox_request_channel(),
so remove cmdq_pkt_flush() and let client driver implement
its own synchronous flush.

Signed-off-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
Link: https://lore.kernel.org/r/20201202235856.7652-1-chunkuang.hu@kernel.org
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-01-31 12:35:46 +01:00
Fabien Parent 207f13b419 soc: mediatek: pm-domains: Add support for mt8167
Add the needed board data to support mt8167 SoC.

Signed-off-by: Fabien Parent <fparent@baylibre.com>
Reviewed-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Link: https://lore.kernel.org/r/20201209133238.384030-2-fparent@baylibre.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-01-31 11:19:30 +01:00
Linus Torvalds 03e319e546 OpenRISC fixes for 5.11-rc6
Fixes include:
  * Fix config dependencies for Litex SOC driver causing issues on um
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEE2cRzVK74bBA6Je/xw7McLV5mJ+QFAmAV4HkACgkQw7McLV5m
 J+R5+w/+Ny+k38woPofd7BEF6zjT0dC/f/iBRe8nfSFN8DXnJ9XkDVT3F435sV+V
 fz97eOkRzyNIQQ63gPEDRKGEFhAn+9oiqPjAYmK/VHkb9ZElrQhzhQsCQvP7ikqf
 9Hs8x3BkfbQd5TBrj7g8eAA8WEMgbp0eXXAFRVQO6vz3SUWgaQ9qEQf+S32azw3I
 WAABZ0Ex7IdSUtuV/oXYz/CUFcuQjwc8VA7bxFYOoYV9r3l8IiiYPMU5+4io68sI
 P1GCru9upllBPtJOweccmLzQs1Ice5vZ4T8Ee+wbXycjPTHp5G986PXQdWvundv7
 UjzeUQgIoAtkVkJ+lDY4FJ1u2qsJkg1OZD5+GVjsZL87dWVXGSb+4w80n0lPKCyl
 7DJ72AuVbnqdYml+BztAEg814j/SVsrKufiVlbscfLKLXUF5W05e4hPTu3/pokLe
 g1+WZBxet9nNme+CJFlPKG/tWL1UV/e5e+q+uMYKk2K5bRzkyO4UA9qMX4NySSa8
 VNn/oYaDdNDiRiFWij/hZ7SRfuRw8Oc4fq9911hRaORm0lViRtcRrB4lKMVkzBVE
 40ej/QxLzJoyQasT7IOpez35oKhUOWMiG/39cijLKQYVVCLEPWtzJt1HbbIt1F/X
 D9bF/Qs2Sc4romGvZDVGESa7U5SjAEMQGE+hkRaNdtagXoHTSRA=
 =9jxm
 -----END PGP SIGNATURE-----

Merge tag 'for-linus' of git://github.com/openrisc/linux

Pull OpenRISC fix from Stafford Horne:
 "Fix config dependencies for Litex SOC driver causing issues on um"

* tag 'for-linus' of git://github.com/openrisc/linux:
  soc: litex: Properly depend on HAS_IOMEM
2021-01-30 16:39:36 -08:00