Commit Graph

32 Commits

Author SHA1 Message Date
Jason Kridner f165988b77 pinctrl: mcp23s08: spi: Fix regmap allocation for mcp23s18
Fixes issue created by 9b3e420766.

It wasn't possible for one_regmap_config to be non-NULL at the point
it was tested for mcp23s18 devices.

Applied the same pattern of allocating one_regmap_config using
devm_kmemdump() and then initializing the local regmap structure
from that.

Signed-off-by: Jason Kridner <jdk@ti.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-01-21 14:18:15 +01:00
Linus Torvalds b0b6a28bc4 This is the bulk of pin control changes for the v4.20 series:
There were no significant changes to the core this time!
 
 New drivers:
 
 - Broadcom Northstar pin control driver.
 
 - Mediatek MT8183 subdriver.
 
 - Mediatek MT7623 subdriver.
 
 - Mediatek MT6765 subdriver.
 
 - Meson g12a subdriver.
 
 - Nuvoton NPCM7xx pin control and GPIO driver.
 
 - Qualcomm QCS404 pin control and GPIO subdriver.
 
 - Qualcomm SDM660 pin control and GPIO subdriver.
 
 - Renesas R8A7744 PFC subdriver.
 
 - Renesas R8A774C0 PFC subdriver.
 
 - Renesas RZ/N1 pinctrl driver
 
 Major improvements:
 
 - Pulled the GPIO support for Ingenic over from the GPIO
   subsystem and consolidated it all in the Ingenic pin control
   driver.
 
 - Major cleanups and consolidation work in all Intel drivers.
 
 - Major cleanups and consolidation work in all Mediatek drivers.
 
 - Lots of incremental improvements to the Renesas PFC pin
   controller family.
 
 - All drivers doing GPIO now include <linux/gpio/driver.h> and
   nothing else.
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Merge tag 'pinctrl-v4.20-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull pin control updates from Linus Walleij:
 "This is the bulk of pin control changes for the v4.20 series:

  There were no significant changes to the core this time! Bur the new
  Qualcomm, Mediatek and Broadcom drivers are quite interesting as they
  will be used in a few million embedded devices the coming years as it
  seems.

  New drivers:

   - Broadcom Northstar pin control driver.

   - Mediatek MT8183 subdriver.

   - Mediatek MT7623 subdriver.

   - Mediatek MT6765 subdriver.

   - Meson g12a subdriver.

   - Nuvoton NPCM7xx pin control and GPIO driver.

   - Qualcomm QCS404 pin control and GPIO subdriver.

   - Qualcomm SDM660 pin control and GPIO subdriver.

   - Renesas R8A7744 PFC subdriver.

   - Renesas R8A774C0 PFC subdriver.

   - Renesas RZ/N1 pinctrl driver

  Major improvements:

   - Pulled the GPIO support for Ingenic over from the GPIO subsystem
     and consolidated it all in the Ingenic pin control driver.

   - Major cleanups and consolidation work in all Intel drivers.

   - Major cleanups and consolidation work in all Mediatek drivers.

   - Lots of incremental improvements to the Renesas PFC pin controller
     family.

   - All drivers doing GPIO now include <linux/gpio/driver.h> and
     nothing else"

* tag 'pinctrl-v4.20-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (153 commits)
  pinctrl: sunxi: Fix a memory leak in 'sunxi_pinctrl_build_state()'
  gpio: uniphier: include <linux/bits.h> instead of <linux/bitops.h>
  pinctrl: uniphier: include <linux/bits.h> instead of <linux/bitops.h>
  dt-bindings: pinctrl: bcm4708-pinmux: improve example binding
  pinctrl: geminilake: Sort register offsets by value
  pinctrl: geminilake: Get rid of unneeded ->probe() stub
  pinctrl: geminilake: Update pin list for B0 stepping
  pinctrl: renesas: Fix platform_no_drv_owner.cocci warnings
  pinctrl: mediatek: Make eint_m u16
  pinctrl: bcm: ns: Use uintptr_t for casting data
  pinctrl: madera: Fix uninitialized variable bug in madera_mux_set_mux
  pinctrl: gemini: Fix up TVC clock group
  pinctrl: gemini: Drop noisy debug prints
  pinctrl: gemini: Mask and set properly
  pinctrl: mediatek: select GPIOLIB
  pinctrl: rza1: don't manually release devm managed resources
  MAINTAINERS: update entry for Mediatek pin controller
  pinctrl: bcm: add Northstar driver
  dt-bindings: pinctrl: document Broadcom Northstar pin mux controller
  pinctrl: qcom: fix 'const' pointer handling
  ...
2018-10-23 08:40:16 +01:00
Marco Felsch f259f896f2 pinctrl: mcp23s08: fix irq and irqchip setup order
Since 'commit 02e389e63e ("pinctrl: mcp23s08: fix irq setup order")' the
irq request isn't the last devm_* allocation. Without a deeper look at
the irq and testing this isn't a good solution. Since this driver relies
on the devm mechanism, requesting a interrupt should be the last thing
to avoid memory corruptions during unbinding.

'Commit 02e389e63e ("pinctrl: mcp23s08: fix irq setup order")' fixed the
order for the interrupt-controller use case only. The
mcp23s08_irq_setup() must be split into two to fix it for the
interrupt-controller use case and to register the irq at last. So the
irq will be freed first during unbind.

Cc: stable@vger.kernel.org
Cc: Jan Kundrát <jan.kundrat@cesnet.cz>
Cc: Dmitry Mastykin <mastichi@gmail.com>
Cc: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
Fixes: 82039d244f ("pinctrl: mcp23s08: add pinconf support")
Fixes: 02e389e63e ("pinctrl: mcp23s08: fix irq setup order")
Signed-off-by: Marco Felsch <m.felsch@pengutronix.de>
Tested-by: Phil Reid <preid@electromag.com.au>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-10-10 14:36:35 +02:00
Linus Walleij 1c5fb66afa pinctrl: Include <linux/gpio/driver.h> nothing else
These drivers are GPIO drivers, and the do not need to use the
legacy header in <linux/gpio.h>, go directly for
<linux/gpio/driver.h> instead.

Replace any use of GPIOF_* with 0/1, these flags are for
consumers, not drivers.

Get rid of a few gpio_to_irq() users that was littering
around the place, use local callbacks or avoid using it at
all.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-09-14 15:10:57 +02:00
Jan Kundrát 7547b5969e pinctrl: mcp23s08: debugfs: Do not restore the INTF register
Apart from the usual stuff, the debugfs code is currently also used for
one non-obvious side effect. It attempts to check whether the chip's
registers are still set to an expected value, and if not, re-initializes
them. It seems that the driver has "always" done so.

The code, however, also checks the INTF register which normally
indicates which pins have caused the recent interrupt. That's a volatile
register, and the datasheet says that writes are ignored in there.

When I'm just cat-ing /sys/kernel/debug/gpio with no SPI traffic and no
nosie on the GPIO lines, I'm not getting any warnings. Once I actually
use these GPIOs and cat that file in parallel, I always seem to get a:

  mcp23s08 spi1.1: restoring reg 0x07 from 0x0000 to 0xffff (power-loss?)

This might be a sign that I should not leave my unused inputs floating,
but the code should not be checking a volatile register, anyway. Let's
simply skip this last item in the iteration. I was also considering
removing this enitre re-initialization because it's non-obvious, but the
code survived various refactorings already and has sign-offs by people
who know more than I do, so let's leave it as-is. For now :).

Signed-off-by: Jan Kundrát <jan.kundrat@cesnet.cz>
Reviewed-by: Phil Reid <preid@electromag.com.au>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-06-18 07:56:05 +02:00
Phil Reid fa2b7fae84 pinctrl: mcp23s08: add open drain configuration for irq output
The mcp23s08 series device can be configured for wired and interrupts
using an external pull-up and open drain output via the IOCON_ODR bit.
And "drive-open-drain" property to enable this.

Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
Signed-off-by: Phil Reid <preid@electromag.com.au>
Reviewed-by: Jan Kundrát <jan.kundrat@cesnet.cz>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-02-22 16:08:59 +01:00
Phil Reid d9f50048dc pinctrl: mcp23s08: fix probing of mcp23s18
one_regmap_config is always null if mcp type is MCP_TYPE_S18.
Remove the null check so that the mcp23s18 will probe.

Fixes: 1781af563a ("pinctrl: mcp23s08: spi: Fix duplicate pinctrl debugfs entries")
Signed-off-by: Phil Reid <preid@electromag.com.au>
Reviewed-by: Jan Kundrát <jan.kundrat@cesnet.cz>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-02-22 16:04:26 +01:00
Jan Kundrát 1781af563a pinctrl: mcp23s08: spi: Fix duplicate pinctrl debugfs entries
This is a bit more involved because the pinctrl core so far always
assumed that one device (with a unique dev_name) only contains a single
pinctrl thing. This is not true for the mcp23s08 driver for chips
connected over SPI. They have a "logical address" which means that
several chips can share one physical CS signal.

A downside of this patch are some possibly ugly names for the debugfs
entries, such as "spi1.1-mcp23xxx-pinctrl.2", etc.

Signed-off-by: Jan Kundrát <jan.kundrat@cesnet.cz>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-02-12 10:47:24 +01:00
Jan Kundrát ed23175141 pinctrl: mcp23s08: spi: Add HW address to gpio_chip.label
When several devices are sharing one hardware SPI CS, there is no visual
clue in `lsgpio` or in /sys/kernel/debug/gpio about which one is which
one. Stuff depends on the enumeration order, and therefore lower chip
addresses always go first, but that's just an implementation detail.
This change includes the device-specific address in the debug output:

  gpiochip4: GPIOs 464-479, parent: spi/spi1.1, mcp23s17.2, can sleep:
  gpiochip3: GPIOs 480-495, parent: spi/spi1.1, mcp23s17.1, can sleep:

Signed-off-by: Jan Kundrát <jan.kundrat@cesnet.cz>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-02-12 10:47:24 +01:00
Jan Kundrát 9b3e420766 pinctrl: mcp23s08: spi: Fix regmap debugfs entries
The SPI version of this chip allows several devices to be present on the
same SPI bus via a local address. If this is in action and if the kernel
has debugfs, however, the code attempts to create duplicate entries for
the regmap's debugfs:

  mcp23s08 spi1.1: Failed to create debugfs directory

This patch simply assigns a local name matching the device logical
address to the `struct regmap_config`.

No changes are needed for MCP23S18 because that device does not support
any logical addressing. Similarly, I2C devices do not need any action,
either, because they are already different in their I2C address.

A similar problem is present for the pinctrl debugfs instance, but that
one is not addressed by this patch.

Signed-off-by: Jan Kundrát <jan.kundrat@cesnet.cz>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-02-12 10:47:23 +01:00
Dmitry Mastykin 02e389e63e pinctrl: mcp23s08: fix irq setup order
When using mcp23s08 module with gpio-keys, often (50% of boots)
it fails to get irq numbers with message:
"gpio-keys keys: Unable to get irq number for GPIO 0, error -6".
Seems that irqs must be setup before devm_gpiochip_add_data().

Cc: stable@vger.kernel.org
Signed-off-by: Dmitry Mastykin <mastichi@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-01-30 15:17:14 +01:00
Markus Elfring 7c3012c855 pinctrl: mcp23s08: Combine two function calls into one in mcp23s08_dbg_show()
* Print a line break together with other data in a single function call.

* Adjust indentation.

Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-01-09 15:10:02 +01:00
Markus Elfring 7f6f50dfb5 pinctrl: mcp23s08: Improve unlocking of a mutex in mcp23s08_irq()
* Add a jump target so that a call of the function "mutex_unlock" is stored
  only twice in this function implementation.

* Replace five calls by goto statements.

* Adjust five condition checks.

This issue was detected by using the Coccinelle software.

Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-11-29 13:51:10 +01:00
Linus Torvalds b630a23a73 This is the bulk of pin control changes for the v4.15
kernel cycle:
 
 Core:
 
 - The pin control Kconfig entry PINCTRL is now turned into
   a menuconfig option. This obviously has the implication of
   making the subsystem menu visible in menuconfig. This is
   happening because of two things:
 
   - Intel have started to deploy and depend on pin controllers
     in a way that is affecting users directly. This happens
     on the highly integrated laptop chipsets named after
     geographical places: baytrail, broxton, cannonlake,
     cedarfork, cherryview, denverton, geminilake, lewisburg,
     merrifield, sunrisepoint... It started a while back and
     now it is ever more evident that this is crucial
     infrastructure for x86 laptops and not an embedded
     obscurity anymore. Users need to be aware.
 
   - Pin control expanders on I2C and SPI that are
     arch-agnostic. Currently Semtech SX150X and Microchip
     MCP28x08 but more are expected. Users will have to be
     able to configure these in directly for their set-up.
 
 - Just go and select GPIOLIB now that we made sure that
   GPIOLIB is a very vanilla subsystem. Do not depend on
   it, if we need it, select it.
 
 - Exposing the pin control subsystem in menuconfig uncovered
   a bunch of obscure bugs that are now hopefully fixed,
   all more or less pertaining to Blackfin.
 
 - Unified namespace for cross-calls between pin control and
   GPIO.
 
 - New support for clock skew/delay generic DT bindings
   and generic pin config options for this.
 
 - Minor documentation improvements.
 
 Various:
 
 - The Renesas SH-PFC pin controller has evolved a lot. It seems
   Renesas are churning out new SoCs by the minute.
 
 - A bunch of non-critical fixes for the Rockchip driver.
 
 - Improve the use of library functions instead of open coding.
 
 - Support the MCP28018 variant in the MCP28x08 driver.
 
 - Static constifying.
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Merge tag 'pinctrl-v4.15-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull pin control updates from Linus Walleij:
 "This is the bulk of pin control changes for the v4.15 kernel cycle:

  Core:

   - The pin control Kconfig entry PINCTRL is now turned into a
     menuconfig option. This obviously has the implication of making the
     subsystem menu visible in menuconfig. This is happening because of
     two things:

      (a) Intel have started to deploy and depend on pin controllers in
          a way that is affecting users directly. This happens on the
          highly integrated laptop chipsets named after geographical
          places: baytrail, broxton, cannonlake, cedarfork, cherryview,
          denverton, geminilake, lewisburg, merrifield, sunrisepoint...
          It started a while back and now it is ever more evident that
          this is crucial infrastructure for x86 laptops and not an
          embedded obscurity anymore. Users need to be aware.

      (b) Pin control expanders on I2C and SPI that are arch-agnostic.
          Currently Semtech SX150X and Microchip MCP28x08 but more are
          expected. Users will have to be able to configure these in
          directly for their set-up.

   - Just go and select GPIOLIB now that we made sure that GPIOLIB is a
     very vanilla subsystem. Do not depend on it, if we need it, select
     it.

   - Exposing the pin control subsystem in menuconfig uncovered a bunch
     of obscure bugs that are now hopefully fixed, all more or less
     pertaining to Blackfin.

   - Unified namespace for cross-calls between pin control and GPIO.

   - New support for clock skew/delay generic DT bindings and generic
     pin config options for this.

   - Minor documentation improvements.

  Various:

   - The Renesas SH-PFC pin controller has evolved a lot. It seems
     Renesas are churning out new SoCs by the minute.

   - A bunch of non-critical fixes for the Rockchip driver.

   - Improve the use of library functions instead of open coding.

   - Support the MCP28018 variant in the MCP28x08 driver.

   - Static constifying"

* tag 'pinctrl-v4.15-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (91 commits)
  pinctrl: gemini: Fix missing pad descriptions
  pinctrl: Add some depends on HAS_IOMEM
  pinctrl: samsung/s3c24xx: add CONFIG_OF dependency
  pinctrl: gemini: Fix GMAC groups
  pinctrl: qcom: spmi-gpio: Add pmi8994 gpio support
  pinctrl: ti-iodelay: remove redundant unused variable dev
  pinctrl: max77620: Use common error handling code in max77620_pinconf_set()
  pinctrl: gemini: Implement clock skew/delay config
  pinctrl: gemini: Use generic DT parser
  pinctrl: Add skew-delay pin config and bindings
  pinctrl: armada-37xx: Add edge both type gpio irq support
  pinctrl: uniphier: remove eMMC hardware reset pin-mux
  pinctrl: rockchip: Add iomux-route switching support for rk3288
  pinctrl: intel: Add Intel Cedar Fork PCH pin controller support
  pinctrl: intel: Make offset to interrupt status register configurable
  pinctrl: sunxi: Enforce the strict mode by default
  pinctrl: sunxi: Disable strict mode for old pinctrl drivers
  pinctrl: sunxi: Introduce the strict flag
  pinctrl: sh-pfc: Save/restore registers for PSCI system suspend
  pinctrl: sh-pfc: r8a7796: Use generic IOCTRL register description
  ...
2017-11-16 10:57:11 -08:00
Linus Torvalds 6aa2f9441f This is the bulk of GPIO changes for the v4.15 kernel cycle:
CORE:
 - Fix the semantics of raw GPIO to actually be raw. No
   inversion semantics as before, but also no open draining,
   and allow the raw operations to affect lines used for
   interrupts as the caller supposedly knows what they are
   doing if they are getting the big hammer.
 
 - Rewrote the __inner_function() notation calls to names that
   make more sense. I just find this kind of code disturbing.
 
 - Drop the .irq_base() field from the gpiochip since now all
   IRQs are mapped dynamically. This is nice.
 
 - Support for .get_multiple() in the core driver API. This
   allows us to read several GPIO lines with a single
   register read. This has high value for some usecases: it
   can be used to create oscilloscopes and signal analyzers
   and other things that rely on reading several lines at
   exactly the same instant. Also a generally nice
   optimization. This uses the new assign_bit() macro from
   the bitops lib that was ACKed by Andrew Morton and
   is implemented for two drivers, one of them being the
   generic MMIO driver so everyone using that will be able
   to benefit from this.
 
 - Do not allow requests of Open Drain and Open Source
   setting of a GPIO line simultaneously. If the hardware
   actually supports enabling both at the same time the
   electrical result would be disastrous.
 
 - A new interrupt chip core helper. This will be helpful
   to deal with "banked" GPIOs, which means GPIO controllers
   with several logical blocks of GPIO inside them. This
   is several gpiochips per device in the device model, in
   contrast to the case when there is a 1-to-1 relationship
   between a device and a gpiochip.
 
 NEW DRIVERS:
 
 - Maxim MAX3191x industrial serializer, a very interesting
   piece of professional I/O hardware.
 
 - Uniphier GPIO driver. This is the GPIO block from the
   recent Socionext (ex Fujitsu and Panasonic) platform.
 
 - Tegra 186 driver. This is based on the new banked GPIO
   infrastructure.
 
 OTHER IMPROVEMENTS:
 
 - Some documentation improvements.
 
 - Wakeup support for the DesignWare DWAPB GPIO controller.
 
 - Reset line support on the DesignWare DWAPB GPIO controller.
 
 - Several non-critical bug fixes and improvements for the
   Broadcom BRCMSTB driver.
 
 - Misc non-critical bug fixes like exotic errorpaths, removal
   of dead code etc.
 
 - Explicit comments on fall-through switch() statements.
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Merge tag 'gpio-v4.15-1' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio

Pull GPIO updates from Linus Walleij:
 "This is the bulk of GPIO changes for the v4.15 kernel cycle:

  Core:

   - Fix the semantics of raw GPIO to actually be raw. No inversion
     semantics as before, but also no open draining, and allow the raw
     operations to affect lines used for interrupts as the caller
     supposedly knows what they are doing if they are getting the big
     hammer.

   - Rewrote the __inner_function() notation calls to names that make
     more sense. I just find this kind of code disturbing.

   - Drop the .irq_base() field from the gpiochip since now all IRQs are
     mapped dynamically. This is nice.

   - Support for .get_multiple() in the core driver API. This allows us
     to read several GPIO lines with a single register read. This has
     high value for some usecases: it can be used to create
     oscilloscopes and signal analyzers and other things that rely on
     reading several lines at exactly the same instant. Also a generally
     nice optimization. This uses the new assign_bit() macro from the
     bitops lib that was ACKed by Andrew Morton and is implemented for
     two drivers, one of them being the generic MMIO driver so everyone
     using that will be able to benefit from this.

   - Do not allow requests of Open Drain and Open Source setting of a
     GPIO line simultaneously. If the hardware actually supports
     enabling both at the same time the electrical result would be
     disastrous.

   - A new interrupt chip core helper. This will be helpful to deal with
     "banked" GPIOs, which means GPIO controllers with several logical
     blocks of GPIO inside them. This is several gpiochips per device in
     the device model, in contrast to the case when there is a 1-to-1
     relationship between a device and a gpiochip.

  New drivers:

   - Maxim MAX3191x industrial serializer, a very interesting piece of
     professional I/O hardware.

   - Uniphier GPIO driver. This is the GPIO block from the recent
     Socionext (ex Fujitsu and Panasonic) platform.

   - Tegra 186 driver. This is based on the new banked GPIO
     infrastructure.

  Other improvements:

   - Some documentation improvements.

   - Wakeup support for the DesignWare DWAPB GPIO controller.

   - Reset line support on the DesignWare DWAPB GPIO controller.

   - Several non-critical bug fixes and improvements for the Broadcom
     BRCMSTB driver.

   - Misc non-critical bug fixes like exotic errorpaths, removal of dead
     code etc.

   - Explicit comments on fall-through switch() statements"

* tag 'gpio-v4.15-1' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: (65 commits)
  gpio: tegra186: Remove tegra186_gpio_lock_class
  gpio: rcar: Add r8a77995 (R-Car D3) support
  pinctrl: bcm2835: Fix some merge fallout
  gpio: Fix undefined lock_dep_class
  gpio: Automatically add lockdep keys
  gpio: Introduce struct gpio_irq_chip.first
  gpio: Disambiguate struct gpio_irq_chip.nested
  gpio: Add Tegra186 support
  gpio: Export gpiochip_irq_{map,unmap}()
  gpio: Implement tighter IRQ chip integration
  gpio: Move lock_key into struct gpio_irq_chip
  gpio: Move irq_valid_mask into struct gpio_irq_chip
  gpio: Move irq_nested into struct gpio_irq_chip
  gpio: Move irq_chained_parent to struct gpio_irq_chip
  gpio: Move irq_default_type to struct gpio_irq_chip
  gpio: Move irq_handler to struct gpio_irq_chip
  gpio: Move irqdomain into struct gpio_irq_chip
  gpio: Move irqchip into struct gpio_irq_chip
  gpio: Introduce struct gpio_irq_chip
  pinctrl: armada-37xx: remove unused variable
  ...
2017-11-14 17:23:44 -08:00
Linus Walleij bee67c7c9d Merge branch 'gpio-irqchip-rework' of /home/linus/linux-gpio into devel 2017-11-09 09:38:42 +01:00
Thierry Reding f0fbe7bce7 gpio: Move irqdomain into struct gpio_irq_chip
In order to consolidate the multiple ways to associate an IRQ chip with
a GPIO chip, move more fields into the new struct gpio_irq_chip.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Acked-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-11-08 14:06:21 +01:00
Phil Reid ff0f2ce71c gpio: mcp23s08: add support for mcp23018
This adds the required definitions for the mcp23018 which is the i2c
variant of the mcp23s18.

Signed-off-by: Phil Reid <preid@electromag.com.au>
Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-10-19 10:23:36 +02:00
Dmitry Mastykin 5986170107 pinctrl: mcp23s08: fix interrupt handling regression
interrupt handling was broken with conversion to using regmap caching.
cached_gpio value was updated by boolean status instead of gpio reading.

Fixes: 8f38910ba4 ("pinctrl: mcp23s08: switch to regmap caching")
Tested-by: Phil Reid <preid@electromag.com.au>
Signed-off-by: Dmitry Mastykin <mastichi@gmail.com>
Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-10-19 10:20:03 +02:00
Phil Reid 2a7893c8b5 pinctrl: mcp23s08: remove unused variables from pinconf_set
Variable mask and val are not used in the mcp_pinconf_set().

Signed-off-by: Phil Reid <preid@electromag.com.au>
Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-10-11 10:18:39 +02:00
Sebastian Reichel d8f4494e70 pinctrl: mcp23s08: drop comment about missing irq support
The driver supports using mcp23xxx as interrupt controller, so
let's drop all comments stating otherwise.

Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-05-23 09:51:08 +02:00
Sebastian Reichel ce9bd0a0ff pinctrl: mcp23s08: simplify spi_present_mask handling
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-05-23 09:50:47 +02:00
Sebastian Reichel 5b1a7e803a pinctrl: mcp23s08: generalize irq property handling
This moves irq property handling from spi/i2c specific code into
the generic mcp23s08_probe_one. This is possible because the
device properties are named equally.

As a side-effect this drops support for setting the properties via
pdata, which has no mainline users. If boardcode wants to enable
the chip as interrupt controller it can attach the device properties
instead.

Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-05-23 09:50:13 +02:00
Sebastian Reichel 0d7fcd504c pinctrl: mcp23s08: simplify spi pdata handling
Simplify spi pdata handling, so that it uses pdata when available
and falls back to reading device properties otherwise.

Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-05-23 09:49:49 +02:00
Sebastian Reichel 5f853acfa9 pinctrl: mcp23s08: simplify i2c pdata handling
Simplify i2c pdata handling, so that it uses pdata when available
and falls back to reading device properties otherwise.

Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-05-23 09:49:30 +02:00
Sebastian Reichel d0e49dabc6 pinctrl: mcp23s08: switch to devm_gpiochip_add_data
Switching to devm_gpiochip_add_data simplifies the driver's
cleanup routine and safes a few loc.

Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-05-23 09:49:06 +02:00
Sebastian Reichel 2f98e78b5a pinctrl: mcp23s08: use managed kzalloc for mcp
Let's remove a few lines of code by using managed memory for mcp
variable.

Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-05-23 09:48:44 +02:00
Sebastian Reichel 2e29e76772 pinctrl: mcp23s08: irq mapping is already done
i2c-core and spi-core already assign the irq, so we
can drop the additional call from the mcp driver.

Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-05-23 09:48:15 +02:00
Sebastian Reichel 8f38910ba4 pinctrl: mcp23s08: switch to regmap caching
Instead of using custom caching, this switches to regmap based
caching. Before the conversion the debugfs file used uncached
values, so that it was easily possible to see power-loss related
problems. The new code will check and recover at this place.

The patch will also ensure, that irqs are not cleared by checking
register status in debugfs.

Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-05-23 09:47:28 +02:00
Sebastian Reichel d795cb51df pinctrl: mcp23s08: drop pullup config from pdata
mcp23s08 support configuration of the pullups using the
pinconf framework. This removes the custom pullup configuration
from platform data, which has no upstream users.

Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-05-23 09:47:03 +02:00
Sebastian Reichel 82039d244f pinctrl: mcp23s08: add pinconf support
mcp23xxx device have configurable 100k pullup resistors. This adds
support for enabling them using pinctrl's pinconf interface.

Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
Tested-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-05-23 09:46:32 +02:00
Sebastian Reichel 64ac43e6fa gpio: mcp23s08: move to pinctrl
This moves the mcp23s08 driver from gpio to pinctrl. Actual
pinctrl support for configuration of the pull-up resistors
follows in its own patch.

Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
Acked-by: Sylvain Lemieux <slemieux.tyco@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-05-23 09:45:29 +02:00