The clk_h133 clock, which is the HCLK clock for PSYS domain, is of
type 'struct clk' whereas on S5PV210, this clock is suitable to be
of type clksrc_clk clock (since it has a choice of clock source
and a pre-divider). So this patch replaces the 'struct clk' type
clock to 'struct clksrc_clk' type clock for the HCLK PSYS clock.
This patch modifies the following.
1. Remove definitions and usage of 'clk_h133' clock.
2. Adds 'clk_hclk_psys' clock which is of type 'struct clksrc_clk'.
3. Replace all usage of clk_h133 with clk_hclk_psys clock.
4. Adds clk_hclk_psys into list of clocks to be registered.
5. Removes the clock rate calculation of hclk133 and replaces
it with code that derives the HCLK PSYS clock rate from
the clk_hclk_psys clock.
6. Modify printing of the system clock rates.
Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
The clk_h166 clock, which is the HCLK clock for DSYS domain, is of
type 'struct clk' whereas on S5PV210, this clock is suitable to be
of type clksrc_clk clock (since it has a choice of clock source
and a pre-divider). So this patch replaces the 'struct clk' type
clock to 'struct clksrc_clk' type clock for the HCLK DSYS clock.
This patch modifies the following.
1. Remove definitions and usage of 'clk_h166' clock.
2. Adds 'clk_sclk_a2m' clock which is one of possible parent clock
sources for the DSYS HCLK clock.
3. Adds 'clk_hclk_dsys' clock which is of type 'struct clksrc_clk'.
4. Replace all usage of clk_h166 with clk_hclk_dsys clock.
5. Adds clk_sclk_a2m and clk_hclk_dsys into list of clocks to
be registered.
6. Removes the clock rate calculation of hclk166 and replaces
it with code that derives the HCLK DSYS clock rate from
the clk_hclk_dsys clock.
Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
The clk_h200 represents the HCLK for the MSYS domain. This clock
is of type 'struct clk' but on V210, it is more suitable to be of
type 'struct clksrc_clk' (since it is a divided version of the
armclk). The replacement clock is renamed as clk_hclk_msys to
indicate that it represents the HCLK for MSYS domain.
This patch modifies the following.
1. Removes the usage of the clk_h200 clock.
2. Adds the new clock 'clk_hclk_msys'.
3. Adds clk_hclk_msys to the list of sysclks to be registered.
4. Modifies the hclk_msys clock rate calculation procedure to
be based on the new clk_hclk_msys clock.
Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
This patch modifies the following.
1. Adds arm clock 'clk_armclk' of type clksrc_clk clock type.
2. Adds arm clock to the list of system clocks 'sysclks' for
registering it along with other system clocks.
3. Modifies the armclk clock rate calculation procedure to be
based on the new clk_armclk clock.
Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
The assignment of clock rates for fout apll/mpll/epll is moved further
up in the s5pv210_setup_clocks function because the subsequent patches
require the clock rate of fout clocks to be setup.
Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
This patch modifies the following.
1. Registers the mout_apll clksrc_clk clock.
2. The mout_mpll and mout_epll clocks were registered as 'struct clk'
types and then their parents were setup using the s3c_set_clksrc
function. This patch reduces the two steps into one by registering
the mout_mpll and mout_epll clocks using the s3c_register_clksrc
function.
3. As per point 2 above, the init_parents array is no longer required.
So the mout clocks are now put together in a new array named 'sysclks'.
The sysclks array will list the system level clocks and more
clocks will be added to it in the subsequent patches.
4. The clks array is left empty because of the movement of mpll and epll
clocks into the sysclks array. It is not deleted since subsequent
patches will add clocks into this array.
Signed-off-by: Thomas Abraham <thomas.ab <at> samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim <at> samsung.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
The system clock definitions are currently defined below the
peripheral clock definitions in the V210 clock code. For the V210
clock updates that follow this patch, it is required that the
system clock definitions such as the mout_apll and mout_mpll be
defined prior to the device clock definitions. This patch
re-arranges the system clock defintions for the clock updates that
follow this patch.
Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
The interrupt enable bit for the performance counters is in the Control
Register $24, not in the counter register.
loongson2_perfcount_handler(), we need to use
Reported-by: Xu Hengyang <hengyang@mail.ustc.edu.cn>
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/1198/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
---
The sys_ppoll() takes struct 'struct timespec'. This is different for the
N32 and N64 ABIs. Use the compat version to do the proper conversions.
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/1210/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
---
In the FPU emulator code of the MIPS, the Cause bits of the FCSR register
are not currently writeable by the ctc1 instruction. In odd corner cases,
this can cause problems. For example, a case existed where a divide-by-zero
exception was generated by the FPU, and the signal handler attempted to
restore the FPU registers to their state before the exception occurred. In
this particular setup, writing the old value to the FCSR register would
cause another divide-by-zero exception to occur immediately. The solution
is to change the ctc1 instruction emulator code to allow the Cause bits of
the FCSR register to be writeable. This is the behaviour of the hardware
that the code is emulating.
This problem was found by Shane McDonald, but the credit for the fix goes
to Kevin Kissell. In Kevin's words:
I submit that the bug is indeed in that ctc_op: case of the emulator. The
Cause bits (17:12) are supposed to be writable by that instruction, but the
CTC1 emulation won't let them be updated by the instruction. I think that
actually if you just completely removed lines 387-388 [...] things would
work a good deal better. At least, it would be a more accurate emulation of
the architecturally defined FPU. If I wanted to be really, really pedantic
(which I sometimes do), I'd also protect the reserved bits that aren't
necessarily writable.
Signed-off-by: Shane McDonald <mcdonald.shane@gmail.com>
To: anemo@mba.ocn.ne.jp
To: kevink@paralogos.com
To: sshtylyov@mvista.com
Patchwork: http://patchwork.linux-mips.org/patch/1205/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
---
Between "clean D line..." and "invalidate I line" operations in
v7_coherent_user_range(), the memory page may get swapped out.
And the fault on "invalidate I line" could not be properly handled
causing the oops.
In ARMv6 "external abort on linefetch" replaced by "instruction cache
maintenance fault". Let's handle it as translation fault. It fixes the
issue.
I'm not sure if it's reasonable to check arch version in run-time.
Let's do it in compile time for now.
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Siarhei Siamashka <siarhei.siamashka@nokia.com>
Signed-off-by: Kirill A. Shutemov <kirill@shutemov.name>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Enabling CONFIG_USER_DEBUG allows NWFPE to complain about every FP
exception, which with some programs can cause the kernel message log
to fill with NWFPE debug, swamping out other messages.
This change allows NWFPE debugging to be configured at run time.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
PL330 is a configurable DMA controller PrimeCell device.
The register map of the device is well defined.
The configuration of a particular implementation can be
read from the six configuration registers CR0-4,Dn.
This patch implements a driver for the specification:-
http://infocenter.arm.com/help/topic/com.arm.doc.ddi0424a/DDI0424A_dmac_pl330_r0p0_trm.pdf
The exported interface should be sufficient to implement
a driver for any DMA API.
Signed-off-by: Jassi Brar <jassisinghbrar@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The L310 cache controller's interface is almost identical
to the L210. One major difference is that the PL310 can
have up to 16 ways.
This change uses the cache's part ID and the Associativity
bits in the AUX_CTRL register to determine the number of ways.
Also, this version prints out the CACHE_ID and AUX_CTRL registers.
Acked-by: Will Deacon <will.deacon@arm.com>
Acked-by: Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Jason S. McMullan <jason.mcmullan@netronome.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
These files include linux/bootmem.h without using anything from this
file; remove the unnecessary include.
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Convert code away from ->read_proc/->write_proc interfaces. Switch to
proc_create()/proc_create_data() which makes addition of proc entries
reliable wrt NULL ->proc_fops, NULL ->data and so on.
Problem with ->read_proc et al is described here commit
786d7e1612 "Fix rmmod/read/write races in
/proc entries"
This patch is part of an effort to remove the old simple procfs PAGE_SIZE
buffer interface.
Signed-off-by: Alexey Dobriyan <adobriyan@gmail.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Jaswinder reported this #GP:
|
| Message from syslogd@ht at May 14 09:39:32 ...
| kernel:[ 314.908612] EIP: [<c100ccca>]
| x86_perf_event_set_period+0x19d/0x1b2 SS:ESP 0068:edac3d70
|
Ming has narrowed it down to a comparision issue
between arguments with different sizes and
signs. As result event index reached a wrong
value which in turn led to a GP fault.
At the same time it was found that p4_next_cntr
has broken logic and should return the counter
index only if it was not yet borrowed for
another event.
Reported-by: Jaswinder Singh Rajput <jaswinderlinux@gmail.com>
Reported-by: Lin Ming <ming.m.lin@intel.com>
Bisected-by: Lin Ming <ming.m.lin@intel.com>
Tested-by: Jaswinder Singh Rajput <jaswinderlinux@gmail.com>
Signed-off-by: Cyrill Gorcunov <gorcunov@openvz.org>
CC: Peter Zijlstra <a.p.zijlstra@chello.nl>
CC: Frederic Weisbecker <fweisbec@gmail.com>
LKML-Reference: <20100514190815.GG13509@lenovo>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
* master.kernel.org:/home/rmk/linux-2.6-arm:
ARM: 6126/1: ARM mpcore_wdt: fix build failure and other fixes
ARM: 6125/1: ARM TWD: move TWD registers to common header
ARM: 6110/1: Fix Thumb-2 kernel builds when UACCESS_WITH_MEMCPY is enabled
ARM: 6112/1: Use the Inner Shareable I-cache and BTB ops on ARMv7 SMP
ARM: 6111/1: Implement read/write for ownership in the ARMv6 DMA cache ops
ARM: 6106/1: Implement copy_to_user_page() for noMMU
ARM: 6105/1: Fix the __arm_ioremap_caller() definition in nommu.c
Do not blindly access extended configuration space unless we actively
know we're on a Moorestown platform. The fixed-size BAR capability
lives in the extended configuration space, and thus is not applicable
if the configuration space isn't appropriately sized.
This fixes booting certain VMware configurations with CONFIG_MRST=y.
Moorestown will add a fake PCI-X 266 capability to advertise the
presence of extended configuration space.
Reported-and-tested-by: Petr Vandrovec <petr@vandrovec.name>
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
Acked-by: Jacob Pan <jacob.jun.pan@intel.com>
Acked-by: Jesse Barnes <jbarnes@virtuousgeek.org>
LKML-Reference: <AANLkTiltKUa3TrKR1M51eGw8FLNoQJSLT0k0_K5X3-OJ@mail.gmail.com>
* 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:
x86, cacheinfo: Turn off L3 cache index disable feature in virtualized environments
x86, k8: Fix build error when K8_NB is disabled
x86, amd: Check X86_FEATURE_OSVW bit before accessing OSVW MSRs
x86: Fix fake apicid to node mapping for numa emulation
K8_NB depends on PCI and when the last is disabled (allnoconfig) we fail
at the final linking stage due to missing exported num_k8_northbridges.
Add a header stub for that.
Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
LKML-Reference: <20100503183036.GJ26107@aftab>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Cc: <stable@kernel.org>
DA8xx OHCI driver fails to load due to failing clk_get() call for the USB 2.0
clock. Arrange matching USB 2.0 clock by the clock name instead of the device.
(Adding another CLK() entry for "ohci.0" device won't do -- in the future I'll
also have to enable USB 2.0 clock to configure CPPI 4.1 module, in which case
I won't have any device at all.)
Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* 'for-linus' of git://git.monstr.eu/linux-2.6-microblaze:
microblaze: Fix module loading on system with WB cache
microblaze: export assembly functions used by modules
microblaze: Remove powerpc code from Microblaze port
microblaze: Remove compilation warnings in cache macro
microblaze: export assembly functions used by modules
microblaze: fix get_user/put_user side-effects
microblaze: re-enable interrupts before calling schedule
The newer assemblers support the .cfi_sections directive so we can put
the CFI from .S files into the .debug_frame section that is preserved
in unstripped vmlinux and in separate debuginfo, rather than the
.eh_frame section that is now discarded by vmlinux.lds.S.
Signed-off-by: Roland McGrath <roland@redhat.com>
LKML-Reference: <20100514044303.A6FE7400BE@magilla.sf.frob.com>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Declare 'audio-bus' clock for IISv4 controller of S3C6410.
Even though the name is same as that for IISv3, the id is
set to -1(just one instance of the controller is available)
which helps always fetch the correct clock.
Signed-off-by: Jassi Brar <jassi.brar@samsung.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Declare possible sources of CLKAUDIO[2]/audio-bus for IISv4 controller.
Signed-off-by: Jassi Brar <jassi.brar@samsung.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Declare the source of clock provided at Xi2sCDCLK2 pin for IISv4 controller.
Signed-off-by: Jassi Brar <jassi.brar@samsung.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
If host CPU is exposed to a guest the OSVW MSRs are not guaranteed
to be present and a GP fault occurs. Thus checking the feature flag is
essential.
Cc: <stable@kernel.org> # .32.x .33.x
Signed-off-by: Andreas Herrmann <andreas.herrmann3@amd.com>
LKML-Reference: <20100427101348.GC4489@alberich.amd.com>
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
Enables basic boot support for the MSM7x30 SURF development
board.
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
Signed-off-by: Gregory Bean <gbean@codeaurora.org>
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
The MSM7x30 does not have a separate bank of memory for shared
memory communication with the radio CPU. Set the kernel base
address 2MB in, to use this first 2MB for this purpose.
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
Signed-off-by: Gregory Bean <gbean@codeaurora.org>
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
The MSM SOC's DMA controller contains several security domains.
On the MSM7x00, only security domain 3 is accessible to our CPU.
The 7x30, however, uses security domain 2. Fix up the register
definition macros to select this appropriately, based on
configured target.
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
Signed-off-by: Gregory Bean <gbean@codeaurora.org>
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
This adds a clock list, and common resource structures
for MSM7x30.
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
Signed-off-by: Gregory Bean <gbean@codeaurora.org>
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
Add a header describing the io regions for MSM7x30.
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
Signed-off-by: Gregory Bean <gbean@codeaurora.org>
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
Enable CONFIG_ARCH_QSD8X50. This is the first SOC with the
Scorpion processor.
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
Signed-off-by: Gregory Bean <gbean@codeaurora.org>
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
Support different RAM base addresses used by Qualcomm SOCs, with
QSD8x50 as the first addtional one.
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
Signed-off-by: Gregory Bean <gbean@codeaurora.org>
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
This adds a clock list, and common resource structures
for QSD8x50.
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
Signed-off-by: Gregory Bean <gbean@codeaurora.org>
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
Add a header describing the io regions for QSD8x50.
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
Signed-off-by: Gregory Bean <gbean@codeaurora.org>
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
Some SoC need to redefine MSM_DGT_BASE from it's default.
This allows it to be defined in a header to override the
default value.
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
GPIO support for Qualcomm SOCs requires interaction with the
radio (baseband processor). This API allows the different boards
to enable GPIO through the radio processor in a generic way.
Signed-off-by: Gregory Bean <gbean@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
The 'PCOM' method of clock control (commands issued to the radio
CPU) is shared across several (but not all) Qualcomm SOCs.
Generalize this clock mechanism so these other SOCs can be added.
Signed-off-by: Gregory Bean <gbean@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
Scorpion-based SOCs from Qualcomm use a different interrupt
controller 'sirc'.
Signed-off-by: Gregory Bean <gbean@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
msm_iomap.h is specific to the MSM7x00 series devices. Generalize
this in preparation to support more devices.
Signed-off-by: Gregory Bean <gbean@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
irqs.h is specific to the MSM7x00 series devices. Generalize
this in preparation to support more devices.
Signed-off-by: Gregory Bean <gbean@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
devices.c is specific to the MSM7x00 series of SOCs. Rename
appropriately in preparation to support more devices.
Signed-off-by: Gregory Bean <gbean@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
More complete AEMIF support for boards.
Signed-off-by: Thomas Koeller <thomas.koeller@baslerweb.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Added PINMUX configurations for the CLKOUT0 .. CLKOUT2
functions, for boards that want to use these clocks.
Signed-off-by: Thomas Koeller <thomas.koeller@baslerweb.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Board code may want to use them.
Signed-off-by: Thomas Koeller <thomas.koeller@baslerweb.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
This patch allows for a more flexible ioremap() interception based on iotable
contents.
With this patch, the ioremap() interception code can properly translate
addresses only after davinci_soc_info has been initialized. Consequently,
in soc-specific init functions, davinci_common_init() has to happen before any
ioremap() attempts. The da8xx init sequence has been suitably modified to meet
this restriction.
Signed-off-by: Cyril Chemparathy <cyril@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
This patch modifies the pinmux implementation so as to ioremap() the pinmux
register area on first use.
Signed-off-by: Cyril Chemparathy <cyril@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
This patch implements the following:
- interrupt initialization uses ioremap() instead of passing a virtual address
via davinci_soc_info.
- machine definitions directly point to cp_intc_init() or davinci_irq_init()
- davinci_intc_type and davinci_intc_base now get initialized in controller
specific init functions instead of davinci_common_init()
- minor fix in davinci_irq_init() to use intc_irq_num instead of
DAVINCI_N_AINTC_IRQ
Signed-off-by: Cyril Chemparathy <cyril@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
This patch modifies the psc and clock control code to use ioremap()ed
registers.
Signed-off-by: Cyril Chemparathy <cyril@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
This patch eliminates IO_ADDRESS() usage for Davinci timer definitions. The
timer code has correspondingly been modified to ioremap() MMRs instead.
Signed-off-by: Cyril Chemparathy <cyril@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
This patch replaces the jtag id base info in davinci_soc_info with a physical
address which is then ioremap()ed within common code.
This patch (in combination with a similar change for PSC) will allow us to
eliminate the SYSCFG nastiness in DA8xx code.
Signed-off-by: Cyril Chemparathy <cyril@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
This patch modifies the RTC unlock code to use ioremap() maps instead of
IO_ADDRESS() translation.
Signed-off-by: Cyril Chemparathy <cyril@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
This patch modifies the gpio_base definition in davinci_soc_info to be a
physical address, which is then ioremap()ed by the gpio initialization
function.
Signed-off-by: Cyril Chemparathy <cyril@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
In the edma driver, most of the long lines in 'if condition' are
broken after the logical operator '&&' except two instances.
This patch fixes that to bring consistency across the file.
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
This patch replaces occurences of (1 << x) with
BIT(x) as it makes for much better reading.
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
This provides some serious scheduling for the Nomadik family by
introducing a sched_clock() using the MTU clock source in the
same manner as e.g. OMAP or U300. This type of solutions has been
discussed at no end in the past, however we need this resolution
for making measurements and using HRTimers.
Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This patch adds platform side support code for the EP93xx SPI
driver. This includes clock, resources and muxing. There is a new
function: ep93xx_register_spi() which can be used by board support
code to register new SPI devices for the board.
This patch depends on patch
5998/1 ep93xx: added chip revision reading function
Cc: Ryan Mallon <ryan@bluewatersys.com>
Cc: David Brownell <dbrownell@users.sourceforge.net>
Cc: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Mika Westerberg <mika.westerberg@iki.fi>
Acked-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Acked-by: Martin Guy <martinwguy@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
CC arch/microblaze/kernel/cpu/cache.o
arch/microblaze/kernel/cpu/cache.c: In function '__invalidate_dcache_range_wb':
arch/microblaze/kernel/cpu/cache.c:398: warning: ISO C90 forbids mixed declarations and code
arch/microblaze/kernel/cpu/cache.c: In function '__flush_dcache_range_wb':
arch/microblaze/kernel/cpu/cache.c:509: warning: ISO C90 forbids mixed declara
Signed-off-by: Michal Simek <monstr@monstr.eu>
Modules that use copy_{to,from}_user(), memcpy(), and memset() fail to build
in certain circumstances.
Signed-off-by: Steven J. Magnani <steve@digidescorp.com>
Signed-off-by: Michal Simek <monstr@monstr.eu>
Move the CPG helpers to drivers/sh/clk-cpg.c V2.
This to allow SH-Mobile ARM to share the code with
SH. All functions except the legacy CPG stuff is moved.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch is V2 of the SH clock framework move from
arch/sh/kernel/cpu/clock.c to drivers/sh/clk.c. All
code except the following functions are moved:
clk_init(), clk_get() and clk_put().
The init function is still kept in clock.c since it
depends on the SH-specific machvec implementation.
The symbols clk_get() and clk_put() already exist in
the common ARM clkdev code, those symbols are left in
the SH tree to avoid duplicating them for SH-Mobile ARM.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch is V2 of the clock framework move from
arch/sh/include/asm/clock.h to include/linux/sh_clk.h
and updates the include paths for files that will be
shared between SH and SH-Mobile ARM.
The file asm/clock.h is still kept in this version,
this to depend on as few files as possible at this
point. We keep SH specific stuff in there.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Now when all clocks are registered using clkdev,
get rid of the special SH-specific clock lookup.
Also ditch the unused module ref counting code.
This patch syncs the SH behaviour with ARM.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch converts the remaining board clocks
to use clkdev for lookup if needed. The unused
name and id from struct clk are also removed.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch converts the remaining sh4-202 clocks
to use clkdev for lookup. The now unused name
and id from struct clk are also removed.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch converts the remaining shx3 clocks
to use clkdev for lookup. The now unused name
and id from struct clk are also removed.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch converts the remaining sh7757 clocks
to use clkdev for lookup. The now unused name
and id from struct clk are also removed.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch converts the remaining sh7763 clocks
to use clkdev for lookup. The now unused name
and id from struct clk are also removed.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch converts the remaining sh7780 clocks
to use clkdev for lookup. The now unused name
and id from struct clk are also removed.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch converts the remaining sh7786 clocks
to use clkdev for lookup. The now unused name
and id from struct clk are also removed.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch converts the remaining sh7785 clocks
to use clkdev for lookup. The now unused name
and id from struct clk are also removed.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch converts the remaining sh7366 clocks
to use clkdev for lookup. The now unused name
and id from struct clk are also removed.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch converts the remaining sh7343 clocks
to use clkdev for lookup. The now unused name
and id from struct clk are also removed.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch converts the remaining sh7722 clocks
to use clkdev for lookup. The now unused name
and id from struct clk are also removed.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch converts the remaining sh7723 clocks
to use clkdev for lookup. The now unused name
and id from struct clk are also removed.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch converts the remaining sh7724 clocks
to use clkdev for lookup. The now unused name
and id from struct clk are also removed.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch converts the legacy clocks to register
using clkdev. Also the clock name is removed.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Remove the name parameter from SH_CLK_DIV4() and
adjust the processor specific code. The lookup
happens using clkdev so the name is unused.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Update the div4 set_parent() callback to use the
flags instead of name to determine parent index.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Remove the name and the id from SH_CLK_MSTP32().
Now when lookups are handled by clkdev they are
not needed anymore.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch adds sh7786 MSTP enums for mstp_clks[] index.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch adds sh7785 MSTP enums for mstp_clks[] index.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch adds sh7366 MSTP enums for mstp_clks[] index.
The MSTP bit for the SIU is removed as well since it is
not included in the documentation. Most likely an old
copy paste error from sh7722.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch adds sh7343 MSTP enums for mstp_clks[] index.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
The Microblaze implementations of get_user() and (MMU) put_user() evaluate
the address argument more than once. This causes unexpected side-effects for
invocations that include increment operators, i.e. get_user(foo, bar++).
This patch also removes the distinction between MMU and noMMU put_user().
Without the patch:
$ echo 1234567890 > /proc/sys/kernel/core_pattern
$ cat /proc/sys/kernel/core_pattern
12345
Signed-off-by: Steven J. Magnani <steve@digidescorp.com>
schedule() should not be called with interrupts disabled.
Signed-off-by: Steven J. Magnani <steve@digidescorp.com>
Signed-off-by: Michal Simek <monstr@monstr.eu>
Linear search over all p4 MSRs should be fine if only
we would not use it in events scheduling routine which
is pretty time critical. Lets use hashes. It should speed
scheduling up significantly.
v2: Steven proposed to use more gentle approach than issue
BUG on error, so we use WARN_ONCE now
Signed-off-by: Cyrill Gorcunov <gorcunov@openvz.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Steven Rostedt <rostedt@goodmis.org>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: Lin Ming <ming.m.lin@intel.com>
LKML-Reference: <20100512174242.GA5190@lenovo>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
An index of KVM44x_GUEST_TLB_SIZE is already one too large.
Signed-off-by: Roel Kluin <roel.kluin@gmail.com>
Acked-by: Hollis Blanchard <hollis@penguinppc.org>
Acked-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
As the processor may not consider GUEST_INTR_STATE_STI as a reason for
blocking NMI, it could return immediately with EXIT_REASON_NMI_WINDOW
when we asked for it. But as we consider this state as NMI-blocking, we
can run into an endless loop.
Resolve this by allowing NMI injection if just GUEST_INTR_STATE_STI is
active (originally suggested by Gleb). Intel confirmed that this is
safe, the processor will never complain about NMI injection in this
state.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
KVM-Stable-Tag
Acked-by: Gleb Natapov <gleb@redhat.com>
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
cpuid_update may operate VMCS, so vcpu_load() and vcpu_put()
should be called to ensure correctness.
Signed-off-by: Dongxiao Xu <dongxiao.xu@intel.com>
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
This patch makes KVM on 32 bit SVM working again by
correcting the masks used for iret interception. With the
wrong masks the upper 32 bits of the intercepts are masked
out which leaves vmrun unintercepted. This is not legal on
svm and the vmrun fails.
Bug was introduced by commits 95ba827313 and 3cfc3092.
Cc: Jan Kiszka <jan.kiszka@siemens.com>
Cc: Gleb Natapov <gleb@redhat.com>
Cc: stable@kernel.org
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
Signed-off-by: Avi Kivity <avi@redhat.com>
* 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc:
powerpc/perf_event: Fix oops due to perf_event_do_pending call
powerpc/swiotlb: Fix off by one in determining boundary of which ops to use
This patch adds the following.
1. Add new definitions of clock of type 'struct clksrc_clk'.
2. Add gate control function for GATE_SCLK1 which is required
for new clock additions.
Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
The clock source options avaialable in the clkset_mmc_spi are
applicable to clocks such as sclk_post, sclk_dispcon and
sclk_fimgvg. So this set is renamed as clkset_group1 to indicate
that it can be used as clock sources for other clocks and not
just for sclk_spi and sclk_mmc clocks.
Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Add definitions of clocks of type 'struct clk'.
Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
The pclk_low clock is of type 'struct clk' whereas on S5P6440,
the pclk_low clock is more suitable to be of type 'struct clksrc_clk'
(since pclk_low clock is a divided clock of hclk_low clock).
This patch modifies the following.
1. Removes the definition and usage of clk_p_clk clock.
2. Adds the clk_pclk_low clock of type 'struct clksrc_clk' clock.
3. Adds clk_pclk_low to the list of system clocks.
4. The clock rate of pclk_low is derived from the clk_pclk_low clock.
Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
The clk_h_low clock is of type 'struct clk' whereas on S5P6440,
the hclk_low clock is more suitable to be of type 'struct clksrc_clk'
(since hclk_low clock is derived from a choice of clock sources and
then divided by a divisor).
This patch modifies the following.
1. Removes the definition and usage of clk_h_clk clock.
2. Adds the clk_hclk_low clock of type 'struct clksrc_clk' clock.
3. Adds clk_hclk_low to the list of system clocks.
4. The clock rate of hclk_low is derived from the clk_hclk_low clock.
Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
The clk_p clock is of type 'struct clk' whereas on S5P6440,
the pclk is more suitable to be of type 'struct clksrc_clk'
(since pclk clock is divided version of hclk).
This patch modifies the following.
1. Adds the 'clk_pclk' clock which is of type 'struct clksrc_clk'.
2. Adds clk_pclk into the list of sysclks.
3. The clock rate 'pclk' is modified to be derived from clk_pclk.
Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
The clk_h clock is of type 'struct clk' whereas on S5P6440,
the hclk is more suitable to be of type 'struct clksrc_clk'
(since hclk clock is divided version of armclk)
This patch modifies the following.
1. Adds the 'clk_hclk' clock which is of type 'struct clksrc_clk'.
2. Removes all references to the clk_h clock.
3. Addes clk_hclk into the list of sysclks.
4. The clock rate 'hclk' is modified to be derived from clk_hclk.
Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
The clk_arm clock is of type 'struct clk' whereas on S5P6440,
the arm clock is more suitable to be of type 'struct clksrc_clk'
(since arm clock is divided version of apll clock).
This patch modifies the following.
1. Removes the usage of clk_arm clock (defined in plat-s5p) and
defines the new clock 'clk_armclk' of type 'struct clksrc_clk'.
2. Rearranges the assignment of clock rate for the fout_a/m/epll
clocks. This will help in calculating the clock rate of fclk
from clk_armclk clock and setup the clock rate for fout_m/epll
for subsequent patches which depend on it.
3. Modifies the clock rate calculation of fclk to be based on
the newly added clk_armclk clock.
Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
This patch modifies the following.
1. Modifies the dout_mpll clock type as clksrc_clk clock type.
This modification allows the use of common clock code in
managing the dout_mpll clock (which otherwise would need
custom defined functions such as s5p6440_clk_doutmpll_get_rate).
2. s5p6440_clk_doutmpll_get_rate function is removed as it is
no longer needed.
Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
This patch modifies the following.
1. Registers the mout_apll clksrc_clk clock.
2. The mout_mpll and mout_epll were registered as 'struct clk'
types and then their parents were setup using the s3c_set_clksrc
function. This patch reduces the two steps into one by registering
the mout_mpll and mout_epll clocks using the s3c_register_clksrc
function.
3. As per point 2 above, the init_parents array is no longer required.
So the mout clocks are now put together in a new array named 'sysclks'.
The sysclks array will list the system level clocks and more
clocks will be added to it in the subsequent patches.
Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
This fixes the following warning,
arch/arm/mach-msm/smd_debug.c:240: warning: initialization from incompatible pointer type
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
Without a debug uart selected you get this failure,
arch/arm/mach-msm/board-trout.c:85: error: 'MSM_DEBUG_UART_PHYS' undeclared here (not in a function)
arch/arm/mach-msm/board-trout.c:86: error: 'MSM_DEBUG_UART_BASE' undeclared here (not in a function)
This just removes these lines in that case.
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
This removes the Kconfig menu option. SMD can still be selected
but it's done inside the Kconfig file and not via the menu.
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
When booting up we need to wait for the modem processor to
partially boot. This is because the modem processor does
resource allocation for us. If we don't wait the modem won't
honor our requests and we end up crashing or in an unknown
state. This change just formalizes the waiting process.
Signed-off-by: Daniel Walker <c_dwalke@quicinc.com>
This irq handler isn't used in all cases, so add the proper ifdef. This
eliminates a compiler warning due to the function not getting used.
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
This just removed some unneeded predefines. One needed a whole
function moved down further. The others could just be deleted.
No functional changes.
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
This moves the msm_a2m_int() function into the header, and
does a small macro clean up to be more inline with Linux
norms. No functional changes.
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
"unsigned" translates to "unsigned int", but this value holds an
address. We always want to use unsigned long for addresses since
it will change size to fit the machine.
This just convert the one address holder to unsigned long.
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
This modifies SMD to use either the package v3 or package v4,
but not both. The current code tries to allocate as v4 on all
system which can produce a scary looking error message on boot up,
smem_find(16, 40): wrong size 16424
smd_alloc_channel() cid=02 size=08192 'SMD_RPCCALL'
With this error the code then falls back on the package v3 allocation
method. This method is inefficient because it causes a slow down
on some systems even when the allocation method can be determined
at compile time. It also causes a kernel size increase that effects
all system and is not needed.
This change corrects the allocation to use one method or the other
and not both.
Signed-off-by: Daniel Walker <c_dwalke@quicinc.com>
Forcing the alignment prevents gcc from generating byte reads for word
member variables. Lack of this caused issues when the app processor
modified struct members and the modem saw a partial word write.
Signed-off-by: Dima Zavin <dima@android.com>
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
Some smd clients may write from multiple threads, in which case it's
not safe to call smd_write without holding a lock. smd_write_atomic()
provides the same functionality as smd_write() but obtains the smd
lock first.
Signed-off-by: Brian Swetland <swetland@google.com>
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
Don't mark a channel as allocated if we failed to allocate it
(perhaps the modem updated one table but not the other, etc)
Signed-off-by: Brian Swetland <swetland@google.com>
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
When we read data out of the sender's fifo, we need to advance the sender's
tail pointer, not the receiver's.
Signed-off-by: Haley Teng <Haley_Teng@htc.com>
Acked-by: Dima Zavin <dima@android.com>
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
- QSD8250 has a DSP that speaks SMD, in addition to the modem
- handle a separate list of modem vs dsp channels
- install dsp smd irq handler as necessary
Signed-off-by: Brian Swetland <swetland@google.com>
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
- pull debug code into smd_debug.c
- move necessary structures and defines into smd_private.h
- fix some comment formatting, etc
Signed-off-by: Brian Swetland <swetland@google.com>
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
The new protocol require writing to two state fields, and reading
several fields.
Signed-off-by: Arve Hjønnevåg <arve@android.com>
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
- support both v2 and v1 style smd channels
- support both v2 and v1 smsm shared state
- update smsm state defines and smem item enum
- prep work for dealing with smd to qdsp6
- simplify some smem access to minimize use of smem_alloc() at runtime
Signed-off-by: Brian Swetland <swetland@google.com>
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
This code provides the low level interface to the "shared memory
state machine" (smsm), and the virtual serial channels (smd), used
to communicate with the baseband processor. Higher level transports
(rpc, ethernet, AT command channel, etc) ride on top of this.
Signed-off-by: Brian Swetland <swetland@google.com>
Also, convert all SDCC IRQ resources to be named. No longer pass status_irq
in the platform_data
Signed-off-by: Dima Zavin <dima@android.com>
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
Support independent enable and disable by clients for common
vreg. First enable switches on and last disable switches off.
This change has no check for voltage level so clients
must agree on level for common vreg.
Signed-off-by: Matthew Wilson <mtwilson@quicinc.com>
Fixes the following warning,
arch/arm/mach-msm/acpuclock-arm11.c:138: warning: 'freq_table' defined but not used
when CONFIG_CPU_FREQ_TABLE is not enabled.
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
Keep track of the success/failure of the last vreg proc comm
command, and return that on debugfs reads.
Signed-off-by: Steve Muckle <smuckle@quicinc.com>
This adds acpuclock-arm11.c from Google. This provides control
over the cpu frequency for arm11 cpu's.
This has shared authorship between Google, and Qualcomm. Most
of it was written by Mike Chan at Google.
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
This moves the TWD register set of MPcore to a common
existing file so that watchdog driver can access it
Signed-off-by: srinidhi kasagar <srinidhi.kasagar@stericsson.com>
Acked-by: Linus Walleij <linus.walleij@stericsson.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Move HWMON platform definition from plat-s3c24xx to plat-samsung
and adjust mach-bast to use the new s3c_hwmon_set_platdata().
This allows usage of dev-hwmon by other Samsung SoCs.
Signed-off-by: Maurus Cuelenaere <mcuelenaere@gmail.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
As of git commit 1844c9bc0b head64.S/head31.S
are not included in head.S anymore but build as an extra object. This breaks
shared kernel support because the .org statement in head64.S/head31.S for
CONFIG_SHARED_KERNEL=y will have a different effect. The end address of the
head.text section in head.o will be added to the .org value, to compensate
for this subtract 0x11000 to get the required value of 0x100000 again.
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
strace may change the system call number, so regs->gprs[2] must not
be read before tracehook_report_syscall_entry(). This fixes a bug
where "strace -f" will hang after a vfork().
Cc: <stable@kernel.org>
Signed-off-by: Gerald Schaefer <gerald.schaefer@de.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
Anton Blanchard found that large POWER systems would occasionally
crash in the exception exit path when profiling with perf_events.
The symptom was that an interrupt would occur late in the exit path
when the MSR[RI] (recoverable interrupt) bit was clear. Interrupts
should be hard-disabled at this point but they were enabled. Because
the interrupt was not recoverable the system panicked.
The reason is that the exception exit path was calling
perf_event_do_pending after hard-disabling interrupts, and
perf_event_do_pending will re-enable interrupts.
The simplest and cleanest fix for this is to use the same mechanism
that 32-bit powerpc does, namely to cause a self-IPI by setting the
decrementer to 1. This means we can remove the tests in the exception
exit path and raw_local_irq_restore.
This also makes sure that the call to perf_event_do_pending from
timer_interrupt() happens within irq_enter/irq_exit. (Note that
calling perf_event_do_pending from timer_interrupt does not mean that
there is a possible 1/HZ latency; setting the decrementer to 1 ensures
that the timer interrupt will happen immediately, i.e. within one
timebase tick, which is a few nanoseconds or 10s of nanoseconds.)
Signed-off-by: Paul Mackerras <paulus@samba.org>
Cc: stable@kernel.org
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
This patch removes static of s5p6440_sysclass, s5p6442_sysclass,
and s5pv210_sysclass for defintion as extern.
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
The address ben@fluff.org is old, ben-linux@fluff.org has been in use
for a long time, and we should fixup all the occasions of the older
address to avoid confusion.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
use_xsave() is now just a special case of static_cpu_has(), so use
static_cpu_has().
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Cc: Avi Kivity <avi@redhat.com>
Cc: Suresh Siddha <suresh.b.siddha@intel.com>
LKML-Reference: <1273135546-29690-2-git-send-email-avi@redhat.com>
For CPU-feature-specific code that touches performance-critical paths,
introduce a static patching version of [boot_]cpu_has(). This is run
at alternatives time and is therefore not appropriate for most
initialization code, but on the other hand initialization code is
generally not performance critical.
On gcc 4.5+ this uses the new "asm goto" feature.
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Cc: Avi Kivity <avi@redhat.com>
Cc: Suresh Siddha <suresh.b.siddha@intel.com>
LKML-Reference: <1273135546-29690-2-git-send-email-avi@redhat.com>
According to datasheet GPG13-15 must be configured as input in NAND
boot mode, otherwise device will not be able to wake up
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Thomas Abraham