The spi core make sure that each transfer structure have the proper
setting for bits_per_word before calling low level transfer APIs.
Hence it is no more require to check again in low level driver for
this field whether this is set correct or not. Removing such code
from low level driver.
The txx9 change also removes a test for bits_per_word set to 0, and
forcing it to 8 in that case. This can also be removed now since
spi_setup() ensures spi->bits_per_word is not zero.
if (!spi->bits_per_word)
spi->bits_per_word = 8;
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Since Tegra spi devices do not have multiple clocks, no need to use
clock name to get the clock.
Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Migrate Tegra clock support to drivers/clk/tegra, this involves
moving:
1. definition of tegra_cpu_car_ops to clk.c
2. definition of reset functions to clk-peripheral.c
3. change parent of cpu clock.
4. Remove legacy clock initialization.
5. Initialize clocks using DT.
6. Remove all instance of mach/clk.h
Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
[swarren: use to_clk_periph_gate().]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Convert all uses of devm_request_and_ioremap() to the newly introduced
devm_ioremap_resource() which provides more consistent error handling.
devm_ioremap_resource() provides its own error messages so all explicit
error messages can be removed from the failure code paths.
Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Cc: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
CONFIG_HOTPLUG is going away as an option. As result the __dev*
markings will be going away.
Remove use of __devinit, __devexit_p, __devinitdata, __devinitconst,
and __devexit.
Bill Pemberton has done most of the legwork on this series. I've used
his script to purge the attributes from the drivers/gpio tree.
Reported-by: Bill Pemberton <wfp5p@virginia.edu>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Sequence compatible list for tegra20-slink driver to first
look for Tegra30 and then Tegra20. Tegra30 have additional
feature in HW which need to be utilize if it is provided from DT.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
When spi client does the spi transfer and does not sets
the bits_per_word for each transfer then set it as default
of spi device in spi core before calling low level transfer.
Removing the similar code from spi-tegra20-slink driver as
it is not required.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Tegra20/Tegra30 supports the spi interface through its SLINK
controller. Add spi driver for SLINK controller.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Laxman Dewangan