Commit Graph

15 Commits

Author SHA1 Message Date
Derek Fang bbf53b95ed
ASoC: rl6231: Add new supports on rl6231
1. Increases the max limit of PLL input frequency
   on RL6231 shared support.
2. Add a new pll preset map.

Signed-off-by: Derek Fang <derek.fang@realtek.com>
Link: https://lore.kernel.org/r/1580970133-14089-1-git-send-email-derek.fang@realtek.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2020-02-11 11:22:29 +00:00
Thomas Gleixner d2912cb15b treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500
Based on 2 normalized pattern(s):

  this program is free software you can redistribute it and or modify
  it under the terms of the gnu general public license version 2 as
  published by the free software foundation

  this program is free software you can redistribute it and or modify
  it under the terms of the gnu general public license version 2 as
  published by the free software foundation #

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-only

has been chosen to replace the boilerplate/reference in 4122 file(s).

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Enrico Weigelt <info@metux.net>
Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Reviewed-by: Allison Randal <allison@lohutok.net>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190604081206.933168790@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-06-19 17:09:55 +02:00
Bard Liao 790dde243f
ASoC: rl6231: remove never matched if condition
(in_t < 0) will never be true since in_t is unsigned.

Signed-off-by: Bard Liao <bardliao@realtek.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2017-12-21 11:13:26 +00:00
Bard Liao 2f8aab3d29
ASoC: rl6231: get better PLL parameters
For those which can only get approximation PLL out cases, this patch
will use higher resolution to get a better PLL parameter.

Signed-off-by: Bard Liao <bardliao@realtek.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2017-12-19 10:56:21 +00:00
Colin Ian King 57f7feff29 ASoC: rl6231: make arrays div and pd static const, reduces object code size
Don't populate the read-only arrays div and pd on the stack,
instead make them static const. Makes the object code smaller by 210 bytes:

Before:
   text	   data	    bss	    dec	    hex	filename
   2869	    720	      0	   3589	    e05	sound/soc/codecs/rl6231.o

After:
   text	   data	    bss	    dec	    hex	filename
   2495	    880	      0	   3375	    d2f	sound/soc/codecs/rl6231.o

Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2017-09-19 23:00:45 +01:00
Bard Liao 59b0113140 ASoC: rl6231: add 19.2M to 4.096M pll preset table
Add a pll mapping table for 19.2M in and 4.096M out.

Signed-off-by: Bard Liao <bardliao@realtek.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2016-11-15 17:07:22 +00:00
John Lin 7336dcefac ASoC: rl6231: fix range of DMIC clock
The maximum DMIC clock rate is 3.072 MHz for most DMIC. And it will get better
performance in higher clock rate. If we set maximum to 3 MHz in driver, we will
get a clock rate which is not even close to 3 MHz.
For example, if DMIC clock source is 24.576 MHz, the DMIC clock will be about
1.5 MHz in current code. But it will be 3.072 MHz with this patch.

Signed-off-by: John Lin <john.lin@realtek.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-11-16 13:17:01 +00:00
Bard Liao 2f64b6ed44 ASoC: rl6231: avoid using divisible by 3 for DMIC clk
Few codecs will meet no DMIC clock output issue when select a divided
number which is divisible by 3. To prevent this issue, the patch ignore
the numbers when calculating the DMIC clock divider.

Signed-off-by: Bard Liao <bardliao@realtek.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-11-10 18:58:19 +00:00
Anatol Pomozov ac1125daf0 ASoC: rl6231: Simplify DMIC divider calculation expression
Existing implementation checks all divider values and tracks
'red' proximity value for the frequency.

But as divider array is monotonically increasing the first
divider that gives DMIC rate in 3MHz range is the best one
we should use. No need for 'red' zone tracking.

Additionally make sure that DMIC frequency is higher 1MHz.

Signed-off-by: Anatol Pomozov <anatol.pomozov@gmail.com>
Acked-by: Oder Chiou <oder_chiou@realtek.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-08-06 10:51:12 +01:00
Oder Chiou 00a6d6e50f ASoC: Add function "rl6231_get_pre_div" to correct the dmic clock calculation
Signed-off-by: Bard Liao <bardliao@realtek.com>
Signed-off-by: Oder Chiou <oder_chiou@realtek.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-08-05 10:42:35 +01:00
Bard Liao 213213d9d6 ASoC: rl6231: add pll preset table
Currently, rl6231_pll_calc provide a working PLL parameters for
given freq_in and freq_out. However, in some cases it is not the
perfect parameter. For example if freq_in = 19200000 and freq_out
 = 24576000, the calculated parameter will gengrate 24.5647 MHz
which is not exactly the same as what we need. But the PLL can
output 24.576 MHz as exactly what we expect if we set the best
PLL parameter.
To improve it, we put the best match parameters in a preset table.
We can search the preset table first, if there is no preset parameter
for the given freq_in and freq_out, we can still calculate a working
PLL parameter.

Signed-off-by: Bard Liao <bardliao@realtek.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-07-23 17:39:41 +01:00
Axel Lin b5d4f4a53f ASoC: rl6231: Remove unneeded inclusion of header files
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Tested-by: Oder Chiou <oder_chiou@realtek.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
2014-06-09 21:18:28 +01:00
Oder Chiou d92950e755 ASoC: rt5640: Add the function "get_clk_info" to RL6231 shared support
The patch adds the function "get_clk_info" to RL6231 shared support.

Signed-off-by: Oder Chiou <oder_chiou@realtek.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
2014-06-01 20:04:30 +01:00
Oder Chiou 71c7a2d675 ASoC: rt5640: Add the function of the PLL clock calculation to RL6231 shared support
The patch adds the function of the PLL clock calculation to RL6231 shared
support.

Signed-off-by: Oder Chiou <oder_chiou@realtek.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
2014-06-01 20:04:30 +01:00
Oder Chiou 49ef7925c2 ASoC: rt5640: Add RL6231 class device shared support for RT5640, RT5645 and RT5651
The patch adds the RL6231 class device shared support for RT5640, RT5645 and
RT5651. The function of the DMIC clock calculation can be shared by RL6231
shared support.

Signed-off-by: Oder Chiou <oder_chiou@realtek.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
2014-06-01 20:04:30 +01:00