Fix the following checkpatch warnings.
WARNING: Missing a blank line after declarations
Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Make of_device_id array const, because all OF functions
handle it as const.
Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Acked-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
The purpose of commit 1e8a52e18c
"spi: By default setup spi_masters with 1 chipselect and dynamics bus number"
is to avoid setting default value for bus_num and num_chipselect in spi master
drivers. So let's remove the duplicate code.
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Acked-By: David Daney <david.daney@cavium.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
In spi_add_device(), we have the code to validate spi->chip_select.
So remove the duplicate code in various drivers.
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Use master->max_speed_hz instead of tspi->spi_max_frequency, so spi core will
handle checking transfer speed.
In additional, since commit 052eb2d490 'spi: core: Set max_speed_hz of
spi_device default to max_speed_hz of controller',
spi core will also set default spi->max_speed_hz if it is not set.
So remove the duplicate code in tegra_spi_setup.
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
For better readability, and then we can remove the comment for last transfer.
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
None of these files are actually using any __init type directives
and hence don't need to include <linux/init.h>. Most are just a
left over from __devinit and __cpuinit removal, or simply due to
code getting copied from one driver to the next.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
A respun version of the merges for the pull request previously sent with
a few additional fixes. The last two merges were fixed up by hand since
the branches have moved on and currently have the prior merge in them.
Quite a busy release for the SPI subsystem, mostly in cleanups big and
small scattered through the stack rather than anything else:
- New driver for the Broadcom BC63xx HSSPI controller.
- Fix duplicate device registration for ACPI.
- Conversion of s3c64xx to DMAEngine (this pulls in platform and DMA
changes upon which the transiton depends).
- Some small optimisations to reduce the amount of time we hold locks
in the datapath, eliminate some redundant checks and the size of a
spi_transfer.
- Lots of fixes, cleanups and general enhancements to drivers,
especially the rspi and Atmel drivers.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJS4RZvAAoJELSic+t+oim9XKAP/00WcCARVzqWmzZYhW2nCqVw
zRu/DEC+RFlvUSOrwx5SojZNCJekKrsbJuzvapXKIj+SL5+wDm2gUo188s+J8e5V
mXA9CGb2+tQUgzuQzKZ82kf5WT1a/VpgdVqxZ2EGBHqdJwMV6cG20YneTd9/A0ar
QbD9Ikon07cE6j8sp/HKxzSnER+3ii4OTJPJCXkNPHiDE9xkA/FR4qy/DksC2hpy
y6IHCNGA3yHB/8bC7hxUKabOBwPpvQlGELTLHKTVy4umoAE0/aYSjwMdE67SbqXg
mxDLcDjacNb4ga9hfWiYdZOKRdYiljt1zXksKHldp+R654YFTSVGmYipMoc0l52b
jyycLM9ZjQ8Q74ySY+BIdZ4RDKFg4QajDhd/sIJtI354HLdoJCQa82j3luj6/Ewu
JSlI4EGZUjOWPZb72kkrwj0LFBT5k639fMmLPDCLLlg5sUvx2afFl96s9Z25mFGj
JzgwhjBIcF8AmllLTEpS6cP8MOBeThJ79gTxmbH60tsWxil2yCS4etg+h6GFo7g9
GBXL9UF63Q6t9Mg8/0oACDs/YyMMbFImi6p20B+Pr0QZiltiTSSc4Z7eo4gG4UYh
m4svqZcMG8w6csMAMb6I6a9+EojERPt53bZayasnnX/e5HsXJah4qop9Pjrma4ed
PQHMx8ivWztwyqqjoYTz
=CbUw
-----END PGP SIGNATURE-----
Merge tag 'spi-v3.14-2' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi
Pull spi updates from Mark Brown:
"A respun version of the merges for the pull request previously sent
with a few additional fixes. The last two merges were fixed up by
hand since the branches have moved on and currently have the prior
merge in them.
Quite a busy release for the SPI subsystem, mostly in cleanups big and
small scattered through the stack rather than anything else:
- New driver for the Broadcom BC63xx HSSPI controller
- Fix duplicate device registration for ACPI
- Conversion of s3c64xx to DMAEngine (this pulls in platform and DMA
changes upon which the transiton depends)
- Some small optimisations to reduce the amount of time we hold locks
in the datapath, eliminate some redundant checks and the size of a
spi_transfer
- Lots of fixes, cleanups and general enhancements to drivers,
especially the rspi and Atmel drivers"
* tag 'spi-v3.14-2' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi: (112 commits)
spi: core: Fix transfer failure when master->transfer_one returns positive value
spi: Correct set_cs() documentation
spi: Clarify transfer_one() w.r.t. spi_finalize_current_transfer()
spi: Spelling s/finised/finished/
spi: sc18is602: Convert to use bits_per_word_mask
spi: Remove duplicate code to set default bits_per_word setting
spi/pxa2xx: fix compilation warning when !CONFIG_PM_SLEEP
spi: clps711x: Add MODULE_ALIAS to support module auto-loading
spi: rspi: Add missing clk_disable() calls in error and cleanup paths
spi: rspi: Spelling s/transmition/transmission/
spi: rspi: Add support for specifying CPHA/CPOL
spi/pxa2xx: initialize DMA channels to -1 to prevent inadvertent match
spi: rspi: Add more QSPI register documentation
spi: rspi: Add more RSPI register documentation
spi: rspi: Remove dependency on DMAE for SHMOBILE
spi/s3c64xx: Correct indentation
spi: sh: Use spi_sh_clear_bit() instead of open-coded
spi: bitbang: Grammar s/make to make/to make/
spi: sh-hspi: Spelling s/recive/receive/
spi: core: Improve tx/rx_nbits check comments
...
By using dma_request_slave_channel_or_err(), the DMA slave ID can be
looked up from standard DT properties, and squirrelled away during
channel allocation. Hence, there's no need to use a custom DT property
to store the slave ID.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Mark Brown <broonie@linaro.org>
Tegra's clock driver now provides an implementation of the common
reset API (include/linux/reset.h). Use this instead of the old Tegra-
specific API; that will soon be removed.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Mark Brown <broonie@linaro.org>
Reviewed-by: Thierry Reding <treding@nvidia.com>
Previously used “unsigned long” may lead to confusion should the code
be compiled for 64-bit machine.
This commit also removes some unused fields of the tegra_spi_data
structure as well as removes duplicated #defines.
Signed-off-by: Michal Nazarewicz <mina86@mina86.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Use this new function to make code more comprehensible, since we are
reinitialzing the completion, not initializing.
[akpm@linux-foundation.org: linux-next resyncs]
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Acked-by: Linus Walleij <linus.walleij@linaro.org> (personally at LCE13)
Cc: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
The tegra114 driver wasn't currently handling the cs_change
functionality. cs_change is meant to invert the decisions of whether
or not to deactivate CS after each transfer. Without cs_change, after
every transfer (other than the last in the message) the normal behavior
is to leave CS active. For the last transfer, normally CS is
deactivated when the transfer is complete.
With cs_change set on a transfer (other than last one) CS would be
deactivated and the next transfer would need to activate it again. If
cs_change was set on the last tranfer in a message, then CS would be
left active when the message compeleted.
Also, this builds in logic so that if a different device tries to start
a transfer while CS is active from a different device, it will abort the
previous transfer and start a new one for the new device.
This splits tegra_spi_start_transfer_one into 2 functions, the new one
being tegra_spi_setup_transfer_one. The setup function is safe to call
on all transfers, sets up for the transfer, and handles the special case
of the first transfer in a message. In this special case, it needs to
know whether or not it needs to activate CS.
This work was based on the spi-atmel driver.
Signed-off-by: Rhyland Klein <rklein@nvidia.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Use devm_spi_register_master() to make cleanup paths simpler.
Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Check of 'r' and calls to dev_err are already done in devm_ioremap_resource,
so no need to do them twice.
Signed-off-by: Laurent Navet <laurent.navet@gmail.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Currently the tegra114 driver acquires a runtime PM reference for the
duration of each transfer. This may result in the IP being powered down
between transfers which would be at best wasteful. Instead it is better
to do this in the callbacks that are generated before and after starting
a series of transfers, keeping the IP powered throughout.
Signed-off-by: Mark Brown <broonie@linaro.org>
Acked-by: Laxman Dewangan <ldewangan@nvidia.com>
There is a error message within devm_ioremap_resource
already, so remove the dev_err call to avoid redundant
error message.
Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
Signed-off-by: Mark Brown <broonie@linaro.org>
Use the wrapper functions for getting and setting the driver data using
platform_device instead of using dev_{get,set}_drvdata() with &pdev->dev,
so we can directly pass a struct platform_device.
Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Add SPI driver for NVIDIA's Tegra114 SPI controller. This controller
is different than the older SoCs SPI controller in internal design as
well as register interface.
This driver supports the:
- non DMA based transfer for smaller transfer i.e. less than FIFO depth.
- APB DMA based transfer for larger transfer i.e. more than FIFO depth.
- Clock gating through runtime PM callbacks.
- registration through DT only.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Jingoo Han