Commit Graph

1841 Commits

Author SHA1 Message Date
Thomas Gleixner 2aec85b26f treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_30.RULE (part 2)
Based on the normalized pattern:

    this program is free software you can redistribute it and/or modify it
    under the terms of the gnu general public license as published by the
    free software foundation version 2  this program is distributed as is
    without any warranty of any kind whether express or implied without
    even the implied warranty of merchantability or fitness for a
    particular purpose see the gnu general public license for more details

extracted by the scancode license scanner the SPDX license identifier

    GPL-2.0-only

has been chosen to replace the boilerplate/reference.

Reviewed-by: Allison Randal <allison@lohutok.net>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-06-10 14:51:35 +02:00
Dmitry Baryshkov e991c2ee65 phy: qcom-qmp-usb: use bulk reset_control API
Switch qcom-qmp-usb driver to use reset_control_bulk_assert / _deassert
functions rather than hardcoding the loops in the driver itself.

Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org> # UFS, PCIe and USB on SC8180X
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220607213203.2819885-31-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-06-09 23:49:42 +05:30
Dmitry Baryshkov ccac084746 phy: qcom-qmp-pcie-msm8996: use bulk reset_control API
Switch qcom-qmp-pcie-msm8996 driver to use reset_control_bulk_assert /
_deassert functions rather than hardcoding the loops in the driver
itself.

Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org> # UFS, PCIe and USB on SC8180X
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220607213203.2819885-30-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-06-09 23:49:42 +05:30
Dmitry Baryshkov 189ac6b8dd phy: qcom-qmp-pcie: use bulk reset_control API
Switch qcom-qmp-pcie driver to use reset_control_bulk_assert / _deassert
functions rather than hardcoding the loops in the driver itself.

Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org> # UFS, PCIe and USB on SC8180X
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220607213203.2819885-29-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-06-09 23:49:42 +05:30
Dmitry Baryshkov 1de24861af phy: qcom-qmp-combo: use bulk reset_control API
Switch qcom-qmp-combo driver to use reset_control_bulk_assert / _deassert
functions rather than hardcoding the loops in the driver itself.

Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org> # UFS, PCIe and USB on SC8180X
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220607213203.2819885-28-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-06-09 23:49:42 +05:30
Dmitry Baryshkov 65753f38f5 phy: qcom-qmp-usb: drop multi-PHY support
Each USB QMP PHY device provides just a single UFS PHY. Drop support
for handling multiple child PHYs. Use phy->init_count to check if the
PHY was initialized rather than duplicating this count.

Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org> # UFS, PCIe and USB on SC8180X
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220607213203.2819885-27-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-06-09 23:49:42 +05:30
Dmitry Baryshkov 1da7115efa phy: qcom-qmp-ufs: drop multi-PHY support
Each UFS QMP PHY device provides just a single UFS PHY. Drop support
for handling multiple child PHYs.

Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org> # UFS, PCIe and USB on SC8180X
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220607213203.2819885-26-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-06-09 23:49:42 +05:30
Dmitry Baryshkov 1239fd711f phy: qcom-qmp-pcie: drop multi-PHY support
Each PCIe QMP PHY device provides just a single PCIe PHY. Drop support
for handling multiple child PHYs.

Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org> # UFS, PCIe and USB on SC8180X
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220607213203.2819885-25-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-06-09 23:49:42 +05:30
Dmitry Baryshkov faf83af5d5 phy: qcom-qmp-usb: cleanup the driver
Remove the conditionals and options that are not used by any of USB PHY
devices.

Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org> # UFS, PCIe and USB on SC8180X
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220607213203.2819885-24-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-06-09 23:49:42 +05:30
Dmitry Baryshkov 3e1865ba38 phy: qcom-qmp-ufs: cleanup the driver
Remove the conditionals and options that are not used by any of UFS PHY
devices.

Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org> # UFS, PCIe and USB on SC8180X
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220607213203.2819885-23-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-06-09 23:49:41 +05:30
Dmitry Baryshkov 4856865b0d phy: qcom-qmp-pcie-msm8996: cleanup the driver
Remove the conditionals and options that are not used by the MSM8996
PCIe PHY device. Hardcode has_lane_rst and has_phy_com_ctrl as this is
the case for this PHY.

Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org> # UFS, PCIe and USB on SC8180X
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220607213203.2819885-22-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-06-09 23:49:41 +05:30
Dmitry Baryshkov fd9269945f phy: qcom-qmp-pcie: cleanup the driver
Remove the conditionals and options that are not used by any of PCIe PHY
devices.

Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org> # UFS, PCIe and USB on SC8180X
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220607213203.2819885-21-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-06-09 23:49:41 +05:30
Dmitry Baryshkov 6066bac15b phy: qcom-qmp-combo: cleanup the driver
Remove the conditionals and options that are not used by any of combo
USB+DP PHY devices.

Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org> # UFS, PCIe and USB on SC8180X
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220607213203.2819885-20-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-06-09 23:49:41 +05:30
Dmitry Baryshkov 86f5ddddcd phy: qcom-qmp-usb: drop support for non-USB PHY types
Drop remaining support for PHY types other than USB.

Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org> # UFS, PCIe and USB on SC8180X
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220607213203.2819885-19-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-06-09 23:49:41 +05:30
Dmitry Baryshkov bc3e83d766 phy: qcom-qmp-ufs: drop support for non-UFS PHY types
Drop remaining support for PHY types other than UFS.

Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org> # UFS, PCIe and USB on SC8180X
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220607213203.2819885-18-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-06-09 23:49:41 +05:30
Dmitry Baryshkov f575ac2d64 phy: qcom-qmp-pcie-msm8996: drop support for non-PCIe PHY types
Drop remaining support for PHY types other than PCIe.

Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org> # UFS, PCIe and USB on SC8180X
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220607213203.2819885-17-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-06-09 23:49:41 +05:30
Dmitry Baryshkov da07a06b90 phy: qcom-qmp-pcie: drop support for non-PCIe PHY types
Drop remaining support for PHY types other than PCIe.

Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org> # UFS, PCIe and USB on SC8180X
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220607213203.2819885-16-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-06-09 23:49:41 +05:30
Dmitry Baryshkov b2bac0f095 phy: qcom-qmp-combo: drop support for PCIe,UFS PHY types
Drop remaining support for unused PHY types (PCIe, UFS).

Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org> # UFS, PCIe and USB on SC8180X
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220607213203.2819885-15-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-06-09 23:49:41 +05:30
Dmitry Baryshkov a50280ead1 phy: qcom-qmp: drop old QMP PHY driver source
As we have switched to the new (split) QMP PHY driver, drop the old
monolithic QMP driver source.

Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org> # UFS, PCIe and USB on SC8180X
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220607213203.2819885-14-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-06-09 23:49:41 +05:30
Dmitry Baryshkov 3158e39aa5 phy: qcom-qmp: switch to new split QMP PHY driver
Use new split QMP PHY driver and remove all monolith phy-qcom-qmp
driver.

Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org> # UFS, PCIe and USB on SC8180X
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220607213203.2819885-13-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-06-09 23:49:41 +05:30
Dmitry Baryshkov 09b492a379 phy: qcom-qmp-usb: change symbol prefix to qcom_qmp_phy_usb
Change all symbol names to start with qcom_qmp_phy_usb_ rather than old
qcom_qmp_phy_

Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org> # UFS, PCIe and USB on SC8180X
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220607213203.2819885-12-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-06-09 23:49:40 +05:30
Dmitry Baryshkov b42c5f3d7b phy: qcom-qmp-ufs: change symbol prefix to qcom_qmp_phy_ufs
Change all symbol names to start with qcom_qmp_phy_ufs_ rather than old
qcom_qmp_phy_

Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org> # UFS, PCIe and USB on SC8180X
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220607213203.2819885-11-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-06-09 23:49:40 +05:30
Dmitry Baryshkov 2abf0c8e61 phy: qcom-qmp-pcie: change symbol prefix to qcom_qmp_phy_pcie_msm8996
Change all symbol names to start with qcom_qmp_phy_pcie_msm8996_ rather
than old qcom_qmp_phy_.

Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org> # UFS, PCIe and USB on SC8180X
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220607213203.2819885-10-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-06-09 23:49:40 +05:30
Dmitry Baryshkov 5dbc7d86d1 phy: qcom-qmp-pcie: change symbol prefix to qcom_qmp_phy_pcie
Change all symbol names to start with qcom_qmp_phy_pcie_ rather than old
qcom_qmp_phy_

Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org> # UFS, PCIe and USB on SC8180X
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220607213203.2819885-9-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-06-09 23:49:40 +05:30
Dmitry Baryshkov 033f3a16fb phy: qcom-qmp-combo: change symbol prefix to qcom_qmp_phy_combo
Change all symbol names to start with qcom_qmp_phy_combo_ rather than old
qcom_qmp_phy_

Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org> # UFS, PCIe and USB on SC8180X
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220607213203.2819885-8-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-06-09 23:49:40 +05:30
Dmitry Baryshkov ee7ffc92a9 phy: qcom-qmp-combo: drop all non-combo compatibles support
Drop support for all non-USB+DP compatibles from the new qmp-combo
driver. Currently this will result in duplication (both in terms of code
and in terms of config tables) with USB PHY support. This will be sorted
out later, after fixing the combo PHY init/reinit issues.

Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org> # UFS, PCIe and USB on SC8180X
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220607213203.2819885-7-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-06-09 23:49:40 +05:30
Dmitry Baryshkov 8c924330eb phy: qcom-qmp-usb: drop all non-USB compatibles support
Drop support for all non-USB compatibles from the new qmp-usb driver.

Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org> # UFS, PCIe and USB on SC8180X
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220607213203.2819885-6-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-06-09 23:49:40 +05:30
Dmitry Baryshkov 4846a79a38 phy: qcom-qmp-ufs: drop all non-UFS compatibles support
Drop support for all non-UFS compatibles from the new qmp-ufs driver.

Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org> # UFS, PCIe and USB on SC8180X
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220607213203.2819885-5-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-06-09 23:49:40 +05:30
Dmitry Baryshkov 9fc8fa59ef phy: qcom-qmp-pcie-msm8996: drop all compatibles except msm8996-pcie-phy
Drop support for all compatibles from the new qmp-pcie driver except the
qcom,msm8996-qmp-pcie-phy. This PHY differs from the rest of PCIe PHYs,
so it warrants a separate device driver.

Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org> # UFS, PCIe and USB on SC8180X
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220607213203.2819885-4-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-06-09 23:49:40 +05:30
Dmitry Baryshkov b35a53119a phy: qcom-qmp-pcie: drop all non-PCIe compatibles support
Drop support for all non-PCIe compatibles from the new qmp-pcie driver.
The MSM8996 compat is also removed, it is going to be handled by a
separate driver.

Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org> # UFS, PCIe and USB on SC8180X
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220607213203.2819885-3-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-06-09 23:49:40 +05:30
Dmitry Baryshkov 94a407cc17 phy: qcom-qmp: create copies of QMP PHY driver
In order to split and cleanup the single monstrous QMP PHY driver,
create blind copies of the current file. They will be used for:
- PCIe (and a separate msm8996 PCIe PHY driver)
- UFS
- USB
- Combo DP + USB

Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org> # UFS, PCIe and USB on SC8180X
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220607213203.2819885-2-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-06-09 23:49:40 +05:30
Chanho Park f7fdc4db07 phy: samsung: exynosautov9-ufs: correct TSRV register configurations
For exynos auto v9's UFS MPHY, We should use 0x50 offset of TSRV register
configurations. So, it must be

s/PHY_TRSV_REG_CFG/PHY_TRSV_REG_CFG_AUTOV9/g

Fixes: d64519249e ("phy: samsung-ufs: support exynosauto ufs phy driver")
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220603050536.61957-1-chanho61.park@samsung.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-06-08 21:56:14 +05:30
Chanho Park 2aecaf6ccd phy: samsung: ufs: support secondary ufs phy
To support secondary ufs phy device, we need to get an offset for phy
isolation from the syscon DT node. If the first index argument of the
node is existing, we can read the offset value and set it as isol->offset.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Link: https://lore.kernel.org/r/20220607072907.127000-6-chanho61.park@samsung.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-06-08 21:51:33 +05:30
Chanho Park f86c1d0a58 phy: samsung: ufs: remove drvdata from struct samsung_ufs_phy
To change an offset of pmu_isol, we need to store its data instead of
having drvdata's pointer. The definition of the pmu_isol structure
should be extracted from samsung_ufs_phy_drvdata and rename the name
with samsung_ufs_phy_ prefix.

Suggested-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Link: https://lore.kernel.org/r/20220607072907.127000-5-chanho61.park@samsung.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-06-08 21:51:33 +05:30
Chanho Park 521f88bf4d phy: samsung: ufs: constify samsung_ufs_phy_cfg
Put const qualifier of samsung_ufs_phy_cfg pointer because they will
not be changed from drvdata.

Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220607072907.127000-4-chanho61.park@samsung.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-06-08 21:51:32 +05:30
Chanho Park 558801e82e phy: samsung: ufs: rename cfg to cfgs for clarification
Rename **cfg to **cfgs to clarify the naming.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Link: https://lore.kernel.org/r/20220607072907.127000-3-chanho61.park@samsung.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-06-08 21:51:32 +05:30
Greg Kroah-Hartman 46509e7578 phy-for-5.19
- New support:
         - LVDS configuration support and implementation in fsl driver
 	- Qualcomm UFS phy support for SM6350 and USB PHY for SDX65
 	- Allwinner D-PHY Rx mode support
 	- Yamilfy Mixel mipi-dsi-phy
 
   - Updates:
 	- Documentation for phy ops order
         - Can transceiver mux support
 	- Qualcomm QMP phy updates
 	- Uniphier phy updates
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Merge tag 'phy-for-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy into char-work-next

Vinod writes:

phy-for-5.19

  - New support:
        - LVDS configuration support and implementation in fsl driver
	- Qualcomm UFS phy support for SM6350 and USB PHY for SDX65
	- Allwinner D-PHY Rx mode support
	- Yamilfy Mixel mipi-dsi-phy

  - Updates:
	- Documentation for phy ops order
        - Can transceiver mux support
	- Qualcomm QMP phy updates
	- Uniphier phy updates

* tag 'phy-for-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy: (40 commits)
  phy: qcom-qmp: rename error labels
  phy: qcom-qmp: fix pipe-clock imbalance on power-on failure
  phy: qcom-qmp: switch to explicit reset helpers
  phy: qcom-qmp: fix reset-controller leak on probe errors
  phy: qcom-qmp: fix struct clk leak on probe errors
  dt-bindings: phy: renesas,usb2-phy: Document RZ/G2UL phy bindings
  dt-bindings: phy: marvell,armada-3700-utmi-host-phy: Fix incorrect compatible in example
  phy: qcom-qmp: fix phy-descriptor kernel-doc typo
  phy: rockchip-inno-usb2: Clean up some inconsistent indenting
  phy: freescale: imx8m-pcie: Handle IMX8_PCIE_REFCLK_PAD_UNUSED
  phy: core: Warn when phy_power_on is called before phy_init
  phy: core: Update documentation syntax
  phy: core: Add documentation of phy operation order
  phy: rockchip-inno-usb2: Handle ID IRQ
  phy: rockchip-inno-usb2: Handle bvalid falling
  phy: rockchip-inno-usb2: Support multi-bit mask properties
  phy: rockchip-inno-usb2: Do not lock in bvalid IRQ handler
  phy: rockchip-inno-usb2: Do not check bvalid twice
  phy: rockchip-inno-usb2: Fix muxed interrupt support
  phy: allwinner: phy-sun6i-mipi-dphy: Support D-PHY Rx mode for MIPI CSI-2
  ...
2022-05-19 16:56:17 +02:00
Johan Hovold d413a34932 phy: qcom-qmp: rename error labels
Rename all error labels after what they are used for in order to improve
readability and for consistency.

Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Link: https://lore.kernel.org/r/20220502133130.4125-3-johan+linaro@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-05-03 10:12:03 +05:30
Johan Hovold 5e73b2d986 phy: qcom-qmp: fix pipe-clock imbalance on power-on failure
Make sure to disable the pipe clock also if ufs-reset deassertion fails
during power on.

Note that the ufs-reset is asserted in qcom_qmp_phy_com_exit().

Fixes: c9b589791f ("phy: qcom: Utilize UFS reset controller")
Cc: Evan Green <evgreen@chromium.org>
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Link: https://lore.kernel.org/r/20220502133130.4125-2-johan+linaro@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-05-03 10:12:03 +05:30
Johan Hovold 0a97630ac9 phy: qcom-qmp: switch to explicit reset helpers
Switch to consistently using the explicit reset-controller API which
makes it clear that the reset controllers are used exclusively by the
PHY driver.

Note that the deprecated of_reset_control_get() and
devm_reset_control_get() are just transitional wrappers for the explicit
API so there's no functional change.

Suggested-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220427063243.32576-4-johan+linaro@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-05-03 10:11:01 +05:30
Johan Hovold 4d2900f20e phy: qcom-qmp: fix reset-controller leak on probe errors
Make sure to release the lane reset controller in case of a late probe
error (e.g. probe deferral).

Note that due to the reset controller being defined in devicetree in
"lane" child nodes, devm_reset_control_get_exclusive() cannot be used
directly.

Fixes: e78f3d15e1 ("phy: qcom-qmp: new qmp phy driver for qcom-chipsets")
Cc: stable@vger.kernel.org      # 4.12
Cc: Vivek Gautam <vivek.gautam@codeaurora.org>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220427063243.32576-3-johan+linaro@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-05-03 10:11:01 +05:30
Johan Hovold f0a4bc38a1 phy: qcom-qmp: fix struct clk leak on probe errors
Make sure to release the pipe clock reference in case of a late probe
error (e.g. probe deferral).

Fixes: e78f3d15e1 ("phy: qcom-qmp: new qmp phy driver for qcom-chipsets")
Cc: stable@vger.kernel.org      # 4.12
Cc: Vivek Gautam <vivek.gautam@codeaurora.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Link: https://lore.kernel.org/r/20220427063243.32576-2-johan+linaro@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-05-03 10:11:01 +05:30
Johan Hovold c7fd98f84e phy: qcom-qmp: fix phy-descriptor kernel-doc typo
Fix misspelled "clock" in the description of the pipe_clk field in the
PHY-descriptor kernel-doc comment.

Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Link: https://lore.kernel.org/r/20220420152331.5527-2-johan+linaro@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-05-02 15:40:11 +05:30
Jiapeng Chong 302a20c717 phy: rockchip-inno-usb2: Clean up some inconsistent indenting
Eliminate the follow smatch warning:

drivers/phy/rockchip/phy-rockchip-inno-usb2.c:1203
rockchip_usb2phy_probe() warn: inconsistent indenting.

Reported-by: Abaci Robot <abaci@linux.alibaba.com>
Signed-off-by: Jiapeng Chong <jiapeng.chong@linux.alibaba.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Link: https://lore.kernel.org/r/20220421203038.4550-1-jiapeng.chong@linux.alibaba.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-05-02 12:32:07 +05:30
Marek Vasut f7f9abc5ea phy: freescale: imx8m-pcie: Handle IMX8_PCIE_REFCLK_PAD_UNUSED
The 'fsl,refclk-pad-mode' DT property used to select clock source for
PCIe PHY can have either of three values, IMX8_PCIE_REFCLK_PAD_INPUT,
IMX8_PCIE_REFCLK_PAD_OUTPUT, IMX8_PCIE_REFCLK_PAD_UNUSED. The first
two options are handled correctly by the driver, the last one is not,
this patch implements support for the last option.

The IMX8_PCIE_REFCLK_PAD_INPUT means PCIE_RESREF is PHY clock input,
the IMX8_PCIE_REFCLK_PAD_OUTPUT means PHY clock are sourced from SoC
internal PLL and output to PCIE_RESREF external IO pin. The last
IMX8_PCIE_REFCLK_PAD_UNUSED is a combination of previous two, PHY
clock are sourced from SoC internal PLL and not output anywhere.

Reviewed-by: Richard Zhu <hongxing.zhu@nxp.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Kishon Vijay Abraham I <kishon@ti.com>
Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Cc: NXP Linux Team <linux-imx@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Richard Zhu <hongxing.zhu@nxp.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Vinod Koul <vkoul@kernel.org>
Cc: linux-arm-kernel@lists.infradead.org
To: linux-phy@lists.infradead.org
Link: https://lore.kernel.org/r/20220413140710.10074-1-marex@denx.de
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-04-20 14:45:55 +05:30
Jules Maselbas 1599069a62 phy: core: Warn when phy_power_on is called before phy_init
A warning when the order of phy operation is mixed up by drivers,
this is an atempt to make the phy usage more uniform across (usb)
drivers.

Signed-off-by: Jules Maselbas <jmaselbas@kalray.eu>
Cc: Ahmad Fatoum <a.fatoum@pengutronix.de>
Cc: Amelie DELAUNAY <amelie.delaunay@foss.st.com>
Cc: Minas Harutyunyan <hminas@synopsys.com>
Cc: Kishon Vijay Abraham I <kishon@ti.com>
Link: https://lore.kernel.org/r/20220407102108.24211-4-jmaselbas@kalray.eu
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-04-20 14:45:15 +05:30
Jules Maselbas bd5bd02e15 phy: core: Update documentation syntax
Update the syntax used by the documentation of phy operation functions.
This is to unify the syntax with the newly added documentation.

Signed-off-by: Jules Maselbas <jmaselbas@kalray.eu>
Link: https://lore.kernel.org/r/20220407102108.24211-3-jmaselbas@kalray.eu
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-04-20 14:45:15 +05:30
Jules Maselbas f1b8d3358a phy: core: Add documentation of phy operation order
Add documentation on phy function usage: init function must be
called before power_on; power_off must be called before exit.

Signed-off-by: Jules Maselbas <jmaselbas@kalray.eu>
Cc: Ahmad Fatoum <a.fatoum@pengutronix.de>
Cc: Amelie DELAUNAY <amelie.delaunay@foss.st.com>
Cc: Minas Harutyunyan <hminas@synopsys.com>
Cc: Kishon Vijay Abraham I <kishon@ti.com>
Link: https://lore.kernel.org/r/20220407102108.24211-2-jmaselbas@kalray.eu
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-04-20 14:45:15 +05:30
Samuel Holland 51a9b2c03d phy: rockchip-inno-usb2: Handle ID IRQ
This supports detecting host mode for the OTG port without an extcon.

The rv1108 properties are not updated due to lack of documentation.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Tested-by: Michael Riesch <michael.riesch@wolfvision.net>
Link: https://lore.kernel.org/r/20220414032258.40984-7-samuel@sholland.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-04-20 14:44:04 +05:30
Samuel Holland 21a470606e phy: rockchip-inno-usb2: Handle bvalid falling
Some SoCs have a bvalid falling interrupt, in addition to bvalid rising.
This interrupt can detect OTG cable plugout immediately, so it can avoid
the delay until the next scheduled work.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Tested-by: Michael Riesch <michael.riesch@wolfvision.net>
Link: https://lore.kernel.org/r/20220414032258.40984-6-samuel@sholland.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-04-20 14:44:04 +05:30
Samuel Holland ffe597d04d phy: rockchip-inno-usb2: Support multi-bit mask properties
The "bvalid" and "id" interrupts can trigger on either the rising edge
or the falling edge, so each interrupt has two enable bits and two
status bits. This change allows using a single property for both bits,
checking whether either bit is set.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Tested-by: Michael Riesch <michael.riesch@wolfvision.net>
Link: https://lore.kernel.org/r/20220414032258.40984-5-samuel@sholland.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-04-20 14:44:03 +05:30
Samuel Holland 5a709a46e4 phy: rockchip-inno-usb2: Do not lock in bvalid IRQ handler
Clearing the IRQ is atomic, so there is no need to hold the mutex.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Tested-by: Michael Riesch <michael.riesch@wolfvision.net>
Link: https://lore.kernel.org/r/20220414032258.40984-4-samuel@sholland.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-04-20 14:44:03 +05:30
Samuel Holland 656f7fcb12 phy: rockchip-inno-usb2: Do not check bvalid twice
The bvalid interrupt handler already checks bvalid status. The muxed IRQ
handler just needs to call the other handler (plus any other handlers
that will be added).

Signed-off-by: Samuel Holland <samuel@sholland.org>
Tested-by: Michael Riesch <michael.riesch@wolfvision.net>
Link: https://lore.kernel.org/r/20220414032258.40984-3-samuel@sholland.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-04-20 14:44:03 +05:30
Samuel Holland 6a98df08cc phy: rockchip-inno-usb2: Fix muxed interrupt support
This commit fixes two issues with the muxed interrupt handler. First,
the OTG port has the "bvalid" interrupt enabled, not "linestate". Since
only the linestate interrupt was handled, and not the bvalid interrupt,
plugging in a cable to the OTG port caused an interrupt storm.

Second, the return values from the individual port IRQ handlers need to
be OR-ed together. Otherwise, the lack of an interrupt from the last
port would cause the handler to erroneously return IRQ_NONE.

Fixes: ed2b5a8e6b ("phy: phy-rockchip-inno-usb2: support muxed interrupts")
Signed-off-by: Samuel Holland <samuel@sholland.org>
Tested-by: Michael Riesch <michael.riesch@wolfvision.net>
Link: https://lore.kernel.org/r/20220414032258.40984-2-samuel@sholland.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-04-20 14:44:03 +05:30
Heiner Kallweit 2c8045d48d phy: amlogic: fix error path in phy_g12a_usb3_pcie_probe()
If clk_prepare_enable() fails we call clk_disable_unprepare()
in the error path what results in a warning that the clock
is disabled and unprepared already.
And if we fail later in phy_g12a_usb3_pcie_probe() then we
bail out w/o calling clk_disable_unprepare().
This patch fixes both errors.

Fixes: 36077e16c0 ("phy: amlogic: Add Amlogic G12A USB3 + PCIE Combo PHY Driver")
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Link: https://lore.kernel.org/r/8e416f95-1084-ee28-860e-7884f7fa2e32@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-04-20 14:42:44 +05:30
Paul Kocialkowski 74d0cd4786 phy: allwinner: phy-sun6i-mipi-dphy: Support D-PHY Rx mode for MIPI CSI-2
The Allwinner A31 D-PHY supports both Rx and Tx modes. While the latter
is already supported and used for MIPI DSI this adds support for the
former, to be used with MIPI CSI-2.

This implementation is inspired by Allwinner's V3s Linux SDK
implementation, which was used as a documentation base.

It uses the direction dt property to distinguish between tx and rx
directions.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Link: https://lore.kernel.org/r/20220415152138.635525-3-paul.kocialkowski@bootlin.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-04-20 14:40:12 +05:30
Liu Ying 3fbae28488 phy: freescale: phy-fsl-imx8-mipi-dphy: Add i.MX8qxp LVDS PHY mode support
i.MX8qxp SoC embeds a Mixel MIPI DPHY + LVDS PHY combo which supports
either a MIPI DSI display or a LVDS display.  The PHY mode is controlled
by SCU firmware and the driver would call a SCU firmware function to
configure the PHY mode.  The single LVDS PHY has 4 data lanes to support
a LVDS display.  Also, with a master LVDS PHY and a slave LVDS PHY, they
may work together to support a LVDS display with 8 data lanes(usually, dual
LVDS link display).  Note that this patch supports the LVDS PHY mode only
for the i.MX8qxp Mixel combo PHY, i.e., the MIPI DPHY mode is yet to be
supported, so for now error would be returned from ->set_mode() if MIPI
DPHY mode is passed over to it for the combo PHY.

Cc: Guido Günther <agx@sigxcpu.org>
Cc: Robert Chiras <robert.chiras@nxp.com>
Cc: Kishon Vijay Abraham I <kishon@ti.com>
Cc: Vinod Koul <vkoul@kernel.org>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Pengutronix Kernel Team <kernel@pengutronix.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: NXP Linux Team <linux-imx@nxp.com>
Reviewed-by: Guido Günther <agx@sigxcpu.org>
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Link: https://lore.kernel.org/r/20220419010852.452169-6-victor.liu@nxp.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-04-20 12:59:50 +05:30
Miaoqian Lin ce88613e5b phy: ti: Add missing pm_runtime_disable() in serdes_am654_probe
The pm_runtime_enable() will increase power disable depth.
If the probe fails, we should use pm_runtime_disable() to balance
pm_runtime_enable().
Add missing pm_runtime_disable() for serdes_am654_probe().

Fixes: 71e2f5c5c2 ("phy: ti: Add a new SERDES driver for TI's AM654x SoC")
Signed-off-by: Miaoqian Lin <linmq006@gmail.com>
Link: https://lore.kernel.org/r/20220301025853.1911-1-linmq006@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-04-14 10:38:58 +05:30
Miaoqian Lin d644e0d798 phy: mapphone-mdm6600: Fix PM error handling in phy_mdm6600_probe
The pm_runtime_enable will increase power disable depth.
If the probe fails, we should use pm_runtime_disable() to balance
pm_runtime_enable(). And use pm_runtime_dont_use_autosuspend() to
undo pm_runtime_use_autosuspend()
In the PM Runtime docs:
    Drivers in ->remove() callback should undo the runtime PM changes done
    in ->probe(). Usually this means calling pm_runtime_disable(),
    pm_runtime_dont_use_autosuspend() etc.

We should do this in error handling.

Fixes: f7f50b2a7b ("phy: mapphone-mdm6600: Add runtime PM support for n_gsm on USB suspend")
Signed-off-by: Miaoqian Lin <linmq006@gmail.com>
Link: https://lore.kernel.org/r/20220301024615.31899-1-linmq006@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-04-14 10:38:39 +05:30
Swapnil Jakhade e72659b69f phy: cadence: Sierra: Add TI J721E specific PCIe multilink lane configuration
This patch adds workaround for TI J721E errata i2183
(https://www.ti.com/lit/er/sprz455a/sprz455a.pdf).
PCIe fails to link up if SERDES lanes not used by PCIe are assigned to
another protocol. For example, link training fails if lanes 2 and 3 are
assigned to another protocol while lanes 0 and 1 are used for PCIe to
form a two lane link. This failure is due to an incorrect tie-off on an
internal status signal indicating electrical idle.

Status signals going from SERDES to PCIe Controller are tied-off when a
lane is not assigned to PCIe. Signal indicating electrical idle is
incorrectly tied-off to a state that indicates non-idle. As a result,
PCIe sees unused lanes to be out of electrical idle and this causes
LTSSM to exit Detect.Quiet state without waiting for 12ms timeout to
occur. If a receiver is not detected on the first receiver detection
attempt in Detect.Active state, LTSSM goes back to Detect.Quiet and
again moves forward to Detect.Active state without waiting for 12ms as
required by PCIe base specification. Since wait time in Detect.Quiet is
skipped, multiple receiver detect operations are performed back-to-back
without allowing time for capacitance on the transmit lines to
discharge. This causes subsequent receiver detection to always fail even
if a receiver gets connected eventually.

The workaround only works for 1-lane PCIe configuration. This workaround
involves enabling receiver detect override by setting TX_RCVDET_OVRD_PREG_j
register of the lane running PCIe to 0x2. This causes SERDES to indicate
successful receiver detect when LTSSM is in Detect.Active state, whether a
receiver is actually present or not. If the receiver is present, LTSSM
proceeds to link up as expected. However if receiver is not present, LTSSM
will time out in Polling.Configuration substate since the expected training
sequence packets will not be received.

Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Link: https://lore.kernel.org/r/20220303055026.24899-1-sjakhade@cadence.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-04-13 15:26:54 +05:30
Minghao Chi (CGEL ZTE) 2404387f52 phy/rockchip: Use of_device_get_match_data()
Use of_device_get_match_data() to simplify the code.

Reported-by: Zeal Robot <zealci@zte.com.cn>
Signed-off-by: Minghao Chi (CGEL ZTE) <chi.minghao@zte.com.cn>
Link: https://lore.kernel.org/r/20220304011755.2061529-1-chi.minghao@zte.com.cn
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-04-13 15:23:23 +05:30
Minghao Chi (CGEL ZTE) 3eb836df4d phy/rockchip: Use of_device_get_match_data()
Use of_device_get_match_data() to simplify the code.

Reported-by: Zeal Robot <zealci@zte.com.cn>
Signed-off-by: Minghao Chi (CGEL ZTE) <chi.minghao@zte.com.cn>
Link: https://lore.kernel.org/r/20220303014406.2059140-1-chi.minghao@zte.com.cn
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-04-13 15:23:23 +05:30
Miaoqian Lin 3588060bef phy: ti: omap-usb2: Fix error handling in omap_usb2_enable_clocks
The corresponding API for clk_prepare_enable is clk_disable_unprepare.
Make sure that the clock is unprepared on exit by changing clk_disable
to clk_disable_unprepare.

Fixes: ed31ee7cf1 ("phy: ti: usb2: Fix logic on -EPROBE_DEFER")
Signed-off-by: Miaoqian Lin <linmq006@gmail.com>
Link: https://lore.kernel.org/r/20220318105748.19532-1-linmq006@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-04-13 15:03:39 +05:30
Rohit Agarwal 8585b1be79 phy: qcom-qmp: Add support for SDX65 QMP PHY
Add support for USB3 QMP PHY found in SDX65 platform. SDX65 uses
version 5.0.0 of the QMP PHY IP.

Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/1649740652-17515-3-git-send-email-quic_rohiagar@quicinc.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-04-13 13:25:00 +05:30
AngeloGioacchino Del Regno f038084355 phy: mediatek: phy-mtk-hdmi: Simplify with dev_err_probe()
Use the dev_err_probe() helper to simplify error handling during probe.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220328111046.210736-1-angelogioacchino.delregno@collabora.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-04-13 13:19:09 +05:30
AngeloGioacchino Del Regno b7b930f3b3 phy: mediatek: phy-mtk-mipi-dsi: Simplify with dev_err_probe()
Use the dev_err_probe() helper to simplify error handling during probe.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220328145217.228457-1-angelogioacchino.delregno@collabora.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-04-13 13:19:09 +05:30
Luca Weiss 6f3652c952 phy: qcom-qmp: Add SM6350 UFS PHY support
The SM6350 UFS PHY is compatible with the one from SDM845. Add a
compatible for that.

Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Link: https://lore.kernel.org/r/20220321133318.99406-4-luca.weiss@fairphone.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-04-11 23:34:01 +05:30
Christophe JAILLET a9f17d0c07 phy: ti: tusb1210: Fix an error handling path in tusb1210_probe()
tusb1210_probe_charger_detect() must be undone by a corresponding
tusb1210_remove_charger_detect() in the error handling path, as already
done in the remove function.

Fixes: 48969a5623 ("phy: ti: tusb1210: Add charger detection")
Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Link: https://lore.kernel.org/r/07c4926c42243cedb3b6067a241bb486fdda01b5.1648991162.git.christophe.jaillet@wanadoo.fr
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-04-11 23:07:11 +05:30
Krzysztof Kozlowski 5c8402c4db phy: samsung: exynos5250-sata: fix missing device put in probe error paths
The actions of of_find_i2c_device_by_node() in probe function should be
reversed in error paths by putting the reference to obtained device.

Fixes: bcff4cba41 ("PHY: Exynos: Add Exynos5250 SATA PHY driver")
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Link: https://lore.kernel.org/r/20220407091857.230386-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-04-11 22:47:42 +05:30
Miaoqian Lin 388ec8f079 phy: samsung: Fix missing of_node_put() in exynos_sata_phy_probe
The device_node pointer is returned by of_parse_phandle() with refcount
incremented. We should use of_node_put() on it when done.

Fixes: bcff4cba41 ("PHY: Exynos: Add Exynos5250 SATA PHY driver")
Signed-off-by: Miaoqian Lin <linmq006@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220407091857.230386-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-04-11 22:46:13 +05:30
Lv Ruyi 751ee15da5 phy: ti: Fix missing of_node_put in ti_pipe3_get_sysctrl()
of_parse_phandle() returns node pointer with refcount incremented, use
of_node_put() on it to decrease refcount when done.

Reported-by: Zeal Robot <zealci@zte.com.cn>
Signed-off-by: Lv Ruyi <lv.ruyi@zte.com.cn>
Link: https://lore.kernel.org/r/20220408095617.2495234-1-lv.ruyi@zte.com.cn
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-04-11 22:45:31 +05:30
Aswath Govindraju e4d4371253 phy: phy-can-transceiver: Add support for setting mux
On some boards, for routing CAN signals from controller to transceiver,
muxes might need to be set. Therefore, add support for setting the mux by
reading the mux-states property from the device tree node.

Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Link: https://lore.kernel.org/r/20220408111316.21189-1-a-govindraju@ti.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-04-11 20:14:10 +05:30
Hans de Goede b541f9e59a phy: ti: tusb1210: Make tusb1210_chg_det_states static
Make tusb1210_chg_det_states static, fixing the following sparse warning:

drivers/phy/ti/phy-tusb1210.c:158:12: sparse: sparse:
 symbol 'tusb1210_chg_det_states' was not declared. Should it be static?

Fixes: 48969a5623 ("phy: ti: tusb1210: Add charger detection")
Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Link: https://lore.kernel.org/r/20220411135440.558394-1-hdegoede@redhat.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-04-11 20:09:53 +05:30
Geert Uytterhoeven 37fcacb50b phy: PHY_FSL_LYNX_28G should depend on ARCH_LAYERSCAPE
Freescale Layerscape Lynx 28G SerDes PHYs are only present on
Freescale/NXP Layerscape SoCs.

Move PHY_FSL_LYNX_28G outside the block for ARCH_MXC, as the latter
is meant for i.MX8 SoCs, which is a different family than Layerscape.
Add a dependency on ARCH_LAYERSCAPE, to prevent asking the user about
this driver when configuring a kernel without Layerscape SoC support.

Fixes: 02e2af20f4 ("Merge tag 'char-misc-5.18-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc")
Fixes: 8f73b37cf3 ("phy: add support for the Layerscape SerDes 28G")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2022-03-29 08:45:16 -07:00
Linus Torvalds 02e2af20f4 Char/Misc and other driver updates for 5.18-rc1
Here is the big set of char/misc and other small driver subsystem
 updates for 5.18-rc1.
 
 Included in here are merges from driver subsystems which contain:
 	- iio driver updates and new drivers
 	- fsi driver updates
 	- fpga driver updates
 	- habanalabs driver updates and support for new hardware
 	- soundwire driver updates and new drivers
 	- phy driver updates and new drivers
 	- coresight driver updates
 	- icc driver updates
 
 Individual changes include:
 	- mei driver updates
 	- interconnect driver updates
 	- new PECI driver subsystem added
 	- vmci driver updates
 	- lots of tiny misc/char driver updates
 
 There will be two merge conflicts with your tree, one in MAINTAINERS
 which is obvious to fix up, and one in drivers/phy/freescale/Kconfig
 which also should be easy to resolve.
 
 All of these have been in linux-next for a while with no reported
 problems.
 
 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Merge tag 'char-misc-5.18-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc

Pull char/misc and other driver updates from Greg KH:
 "Here is the big set of char/misc and other small driver subsystem
  updates for 5.18-rc1.

  Included in here are merges from driver subsystems which contain:

   - iio driver updates and new drivers

   - fsi driver updates

   - fpga driver updates

   - habanalabs driver updates and support for new hardware

   - soundwire driver updates and new drivers

   - phy driver updates and new drivers

   - coresight driver updates

   - icc driver updates

  Individual changes include:

   - mei driver updates

   - interconnect driver updates

   - new PECI driver subsystem added

   - vmci driver updates

   - lots of tiny misc/char driver updates

  All of these have been in linux-next for a while with no reported
  problems"

* tag 'char-misc-5.18-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (556 commits)
  firmware: google: Properly state IOMEM dependency
  kgdbts: fix return value of __setup handler
  firmware: sysfb: fix platform-device leak in error path
  firmware: stratix10-svc: add missing callback parameter on RSU
  arm64: dts: qcom: add non-secure domain property to fastrpc nodes
  misc: fastrpc: Add dma handle implementation
  misc: fastrpc: Add fdlist implementation
  misc: fastrpc: Add helper function to get list and page
  misc: fastrpc: Add support to secure memory map
  dt-bindings: misc: add fastrpc domain vmid property
  misc: fastrpc: check before loading process to the DSP
  misc: fastrpc: add secure domain support
  dt-bindings: misc: add property to support non-secure DSP
  misc: fastrpc: Add support to get DSP capabilities
  misc: fastrpc: add support for FASTRPC_IOCTL_MEM_MAP/UNMAP
  misc: fastrpc: separate fastrpc device from channel context
  dt-bindings: nvmem: brcm,nvram: add basic NVMEM cells
  dt-bindings: nvmem: make "reg" property optional
  nvmem: brcm_nvram: parse NVRAM content into NVMEM cells
  nvmem: dt-bindings: Fix the error of dt-bindings check
  ...
2022-03-28 12:27:35 -07:00
Yang Li 4de7c8bd6a phy: Remove duplicated include in phy-fsl-lynx-28g.c
Fix following includecheck warning:
./drivers/phy/freescale/phy-fsl-lynx-28g.c: linux/workqueue.h is
included more than once.

Reported-by: Abaci Robot <abaci@linux.alibaba.com>
Signed-off-by: Yang Li <yang.lee@linux.alibaba.com>
Link: https://lore.kernel.org/r/20220315235603.59481-1-yang.lee@linux.alibaba.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-03-16 19:34:34 -07:00
Ioana Ciornei 8f73b37cf3 phy: add support for the Layerscape SerDes 28G
This patch adds a new generic PHY driver to support the Lynx 28G SerDes
block found on some of the Layerscape SoCs such as LX2160A.
At the moment, only the following Ethernet protocols are supported:
SGMII/1000Base-X and 10GBaseR.

SerDes lanes which are not running an Ethernet protocol or a currently
supported Ethenet protocol will be left as it was configured through the
RCW (Reset Configuration Word) at boot time.

At probe time, the platform driver will read the current
configuration of both PLLs found on a SerDes block and will determine
what protocols are supported using that PLL.

For example, if a PLL is configured to generate a clock net (frate) of
5GHz the only protocols sustained by that PLL are SGMII/1000Base-X
(using a quarter of the full clock rate) and QSGMII using the full clock
net frequency on the lane.

On the .set_mode() callback, the PHY driver will first check if the
requested operating mode (protocol) is even supported by the current PLL
configuration and will error out if not.
Then, the lane is reconfigured to run on the requested protocol.

Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2022-03-14 10:41:50 +00:00
Bjorn Andersson c6455af548 phy: qcom-qmp: add sc8280xp UFS PHY
Reuse the SM8350 UFS PHY initialization sequence to add support for the
same found in the Qualcomm SC8280XP platform.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220225035105.2294599-2-bjorn.andersson@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-03-02 20:06:54 +05:30
Bjorn Andersson 7addff4018 phy: qcom-snps: Add sc8280xp support
The Qualcomm sc8280xp platform comes with a 5nm femto USB PHY which, in
contrast to previously seen platforms, has the SIDDQ bit in the COMMON0
register default to high.

So make the driver match on the 5nm compatible and make sure to clear
the SIDDQ bit on phy_init.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220225034049.2294207-2-bjorn.andersson@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-03-02 20:06:54 +05:30
Pratyush Yadav 41d393aaea phy: cadence: Add Cadence D-PHY Rx driver
The Cadence D-PHY can be configured in Tx (DSI) mode or Rx (CSI) mode.
Both modes have a different programming sequence and share little among
them. In addition, a PHY configured in Tx mode cannot be used in Rx mode
and vice versa. For this reason, create a separate driver for the Rx
mode to make it easier to read and maintain.

Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>

Link: https://lore.kernel.org/r/20220301111621.2992275-2-p.yadav@ti.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-03-02 19:54:42 +05:30
Pali Rohár 934337080c phy: marvell: phy-mvebu-a3700-comphy: Add native kernel implementation
Remove old RPC implementation and add a new native kernel implementation.

The old implementation uses ARM SMC API to issue RPC calls to ARM Trusted
Firmware which provides real implementation of PHY configuration.

But older versions of ARM Trusted Firmware do not provide this PHY
configuration functionality, simply returning: operation not supported; or
worse, some versions provide the configuration functionality incorrectly.

For example the firmware shipped in ESPRESSObin board has this older
version of ARM Trusted Firmware and therefore SATA, USB 3.0 and PCIe
functionality do not work with newer versions of Linux kernel.

Due to the above reasons, the following commits were introduced into Linux,
to workaround these issues by ignoring -EOPNOTSUPP error code from
phy-mvebu-a3700-comphy driver function phy_power_on():

commit 45aefe3d22 ("ata: ahci: mvebu: Make SATA PHY optional for Armada
3720")
commit 3241929b67 ("usb: host: xhci: mvebu: make USB 3.0 PHY optional for
Armada 3720")
commit b0c6ae0f89 ("PCI: aardvark: Fix initialization with old Marvell's
Arm Trusted Firmware")

Replace this RPC implementation with proper native kernel implementation,
which is independent on the firmware. Never return -EOPNOTSUPP for proper
arguments.

This should solve multiple issues with real-world boards, where it is not
possible or really inconvenient to change the firmware. Let's eliminate
these issues.

This implementation is ported directly from Armada 3720 comphy driver found
in newest version of ARM Trusted Firmware source code, but with various
fixes of register names, some added comments, some refactoring due to the
original code not conforming to kernel standards. Also PCIe mode poweroff
support was added here, and PHY reset support. These changes are also going
to be sent to ARM Trusted Firmware.

[ Pali did the porting from ATF.
  I (Marek) then fixed some register names, some various other things,
  added some comments and refactored the code to kernel standards. Also
  fixed PHY poweroff and added PHY reset. ]

Signed-off-by: Pali Rohár <pali@kernel.org>
Acked-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Marek Behún <kabel@kernel.org>
Link: https://lore.kernel.org/r/20220203214444.1508-3-kabel@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-02-25 19:12:21 +05:30
Pali Rohár 4bf18d5a2d phy: marvell: phy-mvebu-a3700-comphy: Remove port from driver configuration
Port number is encoded into argument for SMC call. It is zero for SATA,
PCIe and also both USB 3.0 PHYs. It is non-zero only for Ethernet PHY
(incorrectly called SGMII) on lane 0. Ethernet PHY on lane 1 also uses zero
port number.

So construct "port" bits for SMC call argument can be constructed directly
from PHY type and lane number.

Change driver code to always pass zero port number for non-ethernet PHYs
and for ethernet PHYs determinate port number from lane number. This
simplifies the driver.

As port number from DT PHY configuration is not used anymore, remove whole
driver code which parses it. This also simplifies the driver.

Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <kabel@kernel.org>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/r/20220203214444.1508-2-kabel@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-02-25 19:12:20 +05:30
Rafał Miłecki 32942d33d6 phy: phy-brcm-usb: fixup BCM4908 support
Just like every other family BCM4908 should get its own enum value. That
is required to properly handle it in chipset conditional code.

The real change is excluding BCM4908 from the PLL reprogramming code
(see brcmusb_usb3_pll_54mhz()). I'm not sure what's the BCM4908
reference clock frequency but:
1. BCM4908 custom driver from Broadcom's SDK doesn't reprogram PLL
2. Doing that in Linux driver stopped PHY handling some USB 3.0 devices

This change makes USB 3.0 PHY recognize e.g.:
1. 04e8:6860 - Samsung Electronics Co., Ltd Galaxy series, misc. (MTP mode)
2. 1058:259f - Western Digital My Passport 259F

Broadcom's STB SoCs come with a set of SUN_TOP_CTRL_* registers that
allow reading chip family and product ids. Such a block & register is
missing on BCM4908 so this commit introduces "compatible" string
specific binding.

Fixes: 4b402fa8e0 ("phy: phy-brcm-usb: support PHY on the BCM4908")
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Link: https://lore.kernel.org/r/20220218172459.10431-1-zajec5@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-02-25 14:32:37 +05:30
Stephan Gerhold 48969a5623 phy: ti: tusb1210: Add charger detection
Some Android x86 tablets with a Bay Trail (BYT) SoC and a Crystal Cove
PMIC, which does not support charger-detection, rely on a TUSB1211
phy for charger-detection.

Add support for charger detection on TUSB1211 phy-s and export
the information about the detected charger through the standard
power_supply class interface. power_supply class charger IC drivers
like the bq24190_charger.c driver will then pick this up and set
their input_current_limit based on this.

Note the "linux,phy_charger_detect" property used to enable this is
a special kernel-internal (so not part of the dt-bindings) property
used by dwc3 platform code to indicate that the phy needs to do
charger-detection.

Changes by Hans de Goede:
- Use "linux,phy_charger_detect" property to enable charger-detect
- Switch from a linear flow to a state-machine, with retries on
  ulpi communication errors
- Use SW_CONTROL bit to disable the FSM when detection is finished
- Do a phy-reset on disconnect to work around the phy often refusing
  ulpi_read()/_write() commands after a disconnect
- Use power_supply_reg_notifier() for Vbus monitoring
- Export the detection result through a power_supply class device

Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Co-developed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Link: https://lore.kernel.org/r/20220213130524.18748-10-hdegoede@redhat.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-02-25 14:28:07 +05:30
Hans de Goede df37c99815 phy: ti: tusb1210: Add a delay between power-on and restoring the phy-parameters
Now that we actually log errors on ulpi_write failures it becomes clear
that the ulpi_write() restoring the phy-parameters on power-on is failing
after a suspend/resume add a short delay after driving the cs line high
to fix this.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Link: https://lore.kernel.org/r/20220213130524.18748-9-hdegoede@redhat.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-02-25 14:28:07 +05:30
Hans de Goede cb7d21b44f phy: ti: tusb1210: Drop tusb->vendor_specific2 != 0 check from tusb1210_power_on()
Since commit eb445a15fa ("phy: tusb1210: use bitmasks to set
VENDOR_SPECIFIC2") tusb->vendor_specific2 always contains a valid value
so there no need to check that it is set.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Link: https://lore.kernel.org/r/20220213130524.18748-8-hdegoede@redhat.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-02-25 14:28:07 +05:30
Hans de Goede 09a3512681 phy: ti: tusb1210: Improve ulpi_read()/_write() error checking
ulpi_read() and ulpi_write() calls can fail. Add wrapper functions to log
errors when this happens and add error checking to the read + write of
the phy parameters from the TUSB1210_VENDOR_SPECIFIC2 register.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Link: https://lore.kernel.org/r/20220213130524.18748-7-hdegoede@redhat.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-02-25 14:28:07 +05:30
Liu Ying 3153fa38e3 phy: dphy: Correct lpx parameter and its derivatives(ta_{get,go,sure})
According to the comment of the function phy_mipi_dphy_get_default_config(),
it uses minimum D-PHY timings based on MIPI D-PHY specification.  They are
derived from the valid ranges specified in Section 6.9, Table 14, Page 41
of the D-PHY specification (v1.2).  The table 14 explicitly mentions that
the minimum T-LPX parameter is 50 nanoseconds and the minimum TA-SURE
parameter is T-LPX nanoseconds.  Likewise, the kernel doc of the 'lpx' and
'ta_sure' members of struct phy_configure_opts_mipi_dphy mentions that
the minimum values are 50000 picoseconds and @lpx picoseconds respectively.
Also, the function phy_mipi_dphy_config_validate() checks if cfg->lpx is
less than 50000 picoseconds and if cfg->ta_sure is less than cfg->lpx,
which hints the same minimum values.

Without this patch, the function phy_mipi_dphy_get_default_config()
wrongly sets cfg->lpx to 60000 picoseconds and cfg->ta_sure to 2 * cfg->lpx.
So, let's correct them to 50000 picoseconds and cfg->lpx respectively.

Note that I've only tested the patch with RM67191 DSI panel on i.MX8mq EVK.
Help is needed to test with other i.MX8mq, Meson and Rockchip platforms,
as I don't have the hardwares.

Fixes: dddc97e823 ("phy: dphy: Add configuration helpers")
Cc: Andrzej Hajda <andrzej.hajda@intel.com>
Cc: Neil Armstrong <narmstrong@baylibre.com>
Cc: Laurent Pinchart <Laurent.pinchart@ideasonboard.com>
Cc: Kishon Vijay Abraham I <kishon@ti.com>
Cc: Vinod Koul <vkoul@kernel.org>
Cc: Heiko Stuebner <heiko@sntech.de>
Cc: Maxime Ripard <mripard@kernel.org>
Cc: Guido Günther <agx@sigxcpu.org>
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Link: https://lore.kernel.org/r/20220216071257.1647703-1-victor.liu@nxp.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-02-25 14:14:06 +05:30
Al Cooper ae532b2b7a phy: usb: Add "wake on" functionality for newer Synopsis XHCI controllers
Add "wake on" support for the newer Synopsis based XHCI only controller.
This works on the 72165 and 72164 and newer chips and does not work
on 7216 based systems. Also switch the USB sysclk to a slower clock
on suspend to save additional power in S2. The clock switch will only
save power on the 72165b0 and newer chips and is a nop on older chips.

Signed-off-by: Al Cooper <alcooperx@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Link: https://lore.kernel.org/r/20220215032422.5179-1-f.fainelli@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-02-25 14:13:19 +05:30
Minghao Chi (CGEL ZTE) 10c573c613 phy/cadence: Use of_device_get_match_data()
Use of_device_get_match_data() instead of open-coding it.

Reported-by: Zeal Robot <zealci@zte.com.cn>
Signed-off-by: Minghao Chi (CGEL ZTE) <chi.minghao@zte.com.cn>
Link: https://lore.kernel.org/r/20220214020626.1714696-1-chi.minghao@zte.com.cn
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-02-25 13:58:12 +05:30
Samuel Holland 204642e7de phy: sun4i-usb: Add D1 variant
D1 has a register layout like A100 and H616, with the moved SIDDQ bit.
Unlike H616 it does not have any dependencies between PHY instances.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Link: https://lore.kernel.org/r/20220203013558.11490-4-samuel@sholland.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-02-25 13:53:21 +05:30
Andre Przywara 1743dea7f0 phy: sun4i-usb: Rework HCI PHY (aka "pmu_unk1") handling
As Icenowy pointed out, newer manuals (starting with H6) actually
document the register block at offset 0x800 as "HCI controller and PHY
interface", also describe the bits in our "PMU_UNK1" register.
Let's put proper names to those "unknown" variables and symbols.

While we are at it, generalise the existing code by allowing a bitmap
of bits to clear and set, to cover newer SoCs: The A100 and H616 use a
different bit for the SIDDQ control.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Link: https://lore.kernel.org/r/20220203013558.11490-3-samuel@sholland.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-02-25 13:53:21 +05:30
Samuel Holland 5df4afa1e4 phy: sun4i-usb: Remove .disc_thresh where not applicable
.disc_thresh is not used when .type = sun50i_h6_phy, so providing a
value for it is misleading.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Link: https://lore.kernel.org/r/20220203013558.11490-2-samuel@sholland.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-02-25 13:53:21 +05:30
Yifeng Zhao 7160820d74 phy: rockchip: add naneng combo phy for RK3568
This patch implements a combo phy driver for Rockchip SoCs
with NaNeng IP block. This phy can be used as pcie-phy, usb3-phy,
sata-phy or sgmii-phy.

Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Tested-by: Peter Geis <pgwipeout@gmail.com>
Tested-by: Frank Wunderlich <frank-w@public-files.de>
Link: https://lore.kernel.org/r/20220208091326.12495-4-yifeng.zhao@rock-chips.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-02-24 20:13:52 +05:30
Sankeerth Billakanti 4a4c3cc146 phy: qcom: Program SSC only if supported by sink
Some legacy eDP sinks may not support SSC. The support for SSC is
indicated through an opts flag from the controller driver. This
change will enable SSC only if the sink supports it.

Signed-off-by: Sankeerth Billakanti <quic_sbillaka@quicinc.com>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Link: https://lore.kernel.org/r/20220207161612.REPOST.v1.3.Ie81d594ec2327dae6410db359cc492484bab171f@changeid
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-02-08 11:02:55 +05:30
Sankeerth Billakanti cc62512c1b phy: qcom: Add support for eDP PHY on sc7280
The sc7280 platform supports native eDP controller and PHY.
This change will add support for the eDP PHY on sc7280.

Signed-off-by: Sankeerth Billakanti <quic_sbillaka@quicinc.com>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Link: https://lore.kernel.org/r/20220207161612.REPOST.v1.2.Iff75c0ea8499f0baf2aa5800f2c45c4128e2415a@changeid
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-02-08 11:02:55 +05:30
Aswath Govindraju d88ca22d6f phy: cadence: Sierra: Add support for skipping configuration
In some cases, a single SerDes instance can be shared between two different
processors, each using a separate link. In these cases, the SerDes
configuration is done in an earlier boot stage. Therefore, add support to
skip reconfiguring, if it is was already configured beforehand.

Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Reviewed-by: Dan Carpenter <dan.carpenter@oracle.com>
Link: https://lore.kernel.org/r/20220128072642.29188-1-a-govindraju@ti.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-02-07 10:27:43 +05:30
Vinod Koul 1e805d190b phy: fixes for 5.17
Fixes for bunch of drivers:
  - clk params for dphy
  - arg fix for mtk-tphy
  - refcount leak fix for stm32
  - bus width fix for zynqmp
  - sentinel fix ti
  - PHY_BRCM_USB Kconfig fix
  - clk fix for usb phy
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Merge tag 'phy-fixes-5.17' into next

Merge phy fixes for 5.17 into next branch to resolve the conflict
between fixes and next for upcoming patches
2022-02-07 10:24:00 +05:30
Liu Ying 9a8406ba1a phy: dphy: Correct clk_pre parameter
The D-PHY specification (v1.2) explicitly mentions that the T-CLK-PRE
parameter's unit is Unit Interval(UI) and the minimum value is 8.  Also,
kernel doc of the 'clk_pre' member of struct phy_configure_opts_mipi_dphy
mentions that it should be in UI.  However, the dphy core driver wrongly
sets 'clk_pre' to 8000, which seems to hint that it's in picoseconds.

So, let's fix the dphy core driver to correctly reflect the T-CLK-PRE
parameter's minimum value according to the D-PHY specification.

I'm assuming that all impacted custom drivers shall program values in
TxByteClkHS cycles into hardware for the T-CLK-PRE parameter.  The D-PHY
specification mentions that the frequency of TxByteClkHS is exactly 1/8
the High-Speed(HS) bit rate(each HS bit consumes one UI).  So, relevant
custom driver code is changed to program those values as
DIV_ROUND_UP(cfg->clk_pre, BITS_PER_BYTE), then.

Note that I've only tested the patch with RM67191 DSI panel on i.MX8mq EVK.
Help is needed to test with other i.MX8mq, Meson and Rockchip platforms,
as I don't have the hardwares.

Fixes: 2ed869990e ("phy: Add MIPI D-PHY configuration options")
Tested-by: Liu Ying <victor.liu@nxp.com> # RM67191 DSI panel on i.MX8mq EVK
Reviewed-by: Andrzej Hajda <andrzej.hajda@intel.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> # for phy-meson-axg-mipi-dphy.c
Tested-by: Neil Armstrong <narmstrong@baylibre.com> # for phy-meson-axg-mipi-dphy.c
Tested-by: Guido Günther <agx@sigxcpu.org> # Librem 5 (imx8mq) with it's rather picky panel
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Link: https://lore.kernel.org/r/20220124024007.1465018-1-victor.liu@nxp.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-02-02 10:33:04 +05:30
Wan Jiabing 46e9947178 phy: phy-mtk-tphy: Fix duplicated argument in phy-mtk-tphy
Fix following coccicheck warning:
./drivers/phy/mediatek/phy-mtk-tphy.c:994:6-29: duplicated argument
to && or ||

The efuse_rx_imp is duplicate. Here should be efuse_tx_imp.

Signed-off-by: Wan Jiabing <wanjiabing@vivo.com>
Acked-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Link: https://lore.kernel.org/r/20220107025050.787720-1-wanjiabing@vivo.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-01-27 12:14:34 +05:30
Amjad Ouled-Ameur 6f1dedf089 phy: amlogic: meson8b-usb2: fix shared reset control use
Use reset_control_rearm() call if an error occurs in case
phy_meson8b_usb2_power_on() fails after reset() has been called, or in
case phy_meson8b_usb2_power_off() is called i.e the resource is no longer
used and the reset line may be triggered again by other devices.

reset_control_rearm() keeps use of triggered_count sane in the reset
framework, use of reset_control_reset() on shared reset line should
be balanced with reset_control_rearm().

Signed-off-by: Amjad Ouled-Ameur <aouledameur@baylibre.com>
Reported-by: Jerome Brunet <jbrunet@baylibre.com>
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20220111095255.176141-4-aouledameur@baylibre.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-01-27 11:56:54 +05:30
Amjad Ouled-Ameur 6466ba1898 phy: amlogic: meson8b-usb2: Use dev_err_probe()
Use the existing dev_err_probe() helper instead of open-coding the same
operation.

Signed-off-by: Amjad Ouled-Ameur <aouledameur@baylibre.com>
Reported-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20220111095255.176141-3-aouledameur@baylibre.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-01-27 11:56:54 +05:30
Amjad Ouled-Ameur 2f87727130 phy: amlogic: phy-meson-gxl-usb2: fix shared reset controller use
Use reset_control_rearm() call if an error occurs in case
phy_meson_gxl_usb2_init() fails after reset() has been called ; or in case
phy_meson_gxl_usb2_exit() is called i.e the resource is no longer used
and the reset line may be triggered again by other devices.

reset_control_rearm() keeps use of triggered_count sane in the reset
framework. Therefore, use of reset_control_reset() on shared reset line
should be balanced with reset_control_rearm().

Signed-off-by: Amjad Ouled-Ameur <aouledameur@baylibre.com>
Reported-by: Jerome Brunet <jbrunet@baylibre.com>
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20220111095255.176141-2-aouledameur@baylibre.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-01-27 11:56:54 +05:30
Geert Uytterhoeven 3d565bd6fb phy: freescale: i.MX8 PHYs should depend on ARCH_MXC && ARM64
The Freescale/NXP i.MX8 USB3, MIPI DSI, and PCIE PHYs are only present
on the NXP i.MX8 family of SoCs.  Hence wrap the config symbols for
these PHYs inside a check for ARCH_MXC && ARM64, to prevent asking the
user about these drivers when configuring a kernel without NXP i.MX SoC
family support.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Guido Günther <agx@sigxcpu.org>
Link: https://lore.kernel.org/r/393868affd830016d35f0d9aba32ccd7098c8073.1641987369.git.geert+renesas@glider.be
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-01-27 11:05:18 +05:30
Dan Carpenter cfc826c88a phy: stm32: fix a refcount leak in stm32_usbphyc_pll_enable()
This error path needs to decrement "usbphyc->n_pll_cons.counter" before
returning.

Fixes: 5b1af71280 ("phy: stm32: rework PLL Lock detection")
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Link: https://lore.kernel.org/r/20220112111724.GB3019@kili
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-01-27 11:04:40 +05:30
Luca Weiss 8456caa61c phy: qcom-qusb2: Add compatible for MSM8953
Add compatible for MSM8953 QUSB2 device which reuses MSM8996
configuration.

Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Acked-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20220112194118.178026-3-luca@z3ntu.xyz
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-01-27 10:59:26 +05:30
Marcel Ziswiler a6c99fd55b phy: freescale: pcie: cosmetic clean-up
Sort includes alphabethically and add a new line before the dt-bindings
one as usually done.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>

Link: https://lore.kernel.org/r/20220113090321.119880-1-marcel@ziswiler.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-01-27 10:58:19 +05:30
Robert Hancock 37291f60d0 phy: xilinx: zynqmp: Fix bus width setting for SGMII
TX_PROT_BUS_WIDTH and RX_PROT_BUS_WIDTH are single registers with
separate bit fields for each lane. The code in xpsgtr_phy_init_sgmii was
not preserving the existing register value for other lanes, so enabling
the PHY in SGMII mode on one lane zeroed out the settings for all other
lanes, causing other PS-GTR peripherals such as USB3 to malfunction.

Use xpsgtr_clr_set to only manipulate the desired bits in the register.

Fixes: 4a33bea003 ("phy: zynqmp: Add PHY driver for the Xilinx ZynqMP Gigabit Transceiver")
Signed-off-by: Robert Hancock <robert.hancock@calian.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Link: https://lore.kernel.org/r/20220126001600.1592218-1-robert.hancock@calian.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-01-27 10:55:26 +05:30
Ansuel Smith dc9d167737 drivers: phy: qcom: ipq806x-usb: conver latch function to pool macro
Convert latch function to readl pool macro to tidy things up.

Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
Link: https://lore.kernel.org/r/20220117002641.26773-2-ansuelsmth@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-01-24 09:58:12 +05:30
Ansuel Smith 260f99591c drivers: phy: qcom: ipq806x-usb: convert to BITFIELD macro
Convert some define to BITFIELD macro to tidy things up.

Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
Link: https://lore.kernel.org/r/20220117002641.26773-1-ansuelsmth@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-01-24 09:58:11 +05:30
Dan Carpenter 29afbd769c phy: cadence: Sierra: fix error handling bugs in probe()
There are two bugs in the error handling:
1: If devm_of_phy_provider_register() fails then there was no cleanup.
2: The error handling called of_node_put(child) improperly leading to
   a use after free.  We are only holding the reference inside the loop
   so the last two gotos after the loop lead to a use after free bug.
   Fix this by cleaning up the partial allocations (or partial iterations)
   in the loop before doing the goto.

Fixes: a43f72ae13 ("phy: cadence: Sierra: Change MAX_LANES of Sierra to 16")
Fixes: 44d30d6228 ("phy: cadence: Add driver for Sierra PHY")
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Link: https://lore.kernel.org/r/20220115115146.GC7552@kili
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-01-24 09:35:31 +05:30
Kishon Vijay Abraham I 6d1e6bcb31 phy: ti: Fix missing sentinel for clk_div_table
_get_table_maxdiv() tries to access "clk_div_table" array out of bound
defined in phy-j721e-wiz.c. Add a sentinel entry to prevent
the following global-out-of-bounds error reported by enabling KASAN.

[    9.552392] BUG: KASAN: global-out-of-bounds in _get_maxdiv+0xc0/0x148
[    9.558948] Read of size 4 at addr ffff8000095b25a4 by task kworker/u4:1/38
[    9.565926]
[    9.567441] CPU: 1 PID: 38 Comm: kworker/u4:1 Not tainted 5.16.0-116492-gdaadb3bd0e8d-dirty #360
[    9.576242] Hardware name: Texas Instruments J721e EVM (DT)
[    9.581832] Workqueue: events_unbound deferred_probe_work_func
[    9.587708] Call trace:
[    9.590174]  dump_backtrace+0x20c/0x218
[    9.594038]  show_stack+0x18/0x68
[    9.597375]  dump_stack_lvl+0x9c/0xd8
[    9.601062]  print_address_description.constprop.0+0x78/0x334
[    9.606830]  kasan_report+0x1f0/0x260
[    9.610517]  __asan_load4+0x9c/0xd8
[    9.614030]  _get_maxdiv+0xc0/0x148
[    9.617540]  divider_determine_rate+0x88/0x488
[    9.622005]  divider_round_rate_parent+0xc8/0x124
[    9.626729]  wiz_clk_div_round_rate+0x54/0x68
[    9.631113]  clk_core_determine_round_nolock+0x124/0x158
[    9.636448]  clk_core_round_rate_nolock+0x68/0x138
[    9.641260]  clk_core_set_rate_nolock+0x268/0x3a8
[    9.645987]  clk_set_rate+0x50/0xa8
[    9.649499]  cdns_sierra_phy_init+0x88/0x248
[    9.653794]  phy_init+0x98/0x108
[    9.657046]  cdns_pcie_enable_phy+0xa0/0x170
[    9.661340]  cdns_pcie_init_phy+0x250/0x2b0
[    9.665546]  j721e_pcie_probe+0x4b8/0x798
[    9.669579]  platform_probe+0x8c/0x108
[    9.673350]  really_probe+0x114/0x630
[    9.677037]  __driver_probe_device+0x18c/0x220
[    9.681505]  driver_probe_device+0xac/0x150
[    9.685712]  __device_attach_driver+0xec/0x170
[    9.690178]  bus_for_each_drv+0xf0/0x158
[    9.694124]  __device_attach+0x184/0x210
[    9.698070]  device_initial_probe+0x14/0x20
[    9.702277]  bus_probe_device+0xec/0x100
[    9.706223]  deferred_probe_work_func+0x124/0x180
[    9.710951]  process_one_work+0x4b0/0xbc0
[    9.714983]  worker_thread+0x74/0x5d0
[    9.718668]  kthread+0x214/0x230
[    9.721919]  ret_from_fork+0x10/0x20
[    9.725520]
[    9.727032] The buggy address belongs to the variable:
[    9.732183]  clk_div_table+0x24/0x440

Fixes: 091876cc35 ("phy: ti: j721e-wiz: Add support for WIZ module present in TI J721E SoC")
Cc: stable@vger.kernel.org # v5.10+
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Link: https://lore.kernel.org/r/20220117110108.4117-1-kishon@ti.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-01-24 09:33:33 +05:30
Al Cooper 5070ce8624 phy: broadcom: Kconfig: Fix PHY_BRCM_USB config option
The previous commit 4b402fa8e0 ("phy: phy-brcm-usb: support PHY on
the BCM4908") added a second "default" line for ARCH_BCM_4908 above
the original "default" line for ARCH_BRCMSTB. When two "default"
lines are used, only the first is used and this change stopped
the PHY_BRCM_USB option for being enabled for ARCH_BRCMSTB.
The fix is to use one "default line with "||".

Fixes: 4b402fa8e0 ("phy: phy-brcm-usb: support PHY on the BCM4908")
Signed-off-by: Al Cooper <alcooperx@gmail.com>
Acked-by: Rafał Miłecki <rafal@milecki.pl>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Link: https://lore.kernel.org/r/20211201180653.35097-4-alcooperx@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-01-23 19:33:28 +05:30
Al Cooper 42fed57046 phy: usb: Leave some clocks running during suspend
The PHY client driver does a phy_exit() call on suspend or rmmod and
the PHY driver needs to know the difference because some clocks need
to be kept running for suspend but can be shutdown on unbind/rmmod
(or if there are no PHY clients at all).

The fix is to use a PM notifier so the driver can tell if a PHY
client is calling exit() because of a system suspend or a driver
unbind/rmmod.

Signed-off-by: Al Cooper <alcooperx@gmail.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Link: https://lore.kernel.org/r/20211201180653.35097-2-alcooperx@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-01-23 19:33:15 +05:30
Linus Torvalds 3bad80dab9 Char/Misc and other driver changes for 5.17-rc1
Here is the large set of char, misc, and other "small" driver subsystem
 changes for 5.17-rc1.
 
 Lots of different things are in here for char/misc drivers such as:
 	- habanalabs driver updates
 	- mei driver updates
 	- lkdtm driver updates
 	- vmw_vmci driver updates
 	- android binder driver updates
 	- other small char/misc driver updates
 
 Also smaller driver subsystems have also been updated, including:
 	- fpga subsystem updates
 	- iio subsystem updates
 	- soundwire subsystem updates
 	- extcon subsystem updates
 	- gnss subsystem updates
 	- phy subsystem updates
 	- coresight subsystem updates
 	- firmware subsystem updates
 	- comedi subsystem updates
 	- mhi subsystem updates
 	- speakup subsystem updates
 	- rapidio subsystem updates
 	- spmi subsystem updates
 	- virtual driver updates
 	- counter subsystem updates
 
 Too many individual changes to summarize, the shortlog contains the full
 details.
 
 All of these have been in linux-next for a while with no reported
 issues.
 
 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Merge tag 'char-misc-5.17-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc

Pull char/misc and other driver updates from Greg KH:
 "Here is the large set of char, misc, and other "small" driver
  subsystem changes for 5.17-rc1.

  Lots of different things are in here for char/misc drivers such as:

   - habanalabs driver updates

   - mei driver updates

   - lkdtm driver updates

   - vmw_vmci driver updates

   - android binder driver updates

   - other small char/misc driver updates

  Also smaller driver subsystems have also been updated, including:

   - fpga subsystem updates

   - iio subsystem updates

   - soundwire subsystem updates

   - extcon subsystem updates

   - gnss subsystem updates

   - phy subsystem updates

   - coresight subsystem updates

   - firmware subsystem updates

   - comedi subsystem updates

   - mhi subsystem updates

   - speakup subsystem updates

   - rapidio subsystem updates

   - spmi subsystem updates

   - virtual driver updates

   - counter subsystem updates

  Too many individual changes to summarize, the shortlog contains the
  full details.

  All of these have been in linux-next for a while with no reported
  issues"

* tag 'char-misc-5.17-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (406 commits)
  counter: 104-quad-8: Fix use-after-free by quad8_irq_handler
  dt-bindings: mux: Document mux-states property
  dt-bindings: ti-serdes-mux: Add defines for J721S2 SoC
  counter: remove old and now unused registration API
  counter: ti-eqep: Convert to new counter registration
  counter: stm32-lptimer-cnt: Convert to new counter registration
  counter: stm32-timer-cnt: Convert to new counter registration
  counter: microchip-tcb-capture: Convert to new counter registration
  counter: ftm-quaddec: Convert to new counter registration
  counter: intel-qep: Convert to new counter registration
  counter: interrupt-cnt: Convert to new counter registration
  counter: 104-quad-8: Convert to new counter registration
  counter: Update documentation for new counter registration functions
  counter: Provide alternative counter registration functions
  counter: stm32-timer-cnt: Convert to counter_priv() wrapper
  counter: stm32-lptimer-cnt: Convert to counter_priv() wrapper
  counter: ti-eqep: Convert to counter_priv() wrapper
  counter: ftm-quaddec: Convert to counter_priv() wrapper
  counter: intel-qep: Convert to counter_priv() wrapper
  counter: microchip-tcb-capture: Convert to counter_priv() wrapper
  ...
2022-01-14 16:02:28 +01:00
Greg Kroah-Hartman e75a58db41 phy-for-5.17
- New support:
         - Qualcomm eDP PHY driver
 	- Qualcomm SM8450 UFS, USB2, USB3, PCIe0 and PCIe1 phy support
 	- Lan966x ethernet serdes PHY driver
 	- Support for uniphier NXI & Pro4 SoC
         - Qualcomm SM6350 USB2 support
 	- Amlogic Meson8 HDMI TX PHY driver
 	- Rockchip rk3568 usb2 support
 	- Intel Thunder Bay eMMC PHY driver
 	- Freescale IMX8 PCIe phy driver
 
   - Updates:
 	- Cadence Sierra driver updates for multilink configurations
         - Bcm usb2 updates for Phy reg space
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Merge tag 'phy-for-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy into char-misc-next

Vinod writes:

phy-for-5.17

  - New support:
        - Qualcomm eDP PHY driver
	- Qualcomm SM8450 UFS, USB2, USB3, PCIe0 and PCIe1 phy support
	- Lan966x ethernet serdes PHY driver
	- Support for uniphier NXI & Pro4 SoC
        - Qualcomm SM6350 USB2 support
	- Amlogic Meson8 HDMI TX PHY driver
	- Rockchip rk3568 usb2 support
	- Intel Thunder Bay eMMC PHY driver
	- Freescale IMX8 PCIe phy driver

  - Updates:
	- Cadence Sierra driver updates for multilink configurations
        - Bcm usb2 updates for Phy reg space

* tag 'phy-for-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy: (72 commits)
  phy: cadence: Sierra: Add support for derived reference clock output
  dt-bindings: phy: cadence-sierra: Add clock ID for derived reference clock
  phy: cadence: Sierra: Add PCIe + QSGMII PHY multilink configuration
  phy: cadence: Sierra: Add support for PHY multilink configurations
  phy: cadence: Sierra: Fix to get correct parent for mux clocks
  phy: cadence: Sierra: Update single link PCIe register configuration
  phy: cadence: Sierra: Check PIPE mode PHY status to be ready for operation
  phy: cadence: Sierra: Check cmn_ready assertion during PHY power on
  phy: cadence: Sierra: Add PHY PCS common register configurations
  phy: cadence: Sierra: Rename some regmap variables to be in sync with Sierra documentation
  phy: cadence: Sierra: Add support to get SSC type from device tree
  dt-bindings: phy: cadence-sierra: Add binding to specify SSC mode
  dt-bindings: phy: cadence-torrent: Rename SSC macros to use generic names
  phy: cadence: Sierra: Prepare driver to add support for multilink configurations
  phy: cadence: Sierra: Use of_device_get_match_data() to get driver data
  phy: mediatek: Fix missing check in mtk_mipi_tx_probe
  phy: uniphier-usb3ss: fix unintended writing zeros to PHY register
  phy: phy-mtk-tphy: use new io helpers to access register
  phy: phy-mtk-xsphy: use new io helpers to access register
  phy: mediatek: add helpers to update bits of registers
  ...
2021-12-30 14:02:16 +01:00
Swapnil Jakhade 09d976b3e8 phy: cadence: Sierra: Add support for derived reference clock output
Sierra has derived differential reference clock output which is sourced
after the spread spectrum generation has been added. Add support to drive
derived reference clock out of serdes. Model this derived clock as a
"clock" so that platforms using this can enable it.

Sierra Main LC VCO PLL divider 1 clock is programmed to output 100MHz
clock output.

Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Reviewed-by: Aswath Govindraju <a-govindraju@ti.com>
Link: https://lore.kernel.org/r/20211223060137.9252-16-sjakhade@cadence.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-12-27 16:35:09 +05:30
Swapnil Jakhade 8a1b82d744 phy: cadence: Sierra: Add PCIe + QSGMII PHY multilink configuration
Add register sequences for PCIe + QSGMII PHY multilink configuration.
PHY configuration for multi-link operation is done in two steps.
e.g. Consider a case for a 4 lane PHY with PCIe using 2 lanes and QSGMII
other 2 lanes. Sierra PHY has 2 PLLs, viz. PLLLC and PLLLC1. So in this
case, PLLLC is used for PCIe and PLLLC1 is used for QSGMII.

PHY is configured in two steps as described below.

[1] For first step, the register values are selected as
    [TYPE_PCIE][TYPE_QSGMII][ssc].
    This will configure PHY registers associated for PCIe involving PLLLC
    registers and registers for first 2 lanes of PHY.
[2] In second step, the register values are selected as
    [TYPE_QSGMII][TYPE_PCIE][ssc].
    This will configure PHY registers associated for QSGMII involving
    PLLLC1 registers and registers for other 2 lanes of PHY.

This completes the PHY configuration for multilink operation.

Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Reviewed-by: Aswath Govindraju <a-govindraju@ti.com>
Link: https://lore.kernel.org/r/20211223060137.9252-14-sjakhade@cadence.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-12-27 16:35:09 +05:30
Swapnil Jakhade 6b81f05a87 phy: cadence: Sierra: Add support for PHY multilink configurations
Add support for multilink configuration of Sierra PHY. Currently,
maximum two links are supported.

Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Reviewed-by: Aswath Govindraju <a-govindraju@ti.com>
Link: https://lore.kernel.org/r/20211223060137.9252-13-sjakhade@cadence.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-12-27 16:35:09 +05:30
Swapnil Jakhade da08aab940 phy: cadence: Sierra: Fix to get correct parent for mux clocks
Fix get_parent() callback to return the correct index of the parent for
PLL_CMNLC1 clock. Add a separate table of register values corresponding
to the parent index for PLL_CMNLC1. Update set_parent() callback
accordingly.

Fixes: 28081b7285 ("phy: cadence: Sierra: Model PLL_CMNLC and PLL_CMNLC1 as clocks (mux clocks)")
Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Reviewed-by: Aswath Govindraju <a-govindraju@ti.com>
Link: https://lore.kernel.org/r/20211223060137.9252-12-sjakhade@cadence.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-12-27 16:35:09 +05:30
Swapnil Jakhade 7a5ad9b4b9 phy: cadence: Sierra: Update single link PCIe register configuration
Add single link PCIe register configurations for no SSC and internal
SSC. Also, add missing PMA lane registers for external SSC.

Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Reviewed-by: Aswath Govindraju <a-govindraju@ti.com>
Link: https://lore.kernel.org/r/20211223060137.9252-11-sjakhade@cadence.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-12-27 16:35:09 +05:30
Swapnil Jakhade 36ce416330 phy: cadence: Sierra: Check PIPE mode PHY status to be ready for operation
PIPE phy status is used to communicate the completion of several PHY
functions. Check if PHY is ready for operation while configured for
PIPE mode during startup.

Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Reviewed-by: Aswath Govindraju <a-govindraju@ti.com>
Link: https://lore.kernel.org/r/20211223060137.9252-10-sjakhade@cadence.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-12-27 16:35:09 +05:30
Swapnil Jakhade f1cc6c3f08 phy: cadence: Sierra: Check cmn_ready assertion during PHY power on
Check if PMA cmn_ready is set indicating the startup process is complete.

Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Reviewed-by: Aswath Govindraju <a-govindraju@ti.com>
Link: https://lore.kernel.org/r/20211223060137.9252-9-sjakhade@cadence.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-12-27 16:35:09 +05:30
Swapnil Jakhade fa10517211 phy: cadence: Sierra: Add PHY PCS common register configurations
Add PHY PCS common register configuration sequences for single link.
Update single link PCIe register sequence accordingly.

Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Reviewed-by: Aswath Govindraju <a-govindraju@ti.com>
Link: https://lore.kernel.org/r/20211223060137.9252-8-sjakhade@cadence.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-12-27 16:35:09 +05:30
Swapnil Jakhade 8c95e17226 phy: cadence: Sierra: Rename some regmap variables to be in sync with Sierra documentation
No functional change. Rename some regmap variables as mentioned in Sierra
register description documentation.

Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Reviewed-by: Aswath Govindraju <a-govindraju@ti.com>
Link: https://lore.kernel.org/r/20211223060137.9252-7-sjakhade@cadence.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-12-27 16:35:08 +05:30
Swapnil Jakhade 1e902b2ae3 phy: cadence: Sierra: Add support to get SSC type from device tree
Add support to get SSC type from DT.

Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Reviewed-by: Aswath Govindraju <a-govindraju@ti.com>
Link: https://lore.kernel.org/r/20211223060137.9252-6-sjakhade@cadence.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-12-27 16:35:08 +05:30
Swapnil Jakhade 078e9e9211 phy: cadence: Sierra: Prepare driver to add support for multilink configurations
Sierra driver currently supports single link configurations only. Prepare
driver to support multilink multiprotocol configurations along with
different SSC modes.

Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Reviewed-by: Aswath Govindraju <a-govindraju@ti.com>
Link: https://lore.kernel.org/r/20211223060137.9252-3-sjakhade@cadence.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-12-27 16:35:08 +05:30
Swapnil Jakhade c3c11d5534 phy: cadence: Sierra: Use of_device_get_match_data() to get driver data
Use of_device_get_match_data() to get driver data instead of boilerplate
code.

Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Reviewed-by: Aswath Govindraju <a-govindraju@ti.com>
Link: https://lore.kernel.org/r/20211223060137.9252-2-sjakhade@cadence.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-12-27 16:35:08 +05:30
Miaoqian Lin 399c91c3f3 phy: mediatek: Fix missing check in mtk_mipi_tx_probe
The of_device_get_match_data() function may return NULL.
Add check to prevent potential null dereference.

Signed-off-by: Miaoqian Lin <linmq006@gmail.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20211224082103.7658-1-linmq006@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-12-27 15:58:03 +05:30
Ryuta NAKANISHI 898c7a9ec8 phy: uniphier-usb3ss: fix unintended writing zeros to PHY register
Similar to commit 4a90bbb478 ("phy: uniphier-pcie: Fix updating phy
parameters"), in function uniphier_u3ssphy_set_param(), unintentionally
write zeros to other fields when writing PHY registers.

Fixes: 5ab43d0f86 ("phy: socionext: add USB3 PHY driver for UniPhier SoC")
Signed-off-by: Ryuta NAKANISHI <nakanishi.ryuta@socionext.com>
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Link: https://lore.kernel.org/r/1640150369-4134-1-git-send-email-hayashi.kunihiko@socionext.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-12-24 10:06:38 +05:30
Chunfeng Yun 33d18746fa phy: phy-mtk-tphy: use new io helpers to access register
Use new helpers mtk_phy_clear/set/update_bits() to access registers

Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Link: https://lore.kernel.org/r/20211218082802.5256-5-chunfeng.yun@mediatek.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-12-24 10:06:38 +05:30
Chunfeng Yun 9520bbf3cb phy: phy-mtk-xsphy: use new io helpers to access register
Use new helpers mtk_phy_clear/set/update_bits() to access registers

Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Link: https://lore.kernel.org/r/20211218082802.5256-4-chunfeng.yun@mediatek.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-12-24 10:06:37 +05:30
Chunfeng Yun 1371b9a563 phy: mediatek: add helpers to update bits of registers
Add three helpers mtk_phy_clear/set/update_bits() for registers operation

Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Link: https://lore.kernel.org/r/20211218082802.5256-3-chunfeng.yun@mediatek.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-12-24 10:06:37 +05:30
Chunfeng Yun 6f2b033cb8 phy: phy-mtk-tphy: add support efuse setting
Due to some SoCs have a bit shift issue that will drop a bit for usb3
phy or pcie phy, fix it by adding software efuse reading and setting,
but only support it optionally for version 2/3.

Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Link: https://lore.kernel.org/r/20211218082802.5256-2-chunfeng.yun@mediatek.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-12-24 10:06:37 +05:30
Dmitry Baryshkov 2c91bf6bf2 phy: qcom-qmp: Add SM8450 PCIe1 PHY support
There are two different PCIe PHYs on SM8450, one having one lane (v5)
and another with two lanes (v5.20). This commit adds support for the
second PCIe phy.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211218141754.503661-3-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-12-24 10:06:37 +05:30
Peter Geis 42b559727a phy: phy-rockchip-inno-usb2: add rk3568 support
The rk3568 usb2phy is a standalone device with a single muxed interrupt.
Add support for the registers to the usb2phy driver.

Signed-off-by: Peter Geis <pgwipeout@gmail.com>
Tested-by: Michael Riesch <michael.riesch@wolfvision.net>
Link: https://lore.kernel.org/r/20211215210252.120923-7-pgwipeout@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-12-23 16:54:48 +05:30
Peter Geis ed2b5a8e6b phy: phy-rockchip-inno-usb2: support muxed interrupts
The rk3568 usb2phy has a single muxed interrupt that handles all
interrupts.
Allow the driver to plug in only a single interrupt as necessary.

Signed-off-by: Peter Geis <pgwipeout@gmail.com>
Tested-by: Michael Riesch <michael.riesch@wolfvision.net>
Link: https://lore.kernel.org/r/20211215210252.120923-6-pgwipeout@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-12-23 16:54:48 +05:30
Peter Geis e6915e1acc phy: phy-rockchip-inno-usb2: support standalone phy nodes
New Rockchip devices have the usb2 phy devices as standalone nodes
instead of children of the grf node.
Allow the driver to find the grf node from a phandle.

Signed-off-by: Peter Geis <pgwipeout@gmail.com>
Tested-by: Michael Riesch <michael.riesch@wolfvision.net>
Link: https://lore.kernel.org/r/20211215210252.120923-5-pgwipeout@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-12-23 16:54:48 +05:30
Peter Geis 9c19c531dc phy: phy-rockchip-inno-usb2: support #address_cells = 2
New Rockchip devices have the usb phy nodes as standalone devices.
These nodes have register nodes with #address_cells = 2, but only use 32
bit addresses.

Adjust the driver to check if the returned address is "0", and adjust
the index in that case.

Signed-off-by: Peter Geis <pgwipeout@gmail.com>
Tested-by: Michael Riesch <michael.riesch@wolfvision.net>
Link: https://lore.kernel.org/r/20211215210252.120923-4-pgwipeout@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-12-23 16:54:48 +05:30
Dmitry Baryshkov 107ba9bf49 phy: qcom-qmp: Add SM8450 PCIe0 PHY support
There are two different PCIe PHYs on SM8450, one having one lane (v5)
and another with two lanes (v5.20). This commit adds support for the
first PCIe phy only, support for the second PCIe PHY is coming in next
commits.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211214225846.2043361-4-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-12-18 11:25:07 +05:30
Jakub Kicinski 7cd2802d74 Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net
No conflicts.

Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2021-12-16 16:13:19 -08:00
Vinod Koul 6ad102e05d phy: qcom-qmp: Add SM8450 USB QMP PHYs
Add support for the USB DP & UNI PHYs found on SM8450. This is same as
the phy version used on SM8350 and sequences turned out to be same, so
use the same table from SM8350 for this as well.

Signed-off-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211213131450.535775-3-vkoul@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-12-16 12:06:01 +05:30
Vinod Koul c8d09c7ebc phy: freescale: pcie: explicitly add bitfield.h
kernel test robot complains about missing FIELD_PREP, so include
bitfield.h for that

drivers/phy/freescale/phy-fsl-imx8m-pcie.c:41:37: error: implicit declaration of function 'FIELD_PREP' [-Werror=implicit-function-declaration]
drivers/phy/freescale/phy-fsl-imx8m-pcie.c:41:41: error: implicit declaration of function 'FIELD_PREP' [-Werror=implicit-function-declaration]

Reported-by: kernel test robot <lkp@intel.com>
Fixes: 1aa97b0022 ("phy: freescale: pcie: Initialize the imx8 pcie standalone phy driver")
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Richard Zhu <hongxing.zhu@nxp.com>
Link: https://lore.kernel.org/r/20211215060834.921617-1-vkoul@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-12-15 20:50:43 +05:30
Richard Zhu 1aa97b0022 phy: freescale: pcie: Initialize the imx8 pcie standalone phy driver
Add the standalone i.MX8 PCIe PHY driver.

Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Tim Harvey <tharvey@gateworks.com>
Tested-by: Tim Harvey <tharvey@gateworks.com>
Link: https://lore.kernel.org/r/1638432158-4119-6-git-send-email-hongxing.zhu@nxp.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-12-14 20:02:53 +05:30
Colin Ian King b156117aed phy: rockchip-inno-usb2: remove redundant assignment to variable delay
Variable delay is being assigned to zero and the code falls through to
the next case in a switch statement that returns out of the function.
The variable is never read in this scenario and so the assignment is
redundant and can be removed.

Cleans up scan-build static analysis warning:
drivers/phy/rockchip/phy-rockchip-inno-usb2.c:753:3: warning: Value
stored to 'delay' is never read [deadcode.DeadStores]

Signed-off-by: Colin Ian King <colin.i.king@gmail.com>
Link: https://lore.kernel.org/r/20211211180054.525368-1-colin.i.king@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-12-14 14:45:07 +05:30
Horatiu Vultur 9d031a51b3 phy: lan966x: Remove set_speed function
Remove the set_speed function and allow the driver to figure out the
speed at which needs to configure the serdes based on the interface type.

Fixes: 305524902a ("phy: Add lan966x ethernet serdes PHY driver")
Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Link: https://lore.kernel.org/r/20211211214717.1284306-1-horatiu.vultur@microchip.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-12-14 14:24:48 +05:30
Miaoqian Lin 16c57fff83 phy: ti: Use IS_ERR_OR_NULL() to clean code
Use IS_ERR_OR_NULL() to make the code cleaner.

Signed-off-by: Miaoqian Lin <linmq006@gmail.com>
Link: https://lore.kernel.org/r/20211212142226.23674-1-linmq006@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-12-14 13:10:03 +05:30
Miaoqian Lin 045a31b955 phy: tegra: xusb: Fix return value of tegra_xusb_find_port_node function
callers of tegra_xusb_find_port_node() function only do NULL checking for
the return value. return NULL instead of ERR_PTR(-ENOMEM) to keep
consistent.

Signed-off-by: Miaoqian Lin <linmq006@gmail.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20211213020507.1458-1-linmq006@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-12-14 13:07:21 +05:30
Guo Zhengkui e87f13c33e phy: qcom: use struct_size instead of sizeof
Use struct_size() to get the accurate size of `clk_hw_onecell_data`
with a variable size array, instead of sizeof(data) to get the size
of a pointer.

Suggested-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Guo Zhengkui <guozhengkui@vivo.com>
Fixes: f199223cb4 ("phy: qcom: Introduce new eDP PHY driver")
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211209032114.9416-1-guozhengkui@vivo.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-12-09 17:24:54 +05:30
Vinod Koul 15aa1f668c phy: qcom-qmp: Add SM8450 UFS QMP Phy
SM8450 UFS seems to use same sequence as SM8350, so reuse the sequence
from SM8450. Add the new clock list for this phy and the new compatible

Signed-off-by: Vinod Koul <vkoul@kernel.org>
Co-developed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Acked-by: Martin K. Petersen <martin.petersen@oracle.com>
Link: https://lore.kernel.org/r/20211201074456.3969849-4-vkoul@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-12-07 17:28:55 +05:30
Horatiu Vultur 17dcc120fb phy: lan966x: Extend lan966x to support multiple phy interfaces.
Currently the driver is supporting only the interfaces QSGMII, SGMII,
RGMII and GMII. This patch extend the supported interfaces with
1000BASE-X and 2500BASE-X.

Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Acked-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Link: https://lore.kernel.org/r/20211130101015.164916-1-horatiu.vultur@microchip.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-12-02 09:49:23 +05:30
Zou Wei b2b56de9fa phy: intel: Remove redundant dev_err call in thunderbay_emmc_phy_probe()
There is a error message within devm_ioremap_resource
already, so remove the dev_err call to avoid redundant
error message.

Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: Zou Wei <zou_wei@huawei.com>
Link: https://lore.kernel.org/r/1637822289-24534-1-git-send-email-zou_wei@huawei.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-12-02 09:46:33 +05:30
Fabrice Gasnier 77ba6e7ffb phy: stm32: adopt dev_err_probe for regulators
Change stm32-usbphyc driver to use dev_err_probe(), to benefit of
devices_deferred debugfs in case of probe deferral.

Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Reviewed-by: Amelie Delaunay <amelie.delaunay@foss.st.com>
Link: https://lore.kernel.org/r/1635172265-26219-1-git-send-email-fabrice.gasnier@foss.st.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-11-26 11:26:51 +05:30
Rafał Miłecki 97ba12d3fe phy: bcm-ns-usb2: improve printing ref clk errors
Improve message & use dev_err_probe() helper which prints actual error
(helpful for debugging) and deals with -EPROBE_DEFER.

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Link: https://lore.kernel.org/r/20211123221521.25323-1-zajec5@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-11-25 10:45:04 +05:30
Marek Behún a1fb410a57 phy: marvell: phy-mvebu-cp110-comphy: add support for 5gbase-r
Add support for PHY_INTERFACE_MODE_5GBASER mode within the Marvell CP110
common PHY driver.

This is currently only supported via SMC calls to TF-A. Legacy support
may be added later, if needed.

Signed-off-by: Marek Behún <kabel@kernel.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
2021-11-23 12:14:48 +00:00
Rashmi A 97004c1a4c phy: intel: Add Thunder Bay eMMC PHY support
Add support of eMMC PHY for Intel Thunder Bay SoC,
uses the Arasan eMMC phy

Signed-off-by: Rashmi A <rashmi.a@intel.com>
Reviewed-by: Adrian Hunter <adrian.hunter@intel.com>
Link: https://lore.kernel.org/r/20211027115516.4475-5-rashmi.a@intel.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-11-23 13:11:52 +05:30
Horatiu Vultur 305524902a phy: Add lan966x ethernet serdes PHY driver
Add the Microchip lan966x ethernet serdes PHY driver for interfaces
available in the lan966x SoC.

Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Link: https://lore.kernel.org/r/20211116100818.1615762-4-horatiu.vultur@microchip.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-11-23 13:09:08 +05:30
Aswath Govindraju be24d24840 phy: phy-can-transceiver: Make devm_gpiod_get optional
In some cases the standby/enable gpio can be pulled low/high and would not
be connected to a gpio. The current driver implementation will return an
error in these cases. Therefore, make devm_gpiod_get optional.

Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Acked-by: Marc Kleine-Budde <mkl@pengutronix.de>
Link: https://lore.kernel.org/r/20211102112120.23637-1-a-govindraju@ti.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-11-23 12:15:08 +05:30
Yang Guang a463462998 phy: cadence-torrent: use swap() to make code cleaner
Use the macro 'swap()' defined in 'include/linux/minmax.h' to avoid
opencoding it.

Reported-by: Zeal Robot <zealci@zte.com.cn>
Signed-off-by: Yang Guang <yang.guang5@zte.com.cn>
Link: https://lore.kernel.org/r/20211104065233.1833499-1-yang.guang5@zte.com.cn
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-11-23 11:24:30 +05:30
Kunihiko Hayashi b1f9f4541e phy: uniphier-ahci: Add support for Pro4 SoC
Add support for PHY interface built into ahci controller implemented
in UniPhier Pro4 SoC.

Pro4 SoC distinguishes it from other SoCs as "legacy" SoC, which has GIO
clock line. And Pro4 AHCI-PHY needs to control additional reset lines
("pm", "tx", and "rx").

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Link: https://lore.kernel.org/r/1635503947-18250-9-git-send-email-hayashi.kunihiko@socionext.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-11-23 11:21:53 +05:30
Kunihiko Hayashi 7f1abed4e9 phy: uniphier-pcie: Add dual-phy support for NX1 SoC
NX1 SoC supports 2 lanes and has dual-phy. Should set appropriate
configuration values to both PHY registers.

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Link: https://lore.kernel.org/r/1635503947-18250-7-git-send-email-hayashi.kunihiko@socionext.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-11-23 11:21:53 +05:30
Kunihiko Hayashi 25bba42f95 phy: uniphier-pcie: Set VCOPLL clamp mode in PHY register
Set VCOPLL clamp mode to mode 0 to avoid hardware unstable issue.

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Link: https://lore.kernel.org/r/1635503947-18250-6-git-send-email-hayashi.kunihiko@socionext.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-11-23 11:21:53 +05:30
Kunihiko Hayashi 1c1597c802 phy: uniphier-pcie: Add compatible string and SoC-dependent data for NX1 SoC
Add basic support for UniPhier NX1 SoC. This includes a compatible string,
SoC-dependent data, and a function that set to 2-lane mode.

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Link: https://lore.kernel.org/r/1635503947-18250-5-git-send-email-hayashi.kunihiko@socionext.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-11-23 11:21:53 +05:30
Kunihiko Hayashi 877e8d28bc phy: uniphier-usb3: Add compatible string for NX1 SoC
Add basic support for UniPhier NX1 SoC. This includes a compatible string
and the same SoC-dependent data as LD20/PXs3 SoCs.

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Link: https://lore.kernel.org/r/1635503947-18250-3-git-send-email-hayashi.kunihiko@socionext.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-11-23 11:21:53 +05:30
Martin Blumenstingl e45dbd3a4b phy: amlogic: Add a new driver for the HDMI TX PHY on Meson8/8b/8m2
Amlogic Meson8/8b/8m2 have a built-in HDMI PHY in the HHI register
region. Unfortunately only few register bits are documented. For
HHI_HDMI_PHY_CNTL0 the magic numbers are taken from the 3.10 vendor
kernel.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Link: https://lore.kernel.org/r/20211020195107.1564533-3-martin.blumenstingl@googlemail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-11-23 11:17:49 +05:30
Dan Carpenter f0ae8685b2 phy: HiSilicon: Fix copy and paste bug in error handling
This should check ">pmctrl" instead of "->sysctrl".  This bug could
potentially lead to a crash if we dereference the error pointer.

Fixes: 73075011ff ("phy: HiSilicon: Add driver for Kirin 970 PCIe PHY")
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Reviewed-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
Link: https://lore.kernel.org/r/20211117074843.GE5237@kili
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-11-23 10:42:13 +05:30
Bjorn Andersson f199223cb4 phy: qcom: Introduce new eDP PHY driver
Many recent Qualcomm platforms comes with native DP and eDP support.
This consists of a controller in the MDSS and a QMP-like PHY.

While similar to the well known QMP block, the eDP PHY only has TX lanes
and the programming sequences are slightly different. Rather than
continuing the trend of parameterize the QMP driver to pieces, this
introduces the support as a new driver.

The registration of link and pixel clocks are borrowed from the QMP
driver. The non-DP link frequencies are omitted for now.

The eDP PHY is very similar to the dedicated (non-USB) DP PHY, but only
the prior is supported for now.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/20211103234410.1352424-2-bjorn.andersson@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-11-23 10:40:17 +05:30
Vinod Koul 7947113fd0 phy: ti: omap-usb2: Fix the kernel-doc style
The documentation uses incorrect style, so fix that.

drivers/phy/ti/phy-omap-usb2.c:102: warning: Function parameter or member 'comparator' not described in 'omap_usb2_set_comparator'

While at it, use a single line for function description

Signed-off-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Liam Beguin <liambeguin@gmail.com>
Link: https://lore.kernel.org/r/20211120061531.410771-2-vkoul@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-11-23 10:38:24 +05:30
Vinod Koul 0d1c7e5544 phy: qualcomm: ipq806x-usb: Fix kernel-doc style
The functions are documented but there were style issues, so fix
the style and add missing description for phy_dwc3

drivers/phy/qualcomm/phy-qcom-ipq806x-usb.c:130:
drivers/phy/qualcomm/phy-qcom-ipq806x-usb.c:174:
drivers/phy/qualcomm/phy-qcom-ipq806x-usb.c:212: warning:
This comment starts with '/**', but isn't a kernel-doc comment.
Refer Documentation/doc-guide/kernel-doc.rst

Reviewed-by: Randy Dunlap <rdunlap@infradead.org>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211120061531.410771-1-vkoul@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-11-23 10:38:24 +05:30
Rafał Miłecki d3bc6269e2 phy: bcm-ns-usb2: support updated DT binding with PHY reg space
Updated DT binding maps just a PHY's register space instead of the whole
DMU block. Accessing a common CRU reg is handled using syscon &
regmap.

The old binding has been deprecated and remains supported as a fallback
method.

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Link: https://lore.kernel.org/r/20211026093716.5567-1-zajec5@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-11-23 10:22:56 +05:30
Vinod Koul 466b1516e7 phy: ti: tusb1210: Fix the kernel-doc warn
The comment is not kernel-doc one and starts with /**, so fix that.

drivers/phy/ti/phy-tusb1210.c:16: warning: expecting prototype for tusb1210.c(). Prototype was for TUSB1210_VENDOR_SPECIFIC2() instead

Signed-off-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Liam Beguin <liambeguin@gmail.com>
Link: https://lore.kernel.org/r/20211116103951.34482-6-vkoul@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-11-20 11:33:23 +05:30
Vinod Koul 1de7c6ad9a phy: qualcomm: usb-hsic: Fix the kernel-doc warn
The comment is not kernel-doc one and starts with /**, so fix that.

drivers/phy/qualcomm/phy-qcom-usb-hsic.c:3: warning:
This comment starts with '/**', but isn't a kernel-doc comment.
Refer Documentation/doc-guide/kernel-doc.rst

Signed-off-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211116103951.34482-4-vkoul@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-11-20 11:33:23 +05:30
Vinod Koul e697ffe39a phy: qualcomm: qmp: Add missing struct documentation
dp-* members were added to qmp_phy_combo_cfg but documentation was
missed, so add that.

drivers/phy/qualcomm/phy-qcom-qmp.c:2995: warning: Function parameter or member 'dp_aux_cfg' not described in 'qmp_phy'
drivers/phy/qualcomm/phy-qcom-qmp.c:2995: warning: Function parameter or member 'dp_opts' not described in 'qmp_phy'
drivers/phy/qualcomm/phy-qcom-qmp.c:2995: warning: Function parameter or member 'dp_clks' not described in 'qmp_phy'

Signed-off-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211116103951.34482-3-vkoul@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-11-20 11:33:23 +05:30
Vinod Koul 31c66bfa95 phy: mvebu-cp110-utmi: Fix kernel-doc warns
Fix the format and add description for ops to fix the below warnings:

drivers/phy/marvell/phy-mvebu-cp110-utmi.c:94: warning: Function parameter or member 'syscon' not described in 'mvebu_cp110_utmi'
drivers/phy/marvell/phy-mvebu-cp110-utmi.c:94: warning: Function parameter or member 'ops' not described in 'mvebu_cp110_utmi'

Signed-off-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20211116103951.34482-1-vkoul@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-11-20 11:33:22 +05:30
Randy Dunlap 7adaf921b6 phy: ti: report 2 non-kernel-doc comments
Do not use "/**" to begin a non-kernel-doc comment.
Fixes these build warnings:

drivers/phy/ti/phy-am654-serdes.c:3: warning: This comment starts with '/**', but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst
    * PCIe SERDES driver for AM654x SoC

drivers/phy/ti/phy-j721e-wiz.c:3: warning: This comment starts with '/**', but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst
    * Wrapper driver for SERDES used in J721E

Signed-off-by: Randy Dunlap <rdunlap@infradead.org>
Reported-by: kernel test robot <lkp@intel.com>
Cc: Kishon Vijay Abraham I <kishon@ti.com>
Cc: Vinod Koul <vkoul@kernel.org>
Cc: linux-phy@lists.infradead.org
Link: https://lore.kernel.org/r/20211115030559.13994-1-rdunlap@infradead.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-11-16 15:31:30 +05:30
Amelie Delaunay 8755e9e6d0 phy: stm32: fix st,slow-hs-slew-rate with st,decrease-hs-slew-rate
st,decrease-hs-slew-rate is described in phy-stm32-usbphyc.yaml. Then
fix the property name in driver.

Fixes: 2f5e9f815a ("phy: stm32: add phy tuning support")
Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com>
Link: https://lore.kernel.org/r/20211026154817.198937-1-amelie.delaunay@foss.st.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-11-16 15:28:51 +05:30
Linus Torvalds 5c904c66ed Char/Misc driver update for 5.16-rc1
Here is the big set of char and misc and other tiny driver subsystem
 updates for 5.16-rc1.
 
 Loads of things in here, all of which have been in linux-next for a
 while with no reported problems (except for one called out below.)
 
 Included are:
 	- habanana labs driver updates, including dma_buf usage,
 	  reviewed and acked by the dma_buf maintainers
 	- iio driver update (going through this tree not staging as they
 	  really do not belong going through that tree anymore)
 	- counter driver updates
 	- hwmon driver updates that the counter drivers needed, acked by
 	  the hwmon maintainer
 	- xillybus driver updates
 	- binder driver updates
 	- extcon driver updates
 	- dma_buf module namespaces added (will cause a build error in
 	  arm64 for allmodconfig, but that change is on its way through
 	  the drm tree)
 	- lkdtm driver updates
 	- pvpanic driver updates
 	- phy driver updates
 	- virt acrn and nitr_enclaves driver updates
 	- smaller char and misc driver updates
 
 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Merge tag 'char-misc-5.16-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc

Pull char/misc driver updates from Greg KH:
 "Here is the big set of char and misc and other tiny driver subsystem
  updates for 5.16-rc1.

  Loads of things in here, all of which have been in linux-next for a
  while with no reported problems (except for one called out below.)

  Included are:

   - habanana labs driver updates, including dma_buf usage, reviewed and
     acked by the dma_buf maintainers

   - iio driver update (going through this tree not staging as they
     really do not belong going through that tree anymore)

   - counter driver updates

   - hwmon driver updates that the counter drivers needed, acked by the
     hwmon maintainer

   - xillybus driver updates

   - binder driver updates

   - extcon driver updates

   - dma_buf module namespaces added (will cause a build error in arm64
     for allmodconfig, but that change is on its way through the drm
     tree)

   - lkdtm driver updates

   - pvpanic driver updates

   - phy driver updates

   - virt acrn and nitr_enclaves driver updates

   - smaller char and misc driver updates"

* tag 'char-misc-5.16-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (386 commits)
  comedi: dt9812: fix DMA buffers on stack
  comedi: ni_usb6501: fix NULL-deref in command paths
  arm64: errata: Enable TRBE workaround for write to out-of-range address
  arm64: errata: Enable workaround for TRBE overwrite in FILL mode
  coresight: trbe: Work around write to out of range
  coresight: trbe: Make sure we have enough space
  coresight: trbe: Add a helper to determine the minimum buffer size
  coresight: trbe: Workaround TRBE errata overwrite in FILL mode
  coresight: trbe: Add infrastructure for Errata handling
  coresight: trbe: Allow driver to choose a different alignment
  coresight: trbe: Decouple buffer base from the hardware base
  coresight: trbe: Add a helper to pad a given buffer area
  coresight: trbe: Add a helper to calculate the trace generated
  coresight: trbe: Defer the probe on offline CPUs
  coresight: trbe: Fix incorrect access of the sink specific data
  coresight: etm4x: Add ETM PID for Kryo-5XX
  coresight: trbe: Prohibit trace before disabling TRBE
  coresight: trbe: End the AUX handle on truncation
  coresight: trbe: Do not truncate buffer on IRQ
  coresight: trbe: Fix handling of spurious interrupts
  ...
2021-11-04 08:21:47 -07:00
Yang Yingliang b4dc97ab0a phy: Sparx5 Eth SerDes: Fix return value check in sparx5_serdes_probe()
In case of error, the function devm_ioremap() returns NULL
pointer not ERR_PTR(). The IS_ERR() test in the return value
check should be replaced with NULL test.

Fixes: 2ff8a1eeb5 ("phy: Add Sparx5 ethernet serdes PHY driver")
Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: Yang Yingliang <yangyingliang@huawei.com>
Link: https://lore.kernel.org/r/20210909072149.2934047-1-yangyingliang@huawei.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-10-26 16:36:23 +05:30
Sandeep Maheswaram b475bf0ec4 phy: qcom-snps: Correct the FSEL_MASK
The FSEL_MASK which selects the refclock is defined incorrectly.
It should be [4:6] not [5:7]. Due to this incorrect definition, the BIT(7)
in USB2_PHY_USB_PHY_HS_PHY_CTRL_COMMON0 is reset which keeps PHY analog
blocks ON during suspend.
Fix this issue by correctly defining the FSEL_MASK.

Fixes: 51e8114f80 ("phy: qcom-snps: Add SNPS USB PHY driver for QCOM based SOCs")
Signed-off-by: Sandeep Maheswaram <quic_c_sanm@quicinc.com>
Link: https://lore.kernel.org/r/1635135575-5668-1-git-send-email-quic_c_sanm@quicinc.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-10-26 16:36:23 +05:30
Wan Jiabing 21b89120be phy: hisilicon: Add of_node_put() in phy-hisi-inno-usb2
Fix following coccicheck warning:
./drivers/phy/hisilicon/phy-hisi-inno-usb2.c:138:1-23: WARNING: Function
for_each_child_of_node should have of_node_put() before break

Early exits from for_each_child_of_node should decrement the
node reference counter.

Signed-off-by: Wan Jiabing <wanjiabing@vivo.com>
Link: https://lore.kernel.org/r/20211015080154.16016-1-wanjiabing@vivo.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-10-26 16:36:23 +05:30
Dmitry Baryshkov 26f71abef5 phy: qcom-qmp: another fix for the sc8180x PCIe definition
Commit f839f14e24 ("phy: qcom-qmp: Add sc8180x PCIe support") added
SC8180X PCIe tables, but used sm8250_qmp_pcie_serdes_tbl as a serdes
table because of the copy paste error. Commit bfccd9a71a ("phy:
qcom-qmp: Fix sc8180x PCIe definition") corrected part of this mistake
by pointing serdes_tbl to sc8180x_qmp_pcie_serdes_tbl, however the
serdes_tbl_num field was not updated to use sc8180x table. So let's now
fix the serdes_tbl_num field too.

Fixes: bfccd9a71a ("phy: qcom-qmp: Fix sc8180x PCIe definition")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211020155604.1374530-1-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-10-26 16:36:23 +05:30
Swapnil Jakhade 785a4e688c phy: cadence-torrent: Add support to output received reference clock
Add support to output received reference clock. Model the received
reference clock as an alternate parent of reference clock driver
clock. When received refclk is selected to output on cmn_refclk_p/m,
this is the internal reference clock driven on the pma_cmn_refclk_int.

Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Link: https://lore.kernel.org/r/20210922123735.21927-5-sjakhade@cadence.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-10-26 16:36:23 +05:30
Swapnil Jakhade 235bde4f44 phy: cadence-torrent: Model reference clock driver as a clock to enable derived refclk
When reference clock driver is enabled, either derived or received refclk
is output on cmn_refclk_p/m. Update the reference clock driver
implementation by modelling reference clock driver as a "clock" with
derived reference clock set as its default parent. The support for
received reference clock will be added in a separate patch.

Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Link: https://lore.kernel.org/r/20210922123735.21927-4-sjakhade@cadence.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-10-26 16:36:23 +05:30
Swapnil Jakhade aef096dbf5 phy: cadence-torrent: Migrate to clk_hw based registration and OF APIs
Use clk_hw based provider APIs to register clks to remove the usage of
deprecated APIs.

Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Link: https://lore.kernel.org/r/20210922123735.21927-2-sjakhade@cadence.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-10-26 16:36:23 +05:30
Dan Carpenter 8d55027f4e phy: ti: gmii-sel: check of_get_address() for failure
Smatch complains that if of_get_address() returns NULL, then "size"
isn't initialized.  Also it would lead to an Oops.

Fixes: 7f78322cdd ("phy: ti: gmii-sel: retrieve ports number and base offset from dt")
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
Link: https://lore.kernel.org/r/20210914110038.GB11657@kili
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-10-26 16:36:23 +05:30
Amelie Delaunay 2f5e9f815a phy: stm32: add phy tuning support
It can be necessary to adjust the phys settings to compensate parasitics.
This patch adds support of new optional properties to configure the tune
interface of the phys of stm32-usbphyc.
Properties are optional, that's why each property is skipped if not
found (-EINVAL).
Phy tuning is restored on resume because if deep low power state is
achieved, phy tuning configuration is reset.

Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com>
Link: https://lore.kernel.org/r/20211015161427.220784-4-amelie.delaunay@foss.st.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-10-26 16:36:22 +05:30
Amelie Delaunay 95e38c17d9 phy: stm32: restore utmi switch on resume
UTMI switch value can be lost during suspend/resume, depending on the power
state reached.
This patch adds resume function to usbphyc, to reconfigure utmi switch
after suspend.

Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com>
Link: https://lore.kernel.org/r/20211015161427.220784-2-amelie.delaunay@foss.st.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-10-26 16:36:22 +05:30
Vladimir Zapolskiy bf7ffcd006 phy: qcom-qusb2: Fix a memory leak on probe
On success nvmem_cell_read() returns a pointer to a dynamically allocated
buffer, and therefore it shall be freed after usage.

The issue is reported by kmemleak:

  # cat /sys/kernel/debug/kmemleak
  unreferenced object 0xffff3b3803e4b280 (size 128):
    comm "kworker/u16:1", pid 107, jiffies 4294892861 (age 94.120s)
    hex dump (first 32 bytes):
      00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
      00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
    backtrace:
      [<000000007739afdc>] __kmalloc+0x27c/0x41c
      [<0000000071c0fbf8>] nvmem_cell_read+0x40/0xe0
      [<00000000e803ef1f>] qusb2_phy_init+0x258/0x5bc
      [<00000000fc81fcfa>] phy_init+0x70/0x110
      [<00000000e3d48a57>] dwc3_core_soft_reset+0x4c/0x234
      [<0000000027d1dbd4>] dwc3_core_init+0x68/0x990
      [<000000001965faf9>] dwc3_probe+0x4f4/0x730
      [<000000002f7617ca>] platform_probe+0x74/0xf0
      [<00000000a2576cac>] really_probe+0xc4/0x470
      [<00000000bc77f2c5>] __driver_probe_device+0x11c/0x190
      [<00000000130db71f>] driver_probe_device+0x48/0x110
      [<0000000019f36c2b>] __device_attach_driver+0xa4/0x140
      [<00000000e5812ff7>]  bus_for_each_drv+0x84/0xe0
      [<00000000f4bac574>] __device_attach+0xe4/0x1c0
      [<00000000d3beb631>] device_initial_probe+0x20/0x30
      [<000000008019b9db>] bus_probe_device+0xa4/0xb0

Fixes: ca04d9d3e1 ("phy: qcom-qusb2: New driver for QUSB2 PHY on Qcom chips")
Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210922233548.2150244-1-vladimir.zapolskiy@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-10-26 16:36:22 +05:30
Shawn Guo 8abe5e778b phy: qcom-qmp: Add QCM2290 USB3 PHY support
Enable QCM2290 USB3 PHY support by adding the qmp_phy_cfg data which are
taken from downstream kernel.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Link: https://lore.kernel.org/r/20210927064829.5752-3-shawn.guo@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-10-26 16:36:22 +05:30
Sean Anderson 65aa371ea5 net: Convert more users of mdiobus_* to mdiodev_*
This converts users of mdiobus to mdiodev using the following semantic
patch:

@@
identifier mdiodev;
expression regnum;
@@

- mdiobus_read(mdiodev->bus, mdiodev->addr, regnum)
+ mdiodev_read(mdiodev, regnum)

@@
identifier mdiodev;
expression regnum, val;
@@

- mdiobus_write(mdiodev->bus, mdiodev->addr, regnum, val)
+ mdiodev_write(mdiodev, regnum, val)

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2021-10-24 13:40:33 +01:00
Shawn Guo 19b6348e47 phy: qcom-qusb2: Add missing vdd supply
Per downstream kernel, beside vdda-pll and vdda-phy-dpdm, vdd is also a
required supply for QUSB2 PHY digital circuit operation.  The driver
works right now likely because firmware already sets it up.  Add it for
correctness and completeness.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Link: https://lore.kernel.org/r/20210928022002.26286-3-shawn.guo@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-10-05 13:17:56 +05:30
Cai Huoqing 717e04fba4 phy: rockchip-inno-usb2: Make use of the helper function devm_add_action_or_reset()
The helper function devm_add_action_or_reset() will internally
call devm_add_action(), and gif devm_add_action() fails then it will
execute the action mentioned and return the error code. So
use devm_add_action_or_reset() instead of devm_add_action()
to simplify the error handling, reduce the code.

Signed-off-by: Cai Huoqing <caihuoqing@baidu.com>
Link: https://lore.kernel.org/r/20210922130024.745-1-caihuoqing@baidu.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-10-01 15:54:23 +05:30
Cai Huoqing 6ae6942fe9 phy: qcom-qmp: Make use of the helper function devm_add_action_or_reset()
The helper function devm_add_action_or_reset() will internally
call devm_add_action(), and gif devm_add_action() fails then it will
execute the action mentioned and return the error code. So
use devm_add_action_or_reset() instead of devm_add_action()
to simplify the error handling, reduce the code.

Signed-off-by: Cai Huoqing <caihuoqing@baidu.com>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210922130017.692-1-caihuoqing@baidu.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-10-01 15:51:23 +05:30
Shawn Guo 0fd732f824 phy: qcom-qusb2: Add compatible for QCM2290
Add compatible for QCM2290 QUSB2 device which reuses SM6115
configuration.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Link: https://lore.kernel.org/r/20210919031110.25064-3-shawn.guo@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-10-01 15:19:00 +05:30
Cai Huoqing 34356d113b phy: broadcom: Kconfig: Add configuration menu for Broadcom phy drivers
Adding a configuration menu to hold many Broadcom phy drivers
helps to make the menu display more concise.

Signed-off-by: Cai Huoqing <caihuoqing@baidu.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Link: https://lore.kernel.org/r/20210923025013.189-1-caihuoqing@baidu.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-10-01 13:50:38 +05:30
Mauro Carvalho Chehab 73075011ff phy: HiSilicon: Add driver for Kirin 970 PCIe PHY
The Kirin 970 PHY is somewhat similar to the Kirin 960, but it
does a lot more. Add the needed bits for PCIe to start working on
HiKey 970 boards.

Co-developed-by: Manivannan Sadhasivam <mani@kernel.org>
Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
Link: https://lore.kernel.org/r/b7a4ff41b57d861b003f1a00cae81f3d226fbe18.1632814194.git.mchehab+huawei@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-10-01 13:42:18 +05:30
Krzysztof Kozlowski 9b870e8c04 phy: samsung: unify naming and describe driver in KConfig
We use everywhere "Samsung" and "Exynos", not the uppercase versions.
Describe better which driver applies to which SoC, to make configuring
kernel for Samsung SoC easier.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Link: https://lore.kernel.org/r/20210924132658.109814-1-krzysztof.kozlowski@canonical.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-10-01 11:46:20 +05:30
Linus Torvalds 2d338201d5 Merge branch 'akpm' (patches from Andrew)
Merge more updates from Andrew Morton:
 "147 patches, based on 7d2a07b769.

  Subsystems affected by this patch series: mm (memory-hotplug, rmap,
  ioremap, highmem, cleanups, secretmem, kfence, damon, and vmscan),
  alpha, percpu, procfs, misc, core-kernel, MAINTAINERS, lib,
  checkpatch, epoll, init, nilfs2, coredump, fork, pids, criu, kconfig,
  selftests, ipc, and scripts"

* emailed patches from Andrew Morton <akpm@linux-foundation.org>: (94 commits)
  scripts: check_extable: fix typo in user error message
  mm/workingset: correct kernel-doc notations
  ipc: replace costly bailout check in sysvipc_find_ipc()
  selftests/memfd: remove unused variable
  Kconfig.debug: drop selecting non-existing HARDLOCKUP_DETECTOR_ARCH
  configs: remove the obsolete CONFIG_INPUT_POLLDEV
  prctl: allow to setup brk for et_dyn executables
  pid: cleanup the stale comment mentioning pidmap_init().
  kernel/fork.c: unexport get_{mm,task}_exe_file
  coredump: fix memleak in dump_vma_snapshot()
  fs/coredump.c: log if a core dump is aborted due to changed file permissions
  nilfs2: use refcount_dec_and_lock() to fix potential UAF
  nilfs2: fix memory leak in nilfs_sysfs_delete_snapshot_group
  nilfs2: fix memory leak in nilfs_sysfs_create_snapshot_group
  nilfs2: fix memory leak in nilfs_sysfs_delete_##name##_group
  nilfs2: fix memory leak in nilfs_sysfs_create_##name##_group
  nilfs2: fix NULL pointer in nilfs_##name##_attr_release
  nilfs2: fix memory leak in nilfs_sysfs_create_device_group
  trap: cleanup trap_init()
  init: move usermodehelper_enable() to populate_rootfs()
  ...
2021-09-08 12:55:35 -07:00
Daniel Lezcano 18821693b9 phy/drivers/stm32: use HZ macros
HZ unit conversion macros are available in units.h, use them and remove
the duplicate definition.

Link: https://lkml.kernel.org/r/20210816114732.1834145-11-daniel.lezcano@linaro.org
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Cc: Chanwoo Choi <cw00.choi@samsung.com>
Cc: Christian Eggers <ceggers@arri.de>
Cc: Guenter Roeck <linux@roeck-us.net>
Cc: Jonathan Cameron <jic23@kernel.org>
Cc: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Cc: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Lars-Peter Clausen <lars@metafoo.de>
Cc: Lukasz Luba <lukasz.luba@arm.com>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Miquel Raynal <miquel.raynal@bootlin.com>
Cc: MyungJoo Ham <myungjoo.ham@samsung.com>
Cc: Peter Meerwald <pmeerw@pmeerw.net>
Cc: "Rafael J. Wysocki" <rafael@kernel.org>
Cc: Zhang Rui <rui.zhang@intel.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2021-09-08 11:50:26 -07:00
Linus Torvalds d6742212c0 - converted Pistachio platform to use MIPS generic kernel
- fixes and cleanups
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Merge tag 'mips_5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux

Pull MIPS updates from Thomas Bogendoerfer:

 - converted Pistachio platform to use MIPS generic kernel

 - fixes and cleanups

* tag 'mips_5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux: (29 commits)
  MIPS: Malta: fix alignment of the devicetree buffer
  MIPS: ingenic: Unconditionally enable clock of CPU #0
  MIPS: mscc: ocelot: mark the phy-mode for internal PHY ports
  MIPS: mscc: ocelot: disable all switch ports by default
  MAINTAINERS: adjust PISTACHIO SOC SUPPORT after its retirement
  MIPS: Return true/false (not 1/0) from bool functions
  MIPS: generic: Return true/false (not 1/0) from bool functions
  MIPS: Make a alias for pistachio_defconfig
  MIPS: Retire MACH_PISTACHIO
  MIPS: config: generic: Add config for Marduk board
  pinctrl: pistachio: Make it as an option
  phy: pistachio-usb: Depend on MIPS || COMPILE_TEST
  clocksource/drivers/pistachio: Make it selectable for MIPS
  clk: pistachio: Make it selectable for generic MIPS kernel
  MIPS: DTS: Pistachio add missing cpc and cdmm
  MIPS: generic: Allow generating FIT image for Marduk board
  MIPS: locking/atomic: Fix atomic{_64,}_sub_if_positive
  MIPS: loongson2ef: don't build serial.o unconditionally
  MIPS: Replace deprecated CPU-hotplug functions.
  MIPS: Alchemy: Fix spelling contraction "cant" -> "can't"
  ...
2021-09-03 11:11:54 -07:00
Linus Torvalds ba1dc7f273 Char / Misc driver changes for 5.15-rc1
Here is the big set of char/misc driver changes for 5.15-rc1.
 
 Lots of different driver subsystems are being updated in here, notably:
 	- mhi subsystem update
 	- fpga subsystem update
 	- coresight/hwtracing subsystem update
 	- interconnect subsystem update
 	- nvmem subsystem update
 	- parport drivers update
 	- phy subsystem update
 	- soundwire subsystem update
 and there are some other char/misc drivers being updated as well:
 	- binder driver additions
 	- new misc drivers
 	- lkdtm driver updates
 	- mei driver updates
 	- sram driver updates
 	- other minor driver updates.
 
 Note, there are no habanna labs driver updates in this pull request,
 that will probably come later before -rc1 is out in a different request.
 
 All of these have been in linux-next for a while with no reported
 problems.
 
 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Merge tag 'char-misc-5.15-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc

Pull char / misc driver updates from Greg KH:
 "Here is the big set of char/misc driver changes for 5.15-rc1.

  Lots of different driver subsystems are being updated in here,
  notably:

   - mhi subsystem update

   - fpga subsystem update

   - coresight/hwtracing subsystem update

   - interconnect subsystem update

   - nvmem subsystem update

   - parport drivers update

   - phy subsystem update

   - soundwire subsystem update

  and there are some other char/misc drivers being updated as well:

   - binder driver additions

   - new misc drivers

   - lkdtm driver updates

   - mei driver updates

   - sram driver updates

   - other minor driver updates.

  Note, there are no habanalabs driver updates in this pull request,
  that will probably come later before -rc1 is out in a different
  request.

  All of these have been in linux-next for a while with no reported
  problems"

* tag 'char-misc-5.15-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (169 commits)
  Revert "bus: mhi: Add inbound buffers allocation flag"
  misc/pvpanic: fix set driver data
  VMCI: fix NULL pointer dereference when unmapping queue pair
  char: mware: fix returnvar.cocci warnings
  parport: remove non-zero check on count
  soundwire: cadence: do not extend reset delay
  soundwire: intel: conditionally exit clock stop mode on system suspend
  soundwire: intel: skip suspend/resume/wake when link was not started
  soundwire: intel: fix potential race condition during power down
  phy: qcom-qmp: Add support for SM6115 UFS phy
  dt-bindings: phy: qcom,qmp: Add SM6115 UFS PHY bindings
  phy: qmp: Provide unique clock names for DP clocks
  lkdtm: remove IDE_CORE_CP crashpoint
  lkdtm: replace SCSI_DISPATCH_CMD with SCSI_QUEUE_RQ
  coresight: Replace deprecated CPU-hotplug functions.
  Documentation: coresight: Add documentation for CoreSight config
  coresight: syscfg: Add initial configfs support
  coresight: config: Add preloaded configurations
  coresight: etm4x: Add complex configuration handlers to etmv4
  coresight: etm-perf: Update to activate selected configuration
  ...
2021-09-01 08:35:06 -07:00
Pali Rohár 0c1f5f2a55 phy: marvell: phy-mvebu-a3700-comphy: Remove unsupported modes
Armada 3700 does not support RXAUI, XFI and neither SFI. Remove unused
macros for these unsupported modes.

Signed-off-by: Pali Rohár <pali@kernel.org>
Fixes: 9695375a3f ("phy: add A3700 COMPHY support")
Signed-off-by: David S. Miller <davem@davemloft.net>
2021-08-27 12:20:33 +01:00
Pali Rohár b756bbec9c phy: marvell: phy-mvebu-a3700-comphy: Rename HS-SGMMI to 2500Base-X
Comphy phy mode 0x3 is incorrectly named. It is not SGMII but rather
2500Base-X mode which runs at 3.125 Gbps speed.

Rename macro names and comments to 2500Base-X.

Signed-off-by: Pali Rohár <pali@kernel.org>
Fixes: 9695375a3f ("phy: add A3700 COMPHY support")
Signed-off-by: David S. Miller <davem@davemloft.net>
2021-08-27 12:20:33 +01:00
Pali Rohár 3f141ad617 phy: marvell: phy-mvebu-cp110-comphy: Rename HS-SGMMI to 2500Base-X
Comphy phy mode 0x3 is incorrectly named. It is not SGMII but rather
2500Base-X mode which runs at 3.125 Gbps speed.

Rename macro names and comments to 2500Base-X.

Signed-off-by: Pali Rohár <pali@kernel.org>
Fixes: eb6a1fcb53 ("phy: mvebu-cp110-comphy: Add SMC call support")
Fixes: c2afb2fef5 ("phy: mvebu-cp110-comphy: Rename the macro handling only Ethernet modes")
Signed-off-by: David S. Miller <davem@davemloft.net>
2021-08-27 12:20:33 +01:00
Iskren Chernev 152a810eae phy: qcom-qmp: Add support for SM6115 UFS phy
Add the tables and constants for init sequences for UFS QMP phy found in
SM4250/6115 SoC. The phy is a variation of the v2 phy, but is mistakenly
labeled as v3-660 in downstream sources.

QSERDES COM, RX, TX registers match fully existing v2 registers, with
a few additions. PCS registers don't have much in common, but there are
no clashes with existing ones so new registers were added to existing v2
PCS pack.

Signed-off-by: Iskren Chernev <iskren.chernev@gmail.com>
Link: https://lore.kernel.org/r/20210821155657.893165-3-iskren.chernev@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-08-23 11:12:30 +05:30
Bjorn Andersson 34633219b8 phy: qmp: Provide unique clock names for DP clocks
The USB/DP combo PHY exposes the "qmp_dp_phy_pll_link_clk" and
"qmp_dp_phy_pll_vco_div_clk" clocks, that are consumed by the display
clock controller. But for boards with multiple enabled QMP USB/DP combo
instances the hard coded names collides - and hence only the first
probed device is allowed to register.

Given that clocks are no longer reference globally by name and it's
possible to replace the hard coded names by something unique, but still
user friendly.

The two new clock names are based on dev_name() and results in names
such as "88ee000.phy::link_clk" and "88ee000.phy::vco_div_clk".

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/20210722030738.3385821-1-bjorn.andersson@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-08-20 09:22:30 +05:30
Piyush Mehta 89161cd008 phy: xilinx: zynqmp: skip PHY initialization and PLL lock for USB
PHY initialization for USB is required on linux boot or when
gt lane is changed from the current one and it is applicable
on PLL lock too.

Signed-off-by: Piyush Mehta <piyush.mehta@xilinx.com>
Link: https://lore.kernel.org/r/20210818084311.2643986-1-piyush.mehta@xilinx.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-08-18 15:44:14 +05:30
Anand Moon c7c4024348 phy: amlogic: meson8b-usb2: don't log an error on -EPROBE_DEFER
devm_phy_create can return -EPROBE_DEFER if the vbus-supply is not ready
yet. Silence this warning as the driver framework will re-attempt
registering the PHY. Use dev_err_probe() for phy resources to indicate
the deferral reason when waiting for the resource to come up.

Cc: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Anand Moon <linux.amoon@gmail.com>
Link: https://lore.kernel.org/r/20210817041548.1276-7-linux.amoon@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-08-17 16:00:44 +05:30
Anand Moon e1f31c93a8 phy: amlogic: meson8b-usb2: Power off the PHY by putting it into reset mode
Power off the PHY by putting it into reset mode.

Cc: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Anand Moon <linux.amoon@gmail.com>
Link: https://lore.kernel.org/r/20210817041548.1276-6-linux.amoon@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-08-17 16:00:44 +05:30
Chunfeng Yun 7508d1e403 phy: phy-mtk-mipi-dsi: convert to devm_platform_ioremap_resource
Use devm_platform_ioremap_resource to simplify code

Acked-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Link: https://lore.kernel.org/r/1629191987-20774-9-git-send-email-chunfeng.yun@mediatek.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-08-17 15:51:59 +05:30
Chunfeng Yun 75203e7994 phy: phy-mtk-mipi-dsi: remove dummy assignment of error number
Return the error number directly without assignment

Acked-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Link: https://lore.kernel.org/r/1629191987-20774-8-git-send-email-chunfeng.yun@mediatek.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-08-17 15:51:59 +05:30
Chunfeng Yun 9474458753 phy: phy-mtk-hdmi: convert to devm_platform_ioremap_resource
Use devm_platform_ioremap_resource to simplify code

Acked-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Link: https://lore.kernel.org/r/1629191987-20774-7-git-send-email-chunfeng.yun@mediatek.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-08-17 15:51:59 +05:30
Chunfeng Yun 5f71b1e4f7 phy: phy-mtk-ufs: use clock bulk to get clocks
Use clock bulk helpers to get/enable/disable clocks

Reviewed-by: Stanley Chu <stanley.chu@mediatek.com>
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Link: https://lore.kernel.org/r/1629191987-20774-6-git-send-email-chunfeng.yun@mediatek.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-08-17 15:51:59 +05:30
Chunfeng Yun 1c6de3fc53 phy: phy-mtk-tphy: remove error log of ioremap failure
devm_ioremap_resource() will print log if error happens.

Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Link: https://lore.kernel.org/r/1629191987-20774-5-git-send-email-chunfeng.yun@mediatek.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-08-17 15:51:59 +05:30
Chunfeng Yun 926b83e5f9 phy: phy-mtk-tphy: print error log using child device
Print error log using child devices instead of parent device.

Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Link: https://lore.kernel.org/r/1629191987-20774-4-git-send-email-chunfeng.yun@mediatek.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-08-17 15:51:58 +05:30
Chunfeng Yun 39099a4433 phy: phy-mtk-tphy: support type switch by pericfg
Add support type switch between USB3, PCIe, SATA and SGMII by
pericfg register, this is used to take the place of efuse or
jumper.

Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Link: https://lore.kernel.org/r/1629191987-20774-3-git-send-email-chunfeng.yun@mediatek.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-08-17 15:51:58 +05:30
Chunfeng Yun 3fd6611242 phy: phy-mtk-tphy: use clock bulk to get clocks
Use clock bulk helpers to get/enable/disable clocks

Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Link: https://lore.kernel.org/r/1629191987-20774-2-git-send-email-chunfeng.yun@mediatek.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-08-17 15:51:58 +05:30
Swapnil Jakhade 48ac6085bd phy: cadence-torrent: Check PIPE mode PHY status to be ready for operation
PIPE PHY status is used to communicate the completion of several PHY
functions. Check if PHY is ready for operation while configured for
PIPE mode during startup.

Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Link: https://lore.kernel.org/r/20210728145454.15945-10-sjakhade@cadence.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-08-17 15:42:44 +05:30
Swapnil Jakhade 84f55df836 phy: cadence-torrent: Add debug information for PHY configuration
Add debug information in probe regarding PHY configuration parameters
like single link or multilink protocol along with number of lanes
used for each protocol link.

Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Link: https://lore.kernel.org/r/20210728145454.15945-9-sjakhade@cadence.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-08-17 15:42:44 +05:30
Swapnil Jakhade 8f3ced2fd4 phy: cadence-torrent: Add separate functions for reusable code
Torrent PHY driver currently supports single link DP configuration.
Prepare driver to support multilink DP configurations by adding
separate functions for common initialization sequence.

Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Reviewed-by: Kishon Vijay Abraham I <kishon@ti.com>
Link: https://lore.kernel.org/r/20210728145454.15945-8-sjakhade@cadence.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-08-17 15:42:44 +05:30
Swapnil Jakhade 1cc455150b phy: cadence-torrent: Add PHY configuration for DP with 100MHz ref clock
Add PHY configuration registers for single link DP with 100MHz reference
clock and NO_SSC.

Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Link: https://lore.kernel.org/r/20210728145454.15945-7-sjakhade@cadence.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-08-17 15:42:44 +05:30
Swapnil Jakhade da055e5503 phy: cadence-torrent: Add PHY registers for DP in array format
Add PHY registers for single link DP in array format to simplify
code and to improve readability. This supports already supported
frequencies for DP of 19.2MHz and 25MHz.

Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Link: https://lore.kernel.org/r/20210728145454.15945-6-sjakhade@cadence.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-08-17 15:42:44 +05:30
Swapnil Jakhade 6a2338a5bf phy: cadence-torrent: Configure PHY registers as a function of input reference clock rate
Torrent PHY supports multiple serdes standards with different input
reference clock frequencies. PHY register values differ based on the
reference clock rate. Add PHY input reference clock frequency as a
new dimension to select proper register configuration. No functional
change is intended.

Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Link: https://lore.kernel.org/r/20210728145454.15945-5-sjakhade@cadence.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-08-17 15:42:43 +05:30
Swapnil Jakhade 3b40162516 phy: cadence-torrent: Add enum for supported input reference clock frequencies
Torrent PHY supports different input reference clock frequencies.
Register configurations will be different based on reference clock value.
Prepare driver to support such multiple reference clock frequencies.

Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Reviewed-by: Kishon Vijay Abraham I <kishon@ti.com>
Link: https://lore.kernel.org/r/20210728145454.15945-4-sjakhade@cadence.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-08-17 15:42:43 +05:30
Swapnil Jakhade 5b16a790f1 phy: cadence-torrent: Reorder few functions to remove function declarations
Reorder some functions to avoid function declarations.
No functional change.

Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Link: https://lore.kernel.org/r/20210728145454.15945-3-sjakhade@cadence.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-08-17 15:42:43 +05:30
Swapnil Jakhade e956d4fceb phy: cadence-torrent: Remove use of CamelCase to fix checkpatch CHECK message
Script checkpatch with --strict option gives message:
CHECK: Avoid CamelCase: <REF_CLK_19_2MHz>
CHECK: Avoid CamelCase: <REF_CLK_25MHz>
Fix this by removing CamelCase usage. No functional change.

Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Reviewed-by: Kishon Vijay Abraham I <kishon@ti.com>
Link: https://lore.kernel.org/r/20210728145454.15945-2-sjakhade@cadence.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-08-17 15:42:43 +05:30
Jiaxun Yang e238f10d86 phy: pistachio-usb: Depend on MIPS || COMPILE_TEST
So it will be avilable for generic MIPS kernel.

Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Acked-By: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2021-08-12 16:01:49 +02:00
Baruch Siach 23fd679249 phy: qcom-qmp: add USB3 PHY support for IPQ6018
Initialization is identical to the IPQ8074 USB3 PHY.

Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Link: https://lore.kernel.org/r/6eec7ef4ecd1e8360ebe8e425151121684e997ed.1628085910.git.baruch@tkos.co.il
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-08-06 18:34:58 +05:30
Biju Das b0512a6ec0 phy: renesas: phy-rcar-gen3-usb2: Add USB2.0 PHY support for RZ/G2L
This patch adds USB2.0 PHY support for RZ/G2L SoC.

We need to use a different compatible string due to some differences
with R-Car Gen3 USB2.0 PHY. It uses line ctrl register for OTG_ID
pin changes and different OTG-BC interrupt bit for device recognition.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> # on R-Car
Link: https://lore.kernel.org/r/20210727185527.19907-4-biju.das.jz@bp.renesas.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-08-06 18:12:30 +05:30
Bjorn Andersson 1633802cd4 phy: qcom: qmp: Add SC8180x USB/DP combo
The two USB QMPs are USB/DP compbo PHYs, add the compatible for this
combination to allow DP output.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210721225630.3035861-2-bjorn.andersson@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-08-06 17:36:55 +05:30
Tony Lindgren 7481f91f1d phy: phy-twl4030-usb: Disable PHY for suspend
Since commit 88d26136a2 ("PM: Prevent runtime suspend during system
resume"), PM runtime will not let devices idle during system suspend.

This is because of the pm_runtime_get_noresume() call done in
device_prepare() that is not released until at device_complete() after
resume.

We must now disable the USB PHY in suspend if no USB cable is connected.

Cc: Andreas Kemnade <andreas@kemnade.info>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Link: https://lore.kernel.org/r/20210727104512.52968-1-tony@atomide.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-08-06 17:32:51 +05:30
Chunfeng Yun a69f29cb50 phy: phy-mtk-tphy: add support mt8195
The controller is designed to use use PLL integer mode, but
in fact used fractional mode for some ones on mt8195, this
causes signal degradation (e.g. eye diagram test fail), fix
it by switching PLL to 26Mhz from default 48Mhz to improve
signal quality.

Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Link: https://lore.kernel.org/r/1627028562-23584-3-git-send-email-chunfeng.yun@mediatek.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-08-06 17:29:40 +05:30
Chunfeng Yun 27974e6208 phy: phy-mtk-tphy: support new hardware version
The PHYA arch is updated, and doesn't support slew rate calibrate
anymore on 7nm or advanced process, add a new version number to
support it.
Note: the FreqMeter bank is not used but reserved.

Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Link: https://lore.kernel.org/r/1627028562-23584-2-git-send-email-chunfeng.yun@mediatek.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-08-06 17:29:40 +05:30
Randy Dunlap 07e97f744c phy: qualcomm: phy-qcom-usb-hs: repair non-kernel-doc comment
Fix errant use of "/**" to begin a comment although the comment
is not kernel-doc notation. Just use "/*" instead.

Fixes this kernel-doc warning:

drivers/phy/qualcomm/phy-qcom-usb-hs.c:3: warning: This comment starts with '/**', but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst
    * Copyright (C) 2016 Linaro Ltd

Signed-off-by: Randy Dunlap <rdunlap@infradead.org>
Reported-by: kernel test robot <lkp@intel.com>
Cc: Andy Gross <agross@kernel.org>
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: linux-arm-msm@vger.kernel.org
Cc: Kishon Vijay Abraham I <kishon@ti.com>
Cc: Vinod Koul <vkoul@kernel.org>
Cc: linux-phy@lists.infradead.org
Link: https://lore.kernel.org/r/20210723022548.25695-1-rdunlap@infradead.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-08-06 17:15:29 +05:30
kernel test robot 1716e49eb8 phy: rockchip-inno-usb2: fix for_each_child.cocci warnings
For_each_available_child_of_node should have of_node_put()
before break around line 1184.  The other jumps out of the
loop do contain the put.

Generated by: scripts/coccinelle/iterators/for_each_child.cocci

CC: Sumera Priyadarsini <sylphrenadin@gmail.com>
Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: kernel test robot <lkp@intel.com>
Signed-off-by: Julia Lawall <julia.lawall@inria.fr>
Link: https://lore.kernel.org/r/alpine.DEB.2.22.394.2106231617540.99238@hadrien
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-08-06 16:52:29 +05:30
Arnd Bergmann c1302e8ce5 phy: tegra: xusb: mark PM functions as __maybe_unused
When these are not referenced, gcc prints a harmless warning:

drivers/phy/tegra/xusb.c:1286:12: error: 'tegra_xusb_padctl_resume_noirq' defined but not used [-Werror=unused-function]
 1286 | static int tegra_xusb_padctl_resume_noirq(struct device *dev)
      |            ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/phy/tegra/xusb.c:1276:12: error: 'tegra_xusb_padctl_suspend_noirq' defined but not used [-Werror=unused-function]
 1276 | static int tegra_xusb_padctl_suspend_noirq(struct device *dev)
      |            ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

Fixes: c545a90567 ("phy: tegra: xusb: Add sleepwalk and suspend/resume")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Link: https://lore.kernel.org/r/20210721152550.2976003-1-arnd@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-07-22 14:41:07 +05:30
Bjorn Andersson bfccd9a71a phy: qcom-qmp: Fix sc8180x PCIe definition
A copy paste error was snuck into the patch going upstream that made the
SC8180x PCIe PHY use the SM8250 serdes table, but while this works
there's some differences in the tables (and the SC8180x was left
dangling). So correct the SC8180x definition to use the SC8180x serdes
table.

Fixes: f839f14e24 ("phy: qcom-qmp: Add sc8180x PCIe support")
Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210721163029.2813497-1-bjorn.andersson@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-07-22 14:40:30 +05:30
Chanho Park d64519249e phy: samsung-ufs: support exynosauto ufs phy driver
This patch adds to support phy-exynosautov9-ufs driver for ExynosAuto v9
series SoCs. The patch adds "samsung,exynosautov9-ufs-phy" compatible.
Unlike previous exynos ufs phy, the chip uses 0x50 offset as
PHY_TRSV_REG_CFG_OFFSET.

Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Link: https://lore.kernel.org/r/20210709094524.110193-3-chanho61.park@samsung.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-07-20 16:43:10 +05:30
Chanho Park b95637e2da phy: samsung-ufs: move phy-exynos7-ufs header
Instead of using exynos7 ufs definition in phy-exynos7-ufs.h, we should
put it into phy-exynos7-ufs.c to be included different objects or units.

Suggested-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Link: https://lore.kernel.org/r/20210709094524.110193-2-chanho61.park@samsung.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-07-20 16:43:10 +05:30
Bjorn Andersson f839f14e24 phy: qcom-qmp: Add sc8180x PCIe support
The Qualcomm SC8180x platform has 4 PCIe controllers and PHYs, typically
used to connect things such as a modem or NVME storage device. Add the
programming sequence to get the PHYs up and running.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210629004509.1788286-2-bjorn.andersson@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-07-20 16:04:39 +05:30
Linus Torvalds 79160a603b USB / Thunderbolt patches for 5.14-rc1
Here is the big set of USB and Thunderbolt patches for 5.14-rc1.
 
 Nothing major here just lots of little changes for new hardware and
 features.  Highlights are:
 	- more USB 4 support added to the thunderbolt core
 	- build warning fixes all over the place
 	- usb-serial driver updates and new device support
 	- mtu3 driver updates
 	- gadget driver updates
 	- dwc3 driver updates
 	- dwc2 driver updates
 	- isp1760 host driver updates
 	- musb driver updates
 	- lots of other tiny things.
 
 Full details are in the shortlog.
 
 All of these have been in linux-next for a while now with no reported
 issues.
 
 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Merge tag 'usb-5.14-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb

Pull USB / Thunderbolt updates from Greg KH:
 "Here is the big set of USB and Thunderbolt patches for 5.14-rc1.

  Nothing major here just lots of little changes for new hardware and
  features. Highlights are:

   - more USB 4 support added to the thunderbolt core

   - build warning fixes all over the place

   - usb-serial driver updates and new device support

   - mtu3 driver updates

   - gadget driver updates

   - dwc3 driver updates

   - dwc2 driver updates

   - isp1760 host driver updates

   - musb driver updates

   - lots of other tiny things.

  Full details are in the shortlog.

  All of these have been in linux-next for a while now with no reported
  issues"

* tag 'usb-5.14-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb: (223 commits)
  phy: qcom-qusb2: Add configuration for SM4250 and SM6115
  dt-bindings: phy: qcom,qusb2: document sm4250/6115 compatible
  dt-bindings: usb: qcom,dwc3: Add bindings for sm6115/4250
  USB: cdc-acm: blacklist Heimann USB Appset device
  usb: xhci-mtk: allow multiple Start-Split in a microframe
  usb: ftdi-elan: remove redundant continue statement in a while-loop
  usb: class: cdc-wdm: return the correct errno code
  xhci: remove redundant continue statement
  usb: dwc3: Fix debugfs creation flow
  usb: gadget: hid: fix error return code in hid_bind()
  usb: gadget: eem: fix echo command packet response issue
  usb: gadget: f_hid: fix endianness issue with descriptors
  Revert "USB: misc: Add onboard_usb_hub driver"
  Revert "of/platform: Add stubs for of_platform_device_create/destroy()"
  Revert "usb: host: xhci-plat: Create platform device for onboard hubs in probe()"
  Revert "arm64: dts: qcom: sc7180-trogdor: Add nodes for onboard USB hub"
  xhci: solve a double free problem while doing s4
  xhci: handle failed buffer copy to URB sg list and fix a W=1 copiler warning
  xhci: Add adaptive interrupt rate for isoch TRBs with XHCI_AVOID_BEI quirk
  xhci: Remove unused defines for ERST_SIZE and ERST_ENTRIES
  ...
2021-07-05 14:16:22 -07:00
Linus Torvalds a16d8644ba Staging / IIO driver patches for 5.14-rc1
Here is the big set of IIO and staging driver patches for 5.14-rc1.
 
 Loads of IIO driver updates and additions in here, the shortlog has the
 full details.
 
 For the staging side, we moved a few drivers out of staging, and deleted
 the kpc2000 drivers as the original developer asked us to because no one
 was working on them anymore.
 
 Also in here are loads of coding style cleanups due to different intern
 projects focusing on the staging tree to try to get experience doing
 kernel development.
 
 All of these have been in the linux-next tree for a while with no
 reported problems.
 
 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Merge tag 'staging-5.14-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging

Pull staging / IIO driver updates from Greg KH:
 "Here is the big set of IIO and staging driver patches for 5.14-rc1.

  Loads of IIO driver updates and additions in here, the shortlog has
  the full details.

  For the staging side, we moved a few drivers out of staging, and
  deleted the kpc2000 drivers as the original developer asked us to
  because no one was working on them anymore.

  Also in here are loads of coding style cleanups due to different
  intern projects focusing on the staging tree to try to get experience
  doing kernel development.

  All of these have been in the linux-next tree for a while with no
  reported problems"

* tag 'staging-5.14-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging: (744 commits)
  staging: hi6421-spmi-pmic: cleanup some macros
  staging: hi6421-spmi-pmic: change identation of a table
  staging: hi6421-spmi-pmic: change a return code
  staging: hi6421-spmi-pmic: better name IRQs
  staging: hi6421-spmi-pmic: use devm_request_threaded_irq()
  staging: hisilicon,hi6421-spmi-pmic.yaml: cleanup descriptions
  spmi: hisi-spmi-controller: move driver from staging
  phy: phy-hi3670-usb3: move driver from staging into phy
  staging: rtl8188eu: remove include/rtw_debug.h header
  staging: rtl8188eu: remove GlobalDebugLevel variable
  staging: rtl8188eu: remove DRIVER_PREFIX preprocessor definition
  staging: rtl8188eu: remove RT_TRACE macro
  staging: rtl8188eu: remove all RT_TRACE calls from hal/rtl8188eu_recv.c
  staging: rtl8188eu: remove all RT_TRACE calls from hal/hal_intf.c
  staging: rtl8188eu: remove all RT_TRACE calls from hal/rtl8188eu_xmit.c
  staging: rtl8188eu: remove all RT_TRACE calls from core/rtw_xmit.c
  staging: rtl8188eu: remove all RT_TRACE calls from core/rtw_pwrctrl.c
  staging: rtl8188eu: remove all RT_TRACE calls from core/rtw_recv.c
  staging: rtl8188eu: remove all RT_TRACE calls from core/rtw_ioctl_set.c
  staging: rtl8188eu: remove all RT_TRACE calls from core/rtw_ieee80211.c
  ...
2021-07-05 14:01:53 -07:00
Linus Torvalds eed0218e8c Char / Misc driver updates for 5.14-rc1
Here is the big set of char / misc and other driver subsystem updates
 for 5.14-rc1.  Included in here are:
 	- habanna driver updates
 	- fsl-mc driver updates
 	- comedi driver updates
 	- fpga driver updates
 	- extcon driver updates
 	- interconnect driver updates
 	- mei driver updates
 	- nvmem driver updates
 	- phy driver updates
 	- pnp driver updates
 	- soundwire driver updates
 	- lots of other tiny driver updates for char and misc drivers
 
 This is looking more and more like the "various driver subsystems mushed
 together" tree...
 
 All of these have been in linux-next for a while with no reported
 issues.
 
 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Merge tag 'char-misc-5.14-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc

Pull char / misc driver updates from Greg KH:
 "Here is the big set of char / misc and other driver subsystem updates
  for 5.14-rc1. Included in here are:

   - habanalabs driver updates

   - fsl-mc driver updates

   - comedi driver updates

   - fpga driver updates

   - extcon driver updates

   - interconnect driver updates

   - mei driver updates

   - nvmem driver updates

   - phy driver updates

   - pnp driver updates

   - soundwire driver updates

   - lots of other tiny driver updates for char and misc drivers

  This is looking more and more like the "various driver subsystems
  mushed together" tree...

  All of these have been in linux-next for a while with no reported
  issues"

* tag 'char-misc-5.14-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (292 commits)
  mcb: Use DEFINE_RES_MEM() helper macro and fix the end address
  PNP: moved EXPORT_SYMBOL so that it immediately followed its function/variable
  bus: mhi: pci-generic: Add missing 'pci_disable_pcie_error_reporting()' calls
  bus: mhi: Wait for M2 state during system resume
  bus: mhi: core: Fix power down latency
  intel_th: Wait until port is in reset before programming it
  intel_th: msu: Make contiguous buffers uncached
  intel_th: Remove an unused exit point from intel_th_remove()
  stm class: Spelling fix
  nitro_enclaves: Set Bus Master for the NE PCI device
  misc: ibmasm: Modify matricies to matrices
  misc: vmw_vmci: return the correct errno code
  siox: Simplify error handling via dev_err_probe()
  fpga: machxo2-spi: Address warning about unused variable
  lkdtm/heap: Add init_on_alloc tests
  selftests/lkdtm: Enable various testable CONFIGs
  lkdtm: Add CONFIG hints in errors where possible
  lkdtm: Enable DOUBLE_FAULT on all architectures
  lkdtm/heap: Add vmalloc linear overflow test
  lkdtm/bugs: XFAIL UNALIGNED_LOAD_STORE_WRITE
  ...
2021-07-05 13:42:16 -07:00
Rashmi A 2f2b73a29d phy: intel: Fix for warnings due to EMMC clock 175Mhz change in FIP
Since the EMMC clock was changed from 200Mhz to 175Mhz in FIP,
there were some warnings introduced, as the frequency values
being checked was still wrt 200Mhz in code. Hence, the frequency
checks are now updated based on the current 175Mhz EMMC clock changed
in FIP.

Spamming kernel log msg:
"phy phy-20290000.mmc_phy.2: Unsupported rate: 43750000"

Signed-off-by: Rashmi A <rashmi.a@intel.com>
Reviewed-by: Adrian Hunter <adrian.hunter@intel.com>
Acked-By: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20210603182242.25733-3-rashmi.a@intel.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-06-29 16:45:16 +02:00
Mauro Carvalho Chehab 8de6b7edd4 phy: phy-hi3670-usb3: move driver from staging into phy
The phy USB3 driver for Hisilicon 970 (hi3670) is ready
for mainstream. Mode it from staging into the main driver's
phy/ directory.

Acked-by: Rob Herring <robh@kernel.org>
Acked-By: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
Link: https://lore.kernel.org/r/dcf66a01aaeaab93cda52f9a283ecbdf9fa71bb8.1624606660.git.mchehab+huawei@kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2021-06-25 10:02:02 +02:00
Iskren Chernev 7756f1d636 phy: qcom-qusb2: Add configuration for SM4250 and SM6115
The SM4250 and SM6115 uses the same register layout as MSM8996, but the
tune sequence is a bit different.

Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Iskren Chernev <iskren.chernev@gmail.com>
Link: https://lore.kernel.org/r/20210622203240.559979-4-iskren.chernev@gmail.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2021-06-24 14:31:56 +02:00
Greg Kroah-Hartman 5471a81235 phy-for-5.14 version 2
- Updates:
         - Yaml conversion for renesas,rcar-gen3 pcie phy and
           rockchip-usb-phy bindings
         - Support for devm_phy_get() taking NULL phy name
 
   - New support:
         - PCIe phy for Qualcomm IPQ60xx
         - PCIe phy for Qualcomm SDX55
         - USB phy for RK3308
         - CAN transceivers phy for TI TCAN104x
         - Innosilicon-based CSI dphy for rockchip
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Merge tag 'phy-for-5.14_v2' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy into char-misc-next

Vinod writes:

phy-for-5.14 version 2

  - Updates:
        - Yaml conversion for renesas,rcar-gen3 pcie phy and
          rockchip-usb-phy bindings
        - Support for devm_phy_get() taking NULL phy name

  - New support:
        - PCIe phy for Qualcomm IPQ60xx
        - PCIe phy for Qualcomm SDX55
        - USB phy for RK3308
        - CAN transceivers phy for TI TCAN104x
        - Innosilicon-based CSI dphy for rockchip

* tag 'phy-for-5.14_v2' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy: (36 commits)
  phy: Revert "phy: ralink: Kconfig: convert mt7621-pci-phy into 'bool'"
  phy: ti: dm816x: Fix the error handling path in 'dm816x_usb_phy_probe()
  phy: uniphier-pcie: Fix updating phy parameters
  phy/rockchip: add Innosilicon-based CSI dphy
  dt-bindings: phy: add yaml binding for rockchip-inno-csi-dphy
  phy: rockchip: remove redundant initialization of pointer cfg
  phy: phy-can-transceiver: Add support for generic CAN transceiver driver
  dt-bindings: phy: Add binding for TI TCAN104x CAN transceivers
  phy: core: Reword the comment specifying the units of max_link_rate to be Mbps
  phy: phy-mtk-hdmi: Remove redundant dev_err call in mtk_hdmi_phy_probe()
  phy: phy-mtk-mipi-dsi: Remove redundant dev_err call in mtk_mipi_tx_probe()
  phy: phy-mmp3-hsic: Remove redundant dev_err call in mmp3_hsic_phy_probe()
  phy: bcm-ns-usb3: Remove redundant dev_err call in bcm_ns_usb3_mdio_probe()
  MAINTAINERS: update marvell,armada-3700-utmi-phy.yaml reference
  phy: phy-twl4030-usb: use DEVICE_ATTR_RO macro
  dt-bindings: phy: convert rockchip-usb-phy.txt to YAML
  phy: phy-rockchip-inno-usb2: add support for RK3308 USB phy
  dt-bindings: phy: rockchip-inno-usb2: add compatible for rk3308 USB phy
  phy: stm32: manage optional vbus regulator on phy_power_on/off
  dt-bindings: phy: add vbus-supply optional property to phy-stm32-usbphyc
  ...
2021-06-23 10:33:34 +02:00
Vinod Koul 15692a80d9 phy: Revert "phy: ralink: Kconfig: convert mt7621-pci-phy into 'bool'"
This reverts commit 6eded551ce ("phy: ralink: Kconfig: convert
mt7621-pci-phy into 'bool'") as we don't want drivers to be built in and
should be a module instead

Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-06-23 12:59:46 +05:30
Christophe JAILLET f7eedcb853 phy: ti: dm816x: Fix the error handling path in 'dm816x_usb_phy_probe()
Add an error handling path in the probe to release some resources, as
already done in the remove function.

Fixes: 609adde838 ("phy: Add a driver for dm816x USB PHY")
Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Link: https://lore.kernel.org/r/ac5136881f6bdec50be19b3bf73b3bc1b15ef1f1.1622898974.git.christophe.jaillet@wanadoo.fr
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-06-21 12:04:18 +05:30
Kunihiko Hayashi 4a90bbb478 phy: uniphier-pcie: Fix updating phy parameters
The current driver uses a value from register TEST_O as the original
value for register TEST_I, though, the value is overwritten by "param",
so there is a bug that the original value isn't no longer used.

The value of TEST_O[7:0] should be masked with "mask", replaced with
"param", and placed in the bitfield TESTI_DAT_MASK as new TEST_I value.

Fixes: c6d9b13241 ("phy: socionext: add PCIe PHY driver support")
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Link: https://lore.kernel.org/r/1623037842-19363-1-git-send-email-hayashi.kunihiko@socionext.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-06-21 12:03:05 +05:30