make failed to supply the filename when using make -rR and using $(*F)
to get target filename without extension.
This bug was not reproduceable in small scale but using:
$(basename $(notdir $@)) fixes it with same functionality.
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
This fix a longstanding bug where proper options was not
passed to hostcc in case of a make O=.. build.
This bug showed up in (not yet merged) klibc, and is not known
to have any counterpart in-kernel.
Fixed by moving the flags macro to Kbuild.include so it can be used
by both Makefile.lib and Makefile.host.
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
The kbuild system takes advantage of an incorrect behavior in GNU make.
Once this behavior is fixed, all files in the kernel rebuild every time,
even if nothing has changed. This patch ensures kbuild works with both
the incorrect and correct behaviors of GNU make.
For more details on the incorrect behavior, see:
http://lists.gnu.org/archive/html/bug-make/2006-03/msg00003.html
Changes in this patch:
- Keep all targets that are to be marked .PHONY in a variable, PHONY.
- Add .PHONY: $(PHONY) to mark them properly.
- Remove any $(PHONY) files from the $? list when determining whether
targets are up-to-date or not.
Signed-off-by: Paul Smith <psmith@gnu.org>
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
While the recent change to also escape # symbols when storing C-file
compilation command lines was helpful, it should be in effect for all
command lines, as much as the dollar escaping should be in effect for
C-source compilation commands. Additionally, for better readability and
maintenance, consolidating all the escaping (single quotes, dollars,
and now sharps) was also desirable.
Signed-Off-By: Jan Beulich <jbeulich@novell.com>
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Move $(CC) support functions to Kbuild.include so they are available
in the kbuild files.
In addition the following was done:
o as-option documented in Documentation/kbuild/makefiles.txt
o Moved documentation to new section to match
new scope of functions
o added cc-ifversion used to conditionally select a text string
dependent on actual $(CC) version
o documented cc-ifversion
o change so Kbuild.include is read before the kbuild file
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Use foo := $(call objectify, $(foo)) to prefix $(foo) with $(obj)/ unless
$(foo) is an absolute path.
For now no in-tree users - soon to come.
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Kbuild.include is a placeholder for definitions originally present in
both the top-level Makefile and scripts/Makefile.build.
There were a slight difference in the filechk definition, so the most videly
used version was kept and usr/Makefile was adopted for this syntax.
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
---
Sam Ravnborg