Commit Graph

1013506 Commits

Author SHA1 Message Date
Martin Botka 0c3ae641a2 drivers: qcom: pinctrl: Add pinctrl driver for sm6125
This patch adds pinctrl driver for sm6125.

Signed-off-by: Martin Botka <martin.botka@somainline.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210614172713.558192-2-martin.botka@somainline.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-06-18 11:21:45 +02:00
Martin Botka d3decc70d0 dt-bindings: pinctrl: qcom: sm6125: Document SM6125 pinctrl driver
Document the newly added SM6125 pinctrl driver

Signed-off-by: Martin Botka <martin.botka@somainline.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210614172713.558192-1-martin.botka@somainline.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-06-18 11:21:45 +02:00
Linus Walleij 2f792ec782 pinctrl: renesas: Updates for v5.14 (take two)
- Add bias support for the R-Car H2, V2H, E2, V3M, and V3H, and
     RZ/G1C, RZ/G1H, and RZ/G1E SoCs.
 -----BEGIN PGP SIGNATURE-----
 
 iHUEABYIAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCYMMrdQAKCRCKwlD9ZEnx
 cMWUAP9UDHAY7mHXlSKZ5FWbQk6fWvxD/EhZolDxr23z/FBHHwEAuEGKxrkSAKOm
 h/W0HrGhQ/AmHPHLdj2lFWIQEZijXgE=
 =wcIi
 -----END PGP SIGNATURE-----

Merge tag 'renesas-pinctrl-for-v5.14-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel

pinctrl: renesas: Updates for v5.14 (take two)

  - Add bias support for the R-Car H2, V2H, E2, V3M, and V3H, and
    RZ/G1C, RZ/G1H, and RZ/G1E SoCs.
2021-06-12 02:04:12 +02:00
Andreas Kaessens ee9889dfa9 dt-bindings: pinctrl: mcp23s08: add documentation for reset-gpios
The reset-gpios property is added to the optional dt-bindings and
also an example for it's usage.

Signed-off-by: Andreas Kaessens <akaessens@gmail.com>
Signed-off-by: Darian Biastoch <d.biastoch@gmail.com>
Link: https://lore.kernel.org/r/20210610132438.3085841-2-akaessens@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-06-12 01:58:10 +02:00
Andreas Kaessens 4e73bfa3ee pinctrl: mcp23s08: Add optional reset GPIO
The MCP23x port expander RESET# line can be connected to a host GPIO.
The optional reset-gpio must be set to LOW if the reset is asserted
at probing time.

On page 5 in the datasheet [0] the "Device Active After Reset high"
time is specified at 0 µs. Therefore no waiting is needed after the
reset transition.

[0] https://ww1.microchip.com/downloads/en/DeviceDoc/20001952C.pdf

Signed-off-by: Andreas Kaessens <akaessens@gmail.com>
Signed-off-by: Darian Biastoch <d.biastoch@gmail.com>
Link: https://lore.kernel.org/r/20210610132438.3085841-1-akaessens@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-06-12 01:58:10 +02:00
Linus Walleij ca199e1952 intel-pinctrl for v5.14-1
* Enabling pin controller on Intel Alder Lake-M
 
 The following is an automated git shortlog grouped by driver:
 
 tigerlake:
  -  Add Alder Lake-M ACPI ID
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEqaflIX74DDDzMJJtb7wzTHR8rCgFAmC+MBkACgkQb7wzTHR8
 rCgz4w/+LmgwVMIuEyPT3e8FYaej4CUUGwor1yJfleOJoDL7EwSm07XD/6uxMgWa
 +Vw0Hn0Jbfdqv3pz91uf/PmI6WCfFpIddq0WQlSwbRsDZqsM2eu7tC0ywZnm7HTr
 HLt1RC90NxbiW0ey4V3y46i3SUB0wi+2s3F2TkUKNzJDs965hnnqzJw15MMi9fI9
 AfM68F+5Ydl2Fi8goWdNZj03HRu2yp6UN3hgMiLkH5t3LRm1dGhgJgdd4kWNo+ZD
 MswSEYmZmQL88axZJd8gOXc5Ykd5ZHnBi0CbG2TAzhwDQ5LOv74/7zGwDfVspub/
 wbAbh69mSc7g5OuLXbPeXan0E51YGBt4m53lNzONRrGizZAbeu1UsLRaUF7+d22F
 C/mihLvrst3VAipTrHnTJW+PVyyEfyL4INPSnSyFJT/b37KSnM+nzdk4QiWnRrw9
 jfIOhhdpnqdug5iWM9fYH4HduhVmpgPstBZHE6aduArAwgNpgVKfHl/RFQwAdiQs
 KoJWgUw2h4Uww+SqJagyGCM6QeVhDKsVEQy96WJErNgDj97cQdx0qEHx3GUgjkVL
 m29luV37nT3c32m9niM1X+eXTIsD7Zr6kgE0/3n59XpWlfbvnjy3yEg+P05IRbFU
 irRpppj0mMBCJHeOgS/lGYXuX4S3vdMUOhk8OKOEfCPPPlrymcA=
 =w/rL
 -----END PGP SIGNATURE-----

Merge tag 'intel-pinctrl-v5.14-1' of gitolite.kernel.org:pub/scm/linux/kernel/git/pinctrl/intel into devel

intel-pinctrl for v5.14-1

* Enabling pin controller on Intel Alder Lake-M

The following is an automated git shortlog grouped by driver:

tigerlake:
 -  Add Alder Lake-M ACPI ID
2021-06-09 15:31:05 +02:00
Matthias Brugger 21c423a651 pinctrl: mediatek: fix mode encoding
Pin modes are encoded in the SoC data structure. Use that value to set
IES SMT.

Cc: Fabien Parent <fparent@baylibre.com>
Cc: Sean Wang <sean.wang@kernel.org>
Cc: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Cc: linux-mediatek@lists.infradead.org
Fixes: 696beef775 ("pinctrl: mediatek: move bit assignment")
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Link: https://lore.kernel.org/r/20210608150656.29007-1-matthias.bgg@kernel.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-06-09 15:30:45 +02:00
Zou Wei 884af72c90 pinctrl: mcp23s08: Fix missing unlock on error in mcp23s08_irq()
Add the missing unlock before return from function mcp23s08_irq()
in the error handling case.

v1-->v2:
   remove the "return IRQ_HANDLED" line

Fixes: 897120d41e ("pinctrl: mcp23s08: fix race condition in irq handler")
Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: Zou Wei <zou_wei@huawei.com>
Link: https://lore.kernel.org/r/1623134048-56051-1-git-send-email-zou_wei@huawei.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-06-09 15:30:44 +02:00
Rikard Falkeborn 0c68387672 pinctrl: bcm: Constify static pinmux_ops
These are only assigned, either directly or via the bcm63xx_pinctrl_soc
struct, to the pmxops field in the pinctrl_desc struct and never
modified, so make them const to allow the compiler to put them in
read-only memory.

Signed-off-by: Rikard Falkeborn <rikard.falkeborn@gmail.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Link: https://lore.kernel.org/r/20210605185908.39982-3-rikard.falkeborn@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-06-09 11:18:33 +02:00
Rikard Falkeborn d977909367 pinctrl: bcm: Constify static pinctrl_ops
These are only assigned, either directly or via the bcm63xx_pinctrl_soc
struct, to the pctlops field in the pinctrl_desc struct and never
modified, so make them const to allow the compiler to put them in
read-only memory.

Signed-off-by: Rikard Falkeborn <rikard.falkeborn@gmail.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Link: https://lore.kernel.org/r/20210605185908.39982-2-rikard.falkeborn@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-06-09 11:18:33 +02:00
Sergio Paracuellos a49a8717d8 pinctrl: ralink: move RT288X SoC pinmux config into a new 'pinctrl-rt288x.c' file
Move all related code for SoC RT288X into a new driver located
in 'pinctrl-rt288x.c' source file.

Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Link: https://lore.kernel.org/r/20210604115159.8834-7-sergio.paracuellos@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-06-07 09:17:48 +02:00
Sergio Paracuellos 745ec436de pinctrl: ralink: move MT7620 SoC pinmux config into a new 'pinctrl-mt7620.c' file
Move all related code for SoC MT7620 into a new driver located
in 'pinctrl-mt7620.c' source file.

Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Link: https://lore.kernel.org/r/20210604115159.8834-6-sergio.paracuellos@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-06-07 09:17:47 +02:00
Sergio Paracuellos 3a1b0ca5a8 pinctrl: ralink: move RT305X SoC pinmux config into a new 'pinctrl-rt305x.c' file
Move all related code for SoC RT305X into a new driver located
in 'pinctrl-rt305x.c' source file.

Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Link: https://lore.kernel.org/r/20210604115159.8834-5-sergio.paracuellos@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-06-07 09:17:47 +02:00
Sergio Paracuellos 8b8b0fa21d pinctrl: ralink: move RT3883 SoC pinmux config into a new 'pinctrl-rt3883.c' file
Move all related code for SoC RT3883 into a new driver located
in 'pinctrl-rt3883.c' source file

Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Link: https://lore.kernel.org/r/20210604115159.8834-4-sergio.paracuellos@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-06-07 09:17:47 +02:00
Sergio Paracuellos e98dd3db96 pinctrl: ralink: move MT7621 SoC pinmux config into a new 'pinctrl-mt7621.c' file
Move all related code for SoC MT7621 into a new driver located
in 'pinctrl-mt7621.c' source file.

Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Link: https://lore.kernel.org/r/20210604115159.8834-3-sergio.paracuellos@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-06-07 09:17:47 +02:00
Sergio Paracuellos 276e552e08 pinctrl: ralink: move ralink architecture pinmux header into the driver
Ralink architecture is making use of the header located in
'arch/mips/include/asm/mach-ralink/pinmux.h' to stablish the
mechanisms to make derived SoCs to set its pin functions and
groups. In order to move all architecture pinmux into a more
accurate place which is 'drivers/pinctrl/ralink' we have to
first of all move this file also there with a small modification
which creates 'rt2880_pinmux_init' function to allow SoCs pinctrl
drivers to pass its configuration to the common code located in
'pinctrl-rt2880.c' file.

Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Link: https://lore.kernel.org/r/20210604115159.8834-2-sergio.paracuellos@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-06-07 09:17:47 +02:00
Dario Binacchi 8c987eb15a pinctrl: single: config: enable the pin's input
It enables / disables the input buffer. As explained in the description
of 'enum pin_config_param' this does not affect the pin's ability to
drive output.

Signed-off-by: Dario Binacchi <dariobin@libero.it>
Acked-by: Tony Lindgren <tony@atomide.com>
Link: https://lore.kernel.org/r/20210602150420.18202-1-dariobin@libero.it
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-06-07 09:02:27 +02:00
Linus Walleij 375eede3e3 pinctrl: mtk: Fix mt8365 Kconfig dependency
This SoC needs to select PINCTRL_MTK or we can end up in
kernel compiles that miss some symbols.

Cc: Fabien Parent <fparent@baylibre.com>
Reported-by: kernel test robot <lkp@intel.com>
Fixes: e94d8b6fb8 ("pinctrl: mediatek: add support for mt8365 SoC")
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-06-07 08:56:20 +02:00
Radim Pavlik 897120d41e pinctrl: mcp23s08: fix race condition in irq handler
Checking value of MCP_INTF in mcp23s08_irq suggests that the handler may be
called even when there is no interrupt pending.

But the actual interrupt could happened between reading MCP_INTF and MCP_GPIO.
In this situation we got nothing from MCP_INTF, but the event gets acknowledged
on the expander by reading MCP_GPIO. This leads to losing events.

Fix the problem by not reading any register until we see something in MCP_INTF.

The error was reproduced and fix tested on MCP23017.

Signed-off-by: Radim Pavlik <radim.pavlik@tbs-biometrics.com>
Link: https://lore.kernel.org/r/AM7PR06MB6769E1183F68DEBB252F665ABA3E9@AM7PR06MB6769.eurprd06.prod.outlook.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-06-07 00:23:58 +02:00
Geert Uytterhoeven c3975a73ca pinctrl: renesas: r8a77980: Add bias pinconf support
Implement support for pull-up and pull-down handling for the R-Car V3H
SoC, using the common R-Car bias handling.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/448f47ccd89d9bc8621c7fda8c81508deb05cb82.1619785375.git.geert+renesas@glider.be
2021-05-31 10:50:29 +02:00
Geert Uytterhoeven b764833e36 pinctrl: renesas: r8a77970: Add bias pinconf support
Implement support for pull-up (most pins, excl. DU_DOTCLKIN and EXTALR)
and pull-down (most pins, excl. JTAG) handling for the R-Car V3M SoC,
using the common R-Car bias handling.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/bcfad447624d874258a45a92554574b8fe9f712f.1619785375.git.geert+renesas@glider.be
2021-05-31 10:50:28 +02:00
Geert Uytterhoeven 009f502238 pinctrl: renesas: r8a7794: Add bias pinconf support
Implement support for pull-up (most pins) and pull-down (ASEBRK#/ACK)
handling for R-Car E2 and RZ/G1E SoCs, using the common R-Car bias
handling.

Note that on RZ/G1E, the "ASEBRK#/ACK" pin is called "ACK", but the code
doesn't handle that naming difference.  Hence users should use the R-Car
naming in DTS files.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/f78da2ba937ce98ae9196f4ee54149a5214fd545.1619785375.git.geert+renesas@glider.be
2021-05-31 10:50:28 +02:00
Geert Uytterhoeven 35477d7e90 pinctrl: renesas: r8a7792: Add bias pinconf support
Implement support for pull-up (most pins) and pull-down (EDBGREQ)
handling for the R-Car V2H SoC, using the common R-Car bias handling.

Note that the R-Car V2H Hardware User's Manual Rev. 1.00 says that
the LSI Pin Pull-Up Control Register 11 (PUPR11) controls pull-ups for
the {SCK,WS,SDATA}[01] pins.  These are assumed to be typos, as R-Car
V2H has only Serial Sound Interface channels 3 and 4.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/48d2abdd63ee43ed99cb32ed4a5f4d76ba563162.1619785375.git.geert+renesas@glider.be
2021-05-31 10:50:28 +02:00
Geert Uytterhoeven 2be3d60242 pinctrl: renesas: r8a7790: Add bias pinconf support
Implement support for pull-up (most pins) and pull-down (ASEBRK#/ACK)
handling for R-Car H2 and RZ/G1H SoCs, using the common R-Car bias
handling.

Note that on RZ/G1H, the "ASEBRK#/ACK" pin is called "ACK", but the code
doesn't handle that naming difference.  Hence users should use the R-Car
naming in DTS files.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/dde6e0b36a4e4494039a3466df208b5ec5c594ee.1619785375.git.geert+renesas@glider.be
2021-05-31 10:50:28 +02:00
Geert Uytterhoeven fd6850132f pinctrl: renesas: r8a77470: Add bias pinconf support
Implement support for pull-up (most pins) and pull-down (ASEBRK#/ACK)
handling for the RZ/G1C SoC, using the common R-Car bias handling.

Note that on RZ/G1C, the "ASEBRK#/ACK" pin is called "ACK", but the code
doesn't handle that naming difference.  Hence users should use the R-Car
naming in DTS files.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/18c8ebf9fa9e239253a723857e9dffeec775db7e.1619785375.git.geert+renesas@glider.be
2021-05-31 10:50:28 +02:00
Linus Walleij 50bdc4d441 pinctrl: renesas: Updates for v5.14
- Minor fixes and improvements.
 -----BEGIN PGP SIGNATURE-----
 
 iHUEABYIAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCYLCs2AAKCRCKwlD9ZEnx
 cN7BAP9J+MuYE/rU9gsqrNscKUhtKlTcWIDcxBVFwnCCu3Y+XAEAtEYQI7I18LqH
 DF2Uq8WX+u9MBYoKT2wWiqv1RWkp4wY=
 =SkB4
 -----END PGP SIGNATURE-----

Merge tag 'renesas-pinctrl-for-v5.14-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel

pinctrl: renesas: Updates for v5.14

  - Minor fixes and improvements.
2021-05-28 14:24:41 +02:00
Linus Walleij 696beef775 pinctrl: mediatek: move bit assignment
The bit needs offset to be defined which happens some lines
below. Looks like a bug. The kernel test robot complains:

drivers/pinctrl/mediatek/pinctrl-mtk-common.c:137:12:
warning: variable 'offset' is uninitialized when used here [-Wuninitialized]
           bit = BIT(offset & pctl->devdata->mode_mask);
                     ^~~~~~

Fix it up by reverting to what was done before.

Cc: Fabien Parent <fparent@baylibre.com>
Cc: Sean Wang <sean.wang@kernel.org>
Cc: Matthias Brugger <matthias.bgg@gmail.com>
Cc: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Cc: linux-mediatek@lists.infradead.org
Fixes: 9f940d8ecf ("pinctrl: mediatek: don't hardcode mode encoding in common code")
Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-05-28 11:19:10 +02:00
Dario Binacchi 07d5136f9b docs/pinctrl: fix the reference to the u300 platform
With commit ce1380c9f4 ("ARM: remove u300 platform") it is wrong to
use arch/arm/mach-u300/Kconfig file as example. Since the u300 platform
has been replaced by the u8500, let's use its Kconfig as example.

Signed-off-by: Dario Binacchi <dariobin@libero.it>
Link: https://lore.kernel.org/r/20210527201309.13308-1-dariobin@libero.it
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-05-28 02:59:40 +02:00
Phil Elwell 4bc80da533 pinctrl: bcm2835: Accept fewer than expected IRQs
The downstream .dts files only request two GPIO IRQs. Truncate the
array of parent IRQs when irq_of_parse_and_map returns 0.

Signed-off-by: Phil Elwell <phil@raspberrypi.com>
Signed-off-by: Ivan T. Ivanov <iivanov@suse.de>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Link: https://lore.kernel.org/r/20210521090158.26932-1-iivanov@suse.de
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-05-28 02:56:13 +02:00
Yang Li b9045af9fb pinctrl: Fix kernel-doc
Fix function name in pinctrl-single.c kernel-doc comment
to remove a warning found by clang_w1.

drivers/pinctrl/pinctrl-single.c:1523: warning: expecting prototype for
pcs_irq_handle(). Prototype was for pcs_irq_chain_handler() instead.

Reported-by: Abaci Robot <abaci@linux.alibaba.com>
Signed-off-by: Yang Li <yang.lee@linux.alibaba.com>
Link: https://lore.kernel.org/r/1621998464-10918-1-git-send-email-yang.lee@linux.alibaba.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-05-28 02:42:10 +02:00
Steven Lee 0b97148459 pinctrl: pinctrl-aspeed-g6: Add sgpio pinctrl settings
AST2600 supports 2 SGPIO master interfaces and 2 SGPIO slave interfaces.
Current pinctrl driver only define the first sgpio master and slave
interfaces.
The second SGPIO master and slave interfaces should be added in
pinctrl driver as well.

Signed-off-by: Steven Lee <steven_lee@aspeedtech.com>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Link: https://lore.kernel.org/r/20210525055308.31069-4-steven_lee@aspeedtech.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-05-28 01:47:53 +02:00
Steven Lee 89be5957e7 dt-bindings: pinctrl: Update enum for adding SGPM2 and SGPS2
AST2600 has 2 SGPIO master interfaces one with 128 pins and another one
has 80 pins. It also supports 2 SGPIO slave interfaces.
In the current bindings, there are only SGPM1 and SGPS1 defined in enum,
SGPM2 and SGPS2 should also be added in the bindings.

Signed-off-by: Steven Lee <steven_lee@aspeedtech.com>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Link: https://lore.kernel.org/r/20210525055308.31069-2-steven_lee@aspeedtech.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-05-28 01:44:47 +02:00
Fabien Parent e94d8b6fb8 pinctrl: mediatek: add support for mt8365 SoC
Add pinctrl driver for MT8365 SoC.

Signed-off-by: Fabien Parent <fparent@baylibre.com>
Link: https://lore.kernel.org/r/20210519162409.3755679-3-fparent@baylibre.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-05-27 16:50:15 +02:00
Fabien Parent 9f940d8ecf pinctrl: mediatek: don't hardcode mode encoding in common code
MT8365 encode the pins mode differently than other
MTK pinctrl drivers that use the PINCTRL_MTK common code.

Add 3 new fields in mtk_pinctrl_devdata in order to store how
pin modes are encoded into the register. At the
same time update all the pinctrl driver that depends on
CONFIG_PINCTRL_MTK.

Signed-off-by: Fabien Parent <fparent@baylibre.com>
Link: https://lore.kernel.org/r/20210519162409.3755679-2-fparent@baylibre.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-05-27 16:50:15 +02:00
Fabien Parent 8b4c397d88 dt-bindings: pinctrl: mt65xx: add mt8365 SoC binding
Add binding documentation for MT8365 Pin controller.

Signed-off-by: Fabien Parent <fparent@baylibre.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210519162409.3755679-1-fparent@baylibre.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-05-27 16:50:15 +02:00
Mark Kettenis 710071479c dt-bindings: pinctrl: Add DT bindings for apple, pinctrl
The Apple GPIO controller is a simple combined pin and GPIO conroller
present on Apple ARM SoC platforms, including various iPhone and iPad
devices and the "Apple Silicon" Macs.

Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Link: https://lore.kernel.org/r/20210520171310.772-2-mark.kettenis@xs4all.nl
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-05-25 17:46:08 +02:00
Rikard Falkeborn f56b273cd8 pinctrl: at91: Constify struct at91_pinctrl_mux_ops
The at91_pinctrl_mux_ops struct is never modified by the driver. Make it
const wherever it is possible to allow the compiler to put the static
variables in read-only memory. Note that sam9x60_ops was already const,
but the const was cast away when the return value of of_match_device() was
cast to a pointer to a non-const struct at91_pinctrl_mux_ops.

Signed-off-by: Rikard Falkeborn <rikard.falkeborn@gmail.com>
Link: https://lore.kernel.org/r/20210512180140.33293-1-rikard.falkeborn@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-05-25 17:10:05 +02:00
Jonathan Neuschäfer 9b882b73d3 pinctrl: npcm: Align a few entries in the pin function table
The entries for GPIO 33 and 34 are not properly aligned. Fix the
alignment.

Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Link: https://lore.kernel.org/r/20210513160947.1716185-1-j.neuschaefer@gmx.net
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-05-25 17:10:05 +02:00
Maximilian Luz 1ca46d3e43 pinctrl/amd: Add device HID for new AMD GPIO controller
Add device HID AMDI0031 to the AMD GPIO controller driver match table.
This controller can be found on Microsoft Surface Laptop 4 devices and
seems similar enough that we can just copy the existing AMDI0030 entry.

Cc: <stable@vger.kernel.org> # 5.10+
Tested-by: Sachi King <nakato@nakato.io>
Signed-off-by: Maximilian Luz <luzmaximilian@gmail.com>
Link: https://lore.kernel.org/r/20210512210316.1982416-1-luzmaximilian@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-05-25 17:09:48 +02:00
Andy Shevchenko 258435a1c8 pinctrl: tigerlake: Add Alder Lake-M ACPI ID
Intel Alder Lake-M PCH has the same GPIO hardware than Tiger Lake-LP
PCH but the ACPI ID is different. Add this new ACPI ID to the list of
supported devices.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2021-05-25 16:26:38 +03:00
satya priya f9fb145b27 dt-bindings: pinctrl: qcom-pmic-gpio: Add pm7325 support
Add compatible string for PM7325 pmic GPIO support to the
Qualcomm PMIC GPIO binding.

Signed-off-by: satya priya <skakit@codeaurora.org>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/1620817988-18809-3-git-send-email-skakit@codeaurora.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-05-20 01:42:05 +02:00
satya priya 676e2d0750 pinctrl: qcom: spmi-gpio: Add support for pm7325
Add compatible string for PM7325 pmic GPIO support to the
Qualcomm PMIC GPIO driver.

Signed-off-by: satya priya <skakit@codeaurora.org>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1620817988-18809-2-git-send-email-skakit@codeaurora.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-05-20 01:42:05 +02:00
Zhen Lei ef9385fbf3 pinctrl: iproc-gpio: Remove redundant error printing in iproc_gpio_probe()
When devm_ioremap_resource() fails, a clear enough error message will be
printed by its subfunction __devm_ioremap_resource(). The error
information contains the device name, failure cause, and possibly resource
information.

Therefore, remove the error printing here to simplify code and reduce the
binary size.

Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Acked-by: Ray Jui <ray.jui@broadcom.com>
Link: https://lore.kernel.org/r/20210511085126.4287-1-thunder.leizhen@huawei.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-05-20 01:37:32 +02:00
Zhen Lei 0f9facdbd9 pinctrl: ocelot: Remove redundant error printing in ocelot_pinctrl_probe()
When devm_ioremap_resource() fails, a clear enough error message will be
printed by its subfunction __devm_ioremap_resource(). The error
information contains the device name, failure cause, and possibly resource
information.

Therefore, remove the error printing here to simplify code and reduce the
binary size.

Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Link: https://lore.kernel.org/r/20210511090936.4452-1-thunder.leizhen@huawei.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-05-20 01:33:53 +02:00
Andy Shevchenko 57b55eeb75 pinctrl: Keep enum pin_config_param ordered by name (part 2)
It seems the ordering is by name. Keep it that way.
Here updating the entire list (there were two more options not in order).

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20210510194717.12255-1-andriy.shevchenko@linux.intel.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-05-20 01:30:48 +02:00
Bixuan Cui d7f444499d pinctrl: equilibrium: Add missing MODULE_DEVICE_TABLE
This patch adds missing MODULE_DEVICE_TABLE definition which generates
correct modalias for automatic loading of this driver when it is built
as an external module.

Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: Bixuan Cui <cuibixuan@huawei.com>
Link: https://lore.kernel.org/r/20210508031502.53637-1-cuibixuan@huawei.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-05-20 01:00:24 +02:00
Bjorn Andersson 969ef42b1a pinctrl: qcom: spmi-mpp: Add compatible for pmi8994
The PMI8994 has 4 multi-purpose-pins, add a compatible for this hardware
block to the MPP driver.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210429003751.224232-1-bjorn.andersson@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-05-19 02:23:52 +02:00
Raul E Rangel d62bd5ce12 pinctrl: amd: Implement irq_set_wake
This allows the OS to control which devices produce wake events.

$ grep enabled /sys/kernel/irq/*/wakeup
/sys/kernel/irq/24/wakeup:enabled

Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Link: https://lore.kernel.org/r/20210429163341.1.I7631534622233689dd81410525e0dd617b9b2012@changeid
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-05-19 02:20:05 +02:00
Rafał Miłecki ac5f8197d1 dt-bindings: pinctrl: convert Broadcom Northstar to the json-schema
Important: this change converts the binding as it is. It includes
dependency on undocumented CRU that must be refactored. CRU must get
documented and offset property has to be reworked.

Above can (and will be) be handled once every CRU MFD subdevice gets
documented properly (including the pinmux).

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210421182041.22636-1-zajec5@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-05-19 01:56:18 +02:00
Geert Uytterhoeven 904ec4bebc pinctrl: renesas: r8a779{51,6,65}: Reduce non-functional differences
Change whitespace in the pin control drivers for R-Car H3 ES2.0+, R-Car
M3-W/M3-W+, and R-Car M3-N, to reduce the differences among these very
similar drivers.

These changes have no functional impact.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/527b45ebfc664a80e41cb0136677db7260e11437.1619785375.git.geert+renesas@glider.be
2021-05-11 10:04:42 +02:00