Commit Graph

20800 Commits

Author SHA1 Message Date
Christian König 3cb485f340 drm/amdgpu: fix context switch
Properly protect the state and also handle submission failures.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Monk Liu <monk.liu@amd.com>
2015-06-03 21:03:34 -04:00
Christian König d919ad49ac drm/amdgpu: fix dereference before check
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Monk Liu <monk.liu@amd.com>
2015-06-03 21:03:33 -04:00
Christian König d2edb07b10 drm/amdgpu: cleanup HDP flush handling
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Monk Liu <monk.liu@amd.com>
2015-06-03 21:03:32 -04:00
Christian König 66782cec7a drm/amdgpu: always emit GDS switch
Otherwise a process can access the GDS data of another process.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Monk Liu <monk.liu@amd.com>
2015-06-03 21:03:31 -04:00
Jammy Zhou aa2bdb2476 drm/amdgpu: add CE preamble flag v3
The CE preamble IB can be dropped for the same context

v2: use the flags directly
v3: remove 'CE' for potential preamble usage by other rings

Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-06-03 21:03:31 -04:00
Jammy Zhou de807f818b drm/amdgpu: add flags for amdgpu_ib structure
Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-06-03 21:03:30 -04:00
Jammy Zhou 72efa7ebde drm/amdgpu: check context id for context switching (v2)
check the filp is not robust, and sometimes different contexts may
have same filp value.

v2: check both filp and ctx_id

Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-06-03 21:03:29 -04:00
Jammy Zhou 66b3cf2ab3 drm/amdgpu: add ctx_id to the WAIT_CS IOCTL (v4)
It is required to support fence per context.

v2: add amdgpu_ctx_get/put
v3: improve get/put
v4: squash hlock fix

Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-06-03 21:03:29 -04:00
Jack Xiao 74a5d1656e drm/amdgpu: allow unaligned memory access (v2)
Set up the CP and SDMA for proper unaligned memory access.
Required for OpenCL 2.x

v2: udpate commit message

Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Reviewed-by: Monk Liu <monk.liu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-06-03 21:03:28 -04:00
Marek Olšák 0147ee0f59 drm/amdgpu: make the CTX ioctl thread-safe
The existing locks were protecting the list, but not the elements.

v2: rename hlock to lock

Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-06-03 21:03:27 -04:00
Marek Olšák f11358daa9 drm/amdgpu: remove unsafe context releasing
If ctx was released between put and get, then "get" would crash.

Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-06-03 21:03:27 -04:00
Christian König a961ea7349 drm/amdgpu: fix userptr lockup
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Monk Liu <monk.liu@amd.com>
2015-06-03 21:03:26 -04:00
monk.liu dd08fae1e9 drm/amdgpu: fix userptr BO unpin bug (v2)
sg could point to array of contigiouse page*, only free page could lead
to memory leak.

v2: use iterator

Signed-off-by: monk.liu <monk.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-06-03 21:03:25 -04:00
Jammy Zhou 886712881d drm/amdgpu: remove AMDGPU_GEM_CREATE_CPU_GTT_UC
This flag isn't used by user mode drivers, remove it to avoid
confusion. And rename GTT_WC to GTT_USWC to make it clear.

Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-06-03 21:03:24 -04:00
Sonny Jiang 46651cc5db drm/amdgpu fix amdgpu.dpm=0 (v2)
Fix crash when disabling dpm.

v2: agd5f: fix coding style, cleanup commit message

Signed-off-by: Sonny Jiang <sonny.jiang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-06-03 21:03:24 -04:00
Alex Deucher c92b90ccc2 drm/amdgpu: memset gds_info struct in info ioctl
Avoids possibility that info may leak via the uninitialized
_pad element.

Noticed-by: Dan Carpenter <dan.carpenter@oracle.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-06-03 21:03:23 -04:00
Alex Deucher 1045745742 drm/amdgpu: fix error handling in cz_dpm_hw_fini/cz_dpm_suspend
Need to unlock the mutex on error.

Noticed-by: Dan Carpenter <dan.carpenter@oracle.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-06-03 21:03:22 -04:00
monk.liu decee87a88 drm/amdgpu: let bo_list handler start from 1
this could prevent mis-understanding, because libdrm side will consider
no bo_list created if handleis zero

Signed-off-by: monk.liu <monk.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-06-03 21:03:22 -04:00
monk.liu 840d51445f drm/amdgpu: fix bug occurs when bo_list is NULL
Still need to handle ibs BO and validate them even bo_list is NULL

Signed-off-by: Monk.Liu <monk.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-06-03 21:03:21 -04:00
Jack Xiao 7ab7e8a409 drm/amdgpu: fix error check issue in amdgpu_mn_invalidate_range_start
Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Reviewed-by: Monk Liu <monk.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-06-03 21:03:20 -04:00
Alex Deucher 2d8bd23a05 drm/amdgpu: drop ttm two ended allocation
amdgpu_bo_create() calls amdgpu_ttm_placement_from_domain()
before ttm_bo_init() is called.  amdgpu_ttm_placement_from_domain()
uses the ttm bo size to determine when to select top down
allocation but since the ttm bo is not initialized yet the
check is always false.  It only took affect when buffers
were validated later.  It also seemed to regress suspend
and resume on some systems possibly due to it not
taking affect in amdgpu_bo_create().

amdgpu_bo_create() and amdgpu_ttm_placement_from_domain()
need to be reworked substantially for this to be optimally
effective.  Re-enable it at that point.

Ported from radeon commit:
a239118a24

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-06-03 21:03:20 -04:00
Alex Deucher 1256a8b89e drm/amdgpu: add VI pci ids
Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-06-03 21:03:19 -04:00
Alex Deucher 89330c391b drm/amdgpu: add CIK pci ids
Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-06-03 21:03:18 -04:00
Alex Deucher aaa36a976b drm/amdgpu: Add initial VI support
This adds initial support for VI asics.  This
includes Iceland, Tonga, and Carrizo.  Our inital
focus as been Carrizo, so there are still gaps in
support for Tonga and Iceland, notably power
management.

Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-06-03 21:03:17 -04:00
Alex Deucher a2e73f56fa drm/amdgpu: Add support for CIK parts
This patch adds support for CIK parts.  These parts
are also supported by radeon which is the preferred
option, so there is a config option to enable support
for CIK parts in amdgpu for testing.

Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-06-03 21:03:17 -04:00
Alex Deucher 18da4340e6 drm/amdgpu: Do not directly dereference pointers to BIOS area.
Use readb() and memcpy_fromio() accessors instead.

Ported from radeon commit:
f2c9e560b4

Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-06-03 21:03:16 -04:00
Alex Deucher 17b10f941f drm/amdgpu: fix const warnings in amdgpu_connectors.c
Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-06-03 21:03:15 -04:00
Alex Deucher d38ceaf99e drm/amdgpu: add core driver (v4)
This adds the non-asic specific core driver code.

v2: remove extra kconfig option
v3: implement minor fixes from Fengguang Wu
v4: fix cast in amdgpu_ucode.c

Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-06-03 21:03:15 -04:00
Alex Deucher 97b2e202fb drm/amdgpu: add amdgpu.h (v2)
This is the main header file for amdgpu.

v2: remove stable comments

Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-06-03 21:03:14 -04:00
Alex Deucher 8a94f39580 drm/amdgpu: add amdgpu_family.h
This header defines asic families and attributes.

Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-06-03 21:03:13 -04:00
Alex Deucher b111f7e4d2 drm/amdgpu: add ppsmc.h
This header provides the smc message interface for the driver.

Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-06-03 21:03:13 -04:00
Alex Deucher bd098eb0ee drm/amdgpu: add clearstate_defs.h
This header provides for format for the GCA blocks
clear state (i.e., default state).  Each GCA version
has a specific clear state.

Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-06-03 21:03:12 -04:00
Alex Deucher a02860aa2b drm/amdgpu: add atombios headers
These headers define the atombios table structure and
driver interface.

Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-06-03 21:03:11 -04:00
Alex Deucher c481a6802e drm/amdgpu: add VCE 3.0 register headers
These are register headers for the VCE (Video Codec Engine)
block on the GPU.

Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-06-03 21:03:10 -04:00
Alex Deucher 683595a6f3 drm/amdgpu: add VCE 2.0 register headers
These are register headers for the VCE (Video Codec Engine)
block on the GPU.

Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-06-03 21:03:09 -04:00
Alex Deucher 3b1e08cb29 drm/amdgpu: add UVD 6.0 register headers
These are register headers for the UVD (Universal Video Decoder)
block on the GPU.

Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-06-03 21:03:08 -04:00
Alex Deucher 7aa27c3773 drm/amdgpu: add UVD 5.0 register headers
These are register headers for the UVD (Universal Video Decoder)
block on the GPU.

Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-06-03 21:03:08 -04:00
Alex Deucher 8630f839e0 drm/amdgpu: add UVD 4.2 register headers
These are register headers for the UVD (Universal Video Decoder)
block on the GPU.

Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-06-03 21:03:07 -04:00
Alex Deucher 47e6898750 drm/amdgpu: add SMU 8.0 register headers
These are register headers for the SMU (System Management Unit)
block on the GPU.

Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-06-03 21:03:06 -04:00
Alex Deucher bc136e1329 drm/amdgpu: add SMU 7.1.2 register headers
These are register headers for the SMU (System Management Unit)
block on the GPU.

Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-06-03 21:03:05 -04:00
Alex Deucher c4712a10e7 drm/amdgpu: add SMU 7.1.1 register headers
These are register headers for the SMU (System Management Unit)
block on the GPU.

Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-06-03 21:03:05 -04:00
Alex Deucher 90593ac0da drm/amdgpu: add SMU 7.1.0 register headers
These are register headers for the SMU (System Management Unit)
block on the GPU.

Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-06-03 21:03:04 -04:00
Alex Deucher a4efaabae5 drm/amdgpu: add SMU 7.0.1 register headers
These are register headers for the SMU (System Management Unit)
block on the GPU.

Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-06-03 21:03:03 -04:00
Alex Deucher 9b289c2610 drm/amdgpu: add SMU 7.0.0 register headers
These are register headers for the SMU (System Management Unit)
block on the GPU.

Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-06-03 21:03:03 -04:00
Alex Deucher a1ef4a8aa1 drm/amdgpu: add OSS 3.0.1 register headers
These are register headers for the OSS (OS Services)
block on the GPU.

Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-06-03 21:03:02 -04:00
Alex Deucher 6d5506b617 drm/amdgpu: add OSS 3.0 register headers
These are register headers for the OSS (OS Services)
block on the GPU.

Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-06-03 21:03:01 -04:00
Alex Deucher 3f2ec6f51d drm/amdgpu: add OSS 2.4 register headers
These are register headers for the OSS (OS Services)
block on the GPU.

Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-06-03 21:03:00 -04:00
Alex Deucher 599bd21552 drm/amdgpu: add OSS 2.0 register headers
These are register headers for the OSS (OS Services)
block on the GPU.

Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-06-03 21:03:00 -04:00
Alex Deucher 8f54b7c9eb drm/amdgpu: add GMC 8.2 register headers
These are register headers for the GMC (Graphics Memory Controller)
block on the GPU.

Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-06-03 21:02:59 -04:00
Alex Deucher bd6a6b43fd drm/amdgpu: add GMC 8.1 register headers
These are register headers for the GMC (Graphics Memory Controller)
block on the GPU.

Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-06-03 21:02:58 -04:00
Alex Deucher 973305270b drm/amdgpu: add GMC 7.1 register headers
These are register headers for the GMC (Graphics Memory Controller)
block on the GPU.

Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-06-03 21:02:57 -04:00
Alex Deucher 52fb57e7ee drm/amdgpu: add GMC 7.0 register headers
These are register headers for the GMC (Graphics Memory Controller)
block on the GPU.

Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-06-03 21:02:57 -04:00
Alex Deucher 675892a184 drm/amdgpu: add GCA 8.0 register headers
These are register headers for the GCA (Graphics and Compute Array)
block on the GPU.

Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-06-03 21:02:56 -04:00
Alex Deucher 46d5a27269 drm/amdgpu: add GCA 7.2 register headers
These are register headers for the GCA (Graphics and Compute Array)
block on the GPU.

Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-06-03 21:02:55 -04:00
Alex Deucher 9f24d8ce25 drm/amdgpu: add GCA 7.0 register headers
These are register headers for the GCA (Graphics and Compute Array)
block on the GPU.

Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-06-03 21:02:55 -04:00
Alex Deucher d180bab3a8 drm/amdgpu: add DCE 11.0 register headers
These are register headers for the DCE (Display and Composition Engine)
block on the GPU.

Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-06-03 21:02:54 -04:00
Alex Deucher 36cfed855d drm/amdgpu: add DCE 10.0 register headers
These are register headers for the DCE (Display and Composition Engine)
block on the GPU.

Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-06-03 21:02:53 -04:00
Alex Deucher 26159c86dd drm/amdgpu: add DCE 8.0 register headers
These are register headers for the DCE (Display and Composition Engine)
block on the GPU.

Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-06-03 21:02:52 -04:00
Alex Deucher 3e5343bd7c drm/amdgpu: add BIF 5.1 register headers
These are register headers for the BIF (Bus InterFace) block on
the GPU.

Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-06-03 21:02:51 -04:00
Alex Deucher 848ebfd731 drm/amdgpu: add BIF 5.0 register headers
These are register headers for the BIF (Bus InterFace) block on
the GPU.

Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-06-03 21:02:51 -04:00
Alex Deucher 054e4c60fe drm/amdgpu: add BIF 4.1 register headers
These are register headers for the BIF (Bus InterFace) block on
the GPU.

Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-06-03 21:02:50 -04:00
Dave Airlie 63e1456122 Merge branch 'virtio-gpu-drm-next' of git://git.kraxel.org/linux into drm-next
Yay, thanks to Gerd for pull this together.

* 'virtio-gpu-drm-next' of git://git.kraxel.org/linux:
  Add MAINTAINERS entry for virtio-gpu.
  Add virtio gpu driver.
  drm_vblank_get: don't WARN_ON in case vblanks are not initialized
  break kconfig dependency loop
2015-06-04 09:36:39 +10:00
Dave Airlie 6aa6272503 Merge branch 'linux-4.1.0-rc5-tilcdc-refactor' of https://github.com/jsarha/linux into drm-next
Please pull the contents of "Use DRM component API in tilcdc to
connect to tda998x" patch series.

* 'linux-4.1.0-rc5-tilcdc-refactor' of https://github.com/jsarha/linux:
  drm/tilcdc: Force building of DRM_TILCDC_SLAVE_COMPAT
  drm/tilcdc: Add DRM_TILCDC_SLAVE_COMPAT for ti,tilcdc,slave binding support
  drm/tilcdc: use pm_runtime_irq_safe()
  drm/tilcdc: Add support for external tda998x encoder
  drm/tilcdc: Remove tilcdc slave support for tda998x driver
  drm/tilcdc: Fix module unloading
2015-06-04 09:24:28 +10:00
Dave Airlie a8a50fce60 Linux 4.1-rc6
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Merge tag 'v4.1-rc6' into drm-next

Linux 4.1-rc6

backmerge 4.1-rc6 as some of the later pull reqs are based on newer bases
and I'd prefer to do the fixup myself.
2015-06-04 09:23:51 +10:00
Maarten Lankhorst 9b5edbf7a4 drm/atomic: Clear crtc_state->active in drm_atomic_helper_set_config.
This fixes some regressions in i915 when converting to atomic.
set_config failed with -EINVAL, and I received the following warning
in dmesg:

[drm:drm_atomic_crtc_check] [CRTC:20] active without enabled

Solve this by clearing active when a crtc is disabled.

Because crtc_state->enable implies that connectors are active the
change from disabled->enabled can only happen for the crtc that's
being set_config'd, and checking for !crtc_state->enable is sufficient
here.

Cc: dri-devel@lists.freedesktop.org
Reviewed-by: Rob Clark <robdclark@gmail.com>
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-06-04 09:20:31 +10:00
Dave Airlie 531e63e163 Merge tag 'topic/drm-misc-2015-05-27' of git://anongit.freedesktop.org/drm-intel into drm-next
One more round of drm-misc, again mostly atomic. Big thing is the
userspace blob code from Daniel Stone, with support for the mode_id blob
now added to the atomic ioctl. Finally we can do atomic modesets!

Note that the atomic ioctl is still behind the module knob since the
weston patches aren't quite ready yet imo - they lack TEST_ONLY support,
which is a fairly crucial bit of the atomic api. But besides that I think
it's all good to go. That's also why we didn't bother to hide the new blob
ioctls behind the knob, that part won't need to change. And if weston
patches get in shape in time we could throw the "atomic by default patch"
on top for 4.2.

* tag 'topic/drm-misc-2015-05-27' of git://anongit.freedesktop.org/drm-intel:
  drm: Fix off-by-one in vblank hardware counter wraparound handling
  drm/atomic: fix out of bounds read in for_each_*_in_state helpers
  drm/atomic: Add MODE_ID property
  drm/atomic: Add current-mode blob to CRTC state
  drm: Add drm_atomic_set_mode_for_crtc
  drm: check for garbage in unused addfb2 fields
  drm: Retain reference to blob properties in lookup
  drm/mode: Add user blob-creation ioctl
  drm: Return error value from blob creation
  drm: Allow creating blob properties without copy
  drm/mode: Unstatic kernel-userspace mode conversion
  drm/mode: Validate modes inside drm_crtc_convert_umode
  drm/crtc_helper: Replace open-coded CRTC state helpers
  drm: kerneldoc fixes for blob properties
  drm/DocBook: Add more drm_bridge documentation
  drm: bridge: Allow daisy chaining of bridges
  drm/atomic: add all affected planes in drm_atomic_helper_check_modeset
  drm/atomic: add drm_atomic_add_affected_planes
  drm/atomic: add commit_planes_on_crtc helper
2015-06-04 09:17:45 +10:00
Dave Airlie dc5698e80c Add virtio gpu driver.
This patch adds a kms driver for the virtio gpu.  The xorg modesetting
driver can handle the device just fine, the framebuffer for fbcon is
there too.

Qemu patches for the host side are under review currently.

The pci version of the device comes in two variants: with and without
vga compatibility.  The former has a extra memory bar for the vga
framebuffer, the later is a pure virtio device.  The only concern for
this driver is that in the virtio-vga case we have to kick out the
firmware framebuffer.

Initial revision has only 2d support, 3d (virgl) support requires
some more work on the qemu side and will be added later.

Signed-off-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Michael S. Tsirkin <mst@redhat.com>
2015-06-03 14:17:38 +02:00
Ben Goz c3447e8150 drm/amdkfd: Enforce kill all waves on process termination
This commit makes sure that on process termination, after
we're destroying all the active queues, we're killing all the
existing wave front of the current process.

By doing this we're making sure that if any of the CUs were blocked
by infinite loop we're enforcing it to end the shader explicitly.

Signed-off-by: Ben Goz <ben.goz@amd.com>
Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
2015-06-03 11:34:47 +03:00
Alexey Skidanov edad40239f drm/radeon: Add ATC VMID<-->PASID functions to kfd->kgd
This patch adds three new interfaces to kfd2kgd interface file of radeon.

The interfaces are:

- Check if a specific VMID has a valid PASID mapping
- Retrieve the PASID which is mapped to a specific VMID
- Issue a VMID invalidation request to the ATC

Signed-off-by: Alexey Skidanov <Alexey.Skidanov@amd.com>
Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
2015-06-03 11:34:46 +03:00
Yair Shachar f8bd13338a drm/amdkfd: Implement address watch debugger IOCTL
v2:

- rename get_dbgmgr_mutex to kfd_get_dbgmgr_mutex to namespace it
- change void* to uint64_t inside ioctl arguments
- use kmalloc instead of kzalloc because we use copy_from_user
  immediately after it

Signed-off-by: Yair Shachar <yair.shachar@amd.com>
Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
2015-06-03 11:34:35 +03:00
Yair Shachar 9448458998 drm/amdkfd: Implement wave control debugger IOCTL
v2:

- rename get_dbgmgr_mutex to kfd_get_dbgmgr_mutex to namespace it
- change void* to uint64_t inside ioctl arguments
- use kmalloc instead of kzalloc because we use copy_from_user
  immediately after it

Signed-off-by: Yair Shachar <yair.shachar@amd.com>
Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
2015-06-03 11:33:26 +03:00
Yair Shachar 037ed9a2ac drm/amdkfd: Implement (un)register debugger IOCTLs
v2: rename get_dbgmgr_mutex to kfd_get_dbgmgr_mutex to namespace it

Signed-off-by: Yair Shachar <yair.shachar@amd.com>
Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
2015-06-03 11:33:07 +03:00
Yair Shachar e2e9afc4a3 drm/amdkfd: Add address watch operation to debugger
The address watch operation gives the ability to specify watch points
which will generate a shader breakpoint, based on a specified single
address or range of addresses.

There is support for read/write/any access modes.

Signed-off-by: Yair Shachar <yair.shachar@amd.com>
Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
2015-06-03 11:33:06 +03:00
Yair Shachar 788bf83db3 drm/amdkfd: Add wave control operation to debugger
The wave control operation supports several command types executed upon
existing wave fronts that belong to the currently debugged process.

The available commands are:

HALT   - Freeze wave front(s) execution
RESUME - Resume freezed wave front(s) execution
KILL   - Kill existing wave front(s)

Signed-off-by: Yair Shachar <yair.shachar@amd.com>
Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
2015-06-03 11:33:06 +03:00
Yair Shachar fbeb661bfa drm/amdkfd: Add skeleton H/W debugger module support
This patch adds the skeleton H/W debugger module support. This code
enables registration and unregistration of a single HSA process at a
time.

The module saves the process's pasid and use it to verify that only the
registered process is allowed to execute debugger operations through the
kernel driver.

v2: rename get_dbgmgr_mutex to kfd_get_dbgmgr_mutex to namespace it

Signed-off-by: Yair Shachar <yair.shachar@amd.com>
Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
2015-06-03 11:32:28 +03:00
Yair Shachar 992839ad64 drm/amdkfd: Add static user-mode queues support
This patch adds support for static user-mode queues in QCM.
Queues which are designated as static can NOT be preempted by
the CP microcode when it is executing its scheduling algorithm.

This is needed for supporting the debugger feature, because we
can't allow the CP to preempt queues which are currently being debugged.

The number of queues that can be designated as static is limited by the
number of HQDs (Hardware Queue Descriptors).

Signed-off-by: Yair Shachar <yair.shachar@amd.com>
Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
2015-06-03 11:32:28 +03:00
Yair Shachar aef11009c4 drm/amdkfd: add H/W debugger IOCTL set definitions
This patch adds four new IOCTLs to amdkfd. These IOCTLs expose a H/W
debugger functionality to the userspace.

The IOCTLs are:

- AMDKFD_IOC_DBG_REGISTER:

The purpose of this IOCTL is to notify amdkfd that a process wants to use
GPU debugging facilities on itself only.
It is expected that this IOCTL would be called before any other H/W
debugger requests are sent to amdkfd and for each GPU where the H/W
debugging needs to be enabled. The use of this IOCTL ensures that only
one instance of a debugger is active in the system.

- AMDKFD_IOC_DBG_UNREGISTER:

This IOCTL detaches the debugger/debugged process from the H/W
Debug which was established by the AMDKFD_IOC_DBG_REGISTER IOCTL.

- AMDKFD_IOC_DBG_ADDRESS_WATCH:

This IOCTL allows to set different watchpoints with various conditions as
indicated by the IOCTL's arguments. The available number of watchpoints
is retrieved from topology. This operation is confined to the current
debugged process, which was registered through AMDKFD_IOC_DBG_REGISTER.

- AMDKFD_IOC_DBG_WAVE_CONTROL:

This IOCTL allows to control a wavefront as indicated by the IOCTL's
arguments. For example, you can halt/resume or kill either a
single wavefront or a set of wavefronts. This operation is confined to
the current debugged process, which was registered through
AMDKFD_IOC_DBG_REGISTER.

Because the arguments for the address watch IOCTL and wave control IOCTL
are dynamic, meaning that they could vary in size, the userspace passes a
pointer to a structure (in userspace) that contains the value of the
arguments. The kernel driver is responsible to parse this structure and
validate its contents.

v2: change void* to uint64_t inside ioctl arguments

Signed-off-by: Yair Shachar <yair.shachar@amd.com>
Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
2015-06-03 11:32:07 +03:00
Yair Shachar a6186f4d6f drm/radeon: Add H/W debugger kfd->kgd functions
This patch adds new interface functions to the kfd2kgd interface file. The
new functions allow to perform H/W debugger operations by writing to GPU
registers.

Signed-off-by: Yair Shachar <yair.shachar@amd.com>
Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
2015-06-03 11:31:12 +03:00
Joe Perches f761d8bd80 drm/amdkfd: Use DECLARE_BITMAP
Use the generic mechanism to declare a bitmap instead of unsigned long.

It seems that "struct kfd_process.allocated_queue_bitmap" is unused.
Maybe it could be deleted instead.

Signed-off-by: Joe Perches <joe@perches.com>
Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
2015-06-03 11:31:12 +03:00
Gerd Hoffmann 16e3247da7 drm_vblank_get: don't WARN_ON in case vblanks are not initialized
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-06-02 10:17:21 +02:00
Dave Airlie 3e8d222f2a Merge tag 'drm-intel-next-fixes-2015-05-29' of git://anongit.freedesktop.org/drm-intel into drm-next
Fixes for 4.2. Nothing too serious (given that it's still pre merge
window). With that it's off for 2 weeks of vacation for me and taking care
of 4.2 fixes for Jani.

* tag 'drm-intel-next-fixes-2015-05-29' of git://anongit.freedesktop.org/drm-intel:
  drm/i915: limit PPGTT size to 2GB in 32-bit platforms
  drm/i915: Another fbdev hack to avoid PSR on fbcon.
  drm/i915: Return the frontbuffer flip to enable intel_crtc_enable_planes.
  drm/i915: disable IPS while getting the sink CRCs
  drm/i915: Disable 12bpc hdmi for now
  drm/i915: Adjust sideband locking a bit for CHV/VLV
  drm/i915: s/dpio_lock/sb_lock/
  drm/i915: Kill intel_flush_primary_plane()
  drm/i915: Throw out WIP CHV power well definitions
  drm/i915: Use the default 600ns LDO programming sequence delay
  drm/i915: Remove unnecessary null check in execlists_context_unqueue
  drm/i915: Use spinlocks for checking when to waitboost
  drm/i915: Fix the confusing comment about the ioctl limits
  Revert "drm/i915: Force clean compilation with -Werror"
2015-06-02 18:10:50 +10:00
Alexandre Courbot 1c34d824bd drm/ttm: dma: Don't crash on memory in the vmalloc range
dma_alloc_coherent() can return memory in the vmalloc range.
virt_to_page() cannot handle such addresses and crashes. This
patch detects such cases and obtains the struct page * using
vmalloc_to_page() instead.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Acked-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-06-02 17:24:49 +10:00
Michel Thierry 501fd70fca drm/i915: limit PPGTT size to 2GB in 32-bit platforms
We already set this limit for the GGTT.

This is a temporary patch until a full replacement of size_t variables
(inadequate in 32-bit kernel) is in place.

Regression from:
	commit a4e0bedca6
	Author: Michel Thierry <michel.thierry@intel.com>
	Date:   Wed Apr 8 12:13:35 2015 +0100

		drm/i915: Use complete address space in true PPGTT

v2: Prettify code and explain why this is needed. (Chris)
v3: Don't hide the compilation warning in 32-bit. (Chris)

Suggested-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: Mika Kuoppala <mika.kuoppala@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-29 19:08:22 +02:00
Rodrigo Vivi d9a946b523 drm/i915: Another fbdev hack to avoid PSR on fbcon.
With unified modeset and flip paths introduced recently when switching
to fbcon PSR was being disabled on fb_set_par path but re-enabled on
fb_pan_display one, causing missed screen updates and un unusable
console.

Regression introduced with:

commit bb54662350
Author: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Date:   Tue Apr 21 17:13:13 2015 +0300

    drm/i915: Unify modeset and flip paths of intel_crtc_set_config()

Cc: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-29 10:18:32 +02:00
Rodrigo Vivi 2d847d45b2 drm/i915: Return the frontbuffer flip to enable intel_crtc_enable_planes.
Without this frontbuffer flip when enabling planes PSR got compromised
and wasn't being enabled waiting forever on the flush that never
arrived.

Another solution would to create a enable_cursor function and split this
frontbuffer flip among the different plane enable and disable functions.
But if necessary this can be done in a follow up work. For now let's
just fix the regression.

It was removed by:

commit 87d4300a7d
Author: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Date:   Tue Apr 21 17:12:54 2015 +0300

    drm/i915: Move intel_(pre_disable/post_enable)_primary to intel_display.c, and use it there.

Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-29 10:18:07 +02:00
Dave Airlie 1fe7142063 Merge branch 'linux-4.1' of git://anongit.freedesktop.org/git/nouveau/linux-2.6 into drm-fixes
Regression fix for Fermi acceleration, and fixes important to bringing
up display-less Maxwell boards.

* 'linux-4.1' of git://anongit.freedesktop.org/git/nouveau/linux-2.6:
  drm/nouveau/gr/gm204: remove a stray printk
  drm/nouveau/devinit/gm100-: force devinit table execution on boards without PDISP
  drm/nouveau/devinit/gf100: make the force-post condition more obvious
  drm/nouveau/gr/gf100-: fix wrong constant definition
2015-05-29 11:13:52 +10:00
Ben Skeggs aaea3938b5 drm/nouveau/gr/gm204: remove a stray printk
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-05-29 10:59:32 +10:00
Ben Skeggs 4d4d6f7520 drm/nouveau/devinit/gm100-: force devinit table execution on boards without PDISP
Should fix fdo#89558

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-05-29 10:59:32 +10:00
Ben Skeggs c9ab50d210 drm/nouveau/devinit/gf100: make the force-post condition more obvious
And also more generic, so it can be used on newer chipsets.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-05-29 10:59:32 +10:00
Lars Seipel 9ee971a0b8 drm/nouveau/gr/gf100-: fix wrong constant definition
Commit 3740c82590 ("drm/nouveau/gr/gf100-: add symbolic names for
classes") introduced a wrong macro definition causing acceleration setup
to fail. Fix it.

Signed-off-by: Lars Seipel <ls@slrz.net>
Fixes: 3740c82590 ("drm/nouveau/gr/gf100-: add symbolic names for classes")
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-05-29 10:59:32 +10:00
Dave Airlie 95872b49ce Merge branch 'drm-tda998x-devel' of git://ftp.arm.linux.org.uk/~rmk/linux-arm into drm-next
warning fix for tda998x

* 'drm-tda998x-devel' of git://ftp.arm.linux.org.uk/~rmk/linux-arm:
  drm/i2c: tda998x: fix compiler warning for ssize_t
2015-05-29 09:19:59 +10:00
Russell King 2f15791c28 drm: clean up drm_mm debugfs output
The drm_mm debugfs output is difficult to read as two different formats
are used for the addresses:

0x00000080000000-0x0000008000b000: 45056: used
0x8000b000-0x80016000: 45056: free
0x00000080016000-0x0000008001b000: 20480: used
0x8001b000-0x817a1000: 24666112: free
0x000000817a1000-0x000000817a8000: 28672: used
0x000000817a8000-0x00000081ba8000: 4194304: used

Fix this by using %#018llx for all addresses, thus making the output:

0x0000000080000000-0x000000008000b000: 45056: used
0x000000008000b000-0x0000000080016000: 45056: free
0x0000000080016000-0x000000008001b000: 20480: used
0x000000008001b000-0x00000000817a1000: 24666112: free
0x00000000817a1000-0x00000000817a8000: 28672: used
0x00000000817a8000-0x0000000081ba8000: 4194304: used

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-05-29 09:17:57 +10:00
Dave Airlie c99d153013 Merge tag 'drm-intel-next-2015-05-22' of git://anongit.freedesktop.org/drm-intel into drm-next
- cpt modeset sequence fixes from Ville
- more rps boosting tuning from Chris
- S3 support for skl (Damien)
- a pile of w/a for bxt from various people
- cleanup of primary plane pixel formats (Damien)
- a big pile of small patches with fixes and cleanups all over

* tag 'drm-intel-next-2015-05-22' of git://anongit.freedesktop.org/drm-intel: (90 commits)
  drm/i915: Update DRIVER_DATE to 20150522
  drm/i915: Introduce DRM_I915_THROTTLE_JIFFIES
  drm/i915: Use the correct destructor for freeing requests on error
  drm/i915/skl: don't fail colorkey + scaler request
  drm/i915: Enable GTT caching on gen8
  drm/i915: Move WaProgramL3SqcReg1Default:bdw to init_clock_gating()
  drm/i915: Use ilk_init_lp_watermarks() on BDW
  drm/i915: Disable FDI RX/TX before the ports
  drm/i915: Disable CRT port after pipe on PCH platforms
  drm/i915: Disable SDVO port after the pipe on PCH platforms
  drm/i915: Disable HDMI port after the pipe on PCH platforms
  drm/i915: Fix the IBX transcoder B workarounds
  drm/i915: Write the SDVO reg twice on IBX
  drm/i915: Fix DP enhanced framing for CPT
  drm/i915: Clean up the CPT DP .get_hw_state() port readout
  drm/i915: Clarfify the DP code platform checks
  drm/i915: Remove the double register write from intel_disable_hdmi()
  drm/i915: Remove a bogus 12bpc "toggle" from intel_disable_hdmi()
  drm/i915/skl: Deinit/init the display at suspend/resume
  drm/i915: Free RPS boosts for all laggards
  ...
2015-05-29 09:11:49 +10:00
Denys Vlasenko 9e5acbc213 radeon: Deinline indirect register accessor functions
This patch deinlines indirect register accessor functions.

These functions perform two mmio accesses, framed by spin lock/unlock.
Spin lock/unlock by itself takes more than 50 cycles in ideal case
(if lock is exclusively cached on current CPU).

With this .config: http://busybox.net/~vda/kernel_config,
after uninlining these functions have sizes and callsite counts
as follows:

r600_uvd_ctx_rreg: 111 bytes, 4 callsites
r600_uvd_ctx_wreg: 113 bytes, 5 callsites
eg_pif_phy0_rreg: 106 bytes, 13 callsites
eg_pif_phy0_wreg: 108 bytes, 13 callsites
eg_pif_phy1_rreg: 107 bytes, 13 callsites
eg_pif_phy1_wreg: 108 bytes, 13 callsites
rv370_pcie_rreg: 111 bytes, 21 callsites
rv370_pcie_wreg: 113 bytes, 24 callsites
r600_rcu_rreg: 111 bytes, 16 callsites
r600_rcu_wreg: 113 bytes, 25 callsites
cik_didt_rreg: 106 bytes, 10 callsites
cik_didt_wreg: 107 bytes, 10 callsites
tn_smc_rreg: 106 bytes, 126 callsites
tn_smc_wreg: 107 bytes, 116 callsites
eg_cg_rreg: 107 bytes, 20 callsites
eg_cg_wreg: 108 bytes, 52 callsites

Functions r100_mm_rreg() and r100_mm_rreg() have a fast path and
a locked (slow) path. This patch deinlines only slow path.

r100_mm_rreg_slow: 78 bytes, 2083 callsites
r100_mm_wreg_slow: 81 bytes, 3570 callsites

Reduction in code size is more than 65,000 bytes:

    text     data      bss       dec     hex filename
85740176 22294680 20627456 128662312 7ab3b28 vmlinux.before
85674192 22294776 20627456 128598664 7aa4288 vmlinux

Signed-off-by: Denys Vlasenko <dvlasenk@redhat.com>
Cc: Christian König <christian.koenig@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-05-28 14:52:40 -04:00
Christian König 7c0411d2fa drm/radeon: partially revert "fix VM_CONTEXT*_PAGE_TABLE_END_ADDR handling"
We have that bug for years and some users report side effects when fixing it on older hardware.

So revert it for VM_CONTEXT0_PAGE_TABLE_END_ADDR, but keep it for VM 1-15.

Signed-off-by: Christian König <christian.koenig@amd.com>
CC: stable@vger.kernel.org
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-05-28 09:54:43 -04:00
Paulo Zanoni 4373f0f24e drm/i915: disable IPS while getting the sink CRCs
This commit is the "sink CRC" version of:

commit 8c740dcea2
Author: Paulo Zanoni <paulo.r.zanoni@intel.com>
Date:   Fri Oct 17 18:42:03 2014 -0300
    drm/i915: disable IPS while getting the pipe CRCs.

For some unknown reason, when IPS gets enabled, the sink CRC changes.
Since hsw_enable_ips() doesn't really guarantee to enable IPS (it
depends on package C-states), we can't really predict if IPS is
enabled or disabled while running our CRC tests, so let's just
completely disable IPS while sink CRCs are being used.

If we find a way to make IPS not change the pipe CRC result, we may
want to fix IPS and then revert this patch (and 8c740dcea too). While
this doesn't happen, let's merge this patch, so the IGT tests relying
on sink CRCs can work properly.

This was discovered while developing a new IGT test, which will
probably be called kms_frontbuffer_tracking.

Testcase: igt/kms_frontbuffer_tracking (not on upstream IGT yet)
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-28 11:13:53 +02:00
Daniel Vetter 5e3daaca09 drm/i915: Disable 12bpc hdmi for now
It's totally broken, and since

commit d328c9d78d
Author: Daniel Vetter <daniel.vetter@ffwll.ch>
Date:   Fri Apr 10 16:22:37 2015 +0200

    drm/i915: Select starting pipe bpp irrespective or the primary plane

the kernel will try to use it even for the common rgb888 framebuffers.
Ville has patches to fix it all up properly, but unfortunately they're
stuck in review limbo. And since the 4.2 feature cutoff has passed we
need to somehow  handle this regression.

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Paulo Zanoni <przanoni@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
2015-05-28 11:13:52 +02:00
Ville Syrjälä 54433e91a6 drm/i915: Adjust sideband locking a bit for CHV/VLV
chv_enable_pll() doesn't need to hold sb_lock for the entire duration of
the function. Drop the lock as soon as possible.

valleyview_set_cdclk() does a potential lock+unlock+lock+unlock cycle
with sb_lock. Grab the lock a few lines earlier so we can make do
with a single lock+unlock cycle always.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-28 11:13:52 +02:00
Ville Syrjälä a580516d9f drm/i915: s/dpio_lock/sb_lock/
Rename dpio_lock to sb_lock to inform the reader that its primary
purpose is to protect the sideband mailbox rather than some DPIO
state.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-28 11:13:51 +02:00
Ville Syrjälä b12ce1d84f drm/i915: Kill intel_flush_primary_plane()
The primary plane frobbing was removed from the sprite code in
 commit ecce87ea3a
 Author: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
 Date:   Tue Apr 21 17:12:50 2015 +0300

    drm/i915: Remove implicitly disabling primary plane for now

but the intel_flush_primary_plane() calls were left behind. Replace them
with straight forward POSTING_READ() of the sprite surface address
register.

The other user of intel_flush_primary_plane() is g4x_disable_trickle_feed()
where we can just inline the steps directly.

This allows intel_flush_primary_plane() to be killed off.

Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-28 11:13:51 +02:00
Ville Syrjälä fde61e4b80 drm/i915: Throw out WIP CHV power well definitions
Expecting CHV power wells to be just an extended versions of the VLV
power wells, a bunch of commented out power wells were added in
anticipation when Punit folks would implement it all. Turns out they
never did, and instead CHV has fewer power wells than VLV. Rip out all
the #if 0'ed junk that's not needed.

v2: Rename the "pipe-a" well to "display" to match VLV
    Clarify the pipe A power well relationship to pipes B and C (Deepak)

Reviewed-by: Deepak S <deepak.s@linux.intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-28 11:13:50 +02:00
Ville Syrjälä bc284542da drm/i915: Use the default 600ns LDO programming sequence delay
Not sure which LDO programming sequence delay should be used for the CHV
PHY, but the spec says that 600ns is "Used by default for initial
bringup", and the BIOS seems to use that, so let's do the same.

Reviewed-by: Deepak S <deepak.s@linux.intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-28 11:13:50 +02:00
Michel Dänzer b0b9bb4dd5 drm/radeon: Fix max_vblank_count value for current display engines
The value was much too low, which could cause the userspace visible
vblank counter to move backwards when the hardware counter wrapped
around.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-05-28 00:15:30 -04:00
Christian König 161ab658a6 drm/radeon: stop using addr to check for BO move
It is theoretically possible that a swapped out BO gets the
same GTT address, but different backing pages while being swapped in.

Instead just use another VA state to note updated areas.

Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-05-28 00:03:39 -04:00
Alex Deucher 0106219361 drm/radeon: clean up radeon_audio_enable
- make it static
- fix mask/bool handling for last param

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2015-05-28 00:03:39 -04:00
Dave Airlie 97758ff7c8 Merge tag 'topic/drm-fixes-2015-05-27' of git://anongit.freedesktop.org/drm-intel into drm-fixes
here's a drm regression fix for drivers only partially
converted to atomic.

* tag 'topic/drm-fixes-2015-05-27' of git://anongit.freedesktop.org/drm-intel:
  drm/plane-helper: Adapt cursor hack to transitional helpers
2015-05-28 10:38:09 +10:00
Alex Deucher fbfd3bc7df drm/radeon/audio: make sure connector is valid in hotplug case
Avoids a crash when a monitor is hotplugged and the encoder
and connector are not linked yet.

bug:
https://bugs.freedesktop.org/show_bug.cgi?id=90681

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2015-05-27 13:14:59 -04:00
Alex Deucher 2d1c18bba1 Revert "drm/radeon: only mark audio as connected if the monitor supports it (v3)"
This breaks too many things.

bugs:
https://bugzilla.kernel.org/show_bug.cgi?id=99041
https://bugs.freedesktop.org/show_bug.cgi?id=90681

This reverts commit 0f55db36d4.

Cc: stable@vger.kernel.org
2015-05-27 12:08:29 -04:00
Michel Thierry d63f820f39 drm/i915: Remove unnecessary null check in execlists_context_unqueue
commit 53292cdb06 ("drm/i915: Workaround
to avoid lite restore with HEAD==TAIL") added a check for req0 != null
which is unnecessary.

The only way req0 could be null is if the list was empty, and this is
already addressed at the beginning of execlists_context_unqueue().

Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-27 13:20:51 +02:00
Michel Dänzer 5ceecb2fa7 drm: Fix off-by-one in vblank hardware counter wraparound handling
dev->max_vblank_count contains the largest value that can be represented
by the hardware counter. When the hardware counter wraps around, we have
to add that value + 1 to get the same value as if the hardware counter
didn't wrap around.

Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-27 13:00:08 +02:00
Jyri Sarha c87d2453a1 drm/tilcdc: Force building of DRM_TILCDC_SLAVE_COMPAT
If I read Documentation/kbuild/makefiles.txt section 3.6 right, this
patch should not be needed. However, without this patch the objects
needed for DRM_TILCDC_SLAVE_COMPAT are not linked, if DRM_TILCDC is
built as module.

Signed-off-by: Jyri Sarha <jsarha@ti.com>
Acked-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
2015-05-27 13:13:34 +03:00
Jyri Sarha 4e72215802 drm/tilcdc: Add DRM_TILCDC_SLAVE_COMPAT for ti,tilcdc,slave binding support
Adds a CONFIG_DRM_TILCDC_SLAVE_COMPAT module for "ti,tilcdc,slave"
node conversion. The implementation is in tilcdc_slave_compat.c and it
uses tilcdc_slave_compat.dts as a basis for creating a DTS
overlay. The DTS overlay adds an external tda998x encoder to tilcdc
that corresponds to the old tda998x based slave encoder.

Signed-off-by: Jyri Sarha <jsarha@ti.com>
Acked-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
2015-05-27 13:13:33 +03:00
Tomi Valkeinen e3487e07b8 drm/tilcdc: use pm_runtime_irq_safe()
tilcdc calls runtime PM get/put functions everywhere. Some of those
places will be called in irq context, crashing the driver.

As a quick fix, use pm_runtime_irq_safe() for tilcdc.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Jyri Sarha <jsarha@ti.com>
2015-05-27 13:13:33 +03:00
Jyri Sarha 103cd8bc1c drm/tilcdc: Add support for external tda998x encoder
Add support for an external compontised DRM encoder. The external
encoder can be connected to tilcdc trough device tree graph binding.
The binding document for tilcdc has been updated. The current
implementation supports only tda998x encoder.

To be able to filter out the unsupported video modes the tilcdc driver
needs to hijack the external connectors helper functions. The tilcdc
installes new helper functions that are otherwise identical to
orignals, but the mode_valid() call-back check the mode first localy,
before calling the original call-back. The tilcdc dirver restores the
original helper functions before it is unbound from the external
device.

I got the idea and some lines of code from Jean-Francois Moine's
"drm/tilcdc: Change the interface with the tda998x driver"-patch.

Signed-off-by: Jyri Sarha <jsarha@ti.com>
Acked-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
2015-05-27 13:13:32 +03:00
Jyri Sarha 6730201f4f drm/tilcdc: Remove tilcdc slave support for tda998x driver
Remove tilcdc slave support for tda998x driver. The tilcdc slave
support would conflicts with componentized use of tda998x.

Signed-off-by: Jyri Sarha <jsarha@ti.com>
Acked-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
2015-05-27 13:13:32 +03:00
Jyri Sarha de9cb5f20a drm/tilcdc: Fix module unloading
Force crtc dpms off before destroying the crtc instead of just
checking the dpms state. This fixes warning message and frozen picture
after tilcdc module unloading.

Signed-off-by: Jyri Sarha <jsarha@ti.com>
Acked-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
2015-05-27 13:13:31 +03:00
Alex Deucher a10f0df061 drm/radeon: don't share plls if monitors differ in audio support
Enabling audio may enable different pll dividers.  Don't share
plls if the monitors differ in audio support.

bug:
https://bugzilla.kernel.org/show_bug.cgi?id=98751

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2015-05-26 22:25:59 -04:00
Chris Wilson 8d3afd7d0e drm/i915: Use spinlocks for checking when to waitboost
In commit 1854d5ca0d
Author: Chris Wilson <chris@chris-wilson.co.uk>
Date:   Tue Apr 7 16:20:32 2015 +0100

    drm/i915: Deminish contribution of wait-boosting from clients

we removed an atomic timer based check for allowing waitboosting and
moved it below the mutex taken during RPS. However, that mutex can be
held for long periods of time on Vallyview/Cherryview as communication
with the PCU is slow. As clients may frequently wait for results (e.g.
such as tranform feedback) we introduced contention between the client
and the RPS worker. We can take advantage of the RPS worker, by
switching the wait boost decision to use spin locks and defer the
actual reclocking to the worker.

Fixes a regression of up to 45% on Baytrail and Baswell!

v2 (Daniel):
- Use max_freq_softlimit instead of the not-yet-merged boost
  frequency.
- Don't inject a fake irq into the boost work, instead treat
  client_boost as just another legit waker.

v3: Drop the now unused mask (Chris).

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90112
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> (v1)
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-26 19:16:12 +02:00
Alex Deucher 39fa10f7e2 drm/radeon: take the mode_config mutex when dealing with hpds (v2)
Since we are messing with state in the worker.

v2: drop the changes in the mst worker

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2015-05-26 10:31:26 -04:00
Alex Deucher 0c3a88407e drm/radeon: make dpcd parameters const
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-05-26 10:31:26 -04:00
Joe Perches a10e04f4c5 drm/radeon: Use DECLARE_BITMAP
Use the generic mechanism to declare a bitmap instead of unsigned long.

Signed-off-by: Joe Perches <joe@perches.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-05-26 10:31:25 -04:00
Alex Deucher 84bcd46959 drm/radeon/tn/si: enable/disable vce cg when encoding v2
Some of the vce clocks are automatic, others need to
be manually enabled.  For ease, just disable cg when
vce is active.

v2: rebased, call vce_v1_0_enable_mgcg directly

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-05-26 10:31:25 -04:00
Alex Deucher d55a43a3e9 drm/radeon: add support for vce 1.0 clock gating
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-05-26 10:31:24 -04:00
Christian König a918efab63 drm/radeon: add VCE 1.0 support v4
Initial support for VCE 1.0 using newest firmware.

v2: rebased
v3: fix for TN
v4: fix FW size calculation

Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-05-26 10:31:23 -04:00
Alex Deucher 11586cf040 drm/radeon/dpm: add vce support for SI
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-05-26 10:31:23 -04:00
Alex Deucher 11fe3d6edb drm/radeon/dpm: add vce dpm support for TN
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-05-26 10:31:22 -04:00
Alex Deucher 0fda42ac40 drm/radeon: implement tn_set_vce_clocks
This implements the function to set the vce clocks
on TN hardware.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-05-26 10:31:21 -04:00
Christian König b7af630c13 drm/radeon: implement si_set_vce_clocks v2
For setting clocks with VCE v1.0

v2: (chk) rebased on current tree

Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-05-26 10:31:21 -04:00
Christian König c11d75c87a drm/radeon: allow some more VCE firmware versions
They seem to work fine with the kernel interface.

Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-05-26 10:31:20 -04:00
Christian König fa0cf2f246 drm/radeon: rework VCE FW size calculation
Previously we were completely over allocating, fix this
by actually implementing the size calculation.

Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-05-26 10:31:20 -04:00
Marek Olšák 72b9076b28 drm/radeon: add a GPU reset counter queryable by userspace
Userspace will be able to tell whether a GPU reset occured by comparing
an old referece value of the counter with a new value.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-05-26 10:31:19 -04:00
Daniel Stone 955f3c334f drm/atomic: Add MODE_ID property
Atomic modesetting: now with modesetting support.

v2: Moved drm_atomic_set_mode_prop_for_crtc from previous patch; removed
    state->active fiddling, documented return code. Changed property
    type to DRM_MODE_PROP_BLOB.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Tested-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-26 15:50:42 +02:00
Daniel Stone 99cf4a29fa drm/atomic: Add current-mode blob to CRTC state
Add a blob property tracking the current mode to the CRTC state, and
ensure it is properly updated and referenced.

v2: Continue using crtc_state->mode inside getcrtc, instead of reading
    out the mode blob. Use IS_ERR and PTR_ERR from create_blob. Move
    set_mode_prop_for_crtc to later patch where it actually gets used.
    Enforce !!state->enable == !!state->mode_blob inside
    drm_atomic_crtc_check.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Tested-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-26 15:50:38 +02:00
Daniel Stone 819364da20 drm: Add drm_atomic_set_mode_for_crtc
Add a new helper, to be used later for blob property management, that
sets the mode for a CRTC state, as well as updating the CRTC enable/active
state at the same time.

v2: Do not touch active/mode_changed in CRTC state. Document return
    value. Remove stray drm_atomic_set_mode_prop_for_crtc declaration.

v3: Remove i915 changes, and leave it directly bashing crtc_state->mode
    for the meantime.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Tested-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-26 15:50:34 +02:00
Daniel Vetter bbe16a40e2 drm: check for garbage in unused addfb2 fields
Unfortunately old userspace didn't clear this properly, but since
we've added fb modifiers that's fixed. Checking properly that unused
fields is important for abi extensions, and just right now there's a
bunch of discussions going on about how exactly the additional aux
planes for render compression should be specified.

So let's first make sure that the values in those additional fields
can be indeed used.

Cc: Thierry Reding <thierry.reding@gmail.com>
Testcase: igt/kms_addfb/unused-*
Reviewed-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
2015-05-26 14:43:29 +02:00
Daniel Stone da9b2a381a drm: Retain reference to blob properties in lookup
When we look up a blob property, make sure we retain a reference to the
blob for the lifetime.

v2: Use DRM_MODE_PROP_BLOB, not PROP_OBJECT + OBJECT_BLOB.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Tested-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-26 08:36:52 +02:00
Dave Airlie c6e7e4bb7f Merge branch 'drm/next/adv7511' of git://linuxtv.org/pinchartl/fbdev into drm-next
adv7511 fix.

* 'drm/next/adv7511' of git://linuxtv.org/pinchartl/fbdev:
  drm: adv7511: Fix crash in IRQ handler when no encoder is associated
2015-05-26 16:20:26 +10:00
Rob Clark 990ed27207 drm/vgem: drop DRIVER_PRIME (v2)
For actual sharing of buffers with other drivers (ie. actual hardware)
we'll need to pimp things out a bit better to deal w/ caching, multiple
memory domains, etc.  See thread:

  http://lists.freedesktop.org/archives/dri-devel/2015-May/083160.html

But for the llvmpipe use-case this isn't a problem.  Nor do we really
need prime/dri3 (dri2 is sufficient).  So until the other issues are
sorted lets remove DRIVER_PRIME.

v2: also drop the dead code

[airlied:
 Okay I'm convinced this API could have a lot of use cases
 that are really really bad, yes the upload use case is valid
 however that isn't the only use case enabled, and if we allow
 all the other use cases, people will start to (ab)use them,
 and then they'll be ABI and my life will get worse, so disable
 PRIME for now]

Acked-by: Thomas Hellstrom <thellstrom@vmware.com>
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-05-26 16:17:06 +10:00
Daniel Vetter 908d759b21 Revert "drm/i915: Force clean compilation with -Werror"
This reverts commit 118182e9d7.

It's causing too much trouble when compile-testing for non-i915 folks.

Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
2015-05-26 07:46:21 +02:00
Laurent Pinchart 2610abfb3a drm: rcar-du: Split planes pre-association 4/4 between CRTCs
If we have more than one CRTCs in a group pre-associate planes 0-3 with
CRTC 0 and planes 4-7 with CRTC 1 to minimize flicker occurring when the
association is changed. The pre-association could be controlled by a
module parameter if needed.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
2015-05-25 15:34:13 +03:00
Laurent Pinchart fe6fbe9a02 drm: rcar-du: Store the number of CRTCs per group in the group structure
The number of CRTCs in a group is only used to implement plane
initialization for now, but is also needed to implement pre-association
of planes to CRTCs. Store it in the group structure instead of computing
it on demand.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
2015-05-25 15:34:12 +03:00
Laurent Pinchart c8af99b604 drm: rcar-du: Consider plane to CRTC associations in the plane allocator
Hardware planes are driven by the timing generator of the CRTC they are
associated to. Changing the association requires restarting the CRTC
group that the plane belongs to, resulting in flicker on the other CRTC.

To avoid flicker as much as possible, try to allocate planes first from
the free planes already associated with the target CRTC. If allocation
fails then fall back to allocation from all free planes.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
2015-05-25 15:34:12 +03:00
Laurent Pinchart 2a57e9b5af drm: rcar-du: Keep plane to CRTC associations when disabling a plane
Changing the plane to CRTC associations requires restarting the CRTC
group, creating visible flicker. Mitigate the issue by changing plane
association only when a plane becomes enabled, not when it get disabled.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
2015-05-25 15:34:12 +03:00
Laurent Pinchart 0805861195 drm: rcar-du: Add plane allocation debugging
Plane allocation is a complex process, add debugging statements to help
finding out what could might wrong.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
2015-05-25 15:34:11 +03:00
Laurent Pinchart ec69a40645 drm: rcar-du: Rename to_rcar_du_plane_state to to_rcar_plane_state
All other cast functions are named without using "du", make the plane
state cast consistent with them.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
2015-05-25 15:34:11 +03:00
Laurent Pinchart 99caede11d drm: rcar-du: Embed rcar_du_planes structure into rcar_du_group
The rcar_du_planes structure contains a single field and is only
instantiated in the rcar_du_group structure. Embed it directly and
remove the rcar_du_planes structure.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
2015-05-25 15:34:11 +03:00
Laurent Pinchart 9f6aee952b drm: rcar-du: Move properties from rcar_du_planes to rcar_du_device
The plane property objects are instantiated once per CRTC group, while
they should be instantiated once globally for the device. Fix this and
move them to the rcar_du_device structure.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
2015-05-25 15:34:11 +03:00
Laurent Pinchart 0855c6827f drm: rcar-du: Document the rcar_du_plane_state structure
Document the structure fields using kerneldoc.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
2015-05-25 15:34:10 +03:00
Laurent Pinchart bce9936a0d drm: rcar-du: Document the rcar_du_crtc structure
Document the structure fields using kerneldoc.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
2015-05-25 15:34:10 +03:00
Laurent Pinchart a1d0503d26 drm: adv7511: Fix crash in IRQ handler when no encoder is associated
The ADV7511 is probed before its slave encoder init function associates
it with an encoder. This creates a time window during which hot plug
detection interrupts can occur with an encoder, resulting in a crash in
the IRQ handler.

Fix this by ignoring hot plug detection IRQs when no encoder is
associated yet.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Lars-Peter Clausen <lars@metafoo.de>
2015-05-25 15:34:00 +03:00