Commit Graph

19 Commits

Author SHA1 Message Date
Rob Clark de558cd2ae drm/msm: adreno a306 support
As found in apq8016 (used in DragonBoard 410c) and msm8916.

Note that numerically a306 is actually 307 (since a305c already claimed
306).  Nice and confusing.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-06-11 13:11:01 -04:00
Rob Clark 2671618551 drm/msm/adreno: dump scratch regs and other info on hang
Dump a bit more info when the GPU hangs, without having hang_debug
enabled (which dumps a *lot* of registers).  Also dump the scratch
registers, as they are useful for determining where in the cmdstream
the GPU hung (and they seem always safe to read when GPU has hung).

Note that the freedreno gallium driver emits increasing counter values
to SCRATCH6 (to identify tile #) and SCRATCH7 (to identify draw #), so
these two in particular can be used to "triangulate" where in the
cmdstream the GPU hung.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-06-11 13:11:00 -04:00
Aravind Ganesan 91b74e9761 drm/msm: Handle register offset differences between a3xx and a4xx
Register offsets have changed between a3xx and a4xx GPUs.
To be able access these registers in common code, we create
a lookup table, and set of read-write APIs to access the
register through the lookup table.

Signed-off-by: Aravind Ganesan <aravindg@codeaurora.org>
[robclark: remove REG_ADRENO_UNDEFINED, just use zero, and minor
tweaks for latest generated headers]
Signed-off-by: Rob Clark <robdclark@gmail.com>
2014-11-16 14:27:39 -05:00
Rob Clark 3bcefb0497 drm/msm/adreno: push dump/show stuff to base class
Add ptr to list of interesting registers to 'struct adreno_gpu' and use
that to move most of the debugfs show and register dump bits down into
adreno_gpu.  This will avoid duplication as support for additional
adreno generations is added.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2014-09-10 11:19:09 -04:00
Rob Clark 3526e9fb4f drm/msm/adreno: bit of init refactoring
Push a few bits down into adreno_gpu so they won't have to be duplicated
as support for additional adreno generations is added.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2014-09-10 11:19:09 -04:00
Rob Clark bfd28b1362 drm/msm/adreno: split adreno device out into it's own file
We'd rather not duplicate these parts as support for additional gpu
generations is added.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2014-09-10 11:19:08 -04:00
Rob Clark 41e69778c8 drm/msm: DT support for 8960/8064 (v3)
Now that we (almost) have enough dependencies in place (MMCC, RPM, etc),
add necessary DT support so that we can use drm/msm on upstream kernel.

v2: update for review comments
v3: rebase on component helper changes

Signed-off-by: Rob Clark <robdclark@gmail.com>
2014-08-04 11:55:28 -04:00
Rob Clark b544021f18 drm/msm: fix double struct_mutex acquire
Mutex is already grabbed in show_locked().. somehow this slipped
through.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2014-08-04 11:55:27 -04:00
Rob Clark 70c70f091b drm/msm: add perf logging debugfs
Signed-off-by: Rob Clark <robdclark@gmail.com>
2014-06-02 07:36:21 -04:00
Rob Clark 060530f1ea drm/msm: use componentised device support
Signed-off-by: Rob Clark <robdclark@gmail.com>
2014-03-31 10:27:46 -04:00
Rob Clark 37d77c3ab5 drm/msm: crank down gpu when inactive
Shut down the clks when the gpu has nothing to do.  A short inactivity
timer is used to provide a low pass filter for power transitions.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2014-03-31 10:27:46 -04:00
Rob Clark 0963756fe5 drm/msm: spin helper
Helper macro to simplify places where we need to poll with timeout
waiting for gpu.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2014-03-31 10:27:45 -04:00
Rob Clark 5b6ef08e4b drm/msm: add hang_debug module param
msm.hang_debug=y will dump out current register values if the gpu locks
up, for easier debugging.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2014-03-31 10:27:45 -04:00
Rob Clark 5545996817 drm/msm: add a330/apq8x74
Add support for adreno 330.  Not too much different, just a few
differences in initial configuration plus setting OCMEM base.
Userspace support is already in upstream mesa.

Note that the existing DT code is simply using the bindings from
downstream android kernel, to simplify porting of this driver to
existing devices.  These do not constitute any committed/stable
DT ABI.  The addition of proper DT bindings will be a subsequent
patch, at which point (as best as possible) I will try to support
either upstream bindings or what is found in downstream android
kernel, so that existing device DT files can be used.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2014-01-09 14:44:06 -05:00
Rob Clark e529c7e674 drm/msm: add support for msm8060ab/bstem
This adds the necessary configuration for the APQ8060A SoC (dual-core
krait + a320 gpu) as found on the bstem board.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2014-01-09 14:38:58 -05:00
Rob Clark 871d812aa4 drm/msm: add support for non-IOMMU systems
Add a VRAM carveout that is used for systems which do not have an IOMMU.

The VRAM carveout uses CMA.  The arch code must setup a CMA pool for the
device (preferrably in highmem.. a 256m-512m VRAM pool in lowmem is not
cool).  The user can configure the VRAM pool size using msm.vram module
param.

Technically, the abstraction of IOMMU behind msm_mmu is not strictly
needed, but it simplifies the GEM code a bit, and will be useful later
when I add support for a2xx devices with GPUMMU, so I decided to keep
this part.

It appears to be possible to configure the GPU to restrict access to
addresses within the VRAM pool, but this is not done yet.  So for now
the GPU will refuse to load if there is no sort of mmu.  Once address
based limits are supported and tested to confirm that we aren't giving
the GPU access to arbitrary memory, this restriction can be lifted

Signed-off-by: Rob Clark <robdclark@gmail.com>
2014-01-09 14:38:58 -05:00
Rob Clark bf2b33afb9 drm/msm: fix bus scaling
This got a bit broken with original patches when re-arranging things to
move dependencies on mach-msm inside #ifndef OF.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2014-01-09 14:38:58 -05:00
Rob Clark bd6f82d828 drm/msm: add basic hangcheck/recovery mechanism
A basic, no-frills recovery mechanism in case the gpu gets wedged.  We
could try to be a bit more fancy and restart the next submit after the
one that got wedged, but for now keep it simple.  This is enough to
recover things if, for example, the gpu hangs mid way through a piglit
run.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-08-24 14:57:19 -04:00
Rob Clark 7198e6b031 drm/msm: add a3xx gpu support
Add initial support for a3xx 3d core.

So far, with hardware that I've seen to date, we can have:
 + zero, one, or two z180 2d cores
 + a3xx or a2xx 3d core, which share a common CP (the firmware
   for the CP seems to implement some different PM4 packet types
   but the basics of cmdstream submission are the same)

Which means that the eventual complete "class" hierarchy, once
support for all past and present hw is in place, becomes:
 + msm_gpu
   + adreno_gpu
     + a3xx_gpu
     + a2xx_gpu
   + z180_gpu

This commit splits out the parts that will eventually be common
between a2xx/a3xx into adreno_gpu, and the parts that are even
common to z180 into msm_gpu.

Note that there is no cmdstream validation required.  All memory access
from the GPU is via IOMMU/MMU.  So as long as you don't map silly things
to the GPU, there isn't much damage that the GPU can do.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-08-24 14:57:18 -04:00