Commit Graph

210 Commits

Author SHA1 Message Date
Christian König 03f62abd11 drm/radeon: split PT setup in more functions
Move the decision what to use into the common VM code.

Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-08-05 08:53:55 -04:00
Michel Dänzer 72a9987edc drm/radeon: Always flush the HDP cache before submitting a CS to the GPU
This ensures the GPU sees all previous CPU writes to VRAM, which makes it
safe:

* For userspace to stream data from CPU to GPU via VRAM instead of GTT
* For IBs to be stored in VRAM instead of GTT
* For ring buffers to be stored in VRAM instead of GTT, if the HPD flush
  is performed via MMIO

Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-08-05 08:53:45 -04:00
Michel Dänzer 124764f174 drm/radeon: s/ioctl_wait_idle/mmio_hpd_flush/
And clean up the function comment a little.

Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-08-05 08:53:44 -04:00
Michel Dänzer 77497f2735 drm/radeon: Pass GART page flags to radeon_gart_set_page() explicitly
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-08-05 08:53:32 -04:00
Christian König 7f90fc9650 drm/radeon: remove range check from *_gart_set_page
We never check the return value anyway and if the
index isn't valid would crash way before calling
the functions.

Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-06-09 22:06:51 -04:00
Christian König 157fa14dc4 drm/radeon: split page flip and pending callback
Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-06-02 10:25:11 -04:00
Christian König e928c61a85 drm/radeon: remove (pre|post)_page_flip callbacks
They are doing the same on all generations anyway.

Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-06-02 10:25:10 -04:00
Rafał Miłecki 8f33a156c2 drm/radeon/hdmi: use separated file for DCE 3.1/3.2 code
DCE 3.1 and 3.2 should be programmed in a different way than DCE 2 and
DCE 3. The order of setting registers and sets of registers are
different.
It's still unsure how we will handle DCE 3.1 vs. DCE 3.2, since they
have few differences as well.
For now separate DCE 2 and DCE 3 path, so we can work on it without a
risk of breaking DCE 3.1+.

This has been tested for possible regressions on DCE32 HD4550 (RV710).

Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-06-02 10:25:04 -04:00
Alex Deucher 5ad6bf91ef drm/radeon: fill in set_vce_clocks for CIK asics
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-02-18 16:11:35 +01:00
Christian König d93f79376f drm/radeon: initial VCE support v4
Only VCE 2.0 support so far.

v2: squashing multiple patches into this one
v3: add IRQ support for CIK, major cleanups,
    basic code documentation
v4: remove HAINAN from chipset list

Signed-off-by: Christian König <christian.koenig@amd.com>
2014-02-18 16:11:22 +01:00
Alex Deucher 9f3f63f24c drm/radeon/dpm: use the driver state for dpm debugfs
For btc and newer, we may modify the power state depending
on the circumstances.  Use the modified state rather than
the base state.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-02-06 12:22:46 -05:00
Alex Deucher ea31bf697d drm/radeon: remove generic rptr/wptr functions (v2)
Fill in asic family specific versions rather than
using the generic version.  This lets us handle asic
specific differences more easily.  In this case, we
disable sw swapping of the rtpr writeback value on
r6xx+ since the hw does it for us.  Fixes bogus
rptr readback on BE systems.

v2: remove missed cpu_to_le32(), add comments

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-12-24 18:01:10 -05:00
Alex Deucher d8852c3446 drm/radeon/dpm: add late_enable for KB/KV
Make sure interrupts are enabled
before we enable thermal interrupts.
Also, don't powergate uvd, etc. until after
the ring tests.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-12-24 17:56:34 -05:00
Alex Deucher 902084278b drm/radeon/dpm: add late_enable for CI
Make sure interrupts are enabled
before we enable thermal interrupts.
Also, don't powergate uvd until after
the ring tests.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-12-24 17:56:19 -05:00
Alex Deucher 963c115dae drm/radeon/dpm: add late_enable for SI
Make sure interrupts are enabled
before we enable thermal interrupts.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-12-24 17:56:06 -05:00
Alex Deucher bda44c1ae7 drm/radeon/dpm: add late_enable for trinity
Need to wait to enable cg and pg until after
ring tests. Also make sure interrupts are enabled
before we enable thermal interrupts.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-12-24 17:55:53 -05:00
Alex Deucher 14ec9faba3 drm/radeon/dpm: add late_enable for sumo
Need to wait to enable cg and pg until after
ring tests. Also make sure interrupts are enabled
before we enable thermal interrupts.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-12-24 17:55:39 -05:00
Alex Deucher a3f1124515 drm/radeon/dpm: add late_enable for rv7xx-NI
Make sure interrupts are enabled
before we enable thermal interrupts.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-12-24 17:55:26 -05:00
Alex Deucher a4643ba340 drm/radeon/dpm: add late_enable for rs780/rs880/rv6xx
Make sure interrupts are enabled before we enable
thermal interrupts.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-12-24 17:55:12 -05:00
Christian König 1654b817d8 drm/radeon: allow semaphore emission to fail
To workaround bugs and/or certain limits it's sometimes
useful to fall back to waiting on fences.

Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2013-11-15 15:56:09 -05:00
Christian König 24c164393d drm/radeon: drop CP page table updates & cleanup v2
The DMA ring seems to be stable now.

v2: remove pt_ring_index as well

Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-11-01 15:25:52 -04:00
Alex Deucher c9dbd70552 drm/radeon: implement blit copy callback for CIK
Uses the CP ring rather than the DMA ring.  Useful
for debugging and benchmarking.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-11-01 12:43:16 -04:00
Alex Deucher b7a5ae9750 drm/radeon/dpm: add bapm callback for kb/kv
This adds the enable_bapm callback for kb/kv.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-09-11 11:44:40 -04:00
Alex Deucher 11877060e6 drm/radeon/dpm: add bapm callback for trinity
This adds the enable_bapm callback for trinity.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-09-11 11:44:39 -04:00
Alex Deucher 1b9ba70a49 drm/radeon/r6xx: add a stubbed out set_uvd_clocks callback
Certain r6xx boards use the same power state for both UVD
and other things.  Since we don't support UVD on r6xx boards
at the moment, there was no callback installed for setting
the UVD clocks, however, on systems that use the same power
state, this leads to a NULL pointer dereference.  Fill
in a stubbed out implementation for now to avoid the crash.

Fixes:
https://bugs.freedesktop.org/show_bug.cgi?id=66963

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: "3.11" <stable@vger.kernel.org>
2013-09-11 11:44:32 -04:00
Anthoine Bourgeois 63580c3e48 drm/radeon/dpm: implement force performance levels for rs780 (v2)
Allows you to limit the selected power levels via sysfs.

Force the feedback divider to select a power level.

v2: fix checking in rs780_force_fbdiv,
    drop a duplicate divider structure in rs780_dpm_force_performance_level,
    Force the voltage level too.

Signed-off-by: Anthoine Bourgeois <anthoine.bourgeois@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-09-11 11:44:24 -04:00
Alex Deucher b530602fd4 drm/radeon: add audio support for DCE6/8 GPUs (v12)
Similar to DCE4/5, but supports multiple audio pins
which can be assigned per afmt block.

v2: rework the driver to handle more than one audio
pin.
v3: try different dto reg
v4: properly program dto
v5 (ck): change dto programming order
v6: program speaker allocation block
v7: rebase
v8: rebase on Rafał's changes
v9: integrated Rafał's comments, update to latest
    drm_edid_to_speaker_allocation API
v10: add missing line break in error message
v11: add back audio enabled messages
v12: fix copy paste typo in r600_audio_enable

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Rafał Miłecki <zajec5@gmail.com>
2013-08-30 16:30:45 -04:00
Christian König e409b12862 drm/radeon: separate UVD code v3
Our different hardware blocks are actually completely
separated, so it doesn't make much sense any more to
structure the code by pure chipset generations.

Start restructuring the code by separating our the UVD block.

v2: updated commit message
v3: rebased and restructurized start/stop functions for kv dpm.

Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-08-30 16:30:42 -04:00
Christian König 2e1e6dad6a drm/radeon: remove special handling for the DMA ring
Now that we have callbacks for [rw]ptr handling we can
remove the special handling for the DMA rings and use
the callbacks instead.

Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-08-30 16:30:41 -04:00
Christian König 02c9f7fa4e drm/radeon: rework UVD writeback & [rw]ptr handling
The hardware just doesn't support this correctly.
Disable it before we accidentally write anywhere we shouldn't.

Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-08-30 16:30:40 -04:00
Alex Deucher 942bdf7f9e drm/radeon/dpm: implement UVD powergating for CI
Disable the UVD block when not in use to save power.
The block is not actually powergated on CI, but we
switch between UVD DPM (where the uvd clocks are
adjusted on demand) and clocks off.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-08-30 16:30:36 -04:00
Alex Deucher 77df508a98 drm/radeon/dpm: implement UVD powergating for KB/KV
Powergate the UVD block when not in use to save power.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-08-30 16:30:35 -04:00
Alex Deucher 5e884f606c drm/radeon: restructure UVD code to handle UVD PG (v2)
When we PG (powergate) UVD, we need to re-initialize it
before we can use it again.

v2: rebase on UVD stop fixes

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-08-30 16:30:34 -04:00
Alex Deucher 2b4c8022fa drm/radeon/dpm: implement force performance level for KB/KV
Allows you to force the selected performance level via sysfs.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-08-30 16:30:33 -04:00
Alex Deucher ae3e40e871 drm/radeon/dpm: add debugfs support for KB/KV
This allows you to look at the current DPM state via
debugfs.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-08-30 16:30:32 -04:00
Alex Deucher 5496131e45 drm/radeon/dpm: implement vblank_too_short callback for CI
Check if we can switch the mclk during the vblank time otherwise
we may get artifacts on the screen when the mclk changes.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-08-30 16:30:31 -04:00
Alex Deucher 89536fd600 drm/radeon/dpm: implement force performance level for CI
Allows you to force the selected performance level via sysfs.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-08-30 16:30:30 -04:00
Alex Deucher 94b4adc5ae drm/radeon/dpm: add debugfs support for CI
This allows you to look at the current DPM state via debugfs.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-08-30 16:30:30 -04:00
Alex Deucher cc8dbbb4f6 drm/radeon: add dpm support for CI dGPUs (v2)
This adds dpm support for btc asics. This includes:
- dynamic engine clock scaling
- dynamic memory clock scaling
- dynamic voltage scaling
- dynamic pcie gen switching

Set radeon.dpm=1 to enable.

v2: remove unused radeon_atombios.c changes,
    make missing smc ucode non-fatal

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-08-30 16:30:29 -04:00
Alex Deucher 41a524abff drm/radeon/kms: add dpm support for KB/KV
This adds dpm support for KB/KV asics.  This includes:
- dynamic engine clock scaling
- dynamic voltage scaling
- power containment
- shader power scaling

Set radeon.dpm=1 to enable.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-08-30 16:30:28 -04:00
Alex Deucher 286d9cc67a drm/radeon: add get_temperature() callbacks for CIK (v2)
This added support for the on-chip thermal sensors on
CIK asics.

v2: fix register offset.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-08-30 16:30:15 -04:00
Alex Deucher 4f86296758 drm/radeon/kms: remove r6xx+ blit copy routines
No longer used now that we use the async dma engines or
CP DMA for bo copies.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-08-30 16:29:57 -04:00
Christian König 2858c00d28 drm/radeon: fix halting UVD
Removing the clock/power or resetting the VCPU can cause
hangs if that happens in the middle of a register write.

Stall the memory and register bus before putting the VCPU
into reset. Keep it in reset when unloading the module or
suspending.

Signed-off-by: Christian König <christian.koenig@amd.com>
Cc: stable@vger.kernel.org
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-08-07 17:37:11 -04:00
Alex Deucher f4f85a8c94 drm/radeon/dpm: implement force performance levels for rv6xx
Allows you to limit the selected power levels via sysfs.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-07-25 20:07:25 -04:00
Alex Deucher 444bddc4b9 drm/radeon/dpm: add debugfs support for RS780/RS880 (v3)
This allows you to look at the current DPM state via
debugfs.

Due to the way the hardware works on these asics, there's
no way to look up exactly what power state we are in, so
we make the best guess we can based on the current sclk.

v2: Anthoine's version
v3: fix ref div

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-07-17 16:47:52 -04:00
Alex Deucher 072b5acc7e drm/radeon: implement bo copy callback using CP DMA (v2)
Lighter weight than using the 3D engine.

v2: fix ring count

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-07-14 10:11:26 -04:00
Alex Deucher 76ad73e549 drm/radeon/dpm: implement vblank_too_short callback for cayman
Check if we can switch the mclk during the vblank time otherwise
we may get artifacts on the screen when the mclk changes.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-07-08 17:41:01 -04:00
Alex Deucher a84301c65d drm/radeon/dpm: implement vblank_too_short callback for btc
Check if we can switch the mclk during the vblank time otherwise
we may get artifacts on the screen when the mclk changes.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-07-08 17:40:52 -04:00
Alex Deucher d0b54bdc93 drm/radeon/dpm: implement vblank_too_short callback for evergreen
Check if we can switch the mclk during the vblank time otherwise
we may get artifacts on the screen when the mclk changes.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-07-08 17:40:42 -04:00
Alex Deucher b06195d994 drm/radeon/dpm: implement vblank_too_short callback for 7xx
Check if we can switch the mclk during the vblank time otherwise
we may get artifacts on the screen when the mclk changes.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-07-08 17:40:31 -04:00