Commit Graph

105 Commits

Author SHA1 Message Date
Sujith Manoharan fb5a2dcbbc ath9k: Add support for AR9485 1.2
Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
2013-08-22 14:30:29 -04:00
Sujith Manoharan 7c676d953f ath9k: Add version macros for AR9462 2.1
Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
2013-06-24 14:44:27 -04:00
Felix Fietkau 86c157b3f8 ath9k_hw: improve performance for AR934x v1.3+
AR934x v1.3 no longer needs the DCU backoff reduction workaround for
preventing rx overruns, but in turn needs the number of usable Tx
buffers to be reduced slightly.

Signed-off-by: Felix Fietkau <nbd@openwrt.org>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
2013-05-24 12:50:22 -04:00
Felix Fietkau a37a99102e ath9k_hw: fix host interface reset on AR934x
If a local bus timeout has been detected, the host interface needs to be
reset to clear the errors. AR934x uses a different synchronous interrupt
bit to indicate this, so the check needs to be fixed.

Signed-off-by: Felix Fietkau <nbd@openwrt.org>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
2013-05-24 12:50:22 -04:00
Felix Fietkau ecbbed32e7 ath: update hardware mac address with bssid mask
Preparation for updating common->macaddr along with virtual interface
MAC address changes.

Signed-off-by: Felix Fietkau <nbd@openwrt.org>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
2013-04-22 15:20:15 -04:00
Felix Fietkau eab6d7921d ath9k_hw: add tx gain tables for newer devices
Improves stability on affected devices and also fixes the Tx IQ calibration
related regression on some AR9340 devices such as the TP-Link TL-WDR4300.

Signed-off-by: Felix Fietkau <nbd@openwrt.org>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
2013-01-11 14:50:00 -05:00
Sujith Manoharan e1b97c9bc5 ath9k_hw: Remove AR9485 1.0 macro
Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
2013-01-07 15:16:54 -05:00
Rajkumar Manoharan e75d4ed6a9 ath9k_hw: Fix concurrent tx on lower tx power
Whenever WLAN receives scheduling msg from BT, it reduces tx power
based on RSSI level. And then BT starts simultaneous transmission
along with WLAN. Sometimes HW MAC compares tx power that is used
prior to power reduction which is causing BT transmission to defer.

Signed-off-by: Rajkumar Manoharan <rmanohar@qca.qualcomm.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
2012-10-29 15:30:32 -04:00
Rajkumar Manoharan 506ed95c27 ath9k_hw: Configure new switch table for AR9565 BTCOEX
Signed-off-by: Rajkumar Manoharan <rmanohar@qca.qualcomm.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
2012-10-29 15:19:30 -04:00
Rajkumar Manoharan e9f9fd8cdc ath9k_hw: Disable MCI stat counter by default for AR9565
Signed-off-by: Rajkumar Manoharan <rmanohar@qca.qualcomm.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
2012-10-29 15:19:29 -04:00
Rajkumar Manoharan 4c6231a408 ath9k_hw: Enable OSLA hw fix for AR9565
Signed-off-by: Rajkumar Manoharan <rmanohar@qca.qualcomm.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
2012-10-29 15:19:27 -04:00
Sujith Manoharan 77fac465b4 ath9k_hw: Add version/revision macros for AR9565
And recognize the device in the init path.

Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
2012-09-11 15:31:34 -04:00
Mohammed Shafi Shajakhan 900902986c ath9k_hw: Add register definitions for WoW support
*MAC WoW registers

back-off shift, MAC interrupt enable, magic packet enable,
pattern match enable, aifs, slot wait period, keep alive
frame failure count, beacon fail enable, beacon timeout,
keep alive timeout, auto keep alive disable,
keep alive fail disable and their corresponding
status registers. keep alive frame delay,
pattern end/byte offsets, transmit buffers for
keep alive frames and storing the user patterns

*Power Management Control registers

pme_d3cold_vaux, host_pme_enable, aux_pwr_detect,
power_state_mask, wow_pme_clear

Cc: Senthil Balasubramanian <senthilb@qca.qualcomm.com>
Cc: Rajkumar Manoharan <rmanohar@qca.qualcomm.com>
Cc: vadivel@qca.qualcomm.com
Signed-off-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
Signed-off-by: Mohammed Shafi Shajakhan <mohammed@qca.qualcomm.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
2012-07-12 15:27:15 -04:00
Rajkumar Manoharan d081257c78 ath9k_hw: remove debugging masks from AR_MCI_INTERRUPT_RX_MSG_DEFAULT
Remove the CONT_* and LNA_* messages from
AR_MCI_INTERRUPT_RX_MSG_DEFAULT. Those MCI rx messages only
meant for debugging purpose. Including them in default rx_msg
series could raise huge amount of MCI interrupts when BT traffic
is going on. And also it increases power consumption when WLAN
is scanning.

Signed-off-by: Rajkumar Manoharan <rmanohar@qca.qualcomm.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
2012-07-10 12:16:58 -04:00
Gabor Juhos a4e26081cb ath9k: define MAC version for AR9550
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
2012-07-09 16:36:23 -04:00
Thomas Huehn 1960195725 ath9k: fixing register bit shift values of control packets to support TPC
Some register values of bit shifts are corrected in order to support the upcoming
transmission power control (tpc) for control packets as well.

Signed-off-by: Thomas Huehn <thomas@net.t-labs.tu-berlin.de>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
2012-07-09 16:36:02 -04:00
Rajkumar Manoharan a68807e917 ath9k_hw: fix BT mute at hw init
WLAN driver initialization is muting BT which is terminating
the ongoing BT traffic. The reason to mute BT is to avoid any
incoming MCI messages from BT when MCI reset is in progress that
could corrupt WLAN MCI RX state machine. But we should not
dedicate radio completely to WLAN in driver init itself. So this
patch removes the wlan weightage changes from mute BT to retain
BT connection.

Signed-off-by: Rajkumar Manoharan <rmanohar@qca.qualcomm.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
2012-06-20 15:14:49 -04:00
Rajkumar Manoharan 26e942b790 ath9k_hw: remove MCI_STATE_CONT_* state
Signed-off-by: Rajkumar Manoharan <rmanohar@qca.qualcomm.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
2012-06-13 14:36:02 -04:00
Rajkumar Manoharan c8b6fbe1f1 ath9k_hw: configure ar9462 switching regulator
Enable WLAN and BT mode for switching regulator discontinuous
orverride for AR9462 chips.

Signed-off-by: Rajkumar Manoharan <rmanohar@qca.qualcomm.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
2012-06-06 15:20:28 -04:00
Mohammed Shafi Shajakhan 3789d59c24 ath9k_hw: Fix enabling of MCI and RTT
tested in AR9462 Rev:2, both hardware capability flag are set

Signed-off-by: Mohammed Shafi Shajakhan <mohammed@qca.qualcomm.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
2012-03-12 14:19:37 -04:00
Sujith Manoharan c91ec465ca ath9k: Remove AR9462 v1.0 support
v1.0 chips are not available in the market.

Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
2012-02-27 14:06:33 -05:00
Mohammed Shafi Shajakhan 1010911ec3 ath9k_hw: MCI related changes in chip management
send halt BT GPM if the chip is in network sleep and BT state
is awake

Cc: Wilson Tsao <wtsao@qca.qualcomm.com>
Cc: Senthil Balasubramanian <senthilb@qca.qualcomm.com>
Signed-off-by: Rajkumar Manoharan <rmanohar@qca.qualcomm.com>
Signed-off-by: Mohammed Shafi Shajakhan <mohammed@qca.qualcomm.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
2011-11-30 15:08:51 -05:00
Mohammed Shafi Shajakhan 2ee4bd1e25 ath9k_hw: add definitions to support MCI h/w code
these definitions will be used by MCI state machine and the corresponding
hardware code

Cc: Wilson Tsao <wtsao@qca.qualcomm.com>
Cc: Senthil Balasubramanian <senthilb@qca.qualcomm.com>
Signed-off-by: Rajkumar Manoharan <rmanohar@qca.qualcomm.com>
Signed-off-by: Mohammed Shafi Shajakhan <mohammed@qca.qualcomm.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
2011-11-30 15:08:39 -05:00
Rajkumar Manoharan 8227bf4554 ath9k_hw: set btcoex weights for AR9462
Signed-off-by: Rajkumar Manoharan <rmanohar@qca.qualcomm.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
2011-11-17 15:43:55 -05:00
Rajkumar Manoharan 54f10b059e ath9k_hw: Cleanup btcoex wlan weights
Remove all wlan weight macros and group it together for better
understanding & readability. It makes the code reusable for
AR9462 wlan weights.

Signed-off-by: Rajkumar Manoharan <rmanohar@qca.qualcomm.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
2011-11-17 15:43:55 -05:00
Rajkumar Manoharan 423e38e807 ath9k: Rename AR9480 into AR9462
Renamed to be in sync with Marketing term and to avoid
confusion with other chip names.

Signed-off-by: Rajkumar Manoharan <rmanohar@qca.qualcomm.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
2011-10-14 14:48:23 -04:00
Rajkumar Manoharan 324c74ad64 ath9k_hw: Add radio retention support for AR9480
Supported calibrations of radio retention table (RTT) are
	- DC offset
	- Filter
	- Peak detect

Signed-off-by: Rajkumar Manoharan <rmanohar@qca.qualcomm.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
2011-10-14 14:48:22 -04:00
Felix Fietkau 1b8714f7dc ath9k_hw: clean up hardware revision checks
- AR_SREV_5416_20_OR_LATER is always true, remove it
- AR_SREV_9280_20_OR_LATER is always true within eeprom_4k.c and eeprom_9287.c
- (AR_SREV_9271 || AR_SREV_9285) is always true in eeprom_4k.c

Signed-off-by: Felix Fietkau <nbd@openwrt.org>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
2011-09-19 15:58:24 -04:00
Senthil Balasubramanian ce407afc10 ath9k_hw: Add initvals and register definitions for AR946/8x chipsets.
Add initvals and register modifications required to support AR946/8x chipsets.

Signed-off-by: Senthil Balasubramanian <senthilb@qca.qualcomm.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
2011-09-16 16:45:32 -04:00
Felix Fietkau 3459731a39 ath9k: fix checks for first subframe delimiter padding
The commit "ath9k_hw: Fix exceed transmission burst-time of 5GHz" added
a padding of 60 delimiters on the first subframe to work around an issue
on AR9380, but it lacked the checks to prevent it from being applied to
pre-AR9380, enterprise AR9380 or AR9580+

Signed-off-by: Felix Fietkau <nbd@openwrt.org>
Cc: Rajkumar Manoharan <rmanohar@qca.qualcomm.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
2011-09-13 15:42:31 -04:00
Rajkumar Manoharan a7be039d34 ath9k: Fix eifs/usec timeout for AR9287 v1.3+
For AR9287 v1.3+ chips, MAC runs at 117MHz. But the initvals
IFS parameters are loaded based on 44/88MHz clockrate. So
eifs/usec from ini should not be used for AR9287 v1.3+.
The mentioned values are tested on 2 chain HT40 mode.

Signed-off-by: Rajkumar Manoharan <rmanohar@qca.qualcomm.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
2011-08-29 15:33:02 -04:00
Luis R. Rodriguez 5a63ef0faf ath9k_hw: add AR9580 support
Here are the AR9580 1.0 initvals checksums using the
Atheros initvals-tools [1]. This is useful for when
we udate the initvals again with other values. It ensures
that we match the same initvals used internally. The
tool is documented on the wiki [2].

$ ./initvals -f ar9580-1p0
0x00000000e912711f        ar9580_1p0_modes_fast_clock
0x000000004a488fc7        ar9580_1p0_radio_postamble
0x00000000f3888b02        ar9580_1p0_baseband_core
0x0000000003f783bb        ar9580_1p0_mac_postamble
0x0000000094be244a        ar9580_1p0_low_ob_db_tx_gain_table
0x0000000094be244a        ar9580_1p0_high_power_tx_gain_table
0x0000000090be244a        ar9580_1p0_lowest_ob_db_tx_gain_table
0x00000000ed9eaac6        ar9580_1p0_baseband_core_txfir_coeff_japan_2484
0x00000000c4d66d1b        ar9580_1p0_mac_core
0x00000000e8e9043a        ar9580_1p0_mixed_ob_db_tx_gain_table
0x000000003521a300        ar9580_1p0_wo_xlna_rx_gain_table
0x00000000301fc841        ar9580_1p0_soc_postamble
0x00000000a9a06b3a        ar9580_1p0_high_ob_db_tx_gain_table
0x00000000a15ccf1b        ar9580_1p0_soc_preamble
0x0000000029495000        ar9580_1p0_rx_gain_table
0x0000000037ac0ee8        ar9580_1p0_radio_core
0x00000000603a1b80        ar9580_1p0_baseband_postamble
0x000000003d8b4396        ar9580_1p0_pcie_phy_clkreq_enable_L1
0x00000000398b4396        ar9580_1p0_pcie_phy_clkreq_disable_L1
0x00000000397b4396        ar9580_1p0_pcie_phy_pll_on_clkreq

[1] git://git.kernel.org/pub/scm/linux/kernel/git/mcgrof/initvals-tool.git
[2] http://wireless.kernel.org/en/users/Drivers/ath9k_hw/initvals-tool

Cc: David Quan <dquan@qca.qualcomm.com>
Cc: Kathy Giori <kgiori@qca.qualcomm.com>
Cc: Senthil Balasubramanian <senthilb@qca.qualcomm.com>
Tested-by: Florian Fainelli <florian@openwrt.org>
Signed-off-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
2011-08-26 10:47:58 -04:00
Pavel Roskin 6c2c1ed864 ath9k: remove defines in reg.h that exist in ../reg.h
Signed-off-by: Pavel Roskin <proski@gnu.org>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
2011-07-18 14:29:42 -04:00
Felix Fietkau fe2b6afbce ath9k_hw: remove ar9287 v1.3+ specific hardcoded register hacks
Now that the clock rate is initialized properly and SIFS, EIFS, USEC,
slot time and ACK timeout are properly calculated by the generic code,
the 'async FIFO' register hacks are no longer necessary.

Signed-off-by: Felix Fietkau <nbd@openwrt.org>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
2011-07-11 15:02:14 -04:00
Gabor Juhos 2c8e59379a ath9k: define mac version for AR9330
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
2011-06-22 16:09:48 -04:00
Sujith Manoharan 5b68138e56 ath9k: Drag the driver to the year 2011
The Times They Are a-Changin'.

Signed-off-by: Sujith Manoharan <Sujith.Manoharan@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
2011-05-19 13:54:05 -04:00
Vivek Natarajan a6ef530f2b ath9k_hw: Add support for btcoexistence in AR9300.
Signed-off-by: Vivek Natarajan <vnatarajan@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
2011-04-28 14:50:01 -04:00
Rajkumar Manoharan 3782c69d6e ath9k_hw: Fix Tx IQ Calibration hang issue in AR9003 chips
On AR9003 chips, doing three IQ calibrations will possibly cause chip
in stuck state. In noisy environment, chip could receive
a packet during the middle of three calibrations and it causes
the conflict of HW access and the eventual failure. It also
causes IQ calibration outliers which results in poor Tx EVM.

The IQ Cal procedure is after resetting the chip, run IQ cal 3 times
per each cal cycle and find the two closest readings and average of two.
The advantage of running Tx IQ cal more than once is that we can compare
calibration results for the same gain setting over multiple iterations.
Most of the cases the IQ failures were observed after first pass.

For the AR9485 and later chips, Tx IQ Calibration is performed along
with AGC cal. But for pre-AR9485 chips, Tx IQ cal HW has to be separated
from the rest of calibration HW to avoid chip hang. After all
calibrations are done in HW, we can start SW post-processing.
By doing this way, we minimize the SW difference among all chips.

The order of calibration (run IQ cal before other calibration) is also
needed to avoid chip hang for chips before AR9485. This issue was
originally observed with AR9382.

During the issue kernel log was filled with following message
ath: timeout (100000 us) on reg 0xa640: 0x00000001 & 0x00000001 != 0x00000000
ath: timeout (100000 us) on reg 0xa2c4: 0x00158dd9 & 0x00000001 != 0x00000000
ath: Unable to reset channel (2412 MHz), reset status -5
ath: Unable to set channel

Signed-off-by: Rajkumar Manoharan <rmanoharan@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
2011-04-26 15:50:27 -04:00
Vasanthakumar Thiagarajan 0b488ac6ec ath9k_hw: Configure pll control register accordingly for AR9340
Signed-off-by: Vasanthakumar Thiagarajan <vasanth@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
2011-04-25 14:50:08 -04:00
Vasanthakumar Thiagarajan 35d5f56125 ath9k_hw: Take care of few host interface register changes for AR9340
Signed-off-by: Vasanthakumar Thiagarajan <vasanth@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
2011-04-25 14:50:08 -04:00
Vasanthakumar Thiagarajan b99a7be47d ath9k_hw: Define devid and mac version for AR9340
Signed-off-by: Vasanthakumar Thiagarajan <vasanth@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
2011-04-25 14:50:07 -04:00
Vasanthakumar Thiagarajan 3dfd7f6066 ath9k: Implement integer mode for AR9485
This fixes random disconnect.

Signed-off-by: Vasanthakumar Thiagarajan <vasanth@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
2011-04-12 16:59:37 -04:00
Felix Fietkau 1296433bf3 ath9k_hw: remove unnecessary parts of the AR9380 SREV check
Older versions have not been sold and the driver does not explicitly
check for them anyway, so we can simply ignore the macRev here.
Reduces ath9k_hw size on mips by more than 2 KB.

Signed-off-by: Felix Fietkau <nbd@openwrt.org>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
2011-04-12 16:58:50 -04:00
Felix Fietkau f171760c55 ath9k_hw: enable a BlockAck related fixup specific to AR9100
Fixes interop issues with aggregation in combination with multi-BSSID

Signed-off-by: Felix Fietkau <nbd@openwrt.org>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
2011-03-30 14:15:16 -04:00
Sujith Manoharan 36bcce4306 ath9k_htc: Handle storage devices
Some AR7010 based devices are recognized as storage media.
Sending a CD-EJECT command to the device will 'convert' it into
a WLAN device. Do this within the driver itself, removing the
dependancy on an external program (usb_modeswitch).

Signed-off-by: Sujith Manoharan <Sujith.Manoharan@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
2011-02-23 16:25:25 -05:00
Vivek Natarajan 1a63e2ce4e ath9k_hw: Updates for AR9485 1.1 chipsets.
Signed-off-by: Vivek Natarajan <vnatarajan@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
2011-02-18 16:54:57 -05:00
Vivek Natarajan 22983c301f ath9k_hw: DDR_PLL and BB_PLL need correct setting.
Updates from the analog team for AR9485 chipsets to set
DDR_PLL2 and DDR_PLL3. Also program the BB_PLL ki
and kd value.

Signed-off-by: Vivek Natarajan <vnatarajan@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
2011-01-28 15:44:28 -05:00
Vivek Natarajan b141581923 ath9k_hw: Add a function to read sqsum_dvc.
Add a function to observe the delta VC of BB_PLL.
For a good chip, the sqsum_dvc is below 2000.

Signed-off-by: Vivek Natarajan <vnatarajan@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
2011-01-28 15:44:28 -05:00
Sujith Manoharan 0b5ead91cd ath9k_htc: Cleanup device identification
ath.ko is a common module shared between ath5k, ar9170usb, ath9k and ath9k_htc.
Adding driver specific data to the shared structure would impact all the
drivers. Handling USB device recognition for devices specific to ath9k_htc
can be handled within the driver itself.

Also, AR7010 refers to the processor used in both AR9280/AR9287 based
devices. Rename the device enumerations accordingly.

While at it, check properly for the bus type when choosing the EEPROM
base address for UB95.

Signed-off-by: Sujith Manoharan <Sujith.Manoharan@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
2010-12-07 17:08:06 -05:00
Vasanthakumar Thiagarajan d09b17f73f ath9k: Configure pll control for AR9485
Signed-off-by: Vasanthakumar Thiagarajan <vasanth@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
2010-12-07 16:34:54 -05:00