Commit Graph

1088692 Commits

Author SHA1 Message Date
Marc Kleine-Budde 07e7593877
spi: spi-imx: add PIO polling support
The driver supports several modes, one of them is PIO/IRQ
"spi_imx_pio_transfer()". The data is exchanged with the IP core using
PIO, an IRQ is setup to signal empty/full FIFOs and the end of the
transfer. The IRQ and scheduling overhead for short transfers is
significant. Using polling instead of IRQs can be beneficial to reduce
the overall CPU load, especially on small transfer workloads.

On an imx6 single core, a given RX workload of the mcp251xfd driver
results in 40% CPU load. Using polling mode reduces the CPU load to
30%.

This patch adds PIO polling support to the driver. For transfers with
a duration of less than 30 µs the polling mode instead of IRQ based
PIO mode is used. 30 µs seems to be a good compromise, which is used
the by the SPI drivers for the raspberry Pi (spi-bcm2835,
spi-bcm2835), too.

Co-developed-by: David Jander <david@protonic.nl>
Signed-off-by: David Jander <david@protonic.nl>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Link: https://lore.kernel.org/r/20220502175457.1977983-9-mkl@pengutronix.de
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-05-09 18:18:15 +01:00
Marc Kleine-Budde 307c897db7
spi: spi-imx: replace struct spi_imx_data::bitbang by pointer to struct spi_controller
There's no need to embed the struct spi_bitbang into our private
data (struct spi_imx_data), the spi core is flexible enough, so that
we only need a pointer to the allocated struct spi_controller.

This is also a preparation patch to add PIO based polling support to
the driver.

Co-developed-by: David Jander <david@protonic.nl>
Signed-off-by: David Jander <david@protonic.nl>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Link: https://lore.kernel.org/r/20220502175457.1977983-8-mkl@pengutronix.de
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-05-09 18:18:14 +01:00
Marc Kleine-Budde 63cd96b70f
spi: spi-imx: complete conversion from master -> controller
With patch:
| 8caab75fd2 ("spi: Generalize SPI "master" to "controller"")
the SPI "master" was generalized to "controller". This patch completed
the conversion of the spi-imx driver by replacing the remaining
occurrences of master to controller.

Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Link: https://lore.kernel.org/r/20220502175457.1977983-7-mkl@pengutronix.de
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-05-09 18:18:13 +01:00
Marc Kleine-Budde baaadffe88
spi: spi-imx: spi_imx_buf_rx_swap_u32(): replace open coded swahw32s()
This patch replaces an open coded swahw32s().

Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Link: https://lore.kernel.org/r/20220502175457.1977983-6-mkl@pengutronix.de
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-05-09 18:18:12 +01:00
Marc Kleine-Budde dae336d0dc
spi: spi-imx: spi_imx_buf_rx_swap_u32(): fix sparse warning: use swab32s() instead of cpu_to_be32()
This patch fixes the following sparse warning by using a swab32s()
instead of a cpu_to_be32(). The driver is used on little endian
systems only and we really want to swap the bytes.

| drivers/spi/spi-imx.c:305:29: warning: incorrect type in assignment (different base types)
| drivers/spi/spi-imx.c:305:29:    expected unsigned int val
| drivers/spi/spi-imx.c:305:29:    got restricted __be32 [usertype]
| drivers/spi/spi-imx.c:361:21: warning: incorrect type in assignment (different base types)
| drivers/spi/spi-imx.c:361:21:    expected unsigned int [assigned] [usertype] val
| drivers/spi/spi-imx.c:361:21:    got restricted __be32 [usertype]

Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Link: https://lore.kernel.org/r/20220502175457.1977983-5-mkl@pengutronix.de
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-05-09 18:18:11 +01:00
Marc Kleine-Budde 1a23461a8a
spi: spi-imx: mx51_ecspi_intctrl(): prefer 'unsigned int' to bare use of 'unsigned'
This patch fixes the following checkpatch warning, by making val an
"unsigned int".

| WARNING: Prefer 'unsigned int' to bare use of 'unsigned'
| +       unsigned val = 0;

Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Link: https://lore.kernel.org/r/20220502175457.1977983-4-mkl@pengutronix.de
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-05-09 18:18:10 +01:00
Marc Kleine-Budde a8c785c1e7
spi: spi-imx: avoid unnecessary line continuations
This patch fixes the following checkpatch warning by removing the
trailing backslash:

| WARNING: Avoid unnecessary line continuations
| +       spi_imx->bitbang.master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH \

Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Link: https://lore.kernel.org/r/20220502175457.1977983-3-mkl@pengutronix.de
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-05-09 18:18:09 +01:00
Marc Kleine-Budde f7b8787164
spi: spi-imx: fix sparse warning: add identifier name to function definition
This patch fixes the following and similar sparse warnings by adding
the missing identifier names to the function definitions:

| WARNING: function definition argument 'struct spi_imx_data *' should also have an identifier name
| #68: FILE: drivers/spi/spi-imx.c:68:
| +       int (*prepare_message)(struct spi_imx_data *, struct spi_message *);

Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Link: https://lore.kernel.org/r/20220502175457.1977983-2-mkl@pengutronix.de
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-05-09 18:18:08 +01:00
Yang Yingliang a2b331ac11
spi: spi-fsl-qspi: check return value after calling platform_get_resource_byname()
It will cause null-ptr-deref if platform_get_resource_byname() returns NULL,
we need check the return value.

Fixes: 858e26a515 ("spi: spi-fsl-qspi: Reduce devm_ioremap size to 4 times AHB buffer size")
Signed-off-by: Yang Yingliang <yangyingliang@huawei.com>
Link: https://lore.kernel.org/r/20220505093954.1285615-1-yangyingliang@huawei.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-05-09 12:48:47 +01:00
Andrea Zanotti 2cd757e629
spi: omap2-mcspi: add support for interword delay
The module omap2-mcspi does not support the interword delay
parameter present in the spi transfer. On one side, if the module
is instructed to use the dma, this parameter is correctly ignored.
However, without the usage of the dma, that parameter should be
used.

The patch introduce the handling of such delay in the omap2-mcspi
module, using standard spi_delay struct. The patch has been tested
using as benchmark a DM3730.

The delay function used (spi_delay_exec) is already present in the
kernel and it checks on its own the validity of the input, as such,
no additional checks are present.

The range of usage of the udelay function is incremented to 200 us,
as the change from udelay to usleep_range introduces not
neglectible delays.

Signed-off-by: Andrea Zanotti <andreazanottifo@gmail.com>
Link: https://lore.kernel.org/r/20220502111300.24754-1-andreazanottifo@gmail.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-05-04 16:02:36 +01:00
Biju Das dfc6597eb1
spi: dt-bindings: renesas,rspi: Document RZ/G2UL SoC
Add RSPI binding documentation for Renesas RZ/G2UL SoC.

RSPI block is identical to one found on RZ/A, so no driver changes are
required. The fallback compatible string "renesas,rspi-rz" will be used
on RZ/G2UL.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220501082150.24662-1-biju.das.jz@bp.renesas.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-05-03 14:00:47 +01:00
Dan Carpenter 73c1a5153e
spi: mtk-snfi: preserve dma_mapping_error() error codes
Return -ENOMEM of there is a dma mapping error.  Do not return success.

Fixes: 764f1b7481 ("spi: add driver for MTK SPI NAND Flash Interface")
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Reviewed-by: Chuanhong Guo <gch981213@gmail.com>
Link: https://lore.kernel.org/r/YmwjUcTKyQNrrn2g@kili
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-05-03 14:00:38 +01:00
Chuanhong Guo 69bb9b29bf
spi: dt-bindings: add binding doc for spi-mtk-snfi
Add device-tree binding documentation for Mediatek SPI-NAND Flash
Interface.

Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220424032527.673605-5-gch981213@gmail.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-04-27 17:22:54 +01:00
Chuanhong Guo 764f1b7481
spi: add driver for MTK SPI NAND Flash Interface
This driver implements support for the SPI-NAND mode of MTK NAND Flash
Interface as a SPI-MEM controller with pipelined ECC capability.

Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
Tested-by: Daniel Golle <daniel@makrotopia.org>
Link: https://lore.kernel.org/r/20220424032527.673605-3-gch981213@gmail.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-04-27 17:22:53 +01:00
Mark Brown 26ac2436f3 Mediatek ECC changes:
* Also parse the default nand-ecc-engine property if available
 * Make mtk_ecc.c a separated module
 -----BEGIN PGP SIGNATURE-----
 
 iQEzBAABCgAdFiEE9HuaYnbmDhq/XIDIJWrqGEe9VoQFAmJpa+MACgkQJWrqGEe9
 VoTVPwf+PjOPS9MH+3wQkEsqwHtJyC9dvfTRWNSkzJEos0710jl6peeWjo1ift1A
 4JLMI3TGHWbNqBykpSLxZPVc6X/toGoMz6/2OussnYQBYgXjLNOgWQqS4kZZmK7D
 BARpke8TTqglJyat7NpGNo1EGWA4EtYqwvoPT+H0LMLQbe/NQD0k4RaRNpw+BwPq
 gaBHZf/CmN4oG0QrPPvS7jrm0dgWrQgTqRf9zzOnml3m22q3PGMnmY1A1CunBsFn
 HK+GxYUOeemPc40mET+U1x6O0+VNlxW2KQ+fZoNHnljd55zq1Cp4mXfr7KuFgfDK
 4xMAAoI5cMp8kpLLVUBlD4uzOj3fow==
 =FBXD
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQEzBAABCgAdFiEEreZoqmdXGLWf4p/qJNaLcl1Uh9AFAmJpbcEACgkQJNaLcl1U
 h9C9WAf7Bl0Io91FUenKnsF/7JZhGnRnZsD/k0c5aYHkUsfA4j+UkdyELi9vSGvV
 Sv7ewkQRj0nuVKsIGZhZ+XH8GKn2DE2stFtqGarou7AhedCjKm7ivI73mHXKLRLS
 K8C62EEG3lioULsgS4XeCtkczlEgGP/kL4Q2tBluZkSVRj4LcwRIXLXzrGiou6NJ
 77Ue4RE7G1Sqhoq/6NVe7SI68sEv4F4jSoh8cmjth/WX7xHeBP8SMpR1vopGEDaG
 y/zaXMPBHHRsXCADS/TipOvX1VWlOsoo2TGmAuF6hbcfcWvrnHkoVZM15Rz4tv9n
 yvhh4CAQPsf2yq0ckJFeX8A0egqT6A==
 =TTJe
 -----END PGP SIGNATURE-----

spi: Pull Mediatek ECC changes

Mediatek ECC changes:
* Also parse the default nand-ecc-engine property if available
* Make mtk_ecc.c a separated module

needed for SPI controller driver
2022-04-27 17:22:02 +01:00
Chuanhong Guo 4c5bf4b51c mtd: nand: mtk-ecc: also parse nand-ecc-engine if available
The recently added ECC engine support introduced a generic property
named nand-ecc-engine for ecc engine phandle. This patch adds support
for this new property.

Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20220424032527.673605-4-gch981213@gmail.com
2022-04-27 18:12:43 +02:00
Chuanhong Guo 4fd62f15af mtd: nand: make mtk_ecc.c a separated module
this code will be used in mediatek snfi spi-mem controller with
pipelined ECC engine.

Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20220424032527.673605-2-gch981213@gmail.com
2022-04-27 18:12:35 +02:00
Mark Brown 9ee448f943
Improve SPI support for Ingenic SoCs.
Merge series from 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>:

1.Add support for using GPIOs as chip select lines on Ingenic SoCs.
2.Add support for probing the spi-ingenic driver on the JZ4775 SoC,
  the X1000 SoC, and the X2000 SoC.
3.Modify annotation texts to be more in line with the current state.
2022-04-25 18:22:58 +01:00
Alexander Shiyan b0ceb62125
spi: clps711x: Use syscon_regmap_lookup_by_phandle
Since version 5.13, the standard syscon bindings have been added
to all clps711x DT nodes, so we can now use the more general
syscon_regmap_lookup_by_phandle function to get the syscon pointer.

Signed-off-by: Alexander Shiyan <eagle.alexander923@gmail.com>
Link: https://lore.kernel.org/r/20220420061038.22570-1-eagle.alexander923@gmail.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-04-25 14:01:09 +01:00
Minghao Chi 1af2fb6283
spi: stm32: using pm_runtime_resume_and_get instead of pm_runtime_get_sync
Using pm_runtime_resume_and_get() to replace pm_runtime_get_sync and
pm_runtime_put_noidle. This change is just to simplify the code, no
actual functional changes.

Reported-by: Zeal Robot <zealci@zte.com.cn>
Signed-off-by: Minghao Chi <chi.minghao@zte.com.cn>
Link: https://lore.kernel.org/r/20220420090452.2588930-1-chi.minghao@zte.com.cn
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-04-25 14:01:08 +01:00
Minghao Chi b7be05d5e4
spi: spi-cadence-quadspi: using pm_runtime_resume_and_get instead of pm_runtime_get_sync
Using pm_runtime_resume_and_get() to replace pm_runtime_get_sync and
pm_runtime_put_noidle. This change is just to simplify the code, no
actual functional changes.

Reported-by: Zeal Robot <zealci@zte.com.cn>
Signed-off-by: Minghao Chi <chi.minghao@zte.com.cn>
Link: https://lore.kernel.org/r/20220414085637.2541805-1-chi.minghao@zte.com.cn
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-04-25 14:01:07 +01:00
Minghao Chi 1e6f8bd15c
spi: spi-tegra20-slink: using pm_runtime_resume_and_get instead of pm_runtime_get_sync
Using pm_runtime_resume_and_get is more appropriate
for simplifing code

Reported-by: Zeal Robot <zealci@zte.com.cn>
Signed-off-by: Minghao Chi <chi.minghao@zte.com.cn>
Link: https://lore.kernel.org/r/20220418110141.2559019-1-chi.minghao@zte.com.cn
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-04-25 14:01:06 +01:00
Matthias Schiffer 1aeda09666
spi: cadence-quadspi: allow operations with cmd/addr buswidth >1
With the removal of the incorrect logic of cqspi_set_protocol(), ops with
cmd/addr buswidth >1 are now working correctly.

Tested on a TI AM64x with a Macronix MX25U51245G QSPI flash using 1-4-4
operations.

DTR operations are currently untested, so we leave them disabled for now
(except for the previously allowed 8-8-8 ops).

Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com>
Link: https://lore.kernel.org/r/20220420155616.281730-2-matthias.schiffer@ew.tq-group.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-04-25 14:01:05 +01:00
Matthias Schiffer 28ac902aed
spi: cadence-quadspi: drop cqspi_set_protocol()
As suggested, this removes the whole cqspi_set_protocol() function, as it
is not actually needed:

- Checks for unsupported operations are already handled by supports_op(),
  removing the need to distinguish DTR and non-DTR modes in the buswidth
  setup
- supports_op() ensures that the DTR flags match for all relevant parts of
  an operation, so op->cmd.dtr can be used instead of copying the flag to
  the cqspi_flash_pdata
- The logic in cqspi_set_protocol() is moved to cqspi_calc_rdreg() and
  cqspi_write_setup() (with a helper macro CQSPI_OP_WIDTH())

The helper macro checks nbytes instead of buswidth for 0, for consistency
with supports_op() etc.

Suggested-by: Pratyush Yadav <p.yadav@ti.com>
Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com>
Link: https://lore.kernel.org/r/20220420155616.281730-1-matthias.schiffer@ew.tq-group.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-04-25 14:01:04 +01:00
Minghao Chi 2b8070840e
spi: spi-tegra20-sflash: using pm_runtime_resume_and_get instead of pm_runtime_get_sync
Using pm_runtime_resume_and_get is more appropriate
for simplifing code

Reported-by: Zeal Robot <zealci@zte.com.cn>
Signed-off-by: Minghao Chi <chi.minghao@zte.com.cn>
Link: https://lore.kernel.org/r/20220418110103.2558955-1-chi.minghao@zte.com.cn
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-04-25 14:01:03 +01:00
Luca Ceresoli d5d933f09a
spi: rockchip: fix missing error on unsupported SPI_CS_HIGH
The hardware (except for the ROCKCHIP_SPI_VER2_TYPE2 version) does not
support active-high native chip selects. However if such a CS is configured
the core does not error as it normally should, because the
'ctlr->use_gpio_descriptors = true' line in rockchip_spi_probe() makes the
core set SPI_CS_HIGH in ctlr->mode_bits.

In such a case the spi-rockchip driver operates normally but produces an
active-low chip select signal without notice.

There is no provision in the current core code to handle this
situation. Fix by adding a check in the ctlr->setup function (similarly to
what spi-atmel.c does).

This cannot be done reading the SPI_CS_HIGH but in ctlr->mode_bits because
that bit gets always set by the core for master mode (see above).

Fixes: eb1262e3cc ("spi: spi-rockchip: use num-cs property and ctlr->enable_gpiods")
Signed-off-by: Luca Ceresoli <luca.ceresoli@bootlin.com>
Link: https://lore.kernel.org/r/20220421213251.1077899-1-luca.ceresoli@bootlin.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-04-25 14:01:01 +01:00
Minghao Chi 40b6a13771
spi: spi-omap2-mcspi: using pm_runtime_resume_and_get instead of pm_runtime_get_sync
Using pm_runtime_resume_and_get() to replace pm_runtime_get_sync and
pm_runtime_put_noidle. This change is just to simplify the code, no
actual functional changes.

Reported-by: Zeal Robot <zealci@zte.com.cn>
Signed-off-by: Minghao Chi <chi.minghao@zte.com.cn>
Link: https://lore.kernel.org/r/20220414085433.2541670-1-chi.minghao@zte.com.cn
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-04-25 14:01:00 +01:00
Minghao Chi 32831bf569
spi: mxs: using pm_runtime_resume_and_get instead of pm_runtime_get_sync
Using pm_runtime_resume_and_get() to replace pm_runtime_get_sync and
pm_runtime_put_noidle. This change is just to simplify the code, no
actual functional changes.

Reported-by: Zeal Robot <zealci@zte.com.cn>
Signed-off-by: Minghao Chi <chi.minghao@zte.com.cn>
Link: https://lore.kernel.org/r/20220420090420.2588868-1-chi.minghao@zte.com.cn
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-04-25 14:00:59 +01:00
Minghao Chi 7d34ff58f3
spi: spi-imx: using pm_runtime_resume_and_get instead of pm_runtime_get_sync
Using pm_runtime_resume_and_get() to replace pm_runtime_get_sync and
pm_runtime_put_noidle. This change is just to simplify the code, no
actual functional changes.

Reported-by: Zeal Robot <zealci@zte.com.cn>
Signed-off-by: Minghao Chi <chi.minghao@zte.com.cn>
Link: https://lore.kernel.org/r/20220414085343.2541608-1-chi.minghao@zte.com.cn
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-04-25 14:00:58 +01:00
Minghao Chi b9db82e5f2
spi: spi-sprd: using pm_runtime_resume_and_get instead of pm_runtime_get_sync
Using pm_runtime_resume_and_get() to replace pm_runtime_get_sync and
pm_runtime_put_noidle. This change is just to simplify the code, no
actual functional changes.

Reported-by: Zeal Robot <zealci@zte.com.cn>
Signed-off-by: Minghao Chi <chi.minghao@zte.com.cn>
Link: https://lore.kernel.org/r/20220414085506.2541732-1-chi.minghao@zte.com.cn
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-04-25 14:00:57 +01:00
周琰杰 (Zhou Yanjie) 6d72b11403
spi: ingenic: Add support for new Ingenic SoCs.
1.Since it would be dangerous to specify a newer SoC's compatible
  string as the fallback of an older SoC's compatible string, we
  add support for the "ingenic,jz4775-spi" compatible string in
  the driver.

  This will permit to support the JZ4775 by having:
  compatible = "ingenic,jz4775-spi";

  Instead of doing:
  compatible = "ingenic,jz4775-spi", "ingenic,jz4780-spi";

2.Add support for probing the spi-ingenic driver on the X1000 SoC
  from Ingenic. From the X1000 SoC onwards, the maximum frequency
  allowed by the SSI module of Ingenic SoCs has been changed from
  54MHz to 50MHz. So "max_speed_hz" is introduced in "jz_soc_info"
  to set different maximum frequency values.

3.Add support for probing the spi-ingenic driver on the X2000 SoC
  from Ingenic. The X2000 SoC has only one native chip select line,
  so "max_native_cs" is introduced in "jz_soc_info" to set different
  maximum number of native chip select lines.

4.Because of the introduction of support for the X-series SoCs, the
  current driver is not only applicable to the JZ-series SoCs, so
  the description texts has been modified to avoid misunderstanding.

Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>
Reviewed-by: Paul Cercueil <paul@crapouillou.net>
Link: https://lore.kernel.org/r/1650724725-93758-4-git-send-email-zhouyanjie@wanyeetech.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-04-25 14:00:51 +01:00
周琰杰 (Zhou Yanjie) aecec8bbb2
spi: Add bindings for new Ingenic SoCs.
Add the SPI bindings for the JZ4775 SoC, the X1000 SoC,
and the X2000 SoC from Ingenic.

Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Paul Cercueil <paul@crapouillou.net>
Link: https://lore.kernel.org/r/1650724725-93758-3-git-send-email-zhouyanjie@wanyeetech.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-04-25 14:00:50 +01:00
周琰杰 (Zhou Yanjie) e64e9ad267
spi: ingenic: Add support for use GPIO as chip select line.
Add support for using GPIOs as chip select lines on Ingenic SoCs.

Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>
Reviewed-by: Paul Cercueil <paul@crapouillou.net>
Link: https://lore.kernel.org/r/1650724725-93758-2-git-send-email-zhouyanjie@wanyeetech.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-04-25 14:00:49 +01:00
Zheng Yongjun cc470d5534
spi: img-spfi: Fix pm_runtime_get_sync() error checking
If the device is already in a runtime PM enabled state
pm_runtime_get_sync() will return 1, so a test for negative
value should be used to check for errors.

Fixes: deba25800a ("spi: Add driver for IMG SPFI controller")
Signed-off-by: Zheng Yongjun <zhengyongjun3@huawei.com>
Link: https://lore.kernel.org/r/20220422062641.10486-1-zhengyongjun3@huawei.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-04-22 12:37:36 +01:00
Mika Westerberg c2b5a40c9e
spi: intel: Implement dirmap hooks
Currently the driver goes over the supported opcodes list each time
->exec_op() is called and finds the suitable for the given operation.
This consumes unnecessary amount of CPU cycles because the operation is
always the same. For this reason populate dirmap hooks for the driver so
that we cache the selected operation and then simply call it on each
read/write.

Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Link: https://lore.kernel.org/r/20220420104350.19510-1-mika.westerberg@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-04-20 14:25:20 +01:00
Mark Brown 3625a627f6
MediaTek SPI controller cleanups and documentation
Merge series from AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>:

This series performs some cleanups to the spi-mt65xx driver, removing
all gotos, simplifying the probe function and adding kerneldoc to the
driver structures.
2022-04-20 14:22:11 +01:00
AngeloGioacchino Del Regno 8e8a9e364a
spi: mt65xx: Fix definitions indentation
Some definitions at the beginning of this file were wrongly
indented: fix the indentation for all of these and, while at
it, also move the MTK_SPI_IDLE and MTK_SPI_PAUSED down, as to
implicitly group the hardware related definitions to the
software (driver) related ones.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220407114428.167091-9-angelogioacchino.delregno@collabora.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-04-19 16:32:14 +01:00
AngeloGioacchino Del Regno 3c5cd2e23f
spi: mt65xx: Add kerneldoc for driver structures
One of the two structures was already partially documented, but not
in kerneldoc format: enhance readability by adding the missing
documentation bits and use kerneldoc.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220407114428.167091-8-angelogioacchino.delregno@collabora.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-04-19 16:32:12 +01:00
AngeloGioacchino Del Regno 20cdbb8009
spi: mt65xx: Simplify probe function with dev_err_probe()
Switch to dev_err_probe() to remove all dev_err() -> return repeated
patterns, simplifying and shortening the probe function.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220407114428.167091-7-angelogioacchino.delregno@collabora.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-04-19 16:32:11 +01:00
AngeloGioacchino Del Regno 5088b31364
spi: mt65xx: Move pm_runtime_enable() call to remove all gotos
The last goto in the probe function can be removed by calling
pm_runtime_enable() right before devm_spi_register_master(), as
only some init checks were being performed after enabling pm.
This is a cleanup and brings no functional changes.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220407114428.167091-6-angelogioacchino.delregno@collabora.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-04-19 16:32:10 +01:00
AngeloGioacchino Del Regno 5dee8bb8d1
spi: mt65xx: Move clock parent setting to remove clock disable gotos
Reparenting sel_clk to parent_clk can be done before enabling any of
spi_clk and spi_hclk. Move the call to clk_set_parent() for sel_clk
earlier, and call disable_unprepare() upon spi_clk prepare_enable()
failure to remove all clock disablement related gotos.
This commit is in preparation of a later cleanup.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220407114428.167091-5-angelogioacchino.delregno@collabora.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-04-19 16:32:09 +01:00
AngeloGioacchino Del Regno 6b4440584b
spi: mt65xx: Add and use pointer to struct device in mtk_spi_probe()
In preparation for switching to dev_err_probe() in this function, add
a pointer to struct device and replace all occurrences of '&pdev->dev'
to using this 'dev' pointer.
This is done for one-line fitting of the dev_err_probe() calls.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220407114428.167091-4-angelogioacchino.delregno@collabora.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-04-19 16:32:08 +01:00
AngeloGioacchino Del Regno 7f7cdef728
spi: mt65xx: Switch to device_get_match_data()
Instead of performing yet another match check in the probe function,
simply switch to device_get_match_data().
This is a cleanup and brings no functional change.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220407114428.167091-3-angelogioacchino.delregno@collabora.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-04-19 16:32:07 +01:00
AngeloGioacchino Del Regno ace1458023
spi: mt65xx: Simplify probe function with devm_spi_alloc_master
Switch to the devm variant of spi_alloc_master() to save some gotos.
This patch is a cleanup that brings no functional changes.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220407114428.167091-2-angelogioacchino.delregno@collabora.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-04-19 16:32:06 +01:00
Minghao Chi dd769f1548
spi: using pm_runtime_resume_and_get instead of pm_runtime_get_sync
Using pm_runtime_resume_and_get is more appropriate
for simplifing code

Reported-by: Zeal Robot <zealci@zte.com.cn>
Signed-off-by: Minghao Chi <chi.minghao@zte.com.cn>
Link: https://lore.kernel.org/r/20220418110226.2559081-1-chi.minghao@zte.com.cn
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-04-19 13:13:50 +01:00
Baruch Siach 79422ed9bd
spi: spi-imx: add support for SPI_RX_CPHA_FLIP
When SPI_RX_CPHA_FLIP is set, flip CPHA on Rx only transfers. This is
useful to access devices that use inverted CPHA for MISO vs MOSI
signals.

Only support the mx51/mx53 variants for now.

Tested on i.MX6ULL based system.

Signed-off-by: Baruch Siach <baruch.siach@siklu.com>
Link: https://lore.kernel.org/r/e11b4446afe9a46a282dd923d22c27d03fae15f8.1649702729.git.baruch@tkos.co.il
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-04-19 13:13:49 +01:00
Baruch Siach 178d0cbbfe
spi: spidev: add SPI_RX_CPHA_FLIP
Allow userspace to set SPI_RX_CPHA_FLIP mode bit using the
SPI_IOC_WR_MODE32 ioctl.

Signed-off-by: Baruch Siach <baruch.siach@siklu.com>
Link: https://lore.kernel.org/r/6ae31ad24f8252418878b21a8759a04b78726dac.1649702729.git.baruch@tkos.co.il
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-04-19 13:13:48 +01:00
Baruch Siach b617be3350
spi: add SPI_RX_CPHA_FLIP mode bit
Some SPI devices latch MOSI bits on one clock phase, but produce valid
MISO bits on the other phase. Add SPI_RX_CPHA_FLIP mode to instruct the
controller driver to flip CPHA for Rx (MISO) only transfers.

Signed-off-by: Baruch Siach <baruch.siach@siklu.com>
Link: https://lore.kernel.org/r/a715ca92713ca02071f33dcca9960a66a03c949a.1649702729.git.baruch@tkos.co.il
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-04-19 13:13:47 +01:00
Mika Westerberg 4bbaa857e9
spi: intel: Fix typo in kernel-doc of intel_spi_probe()
Should be 'specific' not 'spefific'. Fix this.

Reported-by: Hongli Li <hongli.li@intel.com>
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Link: https://lore.kernel.org/r/20220411113158.2037-1-mika.westerberg@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-04-19 13:13:46 +01:00
Minghao Chi c03ae4876f
spi: spi-ti-qspi: using pm_runtime_resume_and_get instead of pm_runtime_get_sync
Using pm_runtime_resume_and_get is more appropriate
for simplifing code

Reported-by: Zeal Robot <zealci@zte.com.cn>
Signed-off-by: Minghao Chi <chi.minghao@zte.com.cn>
Link: https://lore.kernel.org/r/20220408080931.2494356-1-chi.minghao@zte.com.cn
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-04-19 13:13:45 +01:00