Commit Graph

13 Commits

Author SHA1 Message Date
Ben Skeggs 264ce192b3 drm/nv84-/fence: prepare for emit/sync support of sysram sequences
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-02-20 16:00:53 +10:00
Marcin Slusarz 93260d3c02 drm/nouveau: report channel owner in error messages
Signed-off-by: Marcin Slusarz <marcin.slusarz@gmail.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-02-20 16:00:33 +10:00
Marcin Slusarz 124ea297c8 drm/nouveau: unpin pushbuffer bo before destroying it
Fixes GART leak (as accounted by nouveau_drm.gem.gart_available).

Signed-off-by: Marcin Slusarz <marcin.slusarz@gmail.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-11-29 09:58:11 +10:00
Ben Skeggs 4946980099 drm/nve0: allow specification of channel engine type in abi16 call
Previously, if either vram/gart handles were specified as ~0, the ioctl
call would fail.  In order to hack engine selection into the ioctl for
kepler, we now define (fb_ctxdma_handle == ~0) to mean "engine mask is
in tt_ctxdma_handle".

This approach also allows new userspace to detect lack of support for
non-PGRAPH channels on older kernels.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-11-29 09:58:05 +10:00
Ben Skeggs f756944a21 drm/nv50/dmaobj: extend class to allow gpu-specific attributes to be defined
disp is going to need to be able to create more specific dma objects
than was previously possible.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-11-29 09:56:39 +10:00
Ben Skeggs da07e52cf1 drm/nouveau: log channel debug/error messages from client object rather than drm client
This will make it more obvious which application caused particular messages.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-10-03 13:13:11 +10:00
Marcin Slusarz 5b8a43aeb9 drm/nouveau: quiet some static-related sparse noise
Signed-off-by: Marcin Slusarz <marcin.slusarz@gmail.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-10-03 13:13:07 +10:00
Ben Skeggs c97f8c922e drm/nouveau/fifo: use defines instead of hardcoded class ids
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-10-03 13:13:06 +10:00
Ben Skeggs a7c6e75eb2 drm/nouveau/fifo: version the dma channel class struct
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-10-03 13:13:04 +10:00
Ben Skeggs 503b0f1cd6 drm/nouveau/fifo: separate object classes for dma channels
Future code will use the object class rather than chipset checks in order to
identify available channel features.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-10-03 13:13:04 +10:00
Ben Skeggs 49981046e3 drm/nve0: use async copy engine for ttm buffer moves if available
Kepler PFIFO lost the ability to address multiple engines from a single
channel, so we need a separate one for the copy engine.

v2: Marcin Slusarz <marcin.slusarz@gmail.com>
- regression fix: restore hw accelerated buffer copies

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-10-03 13:13:02 +10:00
Ben Skeggs dbff2dee9f drm/nve0/fifo: support engine selection when creating fifo channels
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-10-03 13:13:01 +10:00
Ben Skeggs ebb945a94b drm/nouveau: port all engines to new engine module format
This is a HUGE commit, but it's not nearly as bad as it looks - any problems
can be isolated to a particular chipset and engine combination.  It was
simply too difficult to port each one at a time, the compat layers are
*already* ridiculous.

Most of the changes here are simply to the glue, the process for each of the
engine modules was to start with a standard skeleton and copy+paste the old
code into the appropriate places, fixing up variable names etc as needed.

v2: Marcin Slusarz <marcin.slusarz@gmail.com>
- fix find/replace bug in license header

v3: Ben Skeggs <bskeggs@redhat.com>
- bump indirect pushbuf size to 8KiB, 4KiB barely enough for userspace and
  left no space for kernel's requirements during GEM pushbuf submission.
- fix duplicate assignments noticed by clang

v4: Marcin Slusarz <marcin.slusarz@gmail.com>
- add sparse annotations to nv04_fifo_pause/nv04_fifo_start
- use ioread32_native/iowrite32_native for fifo control registers

v5: Ben Skeggs <bskeggs@redhat.com>
- rebase on v3.6-rc4, modified to keep copy engine fix intact
- nv10/fence: unmap fence bo before destroying
- fixed fermi regression when using nvidia gr fuc
- fixed typo in supported dma_mask checking

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-10-03 13:12:56 +10:00