Commit Graph

20 Commits

Author SHA1 Message Date
Tony Lindgren 255584b138 clk: ti: Stop using legacy clkctrl names for omap4 and 5
With the addition of clock-output-names, we can now unify the internal
clock naming for omap4 and 5 to follow the other TI SoCs.

We are still using legacy clkctrl names for omap4 and 5 based on the clock
manager name which is wrong. Instead, we want to use the clkctrl clock
based naming.

We must now also drop the legacy TI_CLK_CLKCTRL_COMPAT quirk for the
clkctrl clock.

This change will allow further devicetree warning cleanup as already
done for am3/4 and dra7.

Cc: linux-clk@vger.kernel.org
Cc: Stephen Boyd <sboyd@kernel.org>
Cc: Tero Kristo <kristo@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Link: https://lore.kernel.org/r/20220615064306.22254-1-tony@atomide.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-06-16 00:49:57 -07:00
Tony Lindgren 7f7acef857 clk: ti: omap5: Add missing gpmc and ocmc clkctrl
The gpmc clock is needed to update omap5 to boot with genpd with the
related devicetree patches. The ocmc clock is currently not used but
let's add it so we have all the clocks for the l3main2 defined.

Cc: Stephen Boyd <sboyd@kernel.org>
Cc: Tero Kristo <kristo@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 13:59:18 +02:00
David Shah 66cc7af381 clk: ti: omap5: Fix reboot DPLL lock failure when using ABE TIMERs
Having the ABE DPLL ref and bypass muxes set to different inputs was
causing the DPLL not to lock when TIMER8 was used, as it is in the Pyra
for the backlight.

This patch fixes this by setting abe_dpll_bypass_clk_mux to sys_32k_ck
in omap5xxx_dt_clk_init.

A similar patch may also be needed for OMAP44xx which has similar code
in omap4xxx_dt_clk_init, but I have not added this as I have no hardware
to test on.

Signed-off-by: David Shah <dave@ds0.me>
Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com>
Link: https://lore.kernel.org/r/1d3abe2512054866cc2ea7b2592238f4fa06502a.1607253531.git.hns@goldelico.com
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2020-12-17 01:47:01 -08:00
Tero Kristo f968045fb9 clk: ti: omap5: Add proper parent clocks for l4-secure clocks
L4 secure clocks do not have their parents set currently, which ends
them up to the orphan clock list. Fix this by adding either l3 or l4
clock as their parent.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
Link: https://lkml.kernel.org/r/20200429131341.4697-4-t-kristo@ti.com
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2020-05-14 12:54:46 -07:00
Tony Lindgren 723a567f43 ARM: dts: Add missing omap5 secure clocks
The secure clocks on omap5 are similar to what we already have for dra7
with dra7_l4sec_clkctrl_regs and documented in the omap5432 TRM in
"Table 3-1044. CORE_CM_CORE Registers Mapping Summary".

The secure clocks are part of the l4per clock manager. As the l4per
clock manager has now two clock domains as children, let's also update
the l4per clockdomain node name to follow the "clock" node naming with
a domain specific compatible property.

Compared to omap4, omap5 has more clocks working in hardare autogating
mode.

Cc: devicetree@vger.kernel.org
Cc: Rob Herring <robh+dt@kernel.org>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-01-23 08:22:57 -08:00
Tony Lindgren 364975eeb4 clk: ti: omap5: Add missing AESS clock
Looks like we're missing AESS clock for omap5. This is similar to what
omap4 has.

Cc: H. Nikolaus Schaller <hns@goldelico.com>
Cc: Matthijs van Duin <matthijsvanduin@gmail.com>
Cc: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Reviewed-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
2020-01-20 09:42:48 +02:00
Suman Anna 95a62bf2db clk: ti: omap5: Drop idlest polling from IPU & DSP clkctrl clocks
The IPU and DSP remote processor cores and their corresponding MMUs on
OMAP5 SoCs have hardreset lines associated with them and are controlled
by a PRCM reset line each. Any clkctrl enable/disable operations cannot
be checked for module enabled/disabled status independent of the reset
operation, and this causes some unwanted timeouts in the kernel and
unbalanced states for these clocks. These details should be handled by
the driver integration code itself.

Add the CLKF_NO_IDLEST flag to both the IPU and DSP clkctrl clocks so
that these module status checks are skipped.

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
2019-10-31 15:18:29 +02:00
Tero Kristo 25999e6172 clk: ti: omap5: add IVA subsystem clkctrl data
Add clkctrl data for the IVA subsystem (Image and Video Accelerator.)

Signed-off-by: Tero Kristo <t-kristo@ti.com>
2019-10-31 15:18:28 +02:00
Tony Lindgren fd56837494 clk: ti: add clkctrl data omap5 sgx
Looks like we have sgx clock missing currently so let's add it.

Cc: Adam Ford <aford173@gmail.com>
Cc: Filip Matijević <filip.matijevic.pz@gmail.com>
Cc: "H. Nikolaus Schaller" <hns@goldelico.com>
Cc: Ivaylo Dimitrov <ivo.g.dimitrov.75@gmail.com>
Cc: moaz korena <moaz@korena.xyz>
Cc: Merlijn Wajer <merlijn@wizzup.org>
Cc: Michael Turquette <mturquette@baylibre.com>
Cc: Paweł Chmiel <pawel.mikolaj.chmiel@gmail.com>
Cc: Philipp Rossak <embed3d@gmail.com>
Cc: Stephen Boyd <sboyd@kernel.org>
Cc: Tero Kristo <t-kristo@ti.com>
Cc: Tomi Valkeinen <tomi.valkeinen@ti.com>
Cc: linux-clk@vger.kernel.org
Acked-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-08-26 08:47:07 -07:00
Thomas Gleixner d2912cb15b treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500
Based on 2 normalized pattern(s):

  this program is free software you can redistribute it and or modify
  it under the terms of the gnu general public license version 2 as
  published by the free software foundation

  this program is free software you can redistribute it and or modify
  it under the terms of the gnu general public license version 2 as
  published by the free software foundation #

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-only

has been chosen to replace the boilerplate/reference in 4122 file(s).

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Enrico Weigelt <info@metux.net>
Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Reviewed-by: Allison Randal <allison@lohutok.net>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190604081206.933168790@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-06-19 17:09:55 +02:00
Tero Kristo 0ad902f62f clk: ti: omap5: add clkctrl clock data
Add data for omap5 clkctrl clocks, and register it within the clkctrl
driver.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
2017-12-01 15:17:18 +02:00
Tero Kristo d41e530409 clk: ti: omap5: cleanup unnecessary clock aliases
Most of the clock aliases are no longer needed, only leave the ones
required by OMAP timer code in place.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
2017-12-01 15:17:16 +02:00
Grygorii Strashko d5630b7a55 clk: ti: dra7: fix kernel boot with arg 'clocksource=gp_timer'
The OMAP Platform code provides possibility to select GP Timer as
default clocksource instead of counter_32K by using bootcmd parameter
'clocksource', but the system will crash during early boot when this
option is used on dra7 or omap5 platforms, because it will hit BUG()
statement:

 omap2_gptimer_clocksource_init
  ->BUG_ON(res);

This happens because clk_dev alias "sys_clkin_ck" is not registered.
Hence, fix it by adding missing "sys_clkin_ck" clk_dev aliases
definitions for omap5 and dra7.

Acked-by: Tero Kristo <t-kristo@ti.com>
Cc: Tony Lindgren <tony@atomide.com>
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-04-15 17:30:07 -07:00
Tero Kristo a3314e9cf6 clk: ti: move some public definitions to private header
Several exported TI clock driver features are no longer needed outside
the clock driver itself, thus move all of these to the driver private
header file. Also, update some of the driver files to actually include
this header.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
2015-06-02 12:31:45 +03:00
Suman Anna 03ff41a938 clk: ti: OMAP5: Correct the DT clock aliases for timers
The DT clock aliases for Timers use the legacy (non-DT) device
names and a source clock named sys_ck. OMAP5 is DT-boot only,
so correct the DT clock aliases to use the DT device names
instead. Also, the source clock name is corrected from 'sys_ck'
to 'timer_sys_ck', the name used by the OMAP dmtimer driver.

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
2015-03-24 20:23:50 +02:00
Stephen Boyd e387088a03 clk: ti: Drop use of clk-private.h
These modules don't need to include clk-private.h. Replace the
include with clk.h because these modules are clock consumers and
also include clk-provider.h in clk/ti.h because struct
clk_hw_omap has a struct clk_hw embedded in it.

Cc: Tero Kristo <t-kristo@ti.com>
Cc: Tony Lindgren <tony@atomide.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Reviewed-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Michael Turquette <mturquette@linaro.org>
2015-01-27 11:58:54 -08:00
Peter Ujfalusi 81c7e03acb CLK: TI: clk-54xx: Set the rate for dpll_abe_m2x2_ck
In order to get correct clock dividers for AESS/ABE we need to set the
dpll_abe_m2x2_ck rate to be double of dpll_abe_ck.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
2014-06-06 20:33:34 +03:00
Florian Vaussard 8559087f0e CLK: TI: OMAP4/5/DRA7: Remove gpmc_fck from dummy clocks
When arch/arm/mach-omap2/gpmc.c calls clk_get(..., "fck"), it will
get a dummy clock and try to use it. As the rate is configured to zero,
this will result in several divisions by zero, and misconfigured
timings, with devices on the bus being lost in the La La Land.

It is better to remove gpmc_fck from the dummy clocks, so that gpmc.c
can fail gracefully.

Cc: stable@vger.kernel.org # v3.14+
Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch>
Acked-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-03-13 13:41:50 -07:00
Roger Quadros 62125a46cd CLK: TI: omap5: Initialize USB_DPLL at boot
USB_DPLL must be initialized and locked at boot so that
USB modules can work.

Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Tested-by: Nishanth Menon <nm@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-01-17 12:35:27 -08:00
Tero Kristo 52b14728dd CLK: TI: add omap5 clock init file
clk-54xx.c now contains the clock init functionality for omap5, including
DT clock registration and adding of static clkdev entries.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
Tested-by: Nishanth Menon <nm@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-01-17 12:35:24 -08:00