Commit Graph

1790 Commits

Author SHA1 Message Date
Tomasz Figa 5110e51d12 dmaengine: PL08x: Add support for different maximum transfer size
PL080S has separate register to store transfer size in, allowing single
transfer to be much larger than in standard PL080.

This patch makes the amba-pl08x driver aware of this and removes writing
transfer size to reserved bits of CH_CONTROL register on PL080S, which
was not a problem witn transfer sizes fitting the original bitfield
of PL080, but now would overwrite other fields.

Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-09-02 11:49:56 +05:30
Tomasz Figa da1b6c05b8 dmaengine: PL08x: Add support for PL080S variant
PL080S is a modified version of PL080 that can be found on Samsung SoCs,
such as S3C6400 and S3C6410.

It has different offset of CONFIG register, separate CONTROL1 register
that holds transfer size and larger maximum transfer size.

Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-09-02 11:49:56 +05:30
Tomasz Figa 48924e4224 dmaengine: PL08x: Move LLI dumping code into separate function
This patch refactors debugging code that dumps LLI entries by moving it
into separate function, which is stubbed when VERBOSE_DEBUG is not
selected. This allows us to get rid of the ugly ifdef from the body of
pl08x_fill_llis_for_desc().

No functional change is introduced by this patch.

Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-09-02 11:49:56 +05:30
Tomasz Figa ba6785ffc8 dmaengine: PL08x: Rework LLI handling to be less fragile
Currently memory allocated for LLIs is casted to an array of structs,
which is fragile and also limits the driver to a single, predefined LLI
layout, while there are some variants of PL08x, which have more fields
in LLI (namely PL080S with its extra CCTL2).

This patch makes LLIs a sequence of 32-bit words, which is just filled
with appropriate values in appropriate order and padded with required
amount of dummy words (currently zero, but PL080S will make better use
of this).

Suggested-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-09-02 11:49:56 +05:30
Tomasz Figa d86ccea794 dmaengine: PL08x: Add support for different offset of CONFIG register
Some variants of PL08x (namely PL080S, found in Samsung S3C64xx SoCs)
have CONFIG register at different offset. This patch makes the driver
use offset from vendor data struct.

Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-09-02 11:49:56 +05:30
Tomasz Figa 68a7faa200 dmaengine: PL08x: Refactor pl08x_getbytes_chan() to lower indentation
Further patch will introduce support for PL080S, which requires some
things to be done conditionally, thus increasing indentation level of
some functions even more.

This patch reduces indentation level of pl08x_getbytes_chan() function
by inverting several conditions and returning from function wherever
possible.

Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-09-02 11:49:56 +05:30
Dan Carpenter 2d17f7fb69 dma: cppi41: off by one in desc_to_chan()
The test here should be ">=" instead of ">".  The cdd->chan_busy[] array
has "ALLOC_DECS_NUM" elements.

Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Acked-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2013-08-28 15:46:33 -07:00
Lars-Peter Clausen 39ff86130a dma: pl330: Fix handling of TERMINATE_ALL while processing completed descriptors
The pl330 DMA driver is broken in regard to handling a terminate all request
while it is processing the list of completed descriptors. This is most visible
when calling dmaengine_terminate_all() from within the descriptors callback for
cyclic transfers. In this case the TERMINATE_ALL transfer will clear the
work_list and stop the transfer. But after all callbacks for all completed
descriptors have been handled the descriptors will be re-enqueued into the (now
empty) work_list. So the next time dma_async_issue_pending() is called for the
channel these descriptors will be transferred again which will cause data
corruption. Similar issues can occur if dmaengine_terminate_all() is not called
from within the descriptor callback but runs on a different CPU at the same time
as the completed descriptor list is processed.

This patch introduces a new per channel list which will hold the completed
descriptors. While processing the list the channel's lock will be held to avoid
racing against dmaengine_terminate_all(). The lock will be released when calling
the descriptors callback though. Since the list of completed descriptors might
be modified (e.g. by calling dmaengine_terminate_all() from the callback) we can
not use the normal list iterator macros. Instead we'll need to check for each
loop iteration again if there are still items in the list. The drivers
TERMINATE_ALL implementation is updated to move descriptors from both the
work_list as well the new completed_list back to the descriptor pool. This makes
sure that none of the descripts finds its way back into the work list and also
that we do not call any futher complete callbacks after
dmaengine_terminate_all() has been called.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-08-28 11:27:17 +05:30
Zhangfei Gao 8e6152bc66 dmaengine: Add hisilicon k3 DMA engine driver
Add dmaengine driver for hisilicon k3 platform based on virt_dma

Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org>
Tested-by: Kai Yang <jean.yangkai@huawei.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-08-28 11:23:40 +05:30
Sebastian Andrzej Siewior d6aafa2bf3 dma: cpp41: enable pm_runtime during init
With enabled pm_runtime in the kernel the device won't work because it
is not "on" during the probe function. This patch enables the device via
pm_runtime on probe so it remains activated.

Acked-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Felipe Balbi <balbi@ti.com>
2013-08-27 14:19:52 -05:00
Sebastian Andrzej Siewior bd2fbf3a56 dma: cpp41: make it compile with CONFIG_BUG=n
Before Randy figures out that this does not compile with CONFIG_BUG=n
here is a fix for it.

Acked-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Felipe Balbi <balbi@ti.com>
2013-08-27 14:08:11 -05:00
Guennadi Liakhovetski e5ffa401ea DMA: shdma: fix a bad merge - remove free_irq()
A bad merge resulted in a left-over free_irq() call. This patch removes it.

Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-08-27 14:26:37 +05:30
Jingoo Han eb262a5419 dma: sh: remove unnecessary platform_set_drvdata()
The driver core clears the driver data to NULL after device_release
or on probe failure. Thus, it is not needed to manually clear the
device driver data to NULL.

Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Acked-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-08-27 14:26:29 +05:30
Guennadi Liakhovetski 1e69653d40 DMA: shdma: add r8a73a4 DMAC data to the device ID table
This configuration data will be used, when DMAC DT support is added to
r8a73a4.

Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-08-27 14:26:21 +05:30
Guennadi Liakhovetski 8eb742a091 DMA: shdma: add a header with common for ARM SoCs defines
All shdma DMACs on ARM SoCs share certain register layout patterns, which
are currently defined in arch/arm/mach-shmobile/include/mach/dma-register.h.
That header is included by SoC-specific setup-*.c files to be used in DMAC
platform data. That header, however, cannot be directly used by the driver.
This patch copies those defines into a driver-local header to be used by
Device Tree configurations.

Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-08-27 14:26:14 +05:30
Guennadi Liakhovetski 4620ad5419 DMA: shdma: remove private and unused defines from a global header
Macros, named like TEND or SAR lack a namespace and are too broadly named
for a global header. Besides, they aren't needed globally. Move them to
where they belong - into the driver. Some other macros aren't used at all,
remove them.

Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-08-27 14:25:27 +05:30
Guennadi Liakhovetski 4981c4dc19 DMA: shdma: switch DT mode to use configuration data from a match table
This facilitates DMAC DT support by eliminating the need in AUXDATA and
avoiding creating complex DT data. This also fits well with DMAC devices,
of which SoCs often have multiple identical copies and it is perfectly
valid to use a single configuration data set for all of them.

Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-08-27 14:25:09 +05:30
Guennadi Liakhovetski 2833c47e0e DMA: shdma: make a pointer const
Platform data shouldn't be changed at run-time, so, pointers to it should
be const.

Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-08-27 14:25:03 +05:30
Guennadi Liakhovetski cc6b0f0238 DMA: sudmac: fix compiler warning
Fix the following compiler warning:

drivers/dma/sh/sudmac.c: In function 'sudmac_chan_remove':
drivers/dma/sh/sudmac.c:302: warning: unused variable 'sc'

Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-08-27 14:24:51 +05:30
Guennadi Liakhovetski c1c63a14f4 DMA: shdma: switch to managed resource allocation
Switch shdma to using devm_* managed functions for allocation of memory,
requesting IRQs, mapping IO resources etc.

Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-08-27 14:24:19 +05:30
Guennadi Liakhovetski ca8b387803 DMA: shdma: support the new CHCLR register layout
On newer r-car SoCs the CHCLR register only contains one bit per channel,
to which a 1 has to be written to reset the channel. Older SoC versions had
one CHCLR register per channel, to which a 0 must be written to reset the
channel and clear its buffers. This patch adds support for the newer
layout.

Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-08-27 14:24:07 +05:30
Sascha Hauer dcfec3c098 dma: imx-sdma: Add ROM script addresses to driver
This adds the ROM script addresses for i.MX25, i.MX5x and i.MX6 to the
SDMA driver needed for the driver to work without additional firmware.

The ROM script addresses are SoC specific and in some cases even tapeout
specific. This patch adds the ROM script addresses only for SoCs which
do not have a tapeout specific SDMA ROM, because currently it's unclear
how this case should be handled.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-08-26 20:47:16 +05:30
Sascha Hauer 17bba72f8f dma: imx-sdma: Use struct for driver data
Use a struct type instead of an enum type for distinguishing between
different versions. This makes it simpler to handle multiple differences
without cluttering the code with comparisons for certain devtypes.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-08-26 20:47:16 +05:30
Daniel Mack 023bf55f1c dma: mmp_pdma: set DMA_PRIVATE
As the driver now has its own xlate function and makes use of the
dma_get_slave_channel(), we need to manually set the DMA_PRIVATE flags.

Drivers which rely on of_dma_simple_xlate() do implicitly the same by
going through __dma_request_channel().

Signed-off-by: Daniel Mack <zonque@gmail.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-08-25 22:04:53 +05:30
Daniel Mack 50440d74aa dma: mmp_pdma: add support for cyclic DMA descriptors
Provide a callback to prepare cyclic DMA transfers.
This is for instance needed for audio channel transport.

Signed-off-by: Daniel Mack <zonque@gmail.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-08-25 22:04:52 +05:30
Daniel Mack 0cd6156177 dma: mmp_pdma: don't clear DCMD_ENDIRQEN at end of pending chain
In order to fully support multiple transactions per channel, we need to
assure we get an interrupt for each completed transaction. That flags
bit is also our only way to tell at which descriptor a transaction ends.

So, remove the manual clearing of that bit, and then inline the only
remaining command that is left in append_pending_queue() for better
readability.

Signed-off-by: Daniel Mack <zonque@gmail.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-08-25 22:04:52 +05:30
Daniel Mack b721f9e800 dma: mmp_pdma: only complete one transaction from dma_do_tasklet()
Currently, when an interrupt has occured for a channel, the tasklet
worker code will only look at the very last entry in the running list
and complete its cookie, and then dispose the entire running chain.
Hence, the first transaction's cookie will never complete.

In fact, the interrupt we should handle will be the one related to the
first descriptor in the chain with the ENDIRQEN bit set, so complete
the second transaction that is in fact still running.

As a result, the driver can't currently handle multiple transactions on
one chanel, and it's likely that no drivers exist that rely on this
feature.

Fix this by walking the running_chain and look for the first
descriptor that has the interrupt-enable bit set. Only queue
descriptors up to that point for completion handling, while leaving
the rest intact. Also, only make the channel idle if the list is
completely empty after such a cycle.

Signed-off-by: Daniel Mack <zonque@gmail.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-08-25 22:04:52 +05:30
Andy Shevchenko b4d6d33676 acpi-dma: remove ugly conversion
In case of big endian CPU we have to convert either all fields in the structure
or leave this job to ACPICA. The second choice seems the best.

So, let's remove the ugly conversion that is not fully comprehensive anyway.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-08-25 16:43:45 +05:30
Dan Carpenter 5be2190af4 dmaengine: ste_dma40: off by one in d40_of_probe()
If "num_disabled" is equal to STEDMA40_MAX_PHYS (32) then we would write
one space beyond the end of the pdata->disable_channels[] array.

Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-08-25 16:23:32 +05:30
Fabio Estevam 3a919d5b43 dma: ste_dma: Fix warning when CONFIG_ARM_LPAE=y
When CONFIG_ARM_LPAE=y the following build warning are generated:

drivers/dma/ste_dma40.c:3228:2: warning: format '%x' expects argument of type 'unsigned int', but argument 4 has type 'resource_size_t' [-Wformat]
drivers/dma/ste_dma40.c:3582:3: warning: format '%x' expects argument of type 'unsigned int', but argument 4 has type 'resource_size_t' [-Wformat]
drivers/dma/ste_dma40.c:3582:3: warning: format '%x' expects argument of type 'unsigned int', but argument 5 has type 'resource_size_t' [-Wformat]
drivers/dma/ste_dma40.c:3593:5: warning: format '%x' expects argument of type 'unsigned int', but argument 5 has type 'resource_size_t' [-Wformat]

According to Documentation/printk-formats.txt '%pa' can be used to properly
print 'resource_size_t'.

Also, for printing memory region the '%pr' is more convenient.

Reported-by: Kevin Hilman <khilman@linaro.org>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Kevin Hilman <khilman@linaro.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-08-25 16:17:27 +05:30
Guenter Roeck 764480413b dma/Kconfig: TI_EDMA needs to be boolean
Fix:

arch/arm/common/built-in.o: undefined reference to `edma_filter_fn'

seen with "make ARCH=arm allmodconfig"

Commit 6cba4355 (ARM: edma: Add DT and runtime PM support to the private EDMA
API) adds a dependency on edma_filter_fn() into arch/arm/common/edma.c. Since
this file is always built into the kernel, edma_filter_fn() must be built into
the kernel as well.

Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-08-25 16:13:19 +05:30
Jingoo Han 4d1b80bf7a dma: ipu: remove unnecessary platform_set_drvdata()
The driver core clears the driver data to NULL after device_release
or on probe failure. Thus, it is not needed to manually clear the
device driver data to NULL.

Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-08-25 14:37:13 +05:30
Guennadi Liakhovetski 115357e977 DMA: shdma: switch all __iomem pointers to void
In the shdma driver __iomem pointers are used to point to hardware
registers.  Using typed pointers like "u32 __iomem *" in this case is
inconvenient, because then offsets, added to such pointers, have to be
devided by sizeof(u32) or similar. Switch the driver to use void
pointers, which avoids this clumsiness.

Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-08-25 11:54:35 +05:30
Guennadi Liakhovetski a28a94e84b DMA: shdma: fix CHCLR register address calculation
struct sh_dmae_device::chan_reg is a pointer to u32, therefore when adding
offsets to it care should be taken to add offsets in sizeof(u32) units, not
in bytes. This patch corrects such a bug. While at it we also remove the
redundant parameter of the affected function.

Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-08-25 11:48:22 +05:30
Paul Bolle e6a5fa6340 ioatdma: silence GCC warnings
Building dma_v3.o triggers a GCC warning:
    drivers/dma/ioat/dma_v3.c: In function ‘__ioat3_prep_pq16_lock’:
    drivers/dma/ioat/dma_v3.c:264:11: warning: array subscript is below array bounds [-Warray-bounds]
    drivers/dma/ioat/dma_v3.c:264:11: warning: array subscript is below array bounds [-Warray-bounds]

This warning is caused by pq16_set_src(). It uses "int idx" as an index
to an eight element array. Changing "idx" to "unsigned" silences this
warning. Apparently GCC can then determine that "idx" will never be
negative.

Signed-off-by: Paul Bolle <pebolle@tiscali.nl>
Acked-by: Dave Jiang <dave.jiang@intel.com>
Signed-off-by: Dan Williams <djbw@fb.com>
2013-08-23 00:21:44 -07:00
Brice Goglin c4d27c4d02 dmaengine: make dma_channel_rebalance() NUMA aware
dma_channel_rebalance() currently distributes channels by processor ID.
These IDs often change with the BIOS, and the order isn't related to
the DMA channel list (related to PCI bus ids).
* On my SuperMicro dual E5 machine, first socket has processor IDs [0-7]
  (and [16-23] for hyperthreads), second socket has [8-15]+[24-31]
  => channels are properly allocated to local CPUs.
* On Dells R720 with same processors, first socket has even processor IDs,
  second socket has odd numbers
  => half the processors get channels on the remote socket, causing
     cross-NUMA traffic and lower DMA performance.

Change nth_chan() to return the channel with min table_count and in the
NUMA node of the given CPU, if any. If none, the (non-local) channel with
min table_count is returned. nth_chan() is therefore renamed into min_chan()
since we don't iterate until the nth channel anymore. In practice, the
behavior is the same because first channels are taken first and are then
ignored because they got an additional reference.

The new code has a slightly higher complexity since we always scan the
entire list of channels for finding the minimal table_count (instead
of stopping after N chans), and because we check whether the CPU is in the
DMA device locality mask. Overall we still have time complexity =
number of chans x number of processors. This rebalance is rarely used,
so this won't hurt.

On the above SuperMicro machine, channels are still allocated the same.
On the Dells, there are no locality issue anymore (MEMCPY channel X goes
to processor X and to its hyperthread sibling).

Signed-off-by: Brice Goglin <Brice.Goglin@inria.fr>
Signed-off-by: Dan Williams <djbw@fb.com>
2013-08-22 22:57:51 -07:00
Brice Goglin c4dcf0e2dd ioatdma: disable RAID on non-Atom platforms and reenable unaligned copies
Disable RAID on non-Atom platform and remove related fixups such as the
64-byte alignement restriction on legacy DMA operations (introduced in
commit f26df1a1 as a workaround for silicon errata).

Signed-off-by: Brice Goglin <Brice.Goglin@inria.fr>
Acked-by: Dave Jiang <dave.jiang@intel.com>
Acked-by: Jon Mason <jon.mason@intel.com>
Signed-off-by: Dan Williams <djbw@fb.com>
2013-08-22 22:57:39 -07:00
Thomas Petazzoni e03bc654f8 mv_xor: support big endian systems using descriptor swap feature
The mv_xor driver had never been used in a big-endian context, and
therefore was not using the hardware features to support such an
execution environment. The hardware provides a "descriptor swap" bit
that automatically swaps the bytes of the DMA descriptors, within
blocks of 8 bytes. This requires a different DMA descriptor layout on
big-endian systems, as well as enabling this "descriptor swap" bit.

This mechanism is exactly identical to the one already used in the
mv643xx_eth network driver and the mvneta network driver.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Dan Williams <djbw@fb.com>
2013-08-22 22:57:37 -07:00
Thomas Petazzoni 5733c38ae3 mv_xor: use {readl, writel}_relaxed instead of __raw_{readl, writel}
In order to support big-endian execution, the mv_xor driver is changed
to use the readl_relaxed() and writel_relaxed() accessors that
properly convert from the CPU endianess to the device endianess (which
in the case of Marvell XOR hardware is always little-endian).

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Dan Williams <djbw@fb.com>
2013-08-22 22:57:36 -07:00
Andy Shevchenko ad5278cd8d dmatest: print message on debug level in case of no error
Let's move the behaviour of printing no error message back to the pre v3.10
times. It means we will use debug level in the described case, and a warning
level otherwise.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Dan Williams <djbw@fb.com>
2013-08-22 22:57:35 -07:00
Andy Shevchenko e24775e41f dmatest: remove IS_ERR_OR_NULL checks of debugfs calls
There is a really little chance when we are able to create a directory and are
not able to create nodes under it. So, this patch just removes those checks.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Dan Williams <djbw@fb.com>
2013-08-22 22:57:33 -07:00
Andy Shevchenko a6c268d033 dmatest: make module parameters writable
The debugfs interface brought a copy of the test case parameters. This makes
different set of values under /sys/module/dmatest/parameters/ and
/sys/kernel/debug/dmatest/. The user might be confused by the divergence of
values.

The proposed solution in this patch is to make module parameters writable and
remove them from the debugfs. Though we're still using debugfs to control test
runner and getting results.

Documentation part is updated accordingly.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Suggested-by: Dan Williams <djbw@fb.com>
Signed-off-by: Dan Williams <djbw@fb.com>
2013-08-22 22:57:32 -07:00
Andre Przywara b90ca0636c DMA: fix printk warning in AMBA PL08x DMA driver
In Rob's recent pull request the patch
	ARM: highbank: select ARCH_DMA_ADDR_T_64BIT for LPAE
promotes dma_addr_t to 64bit, so printk generates a warning about
an incorrect type. Fix this by casting it to u64 and using %llx.
Fixing long lines on the way.

Signed-off-by: Andre Przywara <andre.przywara@linaro.org>
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
2013-08-22 20:48:39 -05:00
Andre Przywara 1c38b28980 DMA: fix AMBA PL08x compilation issue with 64bit DMA address type
When dma_addr_t is 64 bits long, compilation of the AMBA PL08x DMA
driver breaks due to a missing 64bit%8bit modulo operation.
Looking more closely the divisor in these operations can only be
1, 2 or 4, so the full featured '%' modulo operation is overkill and
can be replaced with simple bit masking.

Change from v1:
Replace open-coded function with existing IS_ALIGNED macro and use a
macro around that to avoid a line becoming too long.

Signed-off-by: Andre Przywara <andre.przywara@linaro.org>
Acked-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
2013-08-22 20:48:38 -05:00
Lothar Waßmann 303fd71d3f dma: of: make error message more meaningful by adding the node name
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-08-19 14:45:05 +05:30
Shawn Guo b1baec525e dma: mxs-dma: remove code left from generic DMA binding conversion
With all mxs-dma clients moved to use generic DMA helper, the code
left from generic DMA binding conversion can be removed now.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-08-19 14:20:21 +05:30
Huang Shijie e8690fc2bc dma: imx-sdma: remove the unused completion
After the patch: "2ccaef0 dma: imx-sdma: make channel0 operations atomic",
the "done" completion is not used any more.

Just remove it.

Signed-off-by: Huang Shijie <b32955@freescale.com>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-08-19 14:16:19 +05:30
Vinod Koul d9a6c8f52d dmaengine: fix - error: potential NULL dereference 'chan'
commit 7bb587f4 "dmaengine: add interface of dma_get_slave_channel" introduced
the above error so fix it

Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Suggested-by: Zhangfei Gao <zhangfei.gao@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-08-19 10:48:13 +05:30
Greg Kroah-Hartman bd479f2933 Merge 3.11-rc6 into usb-next
We want these USB fixes in this branch as well.

Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2013-08-18 20:33:01 -07:00
Julia Lawall f2d04c3209 dma: mmp: simplify use of devm_ioremap_resource
Remove unneeded error handling on the result of a call to
platform_get_resource when the value is passed to devm_ioremap_resource.

A simplified version of the semantic patch that makes this change is as
follows: (http://coccinelle.lip6.fr/)

// <smpl>
@@
expression pdev,res,n,e,e1;
expression ret != 0;
identifier l;
@@

- res = platform_get_resource(pdev, IORESOURCE_MEM, n);
  ... when != res
- if (res == NULL) { ... \(goto l;\|return ret;\) }
  ... when != res
+ res = platform_get_resource(pdev, IORESOURCE_MEM, n);
  e = devm_ioremap_resource(e1, res);
// </smpl>

Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-08-14 14:51:28 +05:30
Daniel Mack 6fc4573c4e dma: mmp_pdma: add support for byte-aligned transfers
The PXA DMA controller has a DALGN register which allows for
byte-aligned DMA transfers. Use it in case any of the transfer
descriptors is not aligned to a mask of ~0x7.

Signed-off-by: Daniel Mack <zonque@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-08-14 13:55:16 +05:30
Daniel Mack 8fd6aac3a8 dma: mmp_pdma: remove duplicate assignment
The DMA_SLAVE is currently set twice.

Signed-off-by: Daniel Mack <zonque@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-08-14 13:55:16 +05:30
Daniel Mack 419d1f126b dma: mmp_pdma: print the number of channels at probe time
That helps check the provided runtime information.

Signed-off-by: Daniel Mack <zonque@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-08-14 13:55:16 +05:30
Daniel Mack a9a7cf08bd dma: mmp_pdma: make the controller a DMA provider
This patch makes the mmp_pdma controller able to provide DMA resources
in DT environments by providing an dma xlate function.

of_dma_simple_xlate() isn't used here, because if fails to handle
multiple different DMA engines or several instances of the same
controller. Instead, a private implementation is provided that makes use
of the newly introduced dma_get_slave_channel() call.

Signed-off-by: Daniel Mack <zonque@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-08-14 13:55:15 +05:30
Daniel Mack 13b3006b8e dma: mmp_pdma: add filter function
PXA peripherals need to obtain specific DMA request ids which will
eventually be stored in the DRCMR register.

Currently, clients are expected to store that number inside the slave
config block as slave_id, which is unfortunately incompatible with the
way DMA resources are handled in DT environments.

This patch adds a filter function which stores the filter parameter
passed in by of-dma.c into the channel's drcmr register.

For backward compatability, cfg->slave_id is still used if set to
a non-zero value.

Signed-off-by: Daniel Mack <zonque@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-08-14 13:55:15 +05:30
Daniel Mack 1ac0e845c1 dma: mmp_pdma: fix maximum transfer length
There's no reason for limiting the maximum transfer length to 0x1000.
Take the actual bit mask instead; the PDMA is able to transfer chunks of
up to SZ_8K - 1.

Signed-off-by: Daniel Mack <zonque@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-08-14 13:55:15 +05:30
Daniel Mack 638a542cc4 dma: mmp_pdma: refactor unlocking path in lookup_phy()
As suggested by Ezequiel García, release the spinlock at the end of the
function only, and use a goto for the control flow.

Just a minor cleanup.

Signed-off-by: Daniel Mack <zonque@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-08-14 13:55:15 +05:30
Daniel Mack 8b298ded90 dma: mmp_pdma: factor out DRCMR register calculation
The exact same calculation is done twice, so let's factor it out to a
macro.

Signed-off-by: Daniel Mack <zonque@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-08-14 13:55:15 +05:30
Vinod Koul aab81e47f5 Merge branch 'topic/of' into for-linus 2013-08-14 13:55:04 +05:30
Greg Kroah-Hartman 165f60642a usb: patches for v3.12 merge window
All patches here have been pending on linux-usb
 and sitting in linux-next for a while now.
 
 The biggest things in this tag are:
 
 DWC3 learned proper usage of threaded IRQ
 handlers and now we spend very little time
 in hardirq context.
 
 MUSB now has proper support for BeagleBone and
 Beaglebone Black.
 
 Tegra's USB support also got quite a bit of love
 and is learning to use PHY layer and generic DT
 attributes.
 
 Other than that, the usual pack of cleanups and
 non-critical fixes follow.
 
 Signed-of-by: Felipe Balbi <balbi@ti.com>
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Merge tag 'usb-for-v3.12' of git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb into usb-next

Felipe writes:

usb: patches for v3.12 merge window

All patches here have been pending on linux-usb
and sitting in linux-next for a while now.

The biggest things in this tag are:

DWC3 learned proper usage of threaded IRQ
handlers and now we spend very little time
in hardirq context.

MUSB now has proper support for BeagleBone and
Beaglebone Black.

Tegra's USB support also got quite a bit of love
and is learning to use PHY layer and generic DT
attributes.

Other than that, the usual pack of cleanups and
non-critical fixes follow.

Signed-of-by: Felipe Balbi <balbi@ti.com>

Conflicts:
	drivers/usb/gadget/udc-core.c
	drivers/usb/host/ehci-tegra.c
	drivers/usb/musb/omap2430.c
	drivers/usb/musb/tusb6010.c
2013-08-13 15:28:01 -07:00
Chanho Park 52a9d17910 dma: pl330: split off common code to give back descriptors
This patch adds __pl330_giveback_descs which give back descriptors when fails
allocating descriptors. It requires to eliminate duplication for
pl330_prep_dma_sg which will be added later.

Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Acked-by : Jassi Brar <jassisinghbrar@gmail.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-08-13 17:39:45 +05:30
Barry Song 2a76689bca dmaengine: sirf: add PM entries for sleep and runtime
this patch adds PM ops entries in sirf-dma drivers, so that this
driver can support suspend/resume, hibernation and runtime PM.

while suspending, sirf-dma will lose all registers, so we save
them at suspend and restore in resume for active channels.

Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Rongjun Ying <Rongjun.Ying@csr.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-08-13 17:01:01 +05:30
Jingoo Han d4adcc0160 dma: use dev_get_platdata()
Use the wrapper function for retrieving the platform data instead of
accessing dev->platform_data directly.

Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-08-13 16:56:41 +05:30
Jingoo Han 696b4ff8b2 dma: sirf: use NULL instead of 0
sirfsoc_dma_prep_cyclic() returns pointer, thus NULL should be
used instead of 0 in order to fix the following sparse warning:

drivers/dma/sirf-dma.c:598:24: warning: Using plain integer as NULL pointer

Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-08-13 16:54:42 +05:30
Jingoo Han 4c14372590 dma: mv_xor: use NULL instead of 0
%p is used, thus NULL should be used instead of 0
in order to fix the following sparse warning:

drivers/dma/mv_xor.c:648:9: warning: Using plain integer as NULL pointer

Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-08-13 16:54:42 +05:30
Jingoo Han 69c9f0ae1d dma: mmp_pdma: Staticize mmp_pdma_alloc_descriptor()
mmp_pdma_alloc_descriptor() is used only in this file.
Fix the following sparse warning:

drivers/dma/mmp_pdma.c:359:25: warning: symbol 'mmp_pdma_alloc_descriptor' was not declared. Should it be static?

Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-08-13 16:54:42 +05:30
Zhangfei Gao 7bb587f4ee dmaengine: add interface of dma_get_slave_channel
Suggested by Arnd, add dma_get_slave_channel interface
Dma host driver could get specific channel specificied by request line, rather than filter.

host example:
static struct dma_chan *xx_of_dma_simple_xlate(struct of_phandle_args *dma_spec,
		struct of_dma *ofdma)
{
	struct xx_dma_dev *d = ofdma->of_dma_data;
	unsigned int request = dma_spec->args[0];

	if (request > d->dma_requests)
		return NULL;

	return dma_get_slave_channel(&(d->chans[request].vc.chan));
}

probe:
of_dma_controller_register((&op->dev)->of_node, xx_of_dma_simple_xlate, d);

Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-08-13 16:32:59 +05:30
Sebastian Andrzej Siewior 9b3452d1fa usb: musb dma: add cppi41 dma driver
This driver is currently used by musb' cppi41 couter part. I may merge
both dma engine user of musb at some point but not just yet.

The driver seems to work in RX/TX mode in host mode, tested on mass
storage. I increaed the size of the TX / RX transfers and waited for the
core code to cancel a transfers and it seems to recover.

v2..3:
- use mall transfers on RX side and check data toggle.
- use rndis mode on tx side so we haveon interrupt for 4096 transfers.
- remove custom "transferred" hack and use dmaengine_tx_status() to
  compute the total amount of data that has been transferred.
- cancel transfers and reclaim descriptors

v1..v2:
- RX path added
- dma mode 0 & 1 is working
- device tree nodes re-created.

Cc: Vinod Koul <vinod.koul@intel.com>
Cc: Dan Williams <djbw@fb.com>
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Felipe Balbi <balbi@ti.com>
2013-08-09 17:40:16 +03:00
Linus Torvalds 67ef626506 ARM: SoC fixes for v3.11-rc
- MSM: GPIO fixes (includes old code removal)
 - OMAP: earlyprintk regression, AM33xx cpgmac PM regression
 - OMAP5: urgent fix for potentially harmful voltage regulator values
 - Renesas: gpio-keys fix, fix SD card detection, fix shdma calculation error
 - STi: critical SMP boot fix
 - tegra: DTS fix for usb-phy
 - a couple MAINTAINERS updates
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Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC fixes from Kevin Hilman:
 - MSM: GPIO fixes (includes old code removal)
 - OMAP: earlyprintk regression, AM33xx cpgmac PM regression
 - OMAP5: urgent fix for potentially harmful voltage regulator values
 - Renesas: gpio-keys fix, fix SD card detection, fix shdma calculation
   error
 - STi: critical SMP boot fix
 - tegra: DTS fix for usb-phy
 - a couple MAINTAINERS updates

(Arnd is on paternity leave, Kevin is stepping up to help arm-soc
maintenance)

* tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
  MAINTAINERS: add TI Keystone ARM platform
  MAINTAINERS: delete Srinidhi from ux500
  ARM: tegra: enable ULPI phy on Colibri T20
  ARM: STi: remove sti_secondary_start from INIT section.
  ARM: STi: Fix cpu nodes with correct device_type.
  ARM: shmobile: lager: do not annotate gpio_buttons as __initdata
  ARM: shmobile: BOCK-W: fix SDHI0 PFC settings
  shdma: fixup sh_dmae_get_partial() calculation error
  ARM: OMAP2+: hwmod: AM335x: fix cpgmac address space
  ARM: OMAP2+: hwmod: rt address space index for DT
  ARM: OMAP2+: Sync hwmod state with the pm_runtime and omap_device state
  ARM: OMAP2+: Avoid idling memory controllers with no drivers
  ARM: OMAP2+: hwmod: Fix a crash in _setup_reset() with DEBUG_LL
  ARM: dts: omap5-uevm: update optional/unused regulator configurations
  ARM: dts: omap5-uevm: fix regulator configurations mandatory for SoC
  ARM: dts: omap5-uevm: document regulator signals used on the actual board
  ARM: msm: Consolidate gpiomux for older architectures
  ARM: shmobile: armadillo800eva: Don't request GPIO 166 in board code
  ARM: msm: dts: Fix the gpio register address for msm8960
2013-08-08 09:28:08 -07:00
Xiang Wang 26a2dfdeb9 dma: mmp_pdma: clear DRCMR when free a phy channel
In mmp pdma, phy channels are allocated/freed dynamically.
The mapping from DMA request to DMA channel number in DRCMR
should be cleared when a phy channel is freed. Otherwise
conflicts will happen when:
1. A is using channel 2 and free it after finished, but A
still maps to channel 2 in DRCMR of A.
2. Now another one B gets channel 2. So B maps to channel 2
too in DRCMR of B.
In the datasheet, it is described that "Do not map two active
requests to the same channel since it produces unpredictable
results" and we can observe that during test.

Signed-off-by: Xiang Wang <wangx@marvell.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-08-05 09:32:27 +05:30
Xiang Wang 027f28b7bb dma: mmp_pdma: add protect when alloc/free phy channels
In mmp pdma, phy channels are allocated/freed dynamically
and frequently. But no proper protection is added.
Conflict will happen when multi-users are requesting phy
channels at the same time. Use spinlock to protect.

Signed-off-by: Xiang Wang <wangx@marvell.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-08-05 09:32:26 +05:30
Andy Shevchenko effd5cf6fe dma: dw: return DMA_PAUSED only if cookie status is DMA_IN_PROGRESS
To obey a usual practice let's return DMA_PAUSED status only if
dma_cookie_status returned DMA_IN_PROGRESS.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-08-05 09:32:26 +05:30
Andy Shevchenko 12381dc0c7 dma: dw: return DMA_SUCCESS immediately from device_tx_status()
There is no point to go throught the rest of the function if first call to
dma_cookie_status() returned DMA_SUCCESS.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-08-05 09:32:26 +05:30
Andy Shevchenko 3783cef876 dma: dw: allow shared interrupts
In the PC world is quite possible that devices are sharing the same interrupt
line. The patch prepares dw_dmac driver to such cases.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-08-05 09:32:26 +05:30
Andy Shevchenko 78f3c9d2e0 dma: dw: improve comparison with ~0
In general ~0 does not fit some integer types. Let's do a helper to make a
comparison with that constant properly.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-08-05 09:32:26 +05:30
Andy Shevchenko be480dcbb5 dma: dw: append MODULE_DEVICE_TABLE for ACPI case
In rare cases (mostly for the testing purposes) the dw_dmac driver might be
compiled as a module as well as the other LPSS device drivers (I2C, SPI,
HSUART). When udev handles the event of the devices appearing the dw_dmac
module is missing. This patch will fix that.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-08-05 09:32:26 +05:30
Andy Shevchenko 4aed508fc5 acpi-dma: fix sparse warning
This patch fixes sparse warning:
	drivers/dma/acpi-dma.c:76:21: sparse: cast to restricted __le32

Since everything in all ACPI tables is little-endian, by definition, the used
types in practice are uXX. Thus, we have to enforce __leXX if we want to
convert them to CPU order.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-08-05 09:32:25 +05:30
Andy Shevchenko 985a0cb970 txx9dmac: return DMA_SUCCESS immediately from device_tx_status()
There is no point to go throught the rest of the function if first call to
dma_cookie_status() returned DMA_SUCCESS.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-08-05 09:32:25 +05:30
Andy Shevchenko c14d2bc470 mmp_tdma: set cookies as well when asked for tx status
dma_set_residue() sets only residue value, so user can't rely on the returned
values of cookies. That patch standardize the behaviour.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-08-05 09:32:25 +05:30
Andy Shevchenko c6c732cf9f ipu_idmac: re-use dma_cookie_status()
It's better to use generic dma_cookie_status() that allows user to get standard
possible return codes independently of the DMAC driver in charge.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-08-05 09:32:25 +05:30
Andy Shevchenko 0a0aee203c tegra20-apb-dma: remove useless use of lock
Accordingly to dma_cookie_status() description locking is not required.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: linux-tegra@vger.kernel.org
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-08-05 09:32:25 +05:30
Andy Shevchenko da0a908ed9 pch_dma: remove useless use of lock
Accordingly to dma_cookie_status() description locking is not required.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-08-05 09:32:25 +05:30
Andy Shevchenko 108fae842a mpc512x_dma: remove useless use of lock
Accordingly to dma_cookie_status() description locking is not required.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-08-05 09:32:25 +05:30
Andy Shevchenko 4aa9fe0a1f mmp_pdma: remove useless use of lock
Accordingly to dma_cookie_status() description locking is not required.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-08-05 09:32:24 +05:30
Andy Shevchenko 9b0b0bdc6a fsldma: remove useless use of lock
Accordingly to dma_cookie_status() description locking is not required.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Cc: Li Yang <leoli@freescale.com>
Cc: Zhang Wei <zw@zh-kernel.org>
Cc: linuxppc-dev@lists.ozlabs.org
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-08-05 09:32:24 +05:30
Andy Shevchenko 2302cec224 ep93xx_dma: remove useless use of lock
Accordingly to dma_cookie_status() description locking is not required.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-08-05 09:32:24 +05:30
Andy Shevchenko 43e33e484e edma: no need to assign residue to 0 explicitly
Residue value is assigned to 0 by dma_cookie_status().

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-08-05 09:32:24 +05:30
Andy Shevchenko 09d16690cb mxs-dma: remove useless variable
last_used variable is applied only once, so, let's substitute it by its value.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-08-05 09:32:24 +05:30
Andy Shevchenko e8e3a79001 imx-sdma: remove useless variable
last_used variable is applied only once, so, let's substitute it by its value.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-08-05 09:32:24 +05:30
Kuninori Morimoto 3c4d927662 shdma: fixup sh_dmae_get_partial() calculation error
sh_desc->hw.tcr is controlling real data size,
and, register TCR is controlling data transfer count
which was xmit_shifted value of hw.tcr.
Current sh_dmae_get_partial() is calculating in different unit.
This patch fixes it.

This bug has been present since c014906a87
("dmaengine: shdma: extend .device_terminate_all() to record partial
transfer"), which was added in 2.6.34-rc1.

Cc: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-07-31 10:10:17 +09:00
Lars-Peter Clausen fc51446021 dma: pl330: Fix cyclic transfers
Allocate a descriptor for each period of a cyclic transfer, not just the first.
Also since the callback needs to be called for each finished period make sure to
initialize the callback and callback_param fields of each descriptor in a cyclic
transfer.

Cc: stable@vger.kernel.org
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-07-28 19:08:33 +05:30
Greg Kroah-Hartman 58b267d3e3 dma: convert dma_devclass to use dev_groups
The dev_attrs field of struct class is going away soon, dev_groups
should be used instead.  This converts the dma dma_devclass code to use
the correct field.

Cc: Dan Williams <djbw@fb.com>
Acked-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2013-07-25 16:34:39 -07:00
Wei Yongjun 27abb2ffb0 pch_dma: fix error return code in pch_dma_probe()
Fix to return -ENODEV when no proper base address found error
handling case instead of 0, as done elsewhere in this function.

Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-07-22 14:54:23 +05:30
Lars-Peter Clausen ca38ff133e dma: pl330: Implement device_slave_caps
Implement the device_slave_caps() callback for the pl330 driver. This allows
dmaengine users like the generic ALSA dmaengine PCM driver to query the
capabilities of the driver. The PL330 supports all buswidths and both
mem-to-dev as well as dev-to-mem transfers. In theory there is no limit on the
number of segments that can be transferred (in practice you'll run out of memory
eventually) and the number of bytes per segment is limited by the size of the
PL330 program buffer. Due to the nature of the PL330 the maximum number of bytes
per segment depends on the burstsize, the driver sets it to the value for a
1-byte burstsize, since it is the smallest.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-07-15 21:58:38 +05:30
Olof Johansson f9f0a7d0dc drivers/dma/iop-adma.c: fix new warnings
The recent "drivers/dma: remove unused support for MEMSET operations"
change has fallout from lack of build testing by the author.  This
fixes:

  drivers/dma/iop-adma.c:1020:13: warning: unused variable 'dma_addr' [-Wunused-variable]
  drivers/dma/iop-adma.c:1519:2: warning: format '%s' expects a matching 'char *' argument [-Wformat=]

Signed-off-by: Olof Johansson <olof@lixom.net>
Cc: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Cc: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2013-07-09 10:33:19 -07:00
Linus Torvalds d2b4a64671 Merge branch 'for-linus' of git://git.infradead.org/users/vkoul/slave-dma
Pull slave-dmaengine updates from Vinod Koul:
 "Once you have some time from extended weekend celebrations please
  consider pulling the following to get:
   - Various fixes and PCI driver for dw_dmac by Andy
   - DT binding for imx-dma by Markus & imx-sdma by Shawn
   - DT fixes for dmaengine by Lars
   - jz4740 dmac driver by Lars
   - and various fixes across the drivers"

What "extended weekend celebrations"?  I'm in the merge window, who has
time for extended celebrations..

* 'for-linus' of git://git.infradead.org/users/vkoul/slave-dma: (40 commits)
  DMA: shdma: add DT support
  DMA: shdma: shdma_chan_filter() has to be in shdma-base.h
  DMA: shdma: (cosmetic) don't re-calculate a pointer
  dmaengine: at_hdmac: prepare clk before calling enable
  dmaengine/trivial: at_hdmac: add curly brackets to if/else expressions
  dmaengine: at_hdmac: remove unsuded atc_cleanup_descriptors()
  dmaengine: at_hdmac: add FIFO configuration parameter to DMA DT binding
  ARM: at91: dt: add header to define at_hdmac configuration
  MIPS: jz4740: Correct clock gate bit for DMA controller
  MIPS: jz4740: Remove custom DMA API
  MIPS: jz4740: Register jz4740 DMA device
  dma: Add a jz4740 dmaengine driver
  MIPS: jz4740: Acquire and enable DMA controller clock
  dma: mmp_tdma: disable irq when disabling dma channel
  dmaengine: PL08x: Avoid collisions with get_signal() macro
  dmaengine: dw: select DW_DMAC_BIG_ENDIAN_IO automagically
  dma: dw: add PCI part of the driver
  dma: dw: split driver to library part and platform code
  dma: move dw_dmac driver to an own directory
  dw_dmac: don't check resource with devm_ioremap_resource
  ...
2013-07-07 11:11:43 -07:00
Guennadi Liakhovetski 67eacc1583 DMA: shdma: add DT support
This patch adds Device Tree support to the shdma driver. No special DT
properties are used, only standard DMA DT bindings are implemented. Since
shdma controllers reside on SoCs, their configuration is SoC-specific and
shall be passed to the driver from the SoC platform data, using the
auxdata procedure.

Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-07-05 11:41:00 +05:30
Guennadi Liakhovetski fa74326c44 DMA: shdma: (cosmetic) don't re-calculate a pointer
Use an existing pointer instead of retrieving it again.

Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-07-05 11:40:58 +05:30
Boris BREZILLON f784d9c904 dmaengine: at_hdmac: prepare clk before calling enable
Replace clk_enable/disable with clk_prepare_enable/disable_unprepare to
avoid common clk framework warnings.

Signed-off-by: Boris BREZILLON <b.brezillon@overkiz.com>
[nicolas.ferre@atmel.com: remove return code checking in at_dma_resume_noirq()]
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2013-07-05 11:40:57 +05:30
Nicolas Ferre c3dbc60c9b dmaengine/trivial: at_hdmac: add curly brackets to if/else expressions
Correct coding style following the patch:
7c407d3e54dcc0c79119553c8d5ef176c1d5bc3a (DMA: AT91:
Get residual bytes in dma buffer).

Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2013-07-05 11:40:56 +05:30
Nicolas Ferre 538eea6c7c dmaengine: at_hdmac: remove unsuded atc_cleanup_descriptors()
Since patch 7c407d3e54dcc0c79119553c8d5ef176c1d5bc3a (DMA: AT91:
Get residual bytes in dma buffer), the function
atc_cleanup_descriptors() is not used anymore. We remove it to prevent
warnings.

Reported-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
2013-07-05 11:40:55 +05:30
Ludovic Desroches 62971b2982 dmaengine: at_hdmac: add FIFO configuration parameter to DMA DT binding
For most devices the FIFO configuration is the same i.e. when half FIFO size is
available/filled, a source/destination request is serviced. But USART devices
have to do it when there is enough space/data available to perform a single
AHB access so the ASAP configuration.

Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2013-07-05 11:40:54 +05:30
Lars-Peter Clausen 25ce6c35fe MIPS: jz4740: Remove custom DMA API
Now that all users of the custom jz4740 DMA API have been converted to use
the dmaengine API instead we can remove the custom API and move all the code
talking to the hardware to the dmaengine driver.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Acked-by: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-07-05 11:40:52 +05:30
Lars-Peter Clausen 7c169a42d9 dma: Add a jz4740 dmaengine driver
This patch adds dmaengine support for the JZ4740 DMA controller. For now the
driver will be a wrapper around the custom JZ4740 DMA API. Once all users of the
custom JZ4740 DMA API have been converted to the dmaengine API the custom API
will be removed and direct hardware access will be added to the dmaengine
driver.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-07-05 11:40:50 +05:30
Qiao Zhou 8e3c518fba dma: mmp_tdma: disable irq when disabling dma channel
mask dma irq when disabling dma channel, so that interrupt status
will not be set and interrupt won't come again.

Signed-off-by: Qiao Zhou <zhouqiao@marvell.com>
Acked-by: Zhangfei Gao <zhangfei.gao@gmail.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-07-05 11:40:48 +05:30
Mark Brown d7cabeed83 dmaengine: PL08x: Avoid collisions with get_signal() macro
As pointed out by Arnd Bergmann there is a get_signal macro definied in
linux/signal.h which can conflict with the platform data callback
function of the same name leading to confusing errors from the compiler
(especially if signal.h manages to get pulled into the driver itself due
to header dependencies).  Avoid such errors by renaming get_signal and
put_signal in the platform data to get_xfer_signal and put_xfer_signal.

Signed-off-by: Mark Brown <broonie@linaro.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-07-05 11:40:47 +05:30
Vinod Koul e368b510c0 dmaengine: dw: select DW_DMAC_BIG_ENDIAN_IO automagically
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-07-05 11:40:46 +05:30
Andy Shevchenko fed42c198b dma: dw: add PCI part of the driver
This is the PCI part of the DesignWare DMAC driver. The controller is usually
used in the Intel hardware such as Intel Medfield.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-07-05 11:40:45 +05:30
Andy Shevchenko 9cade1a46c dma: dw: split driver to library part and platform code
To simplify the driver development let's split driver to library and platform
code parts. It helps us to add PCI driver in future.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
[Fixed compile error and few checkpatch issues]
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-07-05 11:40:44 +05:30
Andy Shevchenko 61a7649620 dma: move dw_dmac driver to an own directory
The dw_dmac driver is going to be split into multiple files. To make this more
convenient move it to an own directory.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-07-05 11:40:43 +05:30
Andy Shevchenko 0b95961e03 dw_dmac: don't check resource with devm_ioremap_resource
devm_ioremap_resource does sanity checks on the given resource. No need to
duplicate this in the driver.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-07-05 11:40:42 +05:30
Will Deacon fed8c45727 dma: pl330: use dma_addr_t for describing bus addresses
The microcode bus address (pl330_dmac.mcode_bus) is currently a u32,
which fails to compile when building on a system with 64-bit bus
addresses.

This patch uses dma_addr_t to represent the address instead.

Cc: Jassi Brar <jaswinder.singh@linaro.org>
Cc: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Acked-by: Jassi Brar <jaswinder.singh@linaro.org>
Acked-by: Grant Likely <grant.likely@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-07-05 11:40:42 +05:30
Will Deacon 0967717661 dma: pl330: rip out broken, redundant ID probing
The PL330 driver probes the peripheral and primecell IDs of the device to
make sure that it is indeed an AMBA PL330. However, it does this by
making byte accesses to a device mapping of the word-aligned ID
registers, which is either UNPREDICTABLE or generates an alignment fault
(depending on the presence of the virtualisation extensions).

Rather than fix this code, we can actually rip most of it out and let
the AMBA bus driver correctly do the probing for us.

Cc: Jassi Brar <jaswinder.singh@linaro.org>
Cc: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Acked-by: Jassi Brar <jaswinder.singh@linaro.org>
Acked-by: Grant Likely <grant.likely@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-07-05 11:40:41 +05:30
Shawn Guo 9479e17c9b dma: imx-sdma: move to generic device tree bindings
Update imx-sdma driver to adopt generic DMA device tree bindings.  It
calls of_dma_controller_register() with imx-sdma specific of_dma_xlate
to get the generic DMA device tree helper support.  The #dma-cells for
imx-sdma must be 3, which includes request ID, peripheral type and
priority.

The existing way of requesting channel, clients directly call
dma_request_channel(), still work there, and will be removed after
all imx-sdma clients get converted to generic DMA device tree helper.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
2013-07-05 11:40:40 +05:30
Rongjun Ying add93b578e dmaengine: sirf: set dma residue based on the current dma transfer position
read SIRFSOC_DMA_CH_ADDR register to get current dma transfer position, then
update dma residue so that things like ALSA drivers work as ALSA drivers need
the right residue value.

Signed-off-by: Rongjun Ying <Rongjun.Ying@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-07-05 11:40:39 +05:30
Dmitry Osipenko 7bdc1e272a dma: tegra: avoid channel lock up after free
Lock scenario: Channel 1 was allocated and prepared as slave_sg, used and freed.
Now preparation of cyclic dma on channel 1 will fail with err "DMA configuration
conflict" because tdc->isr_handler still setted to handle_once_dma_done.

This happens because tegra_dma_abort_all() won't be called on channel freeing
if pending list is empty and channel not busy. We need to clear isr_handler
on channel freeing to avoid locking.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-07-05 11:40:38 +05:30
Dmitry Osipenko ac7ae754d5 dma: tegra20-apbdma: err message correction
Fixed err msg params order on irq request fail.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-07-05 11:40:37 +05:30
Denis Efremov 8004cbb481 dw_dmac: remove inline marking of EXPORT_SYMBOL functions
EXPORT_SYMBOL and inline directives are contradictory to each other.
The patch fixes this inconsistency.

Found by Linux Driver Verification project (linuxtesting.org).
Signed-off-by: Denis Efremov <yefremov.denis@gmail.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-07-05 11:40:36 +05:30
Jingoo Han c1a9d391ad dma: timb_dma: remove unnecessary platform_set_drvdata()
The driver core clears the driver data to NULL after device_release
or on probe failure, since commit 0998d06310
(device-core: Ensure drvdata = NULL when no driver is bound).
Thus, it is not needed to manually clear the device driver data to NULL.

Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-07-05 11:40:35 +05:30
Jingoo Han 36c6df5062 dma: at_hdmac: remove unnecessary platform_set_drvdata()
The driver core clears the driver data to NULL after device_release
or on probe failure, since commit 0998d06310
(device-core: Ensure drvdata = NULL when no driver is bound).
Thus, it is not needed to manually clear the device driver data to NULL.

Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-07-05 11:40:34 +05:30
Fabio Estevam 3208b3701b dma: mxs-dma: Staticize mxs_dma_xlate
Fix the following sparse warning:

drivers/dma/mxs-dma.c:696:17: warning: symbol 'mxs_dma_xlate' was not declared. Should it be static?

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-07-05 11:40:33 +05:30
Jingoo Han dd3daca162 dma: use platform_{get,set}_drvdata()
Use the wrapper functions for getting and setting the driver data using
platform_device instead of using dev_{get,set}_drvdata() with &pdev->dev,
so we can directly pass a struct platform_device.

Also, unnecessary dev_set_drvdata() is removed, because the driver core
clears the driver data to NULL after device_release or on probe failure.

Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-07-05 11:40:32 +05:30
Elen Song d48de6f1a8 DMA: AT91: Get residual bytes in dma buffer
Add support for returning the residue for current transfer cookie by
reading the transfered buffer size(BTSIZE) in CTRLA register.

For a single buffer cookie, the descriptor length minus BTSIZE
can get the residue.

For a lli cookie, remain_desc will record remain descriptor length
when last descriptor finish, the remain_desc minus BTSIZE can get the
current residue.

If the cookie has completed successfully, the residue will be zero.
If the cookie is in progress, it will be the number of bytes yet to be transferred.
If get residue error, the cookie will be turn into error status.

Check dma fifo to see if data remain, let issue pending finish remain work if there is.
Signed-off-by: Elen Song <elen.song@atmel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-07-05 11:40:31 +05:30
Elen Song d088c33b64 DMA: AT91: Get transfer width
In one dma transfer, the data transfer width can be configured and it is limited by source or destination peripheral width,
tx_width will save the transfer width, but for memcpy, either source or destination transfer width is taken as tx_width.

Signed-off-by: Elen Song <elen.song@atmel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-07-05 11:40:30 +05:30
Nicolas Ferre 6c22770f64 dmaengine: at_hdmac/trivial: rearrange CFG register bits assignment
No modification in CFG register configuration, just rearrange
bits directives to group logically and make it more readable.

Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-07-05 11:40:29 +05:30
Nicolas Ferre 72ae6e4b31 dmaengine: at_hdmac: extend hardware handshaking interface identification
Peripheral handshaking identification numbers can be bigger than 15, so new
fields have been created in the CFG register.
Add macros to take this modification into account and use them in
at_dma_xlate() function.

Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-07-05 11:40:29 +05:30
Nicolas Ferre ea7e79063e dmaengine: at_hdmac/trivial: correct typo in comment
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-07-05 11:40:28 +05:30
Markus Pargmann 5c6b3e7725 DMA: imx-dma: imxdma->dev used uninitialized
imxdma->dev is used for dev_warn before it was set.

Signed-off-by: Markus Pargmann <mpa@pengutronix.de>
Reviewed-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-07-05 11:40:27 +05:30
Markus Pargmann 290ad0f9d9 dma: imx-dma: Add oftree support
Adding devicetree support for imx-dma driver. Use driver name for
function 'imx_dma_is_general_purpose' because the devicename for
devicetree initialized devices is different.

Signed-off-by: Markus Pargmann <mpa@pengutronix.de>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-07-05 11:40:26 +05:30
Linus Torvalds 7f0ef0267e Merge branch 'akpm' (updates from Andrew Morton)
Merge first patch-bomb from Andrew Morton:
 - various misc bits
 - I'm been patchmonkeying ocfs2 for a while, as Joel and Mark have been
   distracted.  There has been quite a bit of activity.
 - About half the MM queue
 - Some backlight bits
 - Various lib/ updates
 - checkpatch updates
 - zillions more little rtc patches
 - ptrace
 - signals
 - exec
 - procfs
 - rapidio
 - nbd
 - aoe
 - pps
 - memstick
 - tools/testing/selftests updates

* emailed patches from Andrew Morton <akpm@linux-foundation.org>: (445 commits)
  tools/testing/selftests: don't assume the x bit is set on scripts
  selftests: add .gitignore for kcmp
  selftests: fix clean target in kcmp Makefile
  selftests: add .gitignore for vm
  selftests: add hugetlbfstest
  self-test: fix make clean
  selftests: exit 1 on failure
  kernel/resource.c: remove the unneeded assignment in function __find_resource
  aio: fix wrong comment in aio_complete()
  drivers/w1/slaves/w1_ds2408.c: add magic sequence to disable P0 test mode
  drivers/memstick/host/r592.c: convert to module_pci_driver
  drivers/memstick/host/jmb38x_ms: convert to module_pci_driver
  pps-gpio: add device-tree binding and support
  drivers/pps/clients/pps-gpio.c: convert to module_platform_driver
  drivers/pps/clients/pps-gpio.c: convert to devm_* helpers
  drivers/parport/share.c: use kzalloc
  Documentation/accounting/getdelays.c: avoid strncpy in accounting tool
  aoe: update internal version number to v83
  aoe: update copyright date
  aoe: perform I/O completions in parallel
  ...
2013-07-03 17:12:13 -07:00
Bartlomiej Zolnierkiewicz 48a9db462d drivers/dma: remove unused support for MEMSET operations
There have never been any real users of MEMSET operations since they
have been introduced in January 2007 by commit 7405f74bad ("dmaengine:
refactor dmaengine around dma_async_tx_descriptor").  Therefore remove
support for them for now, it can be always brought back when needed.

[sebastian.hesselbarth@gmail.com: fix drivers/dma/mv_xor]
Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Cc: Vinod Koul <vinod.koul@intel.com>
Acked-by: Dan Williams <djbw@fb.com>
Cc: Tomasz Figa <t.figa@samsung.com>
Cc: Herbert Xu <herbert@gondor.apana.org.au>
Cc: Olof Johansson <olof@lixom.net>
Cc: Kevin Hilman <khilman@linaro.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2013-07-03 16:07:42 -07:00
Bartlomiej Zolnierkiewicz da331ba8e9 drivers/dma/pl330.c: fix locking in pl330_free_chan_resources()
tasklet_kill() may sleep so call it before taking pch->lock.

Fixes following lockup:

  BUG: scheduling while atomic: cat/2383/0x00000002
  Modules linked in:
    unwind_backtrace+0x0/0xfc
    __schedule_bug+0x4c/0x58
    __schedule+0x690/0x6e0
    sys_sched_yield+0x70/0x78
    tasklet_kill+0x34/0x8c
    pl330_free_chan_resources+0x24/0x88
    dma_chan_put+0x4c/0x50
  [...]
  BUG: spinlock lockup suspected on CPU#0, swapper/0/0
   lock: 0xe52aa04c, .magic: dead4ead, .owner: cat/2383, .owner_cpu: 1
    unwind_backtrace+0x0/0xfc
    do_raw_spin_lock+0x194/0x204
    _raw_spin_lock_irqsave+0x20/0x28
    pl330_tasklet+0x2c/0x5a8
    tasklet_action+0xfc/0x114
    __do_softirq+0xe4/0x19c
    irq_exit+0x98/0x9c
    handle_IPI+0x124/0x16c
    gic_handle_irq+0x64/0x68
    __irq_svc+0x40/0x70
    cpuidle_wrap_enter+0x4c/0xa0
    cpuidle_enter_state+0x18/0x68
    cpuidle_idle_call+0xac/0xe0
    cpu_idle+0xac/0xf0

Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Jassi Brar <jassisinghbrar@gmail.com>
Cc: Vinod Koul <vinod.koul@linux.intel.com>
Cc: Tomasz Figa <t.figa@samsung.com>
Cc: <stable@vger.kernel.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2013-07-03 16:07:22 -07:00
Linus Torvalds f991fae5c6 Power management and ACPI updates for 3.11-rc1
- Hotplug changes allowing device hot-removal operations to fail
   gracefully (instead of crashing the kernel) if they cannot be
   carried out completely.  From Rafael J Wysocki and Toshi Kani.
 
 - Freezer update from Colin Cross and Mandeep Singh Baines targeted
   at making the freezing of tasks a bit less heavy weight operation.
 
 - cpufreq resume fix from Srivatsa S Bhat for a regression introduced
   during the 3.10 cycle causing some cpufreq sysfs attributes to
   return wrong values to user space after resume.
 
 - New freqdomain_cpus sysfs attribute for the acpi-cpufreq driver to
   provide information previously available via related_cpus from
   Lan Tianyu.
 
 - cpufreq fixes and cleanups from Viresh Kumar, Jacob Shin,
   Heiko Stübner, Xiaoguang Chen, Ezequiel Garcia, Arnd Bergmann, and
   Tang Yuantian.
 
 - Fix for an ACPICA regression causing suspend/resume issues to
   appear on some systems introduced during the 3.4 development cycle
   from Lv Zheng.
 
 - ACPICA fixes and cleanups from Bob Moore, Tomasz Nowicki, Lv Zheng,
   Chao Guan, and Zhang Rui.
 
 - New cupidle driver for Xilinx Zynq processors from Michal Simek.
 
 - cpuidle fixes and cleanups from Daniel Lezcano.
 
 - Changes to make suspend/resume work correctly in Xen guests from
   Konrad Rzeszutek Wilk.
 
 - ACPI device power management fixes and cleanups from Fengguang Wu
   and Rafael J Wysocki.
 
 - ACPI documentation updates from Lv Zheng, Aaron Lu and Hanjun Guo.
 
 - Fix for the IA-64 issue that was the reason for reverting commit
   9f29ab1 and updates of the ACPI scan code from Rafael J Wysocki.
 
 - Mechanism for adding CMOS RTC address space handlers from Lan Tianyu
   (to allow some EC-related breakage to be fixed on some systems).
 
 - Spec-compliant implementation of acpi_os_get_timer() from
   Mika Westerberg.
 
 - Modification of do_acpi_find_child() to execute _STA in order to
   to avoid situations in which a pointer to a disabled device object
   is returned instead of an enabled one with the same _ADR value.
   From Jeff Wu.
 
 - Intel BayTrail PCH (Platform Controller Hub) support for the ACPI
   Intel Low-Power Subsystems (LPSS) driver and modificaions of that
   driver to work around a couple of known BIOS issues from
   Mika Westerberg and Heikki Krogerus.
 
 - EC driver fix from Vasiliy Kulikov to make it use get_user() and
   put_user() instead of dereferencing user space pointers blindly.
 
 - Assorted ACPI code cleanups from Bjorn Helgaas, Nicholas Mazzuca and
   Toshi Kani.
 
 - Modification of the "runtime idle" helper routine to take the return
   values of the callbacks executed by it into account and to call
   rpm_suspend() if they return 0, which allows some code bloat
   reduction to be done, from Rafael J Wysocki and Alan Stern.
 
 - New trace points for PM QoS from Sahara <keun-o.park@windriver.com>.
 
 - PM QoS documentation update from Lan Tianyu.
 
 - Assorted core PM code cleanups and changes from Bernie Thompson,
   Bjorn Helgaas, Julius Werner, and Shuah Khan.
 
 - New devfreq driver for the Exynos5-bus device from Abhilash Kesavan.
 
 - Minor devfreq cleanups, fixes and MAINTAINERS update from
   MyungJoo Ham, Abhilash Kesavan, Paul Bolle, Rajagopal Venkat, and
   Wei Yongjun.
 
 - OMAP Adaptive Voltage Scaling (AVS) SmartReflex voltage control
   driver updates from Andrii Tseglytskyi and Nishanth Menon.
 
 /
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Merge tag 'pm+acpi-3.11-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm

Pull power management and ACPI updates from Rafael Wysocki:
 "This time the total number of ACPI commits is slightly greater than
  the number of cpufreq commits, but Viresh Kumar (who works on cpufreq)
  remains the most active patch submitter.

  To me, the most significant change is the addition of offline/online
  device operations to the driver core (with the Greg's blessing) and
  the related modifications of the ACPI core hotplug code.  Next are the
  freezer updates from Colin Cross that should make the freezing of
  tasks a bit less heavy weight.

  We also have a couple of regression fixes, a number of fixes for
  issues that have not been identified as regressions, two new drivers
  and a bunch of cleanups all over.

  Highlights:

   - Hotplug changes to support graceful hot-removal failures.

     It sometimes is necessary to fail device hot-removal operations
     gracefully if they cannot be carried out completely.  For example,
     if memory from a memory module being hot-removed has been allocated
     for the kernel's own use and cannot be moved elsewhere, it's
     desirable to fail the hot-removal operation in a graceful way
     rather than to crash the kernel, but currenty a success or a kernel
     crash are the only possible outcomes of an attempted memory
     hot-removal.  Needless to say, that is not a very attractive
     alternative and it had to be addressed.

     However, in order to make it work for memory, I first had to make
     it work for CPUs and for this purpose I needed to modify the ACPI
     processor driver.  It's been split into two parts, a resident one
     handling the low-level initialization/cleanup and a modular one
     playing the actual driver's role (but it binds to the CPU system
     device objects rather than to the ACPI device objects representing
     processors).  That's been sort of like a live brain surgery on a
     patient who's riding a bike.

     So this is a little scary, but since we found and fixed a couple of
     regressions it caused to happen during the early linux-next testing
     (a month ago), nobody has complained.

     As a bonus we remove some duplicated ACPI hotplug code, because the
     ACPI-based CPU hotplug is now going to use the common ACPI hotplug
     code.

   - Lighter weight freezing of tasks.

     These changes from Colin Cross and Mandeep Singh Baines are
     targeted at making the freezing of tasks a bit less heavy weight
     operation.  They reduce the number of tasks woken up every time
     during the freezing, by using the observation that the freezer
     simply doesn't need to wake up some of them and wait for them all
     to call refrigerator().  The time needed for the freezer to decide
     to report a failure is reduced too.

     Also reintroduced is the check causing a lockdep warining to
     trigger when try_to_freeze() is called with locks held (which is
     generally unsafe and shouldn't happen).

   - cpufreq updates

     First off, a commit from Srivatsa S Bhat fixes a resume regression
     introduced during the 3.10 cycle causing some cpufreq sysfs
     attributes to return wrong values to user space after resume.  The
     fix is kind of fresh, but also it's pretty obvious once Srivatsa
     has identified the root cause.

     Second, we have a new freqdomain_cpus sysfs attribute for the
     acpi-cpufreq driver to provide information previously available via
     related_cpus.  From Lan Tianyu.

     Finally, we fix a number of issues, mostly related to the
     CPUFREQ_POSTCHANGE notifier and cpufreq Kconfig options and clean
     up some code.  The majority of changes from Viresh Kumar with bits
     from Jacob Shin, Heiko Stübner, Xiaoguang Chen, Ezequiel Garcia,
     Arnd Bergmann, and Tang Yuantian.

   - ACPICA update

     A usual bunch of updates from the ACPICA upstream.

     During the 3.4 cycle we introduced support for ACPI 5 extended
     sleep registers, but they are only supposed to be used if the
     HW-reduced mode bit is set in the FADT flags and the code attempted
     to use them without checking that bit.  That caused suspend/resume
     regressions to happen on some systems.  Fix from Lv Zheng causes
     those registers to be used only if the HW-reduced mode bit is set.

     Apart from this some other ACPICA bugs are fixed and code cleanups
     are made by Bob Moore, Tomasz Nowicki, Lv Zheng, Chao Guan, and
     Zhang Rui.

   - cpuidle updates

     New driver for Xilinx Zynq processors is added by Michal Simek.

     Multidriver support simplification, addition of some missing
     kerneldoc comments and Kconfig-related fixes come from Daniel
     Lezcano.

   - ACPI power management updates

     Changes to make suspend/resume work correctly in Xen guests from
     Konrad Rzeszutek Wilk, sparse warning fix from Fengguang Wu and
     cleanups and fixes of the ACPI device power state selection
     routine.

   - ACPI documentation updates

     Some previously missing pieces of ACPI documentation are added by
     Lv Zheng and Aaron Lu (hopefully, that will help people to
     uderstand how the ACPI subsystem works) and one outdated doc is
     updated by Hanjun Guo.

   - Assorted ACPI updates

     We finally nailed down the IA-64 issue that was the reason for
     reverting commit 9f29ab11dd ("ACPI / scan: do not match drivers
     against objects having scan handlers"), so we can fix it and move
     the ACPI scan handler check added to the ACPI video driver back to
     the core.

     A mechanism for adding CMOS RTC address space handlers is
     introduced by Lan Tianyu to allow some EC-related breakage to be
     fixed on some systems.

     A spec-compliant implementation of acpi_os_get_timer() is added by
     Mika Westerberg.

     The evaluation of _STA is added to do_acpi_find_child() to avoid
     situations in which a pointer to a disabled device object is
     returned instead of an enabled one with the same _ADR value.  From
     Jeff Wu.

     Intel BayTrail PCH (Platform Controller Hub) support is added to
     the ACPI driver for Intel Low-Power Subsystems (LPSS) and that
     driver is modified to work around a couple of known BIOS issues.
     Changes from Mika Westerberg and Heikki Krogerus.

     The EC driver is fixed by Vasiliy Kulikov to use get_user() and
     put_user() instead of dereferencing user space pointers blindly.

     Code cleanups are made by Bjorn Helgaas, Nicholas Mazzuca and Toshi
     Kani.

   - Assorted power management updates

     The "runtime idle" helper routine is changed to take the return
     values of the callbacks executed by it into account and to call
     rpm_suspend() if they return 0, which allows us to reduce the
     overall code bloat a bit (by dropping some code that's not
     necessary any more after that modification).

     The runtime PM documentation is updated by Alan Stern (to reflect
     the "runtime idle" behavior change).

     New trace points for PM QoS are added by Sahara
     (<keun-o.park@windriver.com>).

     PM QoS documentation is updated by Lan Tianyu.

     Code cleanups are made and minor issues are addressed by Bernie
     Thompson, Bjorn Helgaas, Julius Werner, and Shuah Khan.

   - devfreq updates

     New driver for the Exynos5-bus device from Abhilash Kesavan.

     Minor cleanups, fixes and MAINTAINERS update from MyungJoo Ham,
     Abhilash Kesavan, Paul Bolle, Rajagopal Venkat, and Wei Yongjun.

   - OMAP power management updates

     Adaptive Voltage Scaling (AVS) SmartReflex voltage control driver
     updates from Andrii Tseglytskyi and Nishanth Menon."

* tag 'pm+acpi-3.11-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm: (162 commits)
  cpufreq: Fix cpufreq regression after suspend/resume
  ACPI / PM: Fix possible NULL pointer deref in acpi_pm_device_sleep_state()
  PM / Sleep: Warn about system time after resume with pm_trace
  cpufreq: don't leave stale policy pointer in cdbs->cur_policy
  acpi-cpufreq: Add new sysfs attribute freqdomain_cpus
  cpufreq: make sure frequency transitions are serialized
  ACPI: implement acpi_os_get_timer() according the spec
  ACPI / EC: Add HP Folio 13 to ec_dmi_table in order to skip DSDT scan
  ACPI: Add CMOS RTC Operation Region handler support
  ACPI / processor: Drop unused variable from processor_perflib.c
  cpufreq: tegra: call CPUFREQ_POSTCHANGE notfier in error cases
  cpufreq: s3c64xx: call CPUFREQ_POSTCHANGE notfier in error cases
  cpufreq: omap: call CPUFREQ_POSTCHANGE notfier in error cases
  cpufreq: imx6q: call CPUFREQ_POSTCHANGE notfier in error cases
  cpufreq: exynos: call CPUFREQ_POSTCHANGE notfier in error cases
  cpufreq: dbx500: call CPUFREQ_POSTCHANGE notfier in error cases
  cpufreq: davinci: call CPUFREQ_POSTCHANGE notfier in error cases
  cpufreq: arm-big-little: call CPUFREQ_POSTCHANGE notfier in error cases
  cpufreq: powernow-k8: call CPUFREQ_POSTCHANGE notfier in error cases
  cpufreq: pcc: call CPUFREQ_POSTCHANGE notfier in error cases
  ...
2013-07-03 14:35:40 -07:00
Linus Torvalds 0bf6a210a4 ARM SoC driver specific changes
These changes are all driver specific and cross over between arm-soc
 contents and some other subsystem, in these cases cpufreq, crypto,
 dma, pinctrl, mailbox and usb, and the subsystem owners agreed to
 have these changes merged through arm-soc. As we proceed to untangle
 the dependencies between platform code and driver code, the amount of
 changes in this category is fortunately shrinking, for 3.11 we have
 16 branches here and 101 non-merge changesets, the majority of which
 are for the stedma40 dma engine driver used in the ux500 platform.
 Cleaning up that code touches multiple subsystems, but gets rid
 of the dependency in the end.
 
 The mailbox code moved out from mach-omap2 to drivers/mailbox
 is an intermediate step and is still omap specific at the moment.
 Patches exist to generalize the subsystem and add other drivers
 with the same API, but those did not make it for 3.11.
 
 Conflicts:
 * In cpu-db8500.c results from the removal of the u8500_of_init_devices
   function in combination with the split of u8500_auxdata_lookup.
 
 * In arch/arm/mach-omap2/devices.c, the includes got reshuffled.
   we need to keep linux/wl12xx.h and linux/platform_data/mailbox-omap.h.
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Merge tag 'drivers-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC driver specific changes from Arnd Bergmann:
 "These changes are all driver specific and cross over between arm-soc
  contents and some other subsystem, in these cases cpufreq, crypto,
  dma, pinctrl, mailbox and usb, and the subsystem owners agreed to have
  these changes merged through arm-soc.

  As we proceed to untangle the dependencies between platform code and
  driver code, the amount of changes in this category is fortunately
  shrinking, for 3.11 we have 16 branches here and 101 non-merge
  changesets, the majority of which are for the stedma40 dma engine
  driver used in the ux500 platform.  Cleaning up that code touches
  multiple subsystems, but gets rid of the dependency in the end.

  The mailbox code moved out from mach-omap2 to drivers/mailbox is an
  intermediate step and is still omap specific at the moment.  Patches
  exist to generalize the subsystem and add other drivers with the same
  API, but those did not make it for 3.11."

* tag 'drivers-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (101 commits)
  crypto: ux500: use dmaengine_submit API
  crypto: ux500: use dmaengine_prep_slave_sg API
  crypto: ux500: use dmaengine_device_control API
  crypto: ux500/crypt: add missing __iomem qualifiers
  crypto: ux500/hash: add missing static qualifiers
  crypto: ux500/hash: use readl on iomem addresses
  dmaengine: ste_dma40: Declare memcpy config as static
  ARM: ux500: Remove mop500_snowball_ethernet_clock_enable()
  ARM: ux500: Correct the EN_3v3 regulator's on/off GPIO
  ARM: ux500: Provide a AB8500 GPIO Device Tree node
  gpio: rcar: fix gpio_rcar_of_table
  gpio-rcar: Remove #ifdef CONFIG_OF around OF-specific sections
  gpio-rcar: Reference core gpio documentation in the DT bindings
  clk: exynos5250: Add enum entries for divider clock of i2s1 and i2s2
  ARM: dts: Update Samsung I2S documentation
  ARM: dts: add clock provider information for i2s controllers in Exynos5250
  ARM: dts: add Exynos audio subsystem clock controller node
  clk: samsung: register audio subsystem clocks using common clock framework
  ARM: dts: use #include for all device trees for Samsung
  pinctrl: s3c24xx: use correct header for chained_irq functions
  ...
2013-07-02 14:33:21 -07:00
Rafael J. Wysocki e52cff8bdd Merge branch 'pm-assorted'
* pm-assorted:
  PM / QoS: Add pm_qos and dev_pm_qos to events-power.txt
  PM / QoS: Add dev_pm_qos_request tracepoints
  PM / QoS: Add pm_qos_request tracepoints
  PM / QoS: Add pm_qos_update_target/flags tracepoints
  PM / QoS: Update Documentation/power/pm_qos_interface.txt
  PM / Sleep: Print last wakeup source on failed wakeup_count write
  PM / QoS: correct the valid range of pm_qos_class
  PM / wakeup: Adjust messaging for wake events during suspend
  PM / Runtime: Update .runtime_idle() callback documentation
  PM / Runtime: Rework the "runtime idle" helper routine
  PM / Hibernate: print physical addresses consistently with other parts of kernel
2013-06-28 13:01:40 +02:00
Olof Johansson 5c913a9a97 DMA40 fixes for earlier submitted driver patches:
- Fix various error path and sparse bugs in the DMA40 driver
 - Fix various compile errors in the ux500 crypto driver
   (dependent on the DMA40 changes).
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Merge tag 'ux500-dma40-for-arm-soc-3' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into next/drivers

From Linus Walleij:
DMA40 fixes for earlier submitted driver patches:
- Fix various error path and sparse bugs in the DMA40 driver
- Fix various compile errors in the ux500 crypto driver
  (dependent on the DMA40 changes).

* tag 'ux500-dma40-for-arm-soc-3' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson:
  crypto: ux500: use dmaengine_submit API
  crypto: ux500: use dmaengine_prep_slave_sg API
  crypto: ux500: use dmaengine_device_control API
  crypto: ux500/crypt: add missing __iomem qualifiers
  crypto: ux500/hash: add missing static qualifiers
  crypto: ux500/hash: use readl on iomem addresses
  dmaengine: ste_dma40: Declare memcpy config as static
  dmaengine: ste_dma40: fix error return code in d40_probe()

Signed-off-by: Olof Johansson <olof@lixom.net>
2013-06-25 11:20:15 -07:00
Arnd Bergmann 8ecb6ca61a DaVinci SoC updates for v3.11 - part 2
--------------------------------------
 
 This pull request adds DT and runtime PM to
 EDMA ARM private API so it can be used on
 DT enabled DaVinci and OMAP platforms.
 
 Also adds DMA channel crossbar mapping
 support to be used by DT-enabled platforms
 which use it.
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Merge tag 'davinci-for-v3.11/soc-2' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into next/soc

From Sekhar Nori:

DaVinci SoC updates for v3.11 - part 2

This pull request adds DT and runtime PM to
EDMA ARM private API so it can be used on
DT enabled DaVinci and OMAP platforms.

Also adds DMA channel crossbar mapping
support to be used by DT-enabled platforms
which use it.

* tag 'davinci-for-v3.11/soc-2' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci:
  dmaengine: edma: enable build for AM33XX
  ARM: edma: Add EDMA crossbar event mux support
  ARM: edma: Add DT and runtime PM support to the private EDMA API
  dmaengine: edma: Add TI EDMA device tree binding
  ARM: edma: Convert to devm_* api

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2013-06-24 16:46:23 +02:00
Fabio Baltieri b4a1ccdf27 dmaengine: ste_dma40: Declare memcpy config as static
Fix sparse warnings:

drivers/dma/ste_dma40.c:81:26: warning: symbol 'dma40_memcpy_conf_phy' was not declared. Should it be static?
drivers/dma/ste_dma40.c:95:26: warning: symbol 'dma40_memcpy_conf_log' was not declared. Should it be static?

Signed-off-by: Fabio Baltieri <fabio.baltieri@linaro.org>
Acked-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-24 13:48:39 +02:00
Matt Porter e65abbbc52 dmaengine: edma: enable build for AM33XX
Enable TI EDMA option on OMAP and TI_PRIV_EDMA

Signed-off-by: Matt Porter <mporter@ti.com>
Signed-off-by: Joel A Fernandes <joelagnel@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2013-06-24 15:55:08 +05:30
Arnd Bergmann a0639948b6 DaVinci SoC changes for v3.11
This pull request moves DaVinci EDMA library to
 arch/arm/common so it can be used by OMAP based AM335x.
 This is a temporary step until all drivers are converted
 to use the dmaengine driver in drivers/dma/edma.c.
 
 Several drivers like SPI, MMC/SD have already been converted.
 Some like audio are pending.
 
 The other two patches in the pull request are cleanup in nature.
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Merge tag 'davinci-for-v3.11/soc-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into next/soc

From Sekhar Nori:

DaVinci SoC changes for v3.11

This pull request moves DaVinci EDMA library to
arch/arm/common so it can be used by OMAP based AM335x.
This is a temporary step until all drivers are converted
to use the dmaengine driver in drivers/dma/edma.c.

Several drivers like SPI, MMC/SD have already been converted.
Some like audio are pending.

The other two patches in the pull request are cleanup in nature.

* tag 'davinci-for-v3.11/soc-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci:
  ARM: edma: remove unused transfer controller handlers
  ARM: davinci: move private EDMA API to arm/common
  ARM: davinci: remove __init atrribute from function declaration

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2013-06-20 15:06:57 +02:00
Arnd Bergmann c3b693d1d6 Device Tree and Multiplatform support for U300:
- Add devicetree support to timer, pinctrl (probe), I2C block,
   watchdog, DMA controller and clocks.
 - Piecewise add a device tree containing all peripherals.
 - Delete the ATAG boot path.
 - Delete redundant platform data and board files.
 - Convert to multiplatform.
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Merge tag 'u300-multiplatform' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into next/soc

From Linus Walleij:

Device Tree and Multiplatform support for U300:
- Add devicetree support to timer, pinctrl (probe), I2C block,
  watchdog, DMA controller and clocks.
- Piecewise add a device tree containing all peripherals.
- Delete the ATAG boot path.
- Delete redundant platform data and board files.
- Convert to multiplatform.

* tag 'u300-multiplatform' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson: (40 commits)
  ARM: u300: switch to using syscon regmap for board
  ARM: u300: Update MMC configs for u300 defconfig
  spi: pl022: use DMA by default when probing from DT
  pinctrl: get rid of all platform data for coh901
  ARM: u300: convert MMC/SD clock to device tree
  ARM: u300: move the gated system controller clocks to DT
  i2c: stu300: do not request a specific clock name
  clk: move the U300 fixed and fixed-factor to DT
  ARM: u300: remove register definition file
  ARM: u300: add syscon node
  ARM: u300 use module_spi_driver to register driver
  ARM: u300: delete remnant machine headers
  ARM: u300: convert to multiplatform
  ARM: u300: localize <mach/u300-regs.h>
  ARM: u300: delete <mach/irqs.h>
  ARM: u300: delete <mach/hardware.h>
  ARM: u300: push down syscon registers
  ARM: u300: remove deps from debug macro
  ARM: u300: move debugmacro to debug includes
  ARM: u300: delete all static board data
  ...

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2013-06-20 01:51:18 +02:00
Matt Porter 3ad7a42d5a ARM: davinci: move private EDMA API to arm/common
Move mach-davinci/dma.c to common/edma.c so it can be used
by OMAP (specifically AM33xx) as well.

Signed-off-by: Matt Porter <mporter@ti.com>
Acked-by: Chris Ball <cjb@laptop.org> # davinci_mmc.c
Acked-by: Mark Brown <broonie@linaro.org>
Acked-by: Olof Johansson <olof@lixom.net>
[nsekhar@ti.com: dropped davinci sffsdr changes]
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2013-06-18 10:52:03 +05:30
Linus Walleij faadc6e3d5 dma: coh901318: add devicetree support
This adds support for probing the COH 901 318 DMA controller
and channels from the device tree.

Contains portions of a sketch patch from Arnd Bergmann.

Cc: Arnd Bergmann <arnd@arndb.de>
Acked-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-17 13:54:27 +02:00
Olof Johansson 2c3165ebb6 Second set of DMA40 changes: refactorings and device tree
support for the DMA40. Now with MUSB and some platform
 data removal.
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Merge tag 'ux500-dma40-for-arm-soc-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into next/drivers

From Linus Walleij:
Second set of DMA40 changes: refactorings and device tree
support for the DMA40. Now with MUSB and some platform
data removal.

* tag 'ux500-dma40-for-arm-soc-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson:
  dmaengine: ste_dma40: Fetch disabled channels from DT
  dmaengine: ste_dma40: Fetch the number of physical channels from DT
  ARM: ux500: Stop passing DMA platform data though AUXDATA
  dmaengine: ste_dma40: Allow memcpy channels to be configured from DT
  dmaengine: ste_dma40_ll: Replace meaningless register set with comment
  dmaengine: ste_dma40: Convert data_width from register bit format to value
  dmaengine: ste_dma40_ll: Use the BIT macro to replace ugly '(1 << x)'s
  ARM: ux500: Remove recently unused stedma40_xfer_dir enums
  dmaengine: ste_dma40: Replace ST-E's home-brew DMA direction defs with generic ones
  ARM: ux500: Replace ST-E's home-brew DMA direction definition with the generic one
  dmaengine: ste_dma40: Use the BIT macro to replace ugly '(1 << x)'s
  ARM: ux500: Remove empty function u8500_of_init_devices()
  ARM: ux500: Remove ux500-musb platform registation when booting with DT
  usb: musb: ux500: add device tree probing support
  usb: musb: ux500: attempt to find channels by name before using pdata
  usb: musb: ux500: harden checks for platform data
  usb: musb: ux500: take the dma_mask from coherent_dma_mask
  usb: musb: ux500: move the MUSB HDRC configuration into the driver
  usb: musb: ux500: move channel number knowledge into the driver
2013-06-14 16:53:54 -07:00
Olof Johansson ff299f1b1c update driver for s3c24xx
- move cpufreq driver into drivers/
 - add pinctrl-s3c24xx driver
 - cleanup OF in gpio driver
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Merge tag 's3c24xx-driver-1' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/drivers

From Kukjin Kim, driver updats for s3c24xx:
- move cpufreq driver into drivers/
- add pinctrl-s3c24xx driver
- cleanup OF in gpio driver

Signed-off-by: Olof Johansson <olof@lixom.net>
2013-06-12 16:50:10 -07:00
Lars-Peter Clausen 8552bb4f16 dma: of: Remove check on always true condition
Both of_dma_nbcells field of the of_dma_controller and the args_count field of
the dma_spec are initialized by parsing the #dma-cells attribute of their device
tree node. So if the device tree nodes of a DMA controller and the dma_spec
match this means that of_dma_nbcells and args_count will also match. So the
second test in the of_dma_find_controller loop is redundant because given the
first test yields true the second test will also yield true. So we can safely
remove the test whether of_dma_nbcells matches args_count. Since this was the
last user of the of_dma_nbcells field we can remove it altogether.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-06-12 07:49:19 +05:30
Lars-Peter Clausen ff0e0f4f56 dma: of: Remove restriction that #dma-cells can't be 0
There is no sensible reason why #dma-cells shouldn't be allowed to be 0. It is
completely up to the DMA controller how many additional parameters, besides the
phandle, it needs to identify a channel. E.g. for DMA controller with only one
channel or for DMA controllers which don't have a restriction on which channel
can be used for which peripheral it completely legitimate to not require any
additional parameters.

Also fixes the following warning:
	drivers/dma/of-dma.c: In function 'of_dma_controller_register':
	drivers/dma/of-dma.c:67:7: warning: 'nbcells' may be used uninitialized in this function

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-06-12 07:49:19 +05:30
Andy Shevchenko bcc567e311 dmatest: do not allow to interrupt ongoing tests
When user interrupts ongoing transfers the dmatest may end up with console
lockup, oops, or data mismatch. This patch prevents user to abort any ongoing
test.

Documentation is updated accordingly.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reported-by: Will Deacon <will.deacon@arm.com>
Tested-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-06-08 02:13:44 +05:30
Wei Yongjun 8581bbcd30 dmaengine: ste_dma40: fix error return code in d40_probe()
In many of the error handling case, the return value 'ret' not set
and 0 will be return from d40_probe() even if error, but we should
return a negative error code instead in those error handling case.
This patch fixed them, and also removed useless variable 'err'.

Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-04 11:12:46 +02:00
Lee Jones 499c2bc3cc dmaengine: ste_dma40: Fetch disabled channels from DT
Some platforms have channels which are not available for normal use.
This information is currently passed though platform data in internal
BSP kernels. Once those platforms land, they'll need to configure them
appropriately, so we may as well add the infrastructure.

Cc: Dan Williams <djbw@fb.com>
Cc: Per Forlin <per.forlin@stericsson.com>
Cc: Rabin Vincent <rabin@rab.in>
Acked-by: Vinod Koul <vinod.koul@intel.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-04 11:12:12 +02:00
Lee Jones fd59f9e6ab dmaengine: ste_dma40: Fetch the number of physical channels from DT
Some platforms insist on obscure physical channel availability. This
information is currently passed though platform data in internal BSP
kernels. Once those platforms land, they'll need to configure them
appropriately, so we may as well add the infrastructure.

Cc: Dan Williams <djbw@fb.com>
Cc: Per Forlin <per.forlin@stericsson.com>
Cc: Rabin Vincent <rabin@rab.in>
Acked-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-04 11:12:12 +02:00
Lee Jones a7dacb68b3 dmaengine: ste_dma40: Allow memcpy channels to be configured from DT
At this moment in time the memcpy channels which can be used by the D40
are fixed, as each supported platform in Mainline uses the same ones.
However, platforms do exist which don't follow this convention, so
these will need to be tailored. Fortunately, these platforms will be DT
only, so this change has very little impact on platform data.

Cc: Dan Williams <djbw@fb.com>
Cc: Per Forlin <per.forlin@stericsson.com>
Cc: Rabin Vincent <rabin@rab.in>
Acked-by: Vinod Koul <vinod.koul@intel.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-04 11:12:11 +02:00
Lee Jones 8cc5af1255 dmaengine: ste_dma40_ll: Replace meaningless register set with comment
Unsure of the author's intentions, rather than just removing the nop,
we're replacing it with a comment containing the possible intention
of the statement OR:ing with 0.

Cc: Dan Williams <djbw@fb.com>
Cc: Per Forlin <per.forlin@stericsson.com>
Cc: Rabin Vincent <rabin@rab.in>
Acked-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-04 11:12:10 +02:00
Lee Jones 43f2e1a3be dmaengine: ste_dma40: Convert data_width from register bit format to value
When a DMA client requests and configures a DMA channel, it requests
data_width in Bytes. The DMA40 driver then swiftly converts it over to
the necessary register bit value. Unfortunately, for any subsequent
calculations we have to shift '1' by the bit pattern (1 << data_width)
times to make any sense of it.

This patch flips the semantics on its head and only converts the value
to its respective register bit pattern when writing to registers. This
way we can use the true data_width (in Bytes) value.

Cc: Dan Williams <djbw@fb.com>
Cc: Per Forlin <per.forlin@stericsson.com>
Cc: Rabin Vincent <rabin@rab.in>
Acked-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-04 11:12:09 +02:00
Lee Jones 16db3411eb dmaengine: ste_dma40_ll: Use the BIT macro to replace ugly '(1 << x)'s
The aim is to make the code that little more readable.

Cc: Dan Williams <djbw@fb.com>
Cc: Per Forlin <per.forlin@stericsson.com>
Cc: Rabin Vincent <rabin@rab.in>
Acked-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-04 11:12:09 +02:00
Lee Jones 2c2b62d5d9 dmaengine: ste_dma40: Replace ST-E's home-brew DMA direction defs with generic ones
STEDMA40_*_TO_* direction definitions are identical in all but name to
the pre-defined generic DMA_*_TO_* ones. Let's make things easy by not
duplicating such things.

Cc: Dan Williams <djbw@fb.com>
Cc: Per Forlin <per.forlin@stericsson.com>
Cc: Rabin Vincent <rabin@rab.in>
Acked-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-04 11:12:08 +02:00
Lee Jones 8a3b6e143c dmaengine: ste_dma40: Use the BIT macro to replace ugly '(1 << x)'s
The aim is to make the code that little more readable.

Acked-by: Vinod Koul <vnod.koul@intel.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-04 11:12:07 +02:00
Rafael J. Wysocki 45f0a85c82 PM / Runtime: Rework the "runtime idle" helper routine
The "runtime idle" helper routine, rpm_idle(), currently ignores
return values from .runtime_idle() callbacks executed by it.
However, it turns out that many subsystems use
pm_generic_runtime_idle() which checks the return value of the
driver's callback and executes pm_runtime_suspend() for the device
unless that value is not 0.  If that logic is moved to rpm_idle()
instead, pm_generic_runtime_idle() can be dropped and its users
will not need any .runtime_idle() callbacks any more.

Moreover, the PCI, SCSI, and SATA subsystems' .runtime_idle()
routines, pci_pm_runtime_idle(), scsi_runtime_idle(), and
ata_port_runtime_idle(), respectively, as well as a few drivers'
ones may be simplified if rpm_idle() calls rpm_suspend() after 0 has
been returned by the .runtime_idle() callback executed by it.

To reduce overall code bloat, make the changes described above.

Tested-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Tested-by: Kevin Hilman <khilman@linaro.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Acked-by: Kevin Hilman <khilman@linaro.org>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Acked-by: Alan Stern <stern@rowland.harvard.edu>
2013-06-03 21:49:52 +02:00
Olof Johansson 6f39ef575d This is a set of patches from Lee Jones to start converting
the ux500 to fetch DMA channels from the device tree:
 - Full DT support and channel mapping in the DMA40 driver
 - Dropping of platform data for migrated devices on the DT
   boot path.
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Merge tag 'ux500-dma40-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into next/drivers

From Linus Walleij:
This is a set of patches from Lee Jones to start converting
the ux500 to fetch DMA channels from the device tree:
- Full DT support and channel mapping in the DMA40 driver
- Dropping of platform data for migrated devices on the DT
  boot path.

* tag 'ux500-dma40-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson: (36 commits)
  ARM: ux500: Register Cryp and Hash platform drivers on Snowball
  crypto: ux500/[cryp|hash] - Show successful start-up in the bootlog
  ARM: ux500: Stop passing Cryp DMA channel config information though pdata
  crypto: ux500/cryp - Set DMA configuration though dma_slave_config()
  crypto: ux500/cryp - Prepare clock before enabling it
  ARM: ux500: Stop passing Hash DMA channel config information though pdata
  crypto: ux500/hash - Set DMA configuration though dma_slave_config()
  crypto: ux500/hash - Prepare clock before enabling it
  ARM: ux500: Remove unnecessary attributes from DMA channel request pdata
  dmaengine: ste_dma40: Correct copy/paste error
  ARM: ux500: Remove DMA address look-up table
  dmaengine: ste_dma40: Remove redundant address fetching function
  dmaengine: ste_dma40: Only use addresses passed as configuration information
  ARM: ux500: Stop passing UART's platform data for Device Tree boots
  dmaengine: ste_dma40: Don't configure runtime configurable setup during allocate
  dmaengine: ste_dma40: Remove unnecessary call to d40_phy_cfg()
  dmaengine: ste_dma40: Separate Logical Global Interrupt Mask (GIM) unmasking
  ARM: ux500: Pass remnant platform data though to DMA40 driver
  dmaengine: ste_dma40: Supply full Device Tree parsing support
  dmaengine: ste_dma40: Allow driver to be probe()able when DT is enabled
  ...

Signed-off-by: Olof Johansson <olof@lixom.net>
2013-05-27 20:10:04 -07:00
Rabin Vincent 9ecb41bd8c dmaengine: ste_dma40: fix pm runtime ref counting
The pm runtime reference counting of the driver is broken for the case
when there is more than one transfer queued, leading to the device being
runtime suspend while active.  Fix it.

Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Cc: stable@vger.kernel.org
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-05-27 19:50:32 +05:30
Linus Torvalds 27a24cfa04 Merge branch 'fixes' of git://git.infradead.org/users/vkoul/slave-dma
Pull slave-dma fixes from Vinod Koul:
 "We have two patches from Andy & Rafael fixing the Lynxpoint dma"

* 'fixes' of git://git.infradead.org/users/vkoul/slave-dma:
  ACPI / LPSS: register clock device for Lynxpoint DMA properly
  dma: acpi-dma: parse CSRT to extract additional resources
2013-05-25 20:30:31 -07:00
Lee Jones 01c935c4ec dmaengine: ste_dma40: Remove redundant address fetching function
Addresses are now stored in local data structures and are easy to
obtain, thus a specialist function used to fetch them is now surplus
to requirement.

Signed-off-by: Lee Jones <lee.jones@linaro.org>
Acked-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-23 21:13:34 +02:00
Lee Jones ef9c89b3ec dmaengine: ste_dma40: Only use addresses passed as configuration information
Addresses are passed in from the client's driver via the invocation of
dmaengine_slave_config(), so there's no need to fetch them from platform
data too, hardwired or otherwise. This is a great step forward, as it
elevates a large burden from platform data in the way of a look-up
table.

Signed-off-by: Lee Jones <lee.jones@linaro.org>
Acked-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-23 21:13:28 +02:00
Lee Jones 9b233f9b2e dmaengine: ste_dma40: Don't configure runtime configurable setup during allocate
Using the dmaengine API for slave transfers, allocating and configuring
a channel are two separate actions. Here we're removing logical channel
configuration from the channel allocation routine for slave transfers,
as the same config is already done in the runtime config function, and
put the corresponding call into d40_config_memcpy() for the memcpy
code path.

Cc: Dan Williams <djbw@fb.com>
Cc: Per Forlin <per.forlin@stericsson.com>
Cc: Rabin Vincent <rabin@rab.in>
Acked-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
[Edited the commit message]
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-23 21:13:22 +02:00
Lee Jones 57e65ad77f dmaengine: ste_dma40: Remove unnecessary call to d40_phy_cfg()
The majority of configuration done in d40_phy_config() pertains
to physical channels. Move the call over to runtime config which
has different code paths for physical and logical channels already,
and make it an exclusive physical channel config function as the
name implies, and drop the is_log argument.

Since we moved the call to runtime_config() it only gets called
for device transfers, so encode the small snippet of configuration
pertaining to memcpy channels into the d40_config_memcpy()
function.

Acked-by: Vinod Koul <vinod.koul@intel.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
[rewrote the commit message]
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-23 21:13:19 +02:00
Lee Jones 9778256b98 dmaengine: ste_dma40: Separate Logical Global Interrupt Mask (GIM) unmasking
During the initial setup of a logical channel, it is necessary to unmask
the GIM in order to receive generated terminal count and error interrupts.
We're separating out this required code so it will be possible to move
the remaining code in d40_phy_cfg(), which is mostly runtime configuration
into the runtime_config() routine.

Cc: Dan Williams <djbw@fb.com>
Cc: Per Forlin <per.forlin@stericsson.com>
Cc: Rabin Vincent <rabin@rab.in>
Acked-by: Vinod Koul <vinod.koul@intel.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-23 21:13:16 +02:00
Lee Jones fa332de5c6 dmaengine: ste_dma40: Supply full Device Tree parsing support
Using the new DMA DT bindings and API, we can register the DMA40 driver
as Device Tree capable. Now, when a client attempts to allocate a
channel using the DMA DT bindings via its own node, we are able to parse
the request and allocate a channel in the correct manner.

Cc: Dan Williams <djbw@fb.com>
Cc: Per Forlin <per.forlin@stericsson.com>
Cc: Rabin Vincent <rabin@rab.in>
Cc: Rob Herring <rob.herring@calxeda.com>
Cc: devicetree-discuss@lists.ozlabs.org
Acked-by: Vinod Koul <vinod.koul@intel.com>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-23 21:13:08 +02:00
Lee Jones 1814a1703c dmaengine: ste_dma40: Allow driver to be probe()able when DT is enabled
When booting using Device Tree, devices aren't registered in the normal
way. Instead, they need to be provided with a compatible string which is
held in an OF Match Table for comparison during start-up. Here we provide
the compatible string and prepare the driver to not receive a platform
data pointer.

Acked-by: Vinod Koul <vnod.koul@intel.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
[Fixed up whitespace error]
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-23 21:13:06 +02:00
Lee Jones bb75d93b90 dmaengine: ste_dma40: Allocate plat_data on declaration
It's the way that most other drivers do it.

Very trivial clean-up which reduces line count and simplifies code.

Acked-by: Vinod Koul <vnod.koul@intel.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-23 21:13:03 +02:00
Lee Jones b2abb249de dmaengine: ste_dma40: Also report the number of logical channels
Now we know the total of physical and logical channels, we may as
well report them within the information log.

Before:
dma40 dma40.0: hardware revision: 3 @ 0x801c0000 with 8 physical channels

After:
<as above ...> and 256 logical channels

Cc: Dan Williams <djbw@fb.com>
Cc: Per Forlin <per.forlin@stericsson.com>
Cc: Rabin Vincent <rabin@rab.in>
Acked-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-23 21:12:58 +02:00
Lee Jones 8b2fe9b6b3 dmaengine: ste_dma40: Move rev error-check up to revision acquisition
At the moment we fetch the hardware revision, then do some stuff, then
check whether the revision is correct and return in error if it's not.
Well we may as well check it as soon as we know what it is, so let's
move the check right up underneath where we acquire the version.

Acked-by: Vinod Koul <vnod.koul@intel.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-23 21:12:55 +02:00
Lee Jones 8a59fed395 dmaengine: ste_dma40: Remove 'always true' checking
Before allocating memory for logical channels, the current driver
checks to see if there are any. Well as the dma40_memcpy_channels[]
array is always populated, the check is always true. Best to
remove the check.

Cc: Dan Williams <djbw@fb.com>
Cc: Per Forlin <per.forlin@stericsson.com>
Cc: Rabin Vincent <rabin@rab.in>
Acked-by: Vinod Koul <vinod.koul@intel.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-23 21:12:51 +02:00
Lee Jones db72da9210 dmaengine: ste_dma40: Calculate number of logical channels from physical ones
This change will cost ~25KB of memory, but it's worth the trade-off,
as it removes a great deal of overhead. It means that instead of only
allocating memory for the logical channels in use, it does so for all
available ones, which is 32 per physical channel. However, this now
means we can remove some platform data and we don't have to worry
about adding vendor specific variables to Device Tree.

Acked-by: Vinod Koul <vnod.koul@intel.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-23 21:12:47 +02:00
Lee Jones 84b3da1498 dmaengine: ste_dma40: Remove home-brew MAX() macro
The current implementation of the DMA40's local MAX() macro evaluates
its arguments more times than is necessary and it not type checked.
This patch strips replaces it with a new, more efficient constant.

Cc: Dan Williams <djbw@fb.com>
Cc: Per Forlin <per.forlin@stericsson.com>
Cc: Rabin Vincent <rabin@rab.in>
Acked-by: Vinod Koul <vinod.koul@intel.com>
Reported-by: Harvey Harrison <harvey.harrison@gmail.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-23 21:12:02 +02:00
Lee Jones 26955c07dc dmaengine: ste_dma40: Amalgamate DMA source and destination channel numbers
Devices which utilise DMA use the same device numbers for transmitting
and receiving. In this patch we encode the source and destination
information into one single attribute. We can subsequently exploit the
direction attribute to see which of the transfer directions are being
described. This also lessens the burden on platform data.

Cc: Dan Williams <djbw@fb.com>
Cc: Per Forlin <per.forlin@stericsson.com>
Cc: Rabin Vincent <rabin@rab.in>
Acked-by: Vinod Koul <vinod.koul@intel.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-23 21:11:51 +02:00
Lee Jones 4f8fc46c79 dmaengine: ste_dma40: Rectify incorrect configuration validation checking
If we compare an event's group (dev_type / 16) with STEDMA40_DEV_DST_MEMORY
(-1), the only way we'd obtain a positive result is if we passed -16 as a
device type, which is unfeasible. Instead, it would be much more sane to
compare STEDMA40_DEV_DST_MEMORY against the raw dev_type in order to expect
the expected result.

Acked-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-23 21:10:56 +02:00
Lee Jones 29027a1e11 dmaengine: ste_dma40: Move default memcpy configs into the driver
There are only two default memcpy configurations used for the DMA40
driver; one for physical memcpy and one for logical memcpy. Instead
of invariably passing the same configurations though platform data,
we're moving them into the driver instead.

Acked-by: Vinod Koul <vnod.koul@intel.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-23 21:10:53 +02:00
Linus Walleij a2acaa2163 dmaengine: ste_dma40: Fix up static memcpy event lines
The commit
"dmaengine: ste_dma40: Assign memcpy channels in the driver"
had two problems:
- It assigned magic numbers to the memcpy event lines
  instead of giving them symbolic names.
- It seems to have missed one of the memcpy event lines,
  number 51.

This patch fixes it up.

Acked-by: Lee Jones <lee.jones@linaro.org>
Acked-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-23 21:10:48 +02:00
Lee Jones 664a57ecb0 dmaengine: ste_dma40: Assign memcpy channels in the driver
The channels reserved for memcpy are the same for all currently
supported platforms. With this in mind, we can ease the platform
data passing requirement by moving these assignments out from
platform code and place them directly into the driver.

Acked-by: Vinod Koul <vnod.koul@intel.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-23 21:10:44 +02:00
Wolfram Sang 627ad13a39 drivers/dma: don't check resource with devm_ioremap_resource
devm_ioremap_resource does sanity checks on the given resource. No need to
duplicate this in the driver.

Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Acked-by: Stephen Warren <swarren@nvidia.com>
2013-05-18 11:54:55 +02:00
Andy Shevchenko ee8209fd02 dma: acpi-dma: parse CSRT to extract additional resources
Since we have CSRT only to get additional DMA controller resources, let's get
rid of drivers/acpi/csrt.c and move its logic inside ACPI DMA helpers code.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-05-14 10:23:57 +05:30
Linus Torvalds 1763e735b0 Merge branch 'for-linus' of git://git.infradead.org/users/vkoul/slave-dma
Pull slave-dmaengine updates from Vinod Koul:
 "This time we have dmatest improvements from Andy along with dw_dmac
  fixes.  He has also done support for acpi for dmanegine.

  Also we have bunch of fixes going in DT support for dmanegine for
  various folks.  Then Haswell and other ioat changes from Dave and
  SUDMAC support from Shimoda."

* 'for-linus' of git://git.infradead.org/users/vkoul/slave-dma: (53 commits)
  dma: tegra: implement suspend/resume callbacks
  dma:of: Use a mutex to protect the of_dma_list
  dma: of: Fix of_node reference leak
  dmaengine: sirf: move driver init from module_init to subsys_initcall
  sudmac: add support for SUDMAC
  dma: sh: add Kconfig
  at_hdmac: move to generic DMA binding
  ioatdma: ioat3_alloc_sed can be static
  ioatdma: Adding write back descriptor error status support for ioatdma 3.3
  ioatdma: S1200 platforms ioatdma channel 2 and 3 falsely advertise RAID cap
  ioatdma: Adding support for 16 src PQ ops and super extended descriptors
  ioatdma: Removing hw bug workaround for CB3.x .2 and earlier
  dw_dmac: add ACPI support
  dmaengine: call acpi_dma_request_slave_channel as well
  dma: acpi-dma: introduce ACPI DMA helpers
  dma: of: Remove unnecessary list_empty check
  DMA: OF: Check properties value before running be32_to_cpup() on it
  DMA: of: Constant names
  ioatdma: skip silicon bug workaround for pq_align for cb3.3
  ioatdma: Removing PQ val disable for cb3.3
  ...
2013-05-09 09:46:45 -07:00
Linus Torvalds 38f56f33ca ARM: arm-soc device tree changes, part 2
These are mostly new device tree bindings for existing drivers, as well
 as changes to the device tree source files to add support for those
 devices, and a couple of new boards, most notably Samsung's Exynos5
 based Chromebook.
 
 The changes depend on earlier platform specific updates and touch
 the usual platforms: omap, exynos, tegra, mxs, mvebu and davinci.
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Merge tag 'dt-for-linus-2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC device tree updates (part 2) from Arnd Bergmann:
 "These are mostly new device tree bindings for existing drivers, as
  well as changes to the device tree source files to add support for
  those devices, and a couple of new boards, most notably Samsung's
  Exynos5 based Chromebook.

  The changes depend on earlier platform specific updates and touch the
  usual platforms: omap, exynos, tegra, mxs, mvebu and davinci."

* tag 'dt-for-linus-2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (169 commits)
  ARM: exynos: dts: cros5250: add EC device
  ARM: dts: Add sbs-battery for exynos5250-snow
  ARM: dts: Add i2c-arbitrator bus for exynos5250-snow
  ARM: dts: add mshc controller node for Exynos4x12 SoCs
  ARM: dts: Add chip-id controller node on Exynos4/5 SoC
  ARM: EXYNOS: Create virtual I/O mapping for Chip-ID controller using device tree
  ARM: davinci: da850-evm: add SPI flash support
  ARM: davinci: da850: override SPI DT node device name
  ARM: davinci: da850: add SPI1 DT node
  spi/davinci: add DT binding documentation
  spi/davinci: no wildcards in DT compatible property
  ARM: dts: mvebu: Convert mvebu device tree files to 64 bits
  ARM: dts: mvebu: introduce internal-regs node
  ARM: dts: mvebu: Convert all the mvebu files to use the range property
  ARM: dts: mvebu: move all peripherals inside soc
  ARM: dts: mvebu: fix cpus section indentation
  ARM: davinci: da850: add EHRPWM & ECAP DT node
  ARM/dts: OMAP3: fix pinctrl-single configuration
  ARM: dts: Add OMAP3430 SDP NOR flash memory binding
  ARM: dts: Add NOR flash bindings for OMAP2420 H4
  ...
2013-05-07 11:06:17 -07:00
Arnd Bergmann 4183bef2e0 Merge branch 'late/dt' into next/dt2
This is support for the ARM Chromebook, originally scheduled
as a "late" pull request. Since it's already late now, we
can combine this into the existing next/dt2 branch.

* late/dt:
  ARM: exynos: dts: cros5250: add EC device
  ARM: dts: Add sbs-battery for exynos5250-snow
  ARM: dts: Add i2c-arbitrator bus for exynos5250-snow
  ARM: dts: Add chip-id controller node on Exynos4/5 SoC
  ARM: EXYNOS: Create virtual I/O mapping for Chip-ID controller using device tree
2013-05-06 23:38:00 +02:00
Laxman Dewangan 3065c19467 dma: tegra: implement suspend/resume callbacks
Implement suspend/resume callbacks to store APB DMA channel's
register on suspend and restore APB DMA channel's register on
resume.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-05-02 22:19:20 +05:30
Vinod Koul b2396f7984 Merge branch 'topic/of' into for-linus
Conflicts:
	include/linux/dmaengine.h

Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-05-02 21:52:26 +05:30
Lars-Peter Clausen de61608acf dma:of: Use a mutex to protect the of_dma_list
Currently the OF DMA code uses a spin lock to protect the of_dma_list from
concurrent access and a per controller reference count to protect the controller
from being freed while a request operation is in progress. If
of_dma_controller_free() is called for a controller who's reference count is not
zero it will return -EBUSY and not remove the controller. This is fine up until
here, but leaves the question what the caller of of_dma_controller_free() is
supposed to do if the controller couldn't be freed.  The only viable solution
for the caller is to spin on of_dma_controller_free() until it returns success.
E.g.

	do {
		ret = of_dma_controller_free(dev->of_node)
	} while (ret != -EBUSY);

This is rather ugly and unnecessary and none of the current users of
of_dma_controller_free() check it's return value anyway. Instead protect the
list by a mutex. The mutex will be held as long as a request operation is in
progress. So if of_dma_controller_free() is called while a request operation is
in progress it will be put to sleep and only wake up once the request operation
has finished.

This means that it is no longer possible to register or unregister OF DMA
controllers from a context where it's not possible to sleep. But I doubt that
we'll ever need this.

Also rename of_dma_get_controller back to of_dma_find_controller.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-05-02 21:50:38 +05:30
Lars-Peter Clausen f22eb14022 dma: of: Fix of_node reference leak
of_dma_request_slave_channel() currently does not drop the reference to the
dma_spec of_node if no DMA controller matching the of_node could be found. This
patch fixes it by always calling of_node_put().

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Jon Hunter <jon-hunter@ti.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-05-02 21:50:38 +05:30
Barry Song 42361f20f2 dmaengine: sirf: move driver init from module_init to subsys_initcall
if we initilize dma driver by module_init, there are still many devices
which will be initilized earlier than dma. these devices will fail to
get dma channel.
this moves dmaengine earlier than device_initcall and make dma available
for all devices.

Reported-by: Renwei Wu <Renwei.Wu@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-05-02 20:48:23 +05:30
Shimoda, Yoshihiro 18a1053f7b sudmac: add support for SUDMAC
Some Renesas USB modules have SUDMAC. This patch supports it using
the shdma-base driver.

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Reviewed-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-04-30 15:50:12 +05:30
Shimoda, Yoshihiro 189b4ee8e9 dma: sh: add Kconfig
This patch adds Kconfig in the drivers/dma/sh. This patch also adds
a new config "SH_DMAE_BASE" and the "config SH_DMAE" depends on it.
Since some drivers (e.g. sh_mmcif.c) depends on shdma-base.c if
CONFIG_DMA_ENGINE=y, the "config SH_DMAE_BASE" is set as "bool".

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-04-30 15:50:12 +05:30
Ludovic Desroches bbe89c8e3d at_hdmac: move to generic DMA binding
Update at_hdmac driver to support generic DMA device tree binding. Devices
can still request channel with dma_request_channel() then it doesn't break
DMA for non DT boards.

Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-04-30 14:17:41 +05:30
David S. Miller 6e0895c2ea Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net
Conflicts:
	drivers/net/ethernet/emulex/benet/be_main.c
	drivers/net/ethernet/intel/igb/igb_main.c
	drivers/net/wireless/brcm80211/brcmsmac/mac80211_if.c
	include/net/scm.h
	net/batman-adv/routing.c
	net/ipv4/tcp_input.c

The e{uid,gid} --> {uid,gid} credentials fix conflicted with the
cleanup in net-next to now pass cred structs around.

The be2net driver had a bug fix in 'net' that overlapped with the VLAN
interface changes by Patrick McHardy in net-next.

An IGB conflict existed because in 'net' the build_skb() support was
reverted, and in 'net-next' there was a comment style fix within that
code.

Several batman-adv conflicts were resolved by making sure that all
calls to batadv_is_my_mac() are changed to have a new bat_priv first
argument.

Eric Dumazet's TS ECR fix in TCP in 'net' conflicted with the F-RTO
rewrite in 'net-next', mostly overlapping changes.

Thanks to Stephen Rothwell and Antonio Quartulli for help with several
of these merge resolutions.

Signed-off-by: David S. Miller <davem@davemloft.net>
2013-04-22 20:32:51 -04:00
Ludovic Desroches d202f05158 dmaengine: at_hdmac: fix race condition in atc_advance_work()
The BUG_ON() directive is triggered probably due to a latency
modification following inclusion of commit c10d73671a ("softirq:
reduce latencies").  This condition has not been met before 3.9-rc1 and
doesn't trigger without this patch.

We now make sure that DMA channel is idle before calling
atc_complete_all() which makes the BUG_ON() "protection" useless.

Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2013-04-18 08:54:22 -07:00
Fengguang Wu e6a30fec08 ioatdma: ioat3_alloc_sed can be static
Reported-by: Fengguang Wu <fengguang.wu@intel.com>
Signed-off-by: Fengguang Wu <fengguang.wu@intel.com>
Acked-by: Dave Jiang <dave.jiang@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-04-16 18:49:40 +05:30
Dave Jiang 75c6f0ab48 ioatdma: Adding write back descriptor error status support for ioatdma 3.3
v3.3 provides support for write back descriptor error status. This allows
reporting of errors in a descriptor field. In supporting this, certain
errors such as P/Q validation errors no longer halts the channel. The DMA
engine can continue to execute until the end of the chain and allow software
to report the "errors" up the stack. We are also going to mask those error
interrupts and handle them when the "chain" has completed at the end.

Signed-off-by: Dave Jiang <dave.jiang@intel.com>
Acked-by: Dan Williams <djbw@fb.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-04-15 22:46:15 +05:30
Dave Jiang d302398da9 ioatdma: S1200 platforms ioatdma channel 2 and 3 falsely advertise RAID cap
This workaround checks for channel 2&3 and remove RAID cap.

Signed-off-by: Dave Jiang <dave.jiang@intel.com>
Acked-by: Dan Williams <djbw@fb.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-04-15 22:46:15 +05:30
Dave Jiang 7727eaa449 ioatdma: Adding support for 16 src PQ ops and super extended descriptors
v3.3 introduced 16 sources PQ operations. This also introduced super extended
descriptors to support the 16 srcs operations. This patch adds support for
the 16 sources ops and in turn adds the super extended descriptors for those
ops.

5 SED pools are created depending on the descriptor sizes. An SED can be a 64
bytes sized descriptor or larger and must be physically contiguous. A kmem
cache pool is created for allocating the software descriptor that manages the
hardware descriptor. The super extended descriptor will take place of extended
descriptor under certain operations and be "attached" to the op descriptor
during operation. This is a new feature for ioatdma v3.3.

Signed-off-by: Dave Jiang <dave.jiang@intel.com>
Acked-by: Dan Williams <djbw@fb.com>
Acked-by: Dan Williams <djbw@fb.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-04-15 22:46:15 +05:30
Dave Jiang e0884772d3 ioatdma: Removing hw bug workaround for CB3.x .2 and earlier
CB3.2 and earlier hardware has silicon bugs that are no longer needed with
the new hardware. We don't have to use a NULL op to signal interrupt for
RAID ops any longer. This code make sure the legacy workarounds only happen on
legacy hardware.

Signed-off-by: Dave Jiang <dave.jiang@intel.com>
Acked-by: Dan Williams <djbw@fb.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-04-15 22:46:14 +05:30
Andy Shevchenko 42c91ee71d dw_dmac: add ACPI support
Since we have proper ACPI DMA helpers implemented, the driver may use it. This
patch introduces custom filter function together with acpi_device_id table.

Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-04-15 22:04:19 +05:30