Commit Graph

20543 Commits

Author SHA1 Message Date
Dave Airlie 9c37bf2db0 Merge tag 'topic/drm-misc-2015-05-19' of git://anongit.freedesktop.org/drm-intel into drm-next
Scattering of random drm core patches. Bunch of atomic prep work too, but
the final bits for blob properties, atomic modesets and lifting the
experimental tag on the atomic ioctl are still blocked on Daniel Stone
finalizing and testing the weston support for it. I hope that we can get
it all ready for 4.2 though.

* tag 'topic/drm-misc-2015-05-19' of git://anongit.freedesktop.org/drm-intel: (22 commits)
  drm/atomic: Allow drivers to subclass drm_atomic_state, v3
  drm/atomic: remove duplicated assignment of old_plane_state
  drm/dp: Fix comment in DP helper
  drm/atomic: add drm_atomic_get_existing_*_state helpers
  drm/core: get rid of -Iinclude/drm
  drm/i915: get rid of -Iinclude/drm
  drm/atomic-helpers: Export drm_atomic_helper_update_legacy_modeset_state
  drm/atomic-helpers: Update vblank timestamping constants
  drm/sysfs: remove unnecessary connector type checks
  drm/sysfs: split DVI-I and TV-out attributes
  drm/sysfs: make optional attribute groups per connector type
  drm/sysfs: add a helper for extracting connector type from kobject
  drm/edid: Add CEA modes before inferred modes
  drm/prime: Allow internal imports without import_sg_table
  drm: Add reference counting to blob properties
  drm: Introduce blob_lock
  drm: Introduce helper for replacing blob properties
  drm: Don't leak path blob property when updating
  drm/atomic: Don't open-code CRTC state destroy
  drm/edid: Add DMT modes with ID > 0x50
  ...
2015-05-20 09:19:58 +10:00
Krzysztof Kozlowski b0f155ada4 drm/exynos: dp: Lower level of EDID read success message
Don't pollute the dmesg with EDID read success message as an error.
Printing as debug should be fine.

Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
2015-05-19 22:50:55 +09:00
Tobias Jakobi be083a002f drm/exynos: cleanup exynos_drm_plane
Remove the unused fields of struct exynos_drm_plane.

v2: Remove index_color as well, also unused (thanks Joonyoung).

Signed-off-by: Tobias Jakobi <tjakobi@math.uni-bielefeld.de>
Reviewed-by: Gustavo Padovan <gustavo.padovan@collabora.co.uk>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
2015-05-19 22:50:54 +09:00
Tobias Jakobi 5b1d5bc690 drm/exynos: 'win' is always unsigned
The index for the hardware layer is always >=0. Previous
code that also used -1 as special index is now gone.

Also apply this to 'ch_enabled' (decon/fimd), since the
variable is on the same line (and is again always unsigned).

Signed-off-by: Tobias Jakobi <tjakobi@math.uni-bielefeld.de>
Reviewed-by: Gustavo Padovan <gustavo.padovan@collabora.co.uk>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
2015-05-19 22:50:54 +09:00
Tobias Jakobi c0734fbaf4 drm/exynos: mixer: don't dump registers under spinlock
mixer_regs_dump() was called in mixer_run(), which was called
under the register spinlock in mixer_graph_buffer() and
vp_video_buffer().

This would trigger a sysmmu pagefault with drm.debug=0xff because
of the large delay caused by the register dumping.

To keep consistency also move register dumping out of mixer_stop(),
which is the counterpart to mixer_run().

Kernel dump:
[  131.296529] [drm:mixer_win_commit] win: 2
[  131.300693] [drm:mixer_regs_dump] MXR_STATUS = 00000081
[  131.305888] [drm:mixer_regs_dump] MXR_CFG = 000007d5
[  131.310835] [drm:mixer_regs_dump] MXR_INT_EN = 00000000
[  131.316043] [drm:mixer_regs_dump] MXR_INT_STATUS = 00000900
[  131.321598] [drm:mixer_regs_dump] MXR_LAYER_CFG = 00000321
[  131.327066] [drm:mixer_regs_dump] MXR_VIDEO_CFG = 00000000
[  131.332535] [drm:mixer_regs_dump] MXR_GRAPHIC0_CFG = 00310700
[  131.338263] [drm:mixer_regs_dump] MXR_GRAPHIC0_BASE = 20c00000
[  131.344079] [drm:mixer_regs_dump] MXR_GRAPHIC0_SPAN = 00000780
[  131.349895] [drm:mixer_regs_dump] MXR_GRAPHIC0_WH = 07800438
[  131.355537] [drm:mixer_regs_dump] MXR_GRAPHIC0_SXY = 00000000
[  131.361265] [drm:mixer_regs_dump] MXR_GRAPHIC0_DXY = 00000000
[  131.366994] [drm:mixer_regs_dump] MXR_GRAPHIC1_CFG = 00000000
[  131.372723] [drm:mixer_regs_dump] MXR_GRAPHIC1_BASE = 00000000
[  131.378539] [drm:mixer_regs_dump] MXR_GRAPHIC1_SPAN = 00000000
[  131.384354] [drm:mixer_regs_dump] MXR_GRAPHIC1_WH = 00000000
[  131.389996] [drm:mixer_regs_dump] MXR_GRAPHIC1_SXY = 00000000
[  131.395725] [drm:mixer_regs_dump] MXR_GRAPHIC1_DXY = 00000000
[  131.401486] PAGE FAULT occurred at 0x0 by 12e20000.sysmmu(Page table base: 0x6d990000)
[  131.409353]  Lv1 entry: 0x6e0f2401
[  131.412753] ------------[ cut here ]------------
[  131.417339] kernel BUG at drivers/iommu/exynos-iommu.c:358!
[  131.422894] Internal error: Oops - BUG: 0 [#1] PREEMPT SMP ARM
[  131.428709] Modules linked in: ecb bridge stp llc bnep btrfs xor xor_neon zlib_inflate zlib_deflate raid6_pq btusb bluetooth usb_storage s5p_jpeg
videobuf2_dma_contig videobuf2_memops v4l2_mem2mem videobuf2_core
[  131.447461] CPU: 0 PID: 2418 Comm: lt-modetest Tainted: G        W       4.0.1-debug+ #3
[  131.455530] Hardware name: SAMSUNG EXYNOS (Flattened Device Tree)
[  131.461607] task: ee194100 ti: ec4fe000 task.ti: ec4fe000
[  131.466995] PC is at exynos_sysmmu_irq+0x2a0/0x2a8
[  131.471766] LR is at vprintk_emit+0x268/0x594
[  131.476103] pc : [<c02781a4>]    lr : [<c00650d0>]    psr: a00001d3
[  131.476103] sp : ec4ff9d8  ip : 00000000  fp : ec4ffa14
[  131.487559] r10: ffffffda  r9 : ee206e28  r8 : ee2d1a10
[  131.492767] r7 : 00000000  r6 : 00000000  r5 : 00000000  r4 : ee206e10
[  131.499277] r3 : c06fca20  r2 : 00000000  r1 : 00000000  r0 : ee28be00
[  131.505788] Flags: NzCv  IRQs off  FIQs off  Mode SVC_32  ISA ARM  Segment user
[  131.513079] Control: 10c5387d  Table: 6c72404a  DAC: 00000015
[  131.518808] Process lt-modetest (pid: 2418, stack limit = 0xec4fe218)
[  131.525231] Stack: (0xec4ff9d8 to 0xec500000)
[  131.529571] f9c0:                                                       ec4ff9e4 c03a0c40
[  131.537732] f9e0: bbfa6e35 6d990000 6d161c3d ee20a900 ee04a7e0 00000028 ee007000 00000000
[  131.545891] fa00: 00000000 c06fb1fc ec4ffa5c ec4ffa18 c0066a34 c0277f10 ee257664 0000000b
[  131.554050] fa20: ec4ffa5c c06fafbb ee04a780 c06fb1e8 00000000 ee04a780 ee04a7e0 ee20a900
[  131.562209] fa40: ee007000 00000015 ec4ffb48 ee008000 ec4ffa7c ec4ffa60 c0066c90 c00669e0
[  131.570369] fa60: 00020000 ee04a780 ee04a7e0 00001000 ec4ffa94 ec4ffa80 c0069c6c c0066c58
[  131.578528] fa80: 00000028 ee004450 ec4ffaac ec4ffa98 c0066028 c0069bac 000000a0 c06e19b4
[  131.586687] faa0: ec4ffad4 ec4ffab0 c0223678 c0066000 c02235dc 00000015 00000000 00000015
[  131.594846] fac0: ec4ffc80 00000001 ec4ffaec ec4ffad8 c0066028 c02235e8 00000089 c06bfc54
[  131.603005] fae0: ec4ffb1c ec4ffaf0 c006633c c0066000 ec4ffb48 f002000c 00000025 00000015
[  131.611165] fb00: c06c680c ec4ffb48 f0020000 ee008000 ec4ffb44 ec4ffb20 c000867c c00662c4
[  131.619324] fb20: c02046ac 60000153 ffffffff ec4ffb7c 00000000 00000101 ec4ffbb4 ec4ffb48
[  131.627483] fb40: c0013240 c0008650 00000001 ee257508 00000002 00000001 ee257504 ee257508
[  131.635642] fb60: 00000000 c06bf27c 00000000 00000101 ee008000 ec4ffbb4 00000000 ec4ffb90
[  131.643802] fb80: c002e124 c02046ac 60000153 ffffffff c002e09c 00000000 c06c6080 00000283
[  131.651960] fba0: 00000001 c06fb1ac ec4ffc0c ec4ffbb8 c002d690 c002e0a8 ee78d080 ee008000
[  131.660120] fbc0: 00400000 c04eb3b0 ffff7c44 c06c6100 c06fdac0 0000000a c06bf2f0 c06c6080
[  131.668279] fbe0: c06bfc54 c06bfc54 00000000 00000025 00000000 00000001 ec4ffc80 ee008000
[  131.676438] fc00: ec4ffc24 ec4ffc10 c002dbb8 c002d564 00000089 c06bfc54 ec4ffc54 ec4ffc28
[  131.684597] fc20: c0066340 c002dafc ec4ffc80 f002000c 0000001c 0000000c c06c680c ec4ffc80
[  131.692757] fc40: f0020000 00000080 ec4ffc7c ec4ffc58 c000867c c00662c4 c04e6624 60000053
[  131.700916] fc60: ffffffff ec4ffcb4 c072df54 ee22d010 ec4ffcdc ec4ffc80 c0013240 c0008650
[  131.709075] fc80: ee22d664 ee194100 00000000 ec4fe000 60000053 00000400 00000002 ee22d420
[  131.717234] fca0: c072df54 ee22d010 00000080 ec4ffcdc ec4ffcc8 ec4ffcc8 c04e6620 c04e6624
[  131.725393] fcc0: 60000053 ffffffff ec4fe000 c072df54 ec4ffd34 ec4ffce0 c02b64d0 c04e6618
[  131.733552] fce0: ec4ffcf8 00000000 00000000 60000053 00010000 00010000 00000000 200cb000
[  131.741712] fd00: 20080000 ee22d664 00000001 ee256000 ee261400 ee22d420 00000080 00000080
[  131.749871] fd20: ee256000 00000280 ec4ffd74 ec4ffd38 c02a8844 c02b5fec 00000080 00000280
[  131.758030] fd40: 000001e0 00000000 00000000 00000280 000001e0 ee22d220 01e00000 00000002
[  131.766189] fd60: ee22d420 ee261400 ec4ffdbc ec4ffd78 c0293cbc c02a87a4 00000080 00000280
[  131.774348] fd80: 000001e0 00000000 00000000 02800000 01e00000 ee261400 ee22d460 ee261400
[  131.782508] fda0: ee22d420 00000000 01e00000 000001e0 ec4ffe24 ec4ffdc0 c0297800 c0293b24
[  131.790667] fdc0: 00000080 00000280 000001e0 00000000 00000000 02800000 01e00000 ec4ffdf8
[  131.798826] fde0: c028db00 00000080 00000080 ee256000 02800000 00000000 ec4ffe24 c06c6448
[  131.806985] fe00: c072df54 000000b7 ee013800 ec4ffe54 edbf7300 ec4ffe54 ec4fff04 ec4ffe28
[  131.815145] fe20: c028a848 c029768c 00000001 c06195d8 ec4ffe5c ec4ffe40 c0297680 c0521f6c
[  131.823304] fe40: 00000030 bed45d38 00000030 c03064b7 ec4ffe8c 00000011 00000015 00000022
[  131.831463] fe60: 00000000 00000080 00000080 00000280 000001e0 00000000 00000000 01e00000
[  131.839622] fe80: 02800000 00000000 00000000 0004b000 00000000 00000000 c00121e4 c0011080
[  131.847781] fea0: c00110a4 00000000 00000000 00000000 ec4ffeec ec4ffec0 c00110f0 c00121cc
[  131.855940] fec0: 00000000 c00e7fec ec4ffeec ec4ffed8 c004af2c dc8ba201 edae4fc0 edbf7000
[  131.864100] fee0: edbf7000 00000003 bed45d38 00000003 bed45d38 ee3f2040 ec4fff7c ec4fff08
[  131.872259] ff00: c010b62c c028a684 edae4fc0 00000000 00000000 b6666000 ec40d108 edae4fc4
[  131.880418] ff20: ec4fff6c ec4fff30 c00e7fec c02207b0 000001f9 00000000 edae5008 ec40d110
[  131.888577] ff40: 00070800 edae5008 edae4fc0 00070800 b6666000 edbf7000 edbf7000 c03064b7
[  131.896736] ff60: bed45d38 00000003 ec4fe000 00000000 ec4fffa4 ec4fff80 c010b84c c010b208
[  131.904896] ff80: 00000022 00000000 bed45d38 c03064b7 00000036 c000ede4 00000000 ec4fffa8
[  131.913055] ffa0: c000ec40 c010b81c 00000000 bed45d38 00000003 c03064b7 bed45d38 00000022
[  131.921214] ffc0: 00000000 bed45d38 c03064b7 00000036 00000080 00000080 00000000 000001e0
[  131.929373] ffe0: b6da4064 bed45d1c b6d98968 b6e8082c 60000050 00000003 00000000 00000000
[  131.937529] Backtrace:
[  131.939967] [<c0277f04>] (exynos_sysmmu_irq) from [<c0066a34>] (handle_irq_event_percpu+0x60/0x278)
[  131.948988]  r10:c06fb1fc r9:00000000 r8:00000000 r7:ee007000 r6:00000028 r5:ee04a7e0
[  131.956799]  r4:ee20a900
[  131.959320] [<c00669d4>] (handle_irq_event_percpu) from [<c0066c90>] (handle_irq_event+0x44/0x64)
[  131.968170]  r10:ee008000 r9:ec4ffb48 r8:00000015 r7:ee007000 r6:ee20a900 r5:ee04a7e0
[  131.975982]  r4:ee04a780
[  131.978504] [<c0066c4c>] (handle_irq_event) from [<c0069c6c>] (handle_level_irq+0xcc/0x144)
[  131.986832]  r6:00001000 r5:ee04a7e0 r4:ee04a780 r3:00020000
[  131.992478] [<c0069ba0>] (handle_level_irq) from [<c0066028>] (generic_handle_irq+0x34/0x44)
[  132.000894]  r5:ee004450 r4:00000028
[  132.004459] [<c0065ff4>] (generic_handle_irq) from [<c0223678>] (combiner_handle_cascade_irq+0x9c/0x108)
[  132.013914]  r4:c06e19b4 r3:000000a0
[  132.017476] [<c02235dc>] (combiner_handle_cascade_irq) from [<c0066028>] (generic_handle_irq+0x34/0x44)
[  132.026847]  r8:00000001 r7:ec4ffc80 r6:00000015 r5:00000000 r4:00000015 r3:c02235dc
[  132.034576] [<c0065ff4>] (generic_handle_irq) from [<c006633c>] (__handle_domain_irq+0x84/0xf0)
[  132.043252]  r4:c06bfc54 r3:00000089
[  132.046815] [<c00662b8>] (__handle_domain_irq) from [<c000867c>] (gic_handle_irq+0x38/0x70)
[  132.055144]  r10:ee008000 r9:f0020000 r8:ec4ffb48 r7:c06c680c r6:00000015 r5:00000025
[  132.062956]  r4:f002000c r3:ec4ffb48
[  132.066520] [<c0008644>] (gic_handle_irq) from [<c0013240>] (__irq_svc+0x40/0x74)
[  132.073980] Exception stack(0xec4ffb48 to 0xec4ffb90)
[  132.079016] fb40:                   00000001 ee257508 00000002 00000001 ee257504 ee257508
[  132.087176] fb60: 00000000 c06bf27c 00000000 00000101 ee008000 ec4ffbb4 00000000 ec4ffb90
[  132.095333] fb80: c002e124 c02046ac 60000153 ffffffff
[  132.100367]  r9:00000101 r8:00000000 r7:ec4ffb7c r6:ffffffff r5:60000153 r4:c02046ac
[  132.108098] [<c002e09c>] (tasklet_hi_action) from [<c002d690>] (__do_softirq+0x138/0x38c)
[  132.116251]  r8:c06fb1ac r7:00000001 r6:00000283 r5:c06c6080 r4:00000000 r3:c002e09c
[  132.123980] [<c002d558>] (__do_softirq) from [<c002dbb8>] (irq_exit+0xc8/0x104)
[  132.131268]  r10:ee008000 r9:ec4ffc80 r8:00000001 r7:00000000 r6:00000025 r5:00000000
[  132.139080]  r4:c06bfc54
[  132.141600] [<c002daf0>] (irq_exit) from [<c0066340>] (__handle_domain_irq+0x88/0xf0)
[  132.149409]  r4:c06bfc54 r3:00000089
[  132.152971] [<c00662b8>] (__handle_domain_irq) from [<c000867c>] (gic_handle_irq+0x38/0x70)
[  132.161300]  r10:00000080 r9:f0020000 r8:ec4ffc80 r7:c06c680c r6:0000000c r5:0000001c
[  132.169112]  r4:f002000c r3:ec4ffc80
[  132.172675] [<c0008644>] (gic_handle_irq) from [<c0013240>] (__irq_svc+0x40/0x74)
[  132.180137] Exception stack(0xec4ffc80 to 0xec4ffcc8)
[  132.185173] fc80: ee22d664 ee194100 00000000 ec4fe000 60000053 00000400 00000002 ee22d420
[  132.193332] fca0: c072df54 ee22d010 00000080 ec4ffcdc ec4ffcc8 ec4ffcc8 c04e6620 c04e6624
[  132.201489] fcc0: 60000053 ffffffff
[  132.204961]  r9:ee22d010 r8:c072df54 r7:ec4ffcb4 r6:ffffffff r5:60000053 r4:c04e6624
[  132.212694] [<c04e660c>] (_raw_spin_unlock_irqrestore) from [<c02b64d0>] (mixer_win_commit+0x4f0/0xcc8)
[  132.222060]  r4:c072df54 r3:ec4fe000
[  132.225625] [<c02b5fe0>] (mixer_win_commit) from [<c02a8844>] (exynos_update_plane+0xac/0xb8)
[  132.234126]  r10:00000280 r9:ee256000 r8:00000080 r7:00000080 r6:ee22d420 r5:ee261400
[  132.241937]  r4:ee256000
[  132.244461] [<c02a8798>] (exynos_update_plane) from [<c0293cbc>] (__setplane_internal+0x1a4/0x2c0)
[  132.253395]  r7:ee261400 r6:ee22d420 r5:00000002 r4:01e00000
[  132.259041] [<c0293b18>] (__setplane_internal) from [<c0297800>] (drm_mode_setplane+0x180/0x244)
[  132.267804]  r9:000001e0 r8:01e00000 r7:00000000 r6:ee22d420 r5:ee261400 r4:ee22d460
[  132.275535] [<c0297680>] (drm_mode_setplane) from [<c028a848>] (drm_ioctl+0x1d0/0x58c)
[  132.283428]  r10:ec4ffe54 r9:edbf7300 r8:ec4ffe54 r7:ee013800 r6:000000b7 r5:c072df54
[  132.291240]  r4:c06c6448
[  132.293763] [<c028a678>] (drm_ioctl) from [<c010b62c>] (do_vfs_ioctl+0x430/0x614)
[  132.301222]  r10:ee3f2040 r9:bed45d38 r8:00000003 r7:bed45d38 r6:00000003 r5:edbf7000
[  132.309034]  r4:edbf7000
[  132.311555] [<c010b1fc>] (do_vfs_ioctl) from [<c010b84c>] (SyS_ioctl+0x3c/0x64)
[  132.318842]  r10:00000000 r9:ec4fe000 r8:00000003 r7:bed45d38 r6:c03064b7 r5:edbf7000
[  132.326654]  r4:edbf7000
[  132.329176] [<c010b810>] (SyS_ioctl) from [<c000ec40>] (ret_fast_syscall+0x0/0x34)
[  132.336723]  r8:c000ede4 r7:00000036 r6:c03064b7 r5:bed45d38 r4:00000000 r3:00000022
[  132.344451] Code: e3130002 0affffaf eb09a67d eaffffad (e7f001f2)
[  132.350528] ---[ end trace d428689b94df895c ]---
[  132.355126] Kernel panic - not syncing: Fatal exception in interrupt
[  132.361465] CPU2: stopping
[  132.364155] CPU: 2 PID: 0 Comm: swapper/2 Tainted: G      D W       4.0.1-debug+ #3
[  132.371791] Hardware name: SAMSUNG EXYNOS (Flattened Device Tree)
[  132.377866] Backtrace:
[  132.380304] [<c0012484>] (dump_backtrace) from [<c001269c>] (show_stack+0x18/0x1c)
[  132.387849]  r6:c06e158c r5:ffffffff r4:00000000 r3:dc8ba201
[  132.393497] [<c0012684>] (show_stack) from [<c04dfb94>] (dump_stack+0x88/0xc8)
[  132.400698] [<c04dfb0c>] (dump_stack) from [<c0014894>] (handle_IPI+0x1c8/0x2c4)
[  132.408073]  r6:c06bfc54 r5:c06bfc54 r4:00000005 r3:ee0b0000
[  132.413718] [<c00146cc>] (handle_IPI) from [<c00086b0>] (gic_handle_irq+0x6c/0x70)
[  132.421267]  r9:f0028000 r8:ee0b1f48 r7:c06c680c r6:fffffff5 r5:00000005 r4:f002800c
[  132.428995] [<c0008644>] (gic_handle_irq) from [<c0013240>] (__irq_svc+0x40/0x74)
[  132.436457] Exception stack(0xee0b1f48 to 0xee0b1f90)
[  132.441493] 1f40:                   00000001 00000000 00000000 c00206c0 c06c6518 c04eb3a4
[  132.449653] 1f60: 00000000 00000000 c06c0dc0 00000001 c06fb774 ee0b1f9c ee0b1fa0 ee0b1f90
[  132.457811] 1f80: c000f82c c000f830 600f0053 ffffffff
[  132.462844]  r9:00000001 r8:c06c0dc0 r7:ee0b1f7c r6:ffffffff r5:600f0053 r4:c000f830
[  132.470575] [<c000f7f0>] (arch_cpu_idle) from [<c005b6e8>] (cpu_startup_entry+0x318/0x4ec)
[  132.478818] [<c005b3d0>] (cpu_startup_entry) from [<c00144d0>] (secondary_start_kernel+0xf4/0x100)
[  132.487755]  r7:c06fd440
[  132.490279] [<c00143dc>] (secondary_start_kernel) from [<40008744>] (0x40008744)
[  132.497651]  r4:6e09006a r3:c000872c
[  132.501210] CPU3: stopping
[  132.503904] CPU: 3 PID: 0 Comm: swapper/3 Tainted: G      D W       4.0.1-debug+ #3
[  132.511539] Hardware name: SAMSUNG EXYNOS (Flattened Device Tree)
[  132.517614] Backtrace:
[  132.520051] [<c0012484>] (dump_backtrace) from [<c001269c>] (show_stack+0x18/0x1c)
[  132.527597]  r6:c06e158c r5:ffffffff r4:00000000 r3:dc8ba201
[  132.533243] [<c0012684>] (show_stack) from [<c04dfb94>] (dump_stack+0x88/0xc8)
[  132.540446] [<c04dfb0c>] (dump_stack) from [<c0014894>] (handle_IPI+0x1c8/0x2c4)
[  132.547820]  r6:c06bfc54 r5:c06bfc54 r4:00000005 r3:ee0b2000
[  132.553466] [<c00146cc>] (handle_IPI) from [<c00086b0>] (gic_handle_irq+0x6c/0x70)
[  132.561014]  r9:f002c000 r8:ee0b3f48 r7:c06c680c r6:fffffff5 r5:00000005 r4:f002c00c
[  132.568743] [<c0008644>] (gic_handle_irq) from [<c0013240>] (__irq_svc+0x40/0x74)
[  132.576205] Exception stack(0xee0b3f48 to 0xee0b3f90)
[  132.581241] 3f40:                   00000001 00000000 00000000 c00206c0 c06c6518 c04eb3a4
[  132.589401] 3f60: 00000000 00000000 c06c0dc0 00000001 c06fb774 ee0b3f9c ee0b3fa0 ee0b3f90
[  132.597558] 3f80: c000f82c c000f830 600f0053 ffffffff
[  132.602591]  r9:00000001 r8:c06c0dc0 r7:ee0b3f7c r6:ffffffff r5:600f0053 r4:c000f830
[  132.610321] [<c000f7f0>] (arch_cpu_idle) from [<c005b6e8>] (cpu_startup_entry+0x318/0x4ec)
[  132.618566] [<c005b3d0>] (cpu_startup_entry) from [<c00144d0>] (secondary_start_kernel+0xf4/0x100)
[  132.627503]  r7:c06fd440
[  132.630023] [<c00143dc>] (secondary_start_kernel) from [<40008744>] (0x40008744)
[  132.637399]  r4:6e09006a r3:c000872c
[  132.640958] CPU1: stopping
[  132.643651] CPU: 1 PID: 0 Comm: swapper/1 Tainted: G      D W       4.0.1-debug+ #3
[  132.651287] Hardware name: SAMSUNG EXYNOS (Flattened Device Tree)
[  132.657362] Backtrace:
[  132.659799] [<c0012484>] (dump_backtrace) from [<c001269c>] (show_stack+0x18/0x1c)
[  132.667344]  r6:c06e158c r5:ffffffff r4:00000000 r3:dc8ba201
[  132.672991] [<c0012684>] (show_stack) from [<c04dfb94>] (dump_stack+0x88/0xc8)
[  132.680194] [<c04dfb0c>] (dump_stack) from [<c0014894>] (handle_IPI+0x1c8/0x2c4)
[  132.687569]  r6:c06bfc54 r5:c06bfc54 r4:00000005 r3:ee0ae000
[  132.693214] [<c00146cc>] (handle_IPI) from [<c00086b0>] (gic_handle_irq+0x6c/0x70)
[  132.700762]  r9:f0024000 r8:ee0aff48 r7:c06c680c r6:fffffff5 r5:00000005 r4:f002400c
[  132.708491] [<c0008644>] (gic_handle_irq) from [<c0013240>] (__irq_svc+0x40/0x74)
[  132.715953] Exception stack(0xee0aff48 to 0xee0aff90)
[  132.720989] ff40:                   00000001 00000000 00000000 c00206c0 c06c6518 c04eb3a4
[  132.729149] ff60: 00000000 00000000 c06c0dc0 00000001 c06fb774 ee0aff9c ee0affa0 ee0aff90
[  132.737306] ff80: c000f82c c000f830 60070053 ffffffff
[  132.742339]  r9:00000001 r8:c06c0dc0 r7:ee0aff7c r6:ffffffff r5:60070053 r4:c000f830
[  132.750069] [<c000f7f0>] (arch_cpu_idle) from [<c005b6e8>] (cpu_startup_entry+0x318/0x4ec)
[  132.758314] [<c005b3d0>] (cpu_startup_entry) from [<c00144d0>] (secondary_start_kernel+0xf4/0x100)
[  132.767251]  r7:c06fd440
[  132.769772] [<c00143dc>] (secondary_start_kernel) from [<40008744>] (0x40008744)
[  132.777146]  r4:6e09006a r3:c000872c
[  132.780709] ---[ end Kernel panic - not syncing: Fatal exception in interrupt

Signed-off-by: Tobias Jakobi <tjakobi@math.uni-bielefeld.de>
Reviewed-by: Gustavo Padovan <gustavo.padovan@collabora.co.uk>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
2015-05-19 22:50:53 +09:00
Krzysztof Kozlowski 362edccc7a drm/exynos: Consolidate return statements in fimd_bind()
Simplify the code and remove superfluous return statement. Just return
the result of fimd_iommu_attach_devices().

Signed-off-by: Krzysztof Kozlowski <k.kozlowski.k@gmail.com>
Reviewed-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Tested-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
2015-05-19 22:50:53 +09:00
Krzysztof Kozlowski f3aaf76244 drm/exynos: Constify exynos_drm_crtc_ops
The Exynos DRM code does not modify the ops provided by CRTC driver in
exynos_drm_crtc_create() call.

Signed-off-by: Krzysztof Kozlowski <k.kozlowski.k@gmail.com>
Reviewed-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Tested-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
2015-05-19 22:50:53 +09:00
Krzysztof Kozlowski 48107d7b0d drm/exynos: Fix build breakage on !DRM_EXYNOS_FIMD
Disabling the CONFIG_DRM_EXYNOS_FIMD (e.g. by enabling of CONFIG_FB_S3C)
leads to build error:

drivers/built-in.o: In function `exynos_dp_dpms':
binder.c:(.text+0xd6a840): undefined reference to `fimd_dp_clock_enable'
binder.c:(.text+0xd6ab54): undefined reference to `fimd_dp_clock_enable'

Fix this by changing direct call to fimd_dp_clock_enable() into optional
call to exynos_drm_crtc_ops->clock_enable(). Only the DRM_EXYNOS_FIMD
implements this op.

Signed-off-by: Krzysztof Kozlowski <k.kozlowski.k@gmail.com>
Reviewed-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Tested-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
2015-05-19 22:50:53 +09:00
Krzysztof Kozlowski d6b163026c drm/exynos: mixer: Constify platform_device_id
The platform_device_id is not modified by the driver and core uses it as
const.

Signed-off-by: Krzysztof Kozlowski <k.kozlowski.k@gmail.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
2015-05-19 22:50:52 +09:00
Tobias Jakobi 7a57ca7c89 drm/exynos: mixer: cleanup pixelformat handling
Move the defines for the pixelformats that the mixer supports out
of mixer_graph_buffer() to the top of the source.
Then select the mixer pixelformat (pf) in mixer_graph_buffer() based on
the plane's pf (and not bpp).
Also add handling of RGB565 and XRGB1555 to the switch statement and
exit early if the plane has an unsupported pf.

Partially based on 'drm/exynos: enable/disable blend based on pixel
format' by Gustavo Padovan <gustavo.padovan@collabora.co.uk>.

v2: Use the shorter MXR_FORMAT as prefix.
v3: Re-add ARGB8888 because of compatibility reasons
    (suggested by Joonyoung Shim).

Reviewed-by: Gustavo Padovan <gustavo.padovan@collabora.co.uk>
Signed-off-by: Tobias Jakobi <tjakobi@math.uni-bielefeld.de>
Acked-by: Joonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
2015-05-19 22:50:52 +09:00
Tobias Jakobi 8f2590f8e3 drm/exynos: mixer: also allow NV21 for the video processor
All the necessary code is already there, just need to
handle the format in the switch statement.

Signed-off-by: Tobias Jakobi <tjakobi@math.uni-bielefeld.de>
Acked-by: Joonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
2015-05-19 22:50:52 +09:00
Tobias Jakobi fac8a5b25f drm/exynos: mixer: remove buffer count handling in vp_video_buffer()
The video processor (VP) supports four formats: NV12, NV21 and its
tiled variants. All these formats are bi-planar, so the buffer
count in vp_video_buffer() is always 2.

Also properly exit if we're called with an invalid (non-VP) pixelformat.

Signed-off-by: Tobias Jakobi <tjakobi@math.uni-bielefeld.de>
Acked-by: Joonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
2015-05-19 22:50:52 +09:00
Tobias Jakobi 5d878bdb51 drm/exynos: plane: honor buffer offset for dma_addr
Previously we were ignoring the buffer offsets that are
passed through the addfb2 ioctl. This didn't cause any
major issues, since for uni-planar formats (like XRGB8888)
userspace would most of the time just use offsets[0]=0.

However with NV12 offsets[1] is very likely non-zero.
So properly apply the offsets to our dma addresses.

Signed-off-by: Tobias Jakobi <tjakobi@math.uni-bielefeld.de>
Acked-by: Joonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
2015-05-19 22:50:52 +09:00
Tobias Jakobi d10ebb9f13 drm/exynos: fb: use drm_format_num_planes to get buffer count
The previous code had some special case handling for the buffer
count in exynos_drm_format_num_buffers().

This code was incorrect though, since this special case doesn't
exist for DRM. It stemmed from the existence of the special NV12M
V4L2 format. NV12 is a bi-planar format (separate planes for luma
and chroma) and V4L2 differentiates between a NV12 buffer where
luma and chroma is contiguous in memory (so no data between
luma/chroma), and a NV12 buffer where luma and chroma have two
explicit memory locations (which is then called NV12M).

This distinction doesn't exist for DRM. A bi-planar format always
explicitly comes with the information about its two planes (even
if these planes should be contiguous).

Signed-off-by: Tobias Jakobi <tjakobi@math.uni-bielefeld.de>
Acked-by: Joonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
2015-05-19 22:50:51 +09:00
Oded Gabbay 7591cd2cd5 drm/amdkfd: change driver version to 0.7.2
Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
2015-05-19 13:02:30 +03:00
Andrew Lewycky 8377396b5d drm/amdkfd: Implement events IOCTLs
Signed-off-by: Andrew Lewycky <Andrew.Lewycky@amd.com>
Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
2015-05-19 13:02:29 +03:00
Oded Gabbay 81663016db drm/amdkfd: Add module parameter of send_sigterm
This patch adds a new kernel module parameter to amdkfd,
called send_sigterm.

This parameter specifies whether amdkfd should send the
SIGTERM signal to an HSA process, when the following conditions
occur:

1. The GPU triggers an exception regarding a kernel that was
   issued by this process.

2. The HSA process isn't waiting on an event that handles
   this exception.

The default behavior is not to send a SIGTERM and suffice
with a dmesg error print.

Reviewed-by: Ben Goz <ben.goz@amd.com>
Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
2015-05-19 13:02:28 +03:00
Alexey Skidanov 930c5ff439 drm/amdkfd: Add bad opcode exception handling
Signed-off-by: Alexey Skidanov <alexey.skidanov@gmail.com>
Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
2015-05-19 13:02:28 +03:00
Alexey Skidanov 59d3e8be87 drm/amdkfd: Add memory exception handling
This patch adds Peripheral Page Request (PPR) failure processing
and reporting.

Bad address or pointer to a system memory block with inappropriate
read/write permission cause such PPR failure during a user queue
processing. PPR request handling is done by IOMMU driver notifying
AMDKFD module on PPR failure.

The process triggering a PPR failure will be notified by
appropriate event or SIGTERM signal will be sent to it.

v3:
- Change all bool fields in struct kfd_memory_exception_failure to
  uint32_t

Signed-off-by: Alexey Skidanov <alexey.skidanov@gmail.com>
Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
2015-05-19 13:02:27 +03:00
Andrew Lewycky f3a398183f drm/amdkfd: Add the events module
This patch adds the events module (kfd_events.c) and the interrupt
handle module for Kaveri (cik_event_interrupt.c).

The patch updates the interrupt_is_wanted(), so that it now calls the
interrupt isr function specific for the device that received the
interrupt. That function(implemented in cik_event_interrupt.c)
returns whether this interrupt is of interest to us or not.

The patch also updates the interrupt_wq(), so that it now calls the
device's specific wq function, which checks the interrupt source
and tries to signal relevant events.

v2:

Increase limit of signal events to 4096 per process
Remove bitfields from struct cik_ih_ring_entry
Rename radeon_kfd_event_mmap to kfd_event_mmap
Add debug prints to allocate_free_slot and allocate_signal_page
Make allocate_event_notification_slot return a correct value
Add warning prints to create_signal_event
Remove error print from IOCTL path
Reformatted debug prints in kfd_event_mmap
Map correct size (as received from mmap) in kfd_event_mmap

v3:

Reduce limit of signal events back to 256 per process
Fix allocation of kernel memory for signal events

Signed-off-by: Andrew Lewycky <Andrew.Lewycky@amd.com>
Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
2015-05-19 13:02:26 +03:00
Andrew Lewycky 29a5d3eb9a drm/amdkfd: add events IOCTL set definitions
- AMDKFD_IOC_CREATE_EVENT:
	Creates a new event of a specified type

- AMDKFD_IOC_DESTROY_EVENT:
	Destroys an existing event

- AMDKFD_IOC_SET_EVENT:
	Signal an existing event

- AMDKFD_IOC_RESET_EVENT:
	Reset an existing event

- AMDKFD_IOC_WAIT_EVENTS:
	Wait on event(s) until they are signaled

v2:

- Move the limit of the signal events to kfd_ioctl.h so it
  can be used by userspace

v3:
- Change all bool fields in struct kfd_memory_exception_failure
to uint32_t

Signed-off-by: Andrew Lewycky <Andrew.Lewycky@amd.com>
Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
2015-05-19 13:02:00 +03:00
Andrew Lewycky 2249d55827 drm/amdkfd: Add interrupt handling module
This patch adds the interrupt handling module, kfd_interrupt.c, and its
related members in different data structures to the amdkfd driver.

The amdkfd interrupt module maintains an internal interrupt ring
per amdkfd device. The internal interrupt ring contains interrupts
that needs further handling. The extra handling is deferred to
a later time through a workqueue.

There's no acknowledgment for the interrupts we use. The hardware
simply queues a new interrupt each time without waiting.

The fixed-size internal queue means that it's possible for us to lose
interrupts because we have no back-pressure to the hardware.

However, only interrupts that are "wanted" by amdkfd, are copied into
the amdkfd s/w interrupt ring, in order to minimize the chances
for overflow of the ring.

Signed-off-by: Andrew Lewycky <Andrew.Lewycky@amd.com>
Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
2015-05-19 12:13:39 +03:00
Oded Gabbay d36b94fcf0 drm/radeon: Add init interrupt kfd->kgd interface
This patch adds a new interface function to the kfd->kgd interface.
The function is kgd_init_interrupts() and its function is to
initialize a pipe's interrupts.

The function currently enables the timestamp interrupt and the
bad opcode interrupt.

Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
2015-05-19 12:13:39 +03:00
Oded Gabbay 3e3f6e1a90 drm/amdkfd: make the sdma vm init to be asic specific
Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-05-19 12:13:39 +03:00
Oded Gabbay d42af779fb drm/amdkfd: Use new struct for asic specific ops
This patch creates a new structure for asic specific operations, instead
of using the existing structure of operations.

This is done to make the code flow more logic, readable and maintainable.

The change is done only to the device queue manager module at this point.

Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-05-19 12:13:38 +03:00
Oded Gabbay 8856d8e048 drm/amdkfd: reformat some debug prints
Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
2015-05-19 12:13:38 +03:00
Firo Yang 1549fcd15c drm/amdkfd: Remove unessary void pointer cast
kmalloc() returns a void pointer - no need to cast it in
drivers/gpu/drm/amd/amdkfd/kfd_process.c::kfd_process_destroy_delayed()

Signed-off-by: Firo Yang <firogm@gmail.com>
Signed-off-by: Oded Gabbay <oded.gabbay@amd.com>
2015-05-19 12:13:38 +03:00
Thomas Gummerer 54da691deb drm/i915: fix screen flickering
Commit c9f038a1a5 ("drm/i915: Don't assume primary & cursor are
always on for wm calculation (v4)") fixes a null pointer dereference.
Setting the primary and cursor panes to false in
ilk_compute_wm_parameters to false does however give the following
errors in the kernel log and causes the screen to flicker.

[  101.133716] [drm:intel_set_cpu_fifo_underrun_reporting [i915]]
*ERROR* uncleared fifo underrun on pipe A
[  101.133725] [drm:intel_cpu_fifo_underrun_irq_handler [i915]]
*ERROR* CPU pipe A FIFO underrun

Always setting the panes to enabled fixes this error.

Helped-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Thomas Gummerer <t.gummerer@gmail.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Tested-by: Mario Kleiner <mario.kleiner.de@gmail.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2015-05-19 10:28:34 +03:00
Dave Airlie d0093404f8 Merge tag 'drm-intel-next-2015-05-08' of git://anongit.freedesktop.org/drm-intel into drm-next
- skl plane scaler support (Chandra Kondru)
- enable hsw cmd parser (Daniel and fix from Rebecca Palmer)
- skl dc5/6 support (low power display modes) from Suketu&Sunil
- dp compliance testing patches (Todd Previte)
- dp link training optimization (Mika Kahola)
- fixes to make skl resume work (Damien)
- rework modeset code to fully use atomic state objects (Ander&Maarten)
- pile of bxt w/a patchs from Nick Hoath
- (linear) partial gtt mmap support (Joonas Lahtinen)

* tag 'drm-intel-next-2015-05-08' of git://anongit.freedesktop.org/drm-intel: (103 commits)
  drm/i915: Update DRIVER_DATE to 20150508
  drm/i915: Only wait for required lanes in vlv_wait_port_ready()
  drm/i915: Fix possible security hole in command parsing
  drm/edid: Kerneldoc for newly added edid_corrupt
  drm/i915: Reject huge tiled objects
  Revert "drm/i915: Hack to tie both common lanes together on chv"
  drm/i915: Work around DISPLAY_PHY_CONTROL register corruption on CHV
  drm/i915: Implement chv display PHY lane stagger setup
  drm/i915/vlv: remove wait for previous GFX clk disable request
  drm/i915: Set crtc_state->active to false when CRTC is disabled (v2)
  drm/i915/skl: Re-indent part of skl_ddi_calculate_wrpll()
  drm/i915: Use partial view in mmap fault handler
  drm/i915: Add a partial GGTT view type
  drm/i915: Consider object pinned if any VMA is pinned
  drm/i915: Do not make assumptions on GGTT VMA sizes
  drm/i915/bxt: Mark WaCcsTlbPrefetchDisable as for Broxton also.
  drm/i915/bxt: Mark WaDisablePartialResolveInVc as for Broxton also.
  drm/i915/bxt: Mark Wa4x4STCOptimizationDisable as for Broxton also.
  drm/i915/bxt: Move WaForceEnableNonCoherent to Skylake only
  drm/i915/bxt: Enable WaEnableYV12BugFixInHalfSliceChicken7 for Broxton
  ...
2015-05-19 10:18:13 +10:00
Dave Airlie 64d237e66d Merge branch 'msm-fixes-4.1' of git://people.freedesktop.org/~robclark/linux into drm-fixes
msm fixes, pretty scattered.

* 'msm-fixes-4.1' of git://people.freedesktop.org/~robclark/linux:
  drm/msm: fix locking inconsistencies in gpu->destroy()
  drm/msm/dsi: Simplify the code to get the number of read byte
  drm/msm: Attach assigned encoder to eDP and DSI connectors
  drm/msm: setup vram after component_bind_all()
  drm/msm/dsi: use pr_err_ratelimited
  drm/msm: fix unbalanced DRM framebuffer init/destroy
  drm/msm/mdp5: Fix iteration on INTF config array
  drm/msm/dsi: Fixup missing *break* statement during cmd rx
  drm/msm/dp: fix error return code
  drm: msm: Fix build when legacy fbdev support isn't set
  drm/msm/dsi: Fix a couple more 64-bit build warnings
  drm/msm: Fix a couple of 64-bit build warnings
2015-05-19 10:17:34 +10:00
Maarten Lankhorst 036ef5733b drm/atomic: Allow drivers to subclass drm_atomic_state, v3
Drivers may need to store the state of shared resources, such as PLLs
or FIFO space, into the atomic state. Allow this by making it possible
to subclass drm_atomic_state.

Changes since v1:
- Change member names for functions to atomic_state_(alloc,clear)
- Change __drm_atomic_state_new to drm_atomic_state_init
- Allow free function to be overridden too, in case extra memory is
  allocated in alloc.
Changes since v2:
- Rename *_default_free to default_release, to make clear it doesn't
  free the state object itself.

Cc: dri-devel@lists.freedesktop.org
Acked-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-18 16:39:41 +02:00
Gustavo Padovan 744b058827 drm/atomic: remove duplicated assignment of old_plane_state
old_plane_state is already assigned to old_state->plane_states[i] inside
for_each_plane_in_state(). Here we remove an the extra assignment.

Signed-off-by: Gustavo Padovan <gustavo.padovan@collabora.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-18 08:53:21 +02:00
Rob Clark 774449ebcb drm/msm: fix locking inconsistencies in gpu->destroy()
In error paths, this was being called without struct_mutex held.
Leading to panics like:

  msm 1a00000.qcom,mdss_mdp: No memory protection without IOMMU
  Kernel panic - not syncing: BUG!
  CPU: 0 PID: 1409 Comm: cat Not tainted 4.0.0-dirty #4
  Hardware name: Qualcomm Technologies, Inc. APQ 8016 SBC (DT)
  Call trace:
  [<ffffffc000089c78>] dump_backtrace+0x0/0x118
  [<ffffffc000089da0>] show_stack+0x10/0x20
  [<ffffffc0006686d4>] dump_stack+0x84/0xc4
  [<ffffffc0006678b4>] panic+0xd0/0x210
  [<ffffffc0003e1ce4>] drm_gem_object_free+0x5c/0x60
  [<ffffffc000402870>] adreno_gpu_cleanup+0x60/0x80
  [<ffffffc0004035a0>] a3xx_destroy+0x20/0x70
  [<ffffffc0004036f4>] a3xx_gpu_init+0x84/0x108
  [<ffffffc0004018b8>] adreno_load_gpu+0x58/0x190
  [<ffffffc000419dac>] msm_open+0x74/0x88
  [<ffffffc0003e0a48>] drm_open+0x168/0x400
  [<ffffffc0003e7210>] drm_stub_open+0xa8/0x118
  [<ffffffc0001a0e84>] chrdev_open+0x94/0x198
  [<ffffffc000199f88>] do_dentry_open+0x208/0x310
  [<ffffffc00019a4c4>] vfs_open+0x44/0x50
  [<ffffffc0001aa26c>] do_last.isra.14+0x2c4/0xc10
  [<ffffffc0001aac38>] path_openat+0x80/0x5e8
  [<ffffffc0001ac354>] do_filp_open+0x2c/0x98
  [<ffffffc00019b60c>] do_sys_open+0x13c/0x228
  [<ffffffc00019b72c>] SyS_openat+0xc/0x18
  CPU1: stopping

But there isn't any particularly good reason to hold struct_mutex for
teardown, so just standardize on calling it without the mutex held and
use the _unlocked() versions for GEM obj unref'ing

Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-05-15 09:28:27 -04:00
Dave Airlie dde10068e1 Merge branch 'drm-armada-devel' of git://ftp.arm.linux.org.uk/~rmk/linux-arm into drm-next
some minor cleanups
* 'drm-armada-devel' of git://ftp.arm.linux.org.uk/~rmk/linux-arm:
  drm/armada: armada_drv: Remove unused function
  drm/armada: armada_output: Remove some unused functions
2015-05-15 15:24:41 +10:00
Dave Airlie 72a81683a8 Merge branch 'drm-tda998x-devel' of git://ftp.arm.linux.org.uk/~rmk/linux-arm into drm-next
tda998x: use helpers for infoframe.
* 'drm-tda998x-devel' of git://ftp.arm.linux.org.uk/~rmk/linux-arm:
  drm/i2c: tda998x: use drm_hdmi_avi_infoframe_from_display_mode()
2015-05-15 15:23:10 +10:00
Dave Airlie 4723132456 Merge tag 'drm-intel-fixes-2015-05-13' of git://anongit.freedesktop.org/drm-intel into drm-fixes
fix one gpu hang on resume.

* tag 'drm-intel-fixes-2015-05-13' of git://anongit.freedesktop.org/drm-intel:
  drm/i915: Avoid GPU hang when coming out of s3 or s4
2015-05-15 15:21:18 +10:00
Hai Li ec1936eb09 drm/msm/dsi: Simplify the code to get the number of read byte
During cmd rx, only new versions of H/W provide register to read back
the real number of byte returned by panel. For the old versions, reading
this register will not get the right number. In fact, we only need to
assume the returned data is the same size as we expected, because later
we will check the data type to detect error.

Signed-off-by: Hai Li <hali@codeaurora.org>
2015-05-14 16:57:25 -04:00
Hai Li 6f6b287968 drm/msm: Attach assigned encoder to eDP and DSI connectors
drm_mode_connector_attach_encoder() function call is missing
during eDP and DSI connector initialization. As a result,
no encoder is returned by DRM_IOCTL_MODE_GETCONNECTOR system
call. This change is to fix this issue.

Signed-off-by: Hai Li <hali@codeaurora.org>
2015-05-14 16:56:42 -04:00
Rob Clark 13f15565f7 drm/msm: setup vram after component_bind_all()
First of all, we don't want -EPROBE_DEFER when trying to bind children
to cause us to forget to free our vram.  And second we don't want vram
allocation fail to trigger _unbind_all() before _bind_all().

Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-05-14 11:50:39 -04:00
Rob Clark ff431fa4d9 drm/msm/dsi: use pr_err_ratelimited
When things go badly we can get a lot of these error irqs.  Let's not
DoS the user.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-05-14 11:50:38 -04:00
Stephane Viau 7194b62c8c drm/msm: fix unbalanced DRM framebuffer init/destroy
When msm_framebuffer_init() fails before calling drm_framebuffer_init(),
drm_framebuffer_cleanup() [called in msm_framebuffer_destroy()]
is still being called even though drm_framebuffer_init() was not
called for that buffer. Thus a NULL pointer derefencing:

[  247.529691] Unable to handle kernel NULL pointer dereference at virtual address 0000027c
...
[  247.563996] PC is at __mutex_lock_slowpath+0x94/0x3a8
...
[  247.823025] [<c07c3c78>] (__mutex_lock_slowpath) from [<c07c3fac>] (mutex_lock+0x20/0x3c)
[  247.831186] [<c07c3fac>] (mutex_lock) from [<c0347cf0>] (drm_framebuffer_cleanup+0x18/0x38)
[  247.839520] [<c0347cf0>] (drm_framebuffer_cleanup) from [<c036d138>] (msm_framebuffer_destroy+0x48/0x100)
[  247.849066] [<c036d138>] (msm_framebuffer_destroy) from [<c036d580>] (msm_framebuffer_init+0x1e8/0x228)
[  247.858439] [<c036d580>] (msm_framebuffer_init) from [<c036d630>] (msm_framebuffer_create+0x70/0x134)
[  247.867642] [<c036d630>] (msm_framebuffer_create) from [<c03493ec>] (internal_framebuffer_create+0x67c/0x7b4)
[  247.877537] [<c03493ec>] (internal_framebuffer_create) from [<c034ce34>] (drm_mode_addfb2+0x20/0x98)
[  247.886650] [<c034ce34>] (drm_mode_addfb2) from [<c034071c>] (drm_ioctl+0x240/0x420)
[  247.894378] [<c034071c>] (drm_ioctl) from [<c011df7c>] (do_vfs_ioctl+0x4e4/0x5a4)
...

Signed-off-by: Stephane Viau <sviau@codeaurora.org>
[plus initialize msm_fb to NULL to -Rob]
Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-05-14 11:48:54 -04:00
Dave Airlie bed447e7d1 drm/radeon: don't do mst probing if MST isn't enabled.
This causes an oops as we haven't initialised the mst
layer.

Reported-by: Dave Jones <<davej@codemonkey.org.uk>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-05-14 11:46:47 -04:00
Stephane Viau fe34464df5 drm/msm/mdp5: Fix iteration on INTF config array
The current iteration in get_dsi_id_from_intf() is wrong:
instead of iterating until hw_cfg->intf.count, we need to iterate
until MDP5_INTF_NUM_MAX here.

Let's take the example of msm8x16:

 hw_cfg->intf.count = 1
 intfs[0] = INTF_Disabled
 intfs[1] = INTF_DSI

If we stop iterating once i reaches hw_cfg->intf.count (== 1),
we will miss the test for intfs[1].

Actually, this hw_cfg->intf.count entry is quite confusing and is not
(or *should not be*) used anywhere else; let's remove it.

Signed-off-by: Stephane Viau <sviau@codeaurora.org>
2015-05-14 11:29:20 -04:00
Hai Li 651ad3f52b drm/msm/dsi: Fixup missing *break* statement during cmd rx
Signed-off-by: Hai Li <hali@codeaurora.org>
2015-05-14 11:28:58 -04:00
Julia Lawall 6128f1bec4 drm/msm/dp: fix error return code
Return a negative error code on failure.

A simplified version of the semantic match that finds this problem is as
follows: (http://coccinelle.lip6.fr/)

// <smpl>
@@
identifier ret; expression e1,e2;
@@
(
if (\(ret < 0\|ret != 0\))
 { ... return ret; }
|
ret = 0
)
... when != ret = e1
    when != &ret
*if(...)
{
  ... when != ret = e2
      when forall
 return ret;
}
// </smpl>

Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr>
2015-05-14 11:28:41 -04:00
Archit Taneja a2ca77898e drm: msm: Fix build when legacy fbdev support isn't set
The DRM_KMS_FB_HELPER config is selected only when DRM_MSM_FBDEV config is
selected. The driver accesses drm_fb_helper_* functions even when legacy fbdev
support is disabled in msm. Wrap around these functions with #ifdef checks to
prevent build break.

Signed-off-by: Archit Taneja <architt@codeaurora.org>
2015-05-14 11:25:09 -04:00
Stephane Viau 981371f326 drm/msm/dsi: Fix a couple more 64-bit build warnings
Avoid such errors at compilation time:
	format '%d' expects argument of type 'int', but argument 3 has type 'size_t'

Signed-off-by: Stephane Viau <sviau@codeaurora.org>
2015-05-14 11:19:51 -04:00
Thierry Reding fc99f97af2 drm/msm: Fix a couple of 64-bit build warnings
Avoid casts from pointers to fixed-size integers to prevent the compiler
from warning. Print virtual memory addresses using %p instead. Also turn
a couple of %d/%x specifiers into %zu/%zd/%zx to avoid further warnings
due to mismatched format strings.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Rob Clark <robdclark@gmail.com>
2015-05-14 11:19:25 -04:00
Maarten Lankhorst 1b26a5e193 drm/atomic: add drm_atomic_get_existing_*_state helpers
There are cases where we want to test if a given object is
part of the state, but don't want to add them if they're not.

Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-13 11:28:22 +02:00
Maarten Lankhorst f9be5f2011 drm/core: get rid of -Iinclude/drm
This results in a warning when building out of tree:
"cc1: warning: include/drm: No such file or directory [enabled by default]"

Most code already uses #include <drm/foo.h> correctly, so fix the
instances that don't.

Reported-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-13 11:28:22 +02:00
Maarten Lankhorst b588c92b66 drm/i915: get rid of -Iinclude/drm
This results in a warning when building out of tree:
"cc1: warning: include/drm: No such file or directory [enabled by default]"

Most code already uses #include <drm/foo.h> correctly, so fix the
instances that don't.

Reported-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-13 11:28:21 +02:00
Daniel Vetter 4c18d3010b drm/atomic-helpers: Export drm_atomic_helper_update_legacy_modeset_state
This is useful for drivers which have their own modeset infrastructure
but want to reuse most of the legacy state frobbery from the helpers.
i915 wants this.

v2: Add header declaration.

Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
2015-05-13 11:28:21 +02:00
Daniel Vetter 3d51d2d2f5 drm/atomic-helpers: Update vblank timestamping constants
The atomic helpers don't call drm_calc_timestamping_constants, which
is a regression compared to the crtc helpers. Fix this.

Noticed while reviewing i915 atomic patches from Maarten.

v2: Also check state->enable to avoid a warning in dmesg. Reported by
Maarten.

Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
2015-05-13 11:28:11 +02:00
Jani Nikula cbfa9faea1 drm/sysfs: remove unnecessary connector type checks
These attributes should be exposed for the matching connector types
only, so checking is redundant.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-12 19:15:53 +02:00
Jani Nikula 4bb4637b26 drm/sysfs: split DVI-I and TV-out attributes
The show methods for the attributes of DVI-I and TV-out types have a
bunch of code to deal with the differences between the two. Just split
the attributes into connector type specific ones. No functional changes.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-12 19:15:53 +02:00
Jani Nikula fe6fcdd61d drm/sysfs: make optional attribute groups per connector type
Split DVI-I and TV-out (which remains a group of types). As an
intermediate step, still share the attributes themselves between the
two. No user visible changes.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-12 19:15:52 +02:00
Jani Nikula 7d4d3a5849 drm/sysfs: add a helper for extracting connector type from kobject
This reduces duplication in the patches to follow. No functional
changes.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-12 19:15:52 +02:00
Ville Syrjälä 4d53dc0c02 drm/edid: Add CEA modes before inferred modes
Currently we're adding CEA modes after the inferred modes, which means
we might get multiple modes that are very close to each other, but
slightly different, which seems a bit silly. That's because duplicate
mode check that occurs when adding inferred modes would not consider
CEA modes as potential duplicates. Reverse the order so that CEA
modes get added before inferred modes, and are thus considered potential
duplicates.

Or as ajax put it on irc:
"< ajax> the point of the "pick a timing formula" heuristic was to
generate something the sink could _likely_ sink.  if it tells us
timings it can sink explicitly then second-guessing seems dumb."

Cc: Adam Jackson <ajax@redhat.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-12 19:15:39 +02:00
Christian König 607d480635 drm/radeon: fix VM_CONTEXT*_PAGE_TABLE_END_ADDR handling
The mapping range is inclusive between starting and ending addresses.

Signed-off-by: Christian König <christian.koenig@amd.com>
CC: stable@vger.kernel.org
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-05-12 09:12:42 -04:00
Tomasz Figa 98515035d0 drm/prime: Allow internal imports without import_sg_table
Currently drm_gem_prime_import() checks if gem_prime_import_sg_table()
is implemented in DRM driver ops. However it is not necessary for
internal imports (i.e. dma_buf->ops == &drm_gem_prime_dmabuf_ops
and obj->dev == dev), which only increment reference count on respective
GEM objects.

This patch makes the helper check this condition only in case of
external imports fo rwhich importing sg table is indeed needed.

Signed-off-by: Tomasz Figa <tfiga@chromium.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-12 11:02:50 +02:00
Daniel Stone 6bcacf51d0 drm: Add reference counting to blob properties
Reference-count drm_property_blob objects, changing the API to
ref/unref.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
[danvet: Squash in kerneldoc fixup from Daniel Stone.]
[danvet: Squash in Oops fix from Thiery Reding.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-12 11:02:31 +02:00
Peter Antoine 364aece01a drm/i915: Avoid GPU hang when coming out of s3 or s4
This patch fixes a timing issue that causes a GPU hang when the system
comes out of power saving.

During pm_resume, We are submitting batchbuffers before enabling
Interrupts this is causing us to miss the context switch interrupt,
and in consequence intel_execlists_handle_ctx_events is not triggered.

This patch is based on a patch from Deepak S <deepak.s@intel.com>
from another platform.

The patch fixes an issue introduced by:
  commit e7778be1ea
  drm/i915: Fix startup failure in LRC mode after recent init changes

The above patch added a call to init_context() to fix an issue introduced
by a previous patch. But, it then opened up a small timing window for the
batches being added by the init_context (basically setting up the context)
to complete before the interrupts have been turned on, thus hanging the
GPU.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89600
Cc: stable@vger.kernel.org # 4.0+
Signed-off-by: Peter Antoine <peter.antoine@intel.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
[Jani: fixed typo in subject, massaged the comments a bit]
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2015-05-11 16:27:08 +03:00
Jesse Barnes cc7297dcb4 drm/i915/vlv: remove wait for previous GFX clk disable request
Looks like it was introduced in:

commit 650ad970a3
Author: Imre Deak <imre.deak@intel.com>
Date:   Fri Apr 18 16:35:02 2014 +0300

    drm/i915: vlv: factor out vlv_force_gfx_clock and check for pending force-of

but I'm not sure why.  It has caused problems for us in the past (see
85250ddff7 "drm/i915/chv: Remove Wait for a previous gfx force-off"
and 8d4eee9cd7 "drm/i915: vlv: increase timeout when forcing on the
GFX clock") and doesn't seem to be required, so let's just drop it.

[airlied: I messed up a merge - readd this]
References: https://bugs.freedesktop.org/show_bug.cgi?id=89611
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Tested-by: Darren Hart <dvhart@linux.intel.com>
Reviewed-by: Deepak S <deepak.s@linux.intel.com>
Cc: stable@vger.kernel.org # c9c52e24194a: drm/i915/chv: Remove Wait ...
Cc: stable@vger.kernel.org
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2015-05-11 11:05:58 +10:00
Dave Airlie 332545b301 Merge tag 'drm-intel-fixes-2015-05-08' of git://anongit.freedesktop.org/drm-intel into drm-fixes
misc i915 fixes.

* tag 'drm-intel-fixes-2015-05-08' of git://anongit.freedesktop.org/drm-intel:
  drm/i915: Drop PIPE-A quirk for 945GSE HP Mini
  drm/i915: Sink rate read should be saved in deca-kHz
  drm/i915/dp: there is no audio on port A
  drm/i915: Add missing MacBook Pro models with dual channel LVDS
  drm/i915: Assume dual channel LVDS if pixel clock necessitates it
2015-05-11 06:06:22 +10:00
Mario Kleiner fdb68e09bb drm: Zero out invalid vblank timestamp in drm_update_vblank_count.
Since commit 844b03f277 we make
sure that after vblank irq off, we return the last valid
(vblank count, vblank timestamp) pair to clients, e.g., during
modesets, which is good.

An overlooked side effect of that commit for kms drivers without
support for precise vblank timestamping is that at vblank irq
enable, when we update the vblank counter from the hw counter, we
can't update the corresponding vblank timestamp, so now we have a
totally mismatched timestamp for the new count to confuse clients.

Restore old client visible behaviour from before Linux 3.17, but
zero out the timestamp at vblank counter update (instead of disable
as in original implementation) if we can't generate a meaningful
timestamp immediately for the new vblank counter. This will fix
this regression, so callers know they need to retry again later
if they need a valid timestamp, but at the same time preserves
the improvements made in the commit mentioned above.

Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com>
Cc: <stable@vger.kernel.org> #v3.17+

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Daniel Vetter <daniel@ffwll.ch>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-05-11 06:02:38 +10:00
Daniel Vetter 214a2b7fab drm/i915: Update DRIVER_DATE to 20150508
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-08 17:38:19 +02:00
Ville Syrjälä 9b6de0a155 drm/i915: Only wait for required lanes in vlv_wait_port_ready()
Currently vlv_wait_port_ready() waits for all four lanes on the
appropriate channel. This no longer works on CHV when the unused
lanes may be power gated. So pass in a mask of lanes that the
caller is expecting to be ready.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by:  Deepak S<deepak.s@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-08 17:26:02 +02:00
Rebecca N. Palmer c7c7372edc drm/i915: Fix possible security hole in command parsing
i915_parse_cmds returns -EACCES on chained batches, which "tells the
caller to abort and dispatch the workload as a non-secure batch",
but the mechanism implementing that was broken when
flags |= I915_DISPATCH_SECURE was moved from i915_gem_execbuffer_parse
to i915_gem_do_execbuffer (17cabf571e):
i915_gem_execbuffer_parse returns the original batch_obj in this case,
and i915_gem_do_execbuffer doesn't check for that.

Don't set the secure bit in this case to make sure such batches don't
run with elevated priviledges.

Signed-off-by: Rebecca Palmer <rebecca_palmer@zoho.com>
Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
[danvet: Stitch together commit message. Also remove a comment as
suggested by Mika. And style-align the comment while at it.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-08 17:26:01 +02:00
Daniel Vetter ac6f2e29bb drm/edid: Kerneldoc for newly added edid_corrupt
Also treat it as a proper boolean.

Cc: Todd Previte <tprevite@gmail.com>
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Cc: dri-devel@lists.freedesktop.org
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
2015-05-08 17:26:01 +02:00
Joonas Lahtinen e7ded2d746 drm/i915: Reject huge tiled objects
We do not yet support tiled objects bigger than the mappable
aperture size so reject them.

Reported-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
[danvet: Rework the check a bit to avoid warnings.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-08 17:25:29 +02:00
Ville Syrjälä 71849b67e7 Revert "drm/i915: Hack to tie both common lanes together on chv"
With recent hardware/firmware there don't appear to be any glitches
on the other PHY when we toggle the cmnreset for the other PHY. So
detangle the cmnlane power wells from one another and let them be
controlled independently.

This reverts commit 3dd7b97458.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by:  Deepak S <deepak.s@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-08 15:56:42 +02:00
Ville Syrjälä 7072246887 drm/i915: Work around DISPLAY_PHY_CONTROL register corruption on CHV
Sometimes (exactly when is a bit unclear) DISPLAY_PHY_CONTROL appears to
get corrupted. The values I've managed to read from it seem to have some
pattern but vary quite a lot. The corruption doesn't seem to just happen
when the register is accessed, but can also happen spontaneosly during
modeset. When this happens during a modeset things go south and the
display doesn't light up.

I've managed to hit the problemn when toggling HDMI on port D on and
off. When things get corrupted the display doesn't light up, but as soon
as I manually write the correct value to the register the display comes
up.

First I was suspicious that we ourselves accidentally overwrite it with
garbage, but didn't catch anything with the reg_rw tracepoint. Also I
sprinkled check all over the modeset path to see exactly when the
corruption happens, and eg. the read back value was fine just before
intel_dp_set_m(), and corrupted immediately after it. I also made my
check function repair the register value whenever it was wrong, and with
this approach the corruption repeated several times during the modeset
operation, always seeming to trigger in the same exact calls to the
check function, while other calls to the function never caught anything.

So far I've not seen this problem occurring when carefully avoiding all
read accesses to DISPLAY_PHY_CONTROL. Not sure if that's just pure luck
or an actual workaround, but we can hope it works. So let's avoid reading
the register and instead track the desired value of the register in dev_priv.

v2: Read out the power well state to determine initial register value
v3: Use DPIO_CHx names instead of raw numbers

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by:  Deepak S <deepak.s@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-08 15:56:30 +02:00
Ville Syrjälä 2e523e98bb drm/i915: Implement chv display PHY lane stagger setup
Set up the chv display PHY lane stagger registers according to
"Programming Guide for 1273 CHV eDP/DP/HDMI Display PHY" v1.04

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by:  Deepak S <deepak.s@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-08 15:55:22 +02:00
Daniel Stone 8fb6e7a579 drm: Introduce blob_lock
Create a new global blob_lock mutex, which protects the blob property
list from insertion and/or deletion.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-08 13:30:01 +02:00
Daniel Stone d2ed34362a drm: Introduce helper for replacing blob properties
Introduce a common helper for the pattern of:
  - allocate new blob property
  - potentially free old blob property
  - replace content of indicative property with new blob ID
  - change member pointer on modeset object

Signed-off-by: Daniel Stone <daniels@collabora.com>
Cc: Dave Airlie <airlied@redhat.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
[danvet: Squash in fixup from Daniel for the kerneldoc, reported by
0day builder.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-08 13:29:56 +02:00
Jesse Barnes ac935a8b6d drm/i915/vlv: remove wait for previous GFX clk disable request
Looks like it was introduced in:

commit 650ad970a3
Author: Imre Deak <imre.deak@intel.com>
Date:   Fri Apr 18 16:35:02 2014 +0300

    drm/i915: vlv: factor out vlv_force_gfx_clock and check for pending force-of

but I'm not sure why.  It has caused problems for us in the past (see
85250ddff7 "drm/i915/chv: Remove Wait for a previous gfx force-off"
and 8d4eee9cd7 "drm/i915: vlv: increase timeout when forcing on the
GFX clock") and doesn't seem to be required, so let's just drop it.

References: https://bugs.freedesktop.org/show_bug.cgi?id=89611
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Tested-by: Darren Hart <dvhart@linux.intel.com>
Reviewed-by: Deepak S <deepak.s@linux.intel.com>
Cc: stable@vger.kernel.org # c9c52e24194a: drm/i915/chv: Remove Wait ...
Cc: stable@vger.kernel.org
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
[danvet: Repick this commit from
5df0582bf0 becuase Dave Airlie lost it
in his merge commit e1dee1973c74a0408b108d88c57a15be8a2d6d84.]
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
2015-05-08 13:12:48 +02:00
Matt Roper 90d469067d drm/i915: Set crtc_state->active to false when CRTC is disabled (v2)
With the recent modeset internal rework, we wind up setting
crtc_state->enable to false, but leave crtc_state->active as true, which
is incorrect.  This mismatch gets caught by drm_atomic_crtc_check() and
causes subsequent atomic operations (such as plane updates while the
CRTC is disabled) to fail.

Bisect points to

        commit dad9a7d6d96630182fb52aae7c3856e9e7285e13
        Author: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
        Date:   Tue Apr 21 17:13:19 2015 +0300

            drm/i915: Use atomic helpers for computing changed flags

as the commit that actually triggers the regression.

v2: Update to alter in-flight state rather than already-committed state
    (first version was accidentally based on a midpoint of Ander's
    modeset rework series, before his final patches that add proper
    state swapping to the legacy modeset path).

Cc: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Testcase: igt/kms_universal_plane
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Ander Conselvan de Oliveira <conselvan2@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-08 13:04:19 +02:00
Damien Lespiau ebf7ed1a5b drm/i915/skl: Re-indent part of skl_ddi_calculate_wrpll()
A part of this function was indented with 2 tabs and 1 space instead of
just 2 tabs. We're going to touch that code, so start by re-indenting
it.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-08 13:04:18 +02:00
Joonas Lahtinen c5ad54cf7d drm/i915: Use partial view in mmap fault handler
Use partial view for huge BOs (bigger than half the mappable aperture)
in fault handler so that they can be accessed withough trying to make
room for them by evicting other objects.

v2:
- Only use partial views in the case where early rejection was
  previously done.
- Account variable type changes from previous reroll.
v3:
- Add a comment about overwriting existing page entries.
  (Tvrtko Ursulin)
- Whitespace fixes.

Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-08 13:04:18 +02:00
Joonas Lahtinen 8bd7ef1638 drm/i915: Add a partial GGTT view type
Partial view type allows manipulating parts of huge BOs through the GGTT,
which was not previously possible due to constraint that whole object had
to be mapped for any access to it through GGTT.

v2:
- Retain error value from sg_alloc_table (Tvrtko Ursulin)
- Do not zero already zeroed variable (Tvrtko Ursulin)
- Use more common variable types for page size/offset (Tvrtko Ursulin)
v3:
- Only compare additional view parameters when need to (Tvrtko Ursulin)
v4:
- Do zero out the variable that needs to be (bug introduced in v2).

Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-08 13:04:18 +02:00
Joonas Lahtinen a6631ae1fd drm/i915: Consider object pinned if any VMA is pinned
Do not skip special GGTT views when considering whether an object
is pinned or not.

Wrong behaviour was introduced in;

commit ec7adb6ee7
Author: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Date:   Mon Mar 16 14:11:13 2015 +0200

    drm/i915: Do not use ggtt_view with (aliasing) PPGTT

Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-08 13:04:17 +02:00
Joonas Lahtinen 91e6711e30 drm/i915: Do not make assumptions on GGTT VMA sizes
GGTT VMA sizes might be smaller than the whole object size due to
different GGTT views.

v2:
- Separate GGTT view constraint calculations from normal view
  constraint calculations (Chris Wilson)
v3:
- Do not bother with debug wording. (Tvrtko Ursulin)
v4:
- Clearer logic for calculating map_and_fenceable (Tvrtko Ursulin)

Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
[danvet: Drop BUG_ON, it's redudant.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-08 13:04:17 +02:00
Nick Hoath 16be17af2a drm/i915/bxt: Mark WaCcsTlbPrefetchDisable as for Broxton also.
Signed-off-by: Nick Hoath <nicholas.hoath@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-08 13:04:16 +02:00
Nick Hoath 27160c96e1 drm/i915/bxt: Mark WaDisablePartialResolveInVc as for Broxton also.
Signed-off-by: Nick Hoath <nicholas.hoath@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-08 13:04:16 +02:00
Nick Hoath 5068368c2e drm/i915/bxt: Mark Wa4x4STCOptimizationDisable as for Broxton also.
Signed-off-by: Nick Hoath <nicholas.hoath@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-08 13:04:15 +02:00
Nick Hoath b62adbd1ea drm/i915/bxt: Move WaForceEnableNonCoherent to Skylake only
Signed-off-by: Nick Hoath <nicholas.hoath@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-08 13:04:15 +02:00
Nick Hoath 27a1b688d9 drm/i915/bxt: Enable WaEnableYV12BugFixInHalfSliceChicken7 for Broxton
Signed-off-by: Nick Hoath <nicholas.hoath@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-08 13:04:14 +02:00
Nick Hoath a13d215fe7 drm/i915/bxt: Enable WaSetDisablePixMaskCammingAndRhwoInCommonSliceChicken for Broxton
Signed-off-by: Nick Hoath <nicholas.hoath@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-08 13:04:14 +02:00
Nick Hoath d2a31dbd67 drm/i915/bxt: Enable WaDisableDgMirrorFixInHalfSliceChicken5 for Broxton
Signed-off-by: Nick Hoath <nicholas.hoath@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-08 13:04:13 +02:00
Nick Hoath a119a6e66e drm/i915/bxt: Mark workaround as for Skylake & Broxton
Signed-off-by: Nick Hoath <nicholas.hoath@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-08 13:04:13 +02:00
Nick Hoath b0e6f6d4b0 drm/i915/bxt: Mark WaDisablePartialInstShootdown as for Broxton also.
Signed-off-by: Nick Hoath <nicholas.hoath@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-08 13:04:12 +02:00
Chris Wilson 432be69d9d drm/i915: Remove locking for get-caching query
Reading a single value from the object, the locking only provides futile
protection against userspace races. The locking is useless so remove it.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-08 13:04:12 +02:00
Sonika Jindal 637a9c63f8 drm/i915: Rename dp rates array as per platform
Renaming gen9_rates to skl_rates because other platforms may have different
supported rates.

Signed-off-by: Sonika Jindal <sonika.jindal@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-08 13:04:11 +02:00
Ander Conselvan de Oliveira 550acefd22 drm/i915: Get rid of intel_crtc_set_state()
Now that we do proper state swaps, we don't depend on this function
anymore to keep the state in sync.

Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-08 13:04:11 +02:00
Ander Conselvan de Oliveira a821fc46bc drm/i915: Swap atomic state in legacy modeset
Replace the commit output state function with a simple swap of states.
Note that we still need to reconcile the legacy state after the swap,
since there are still code that relies on those.

Also note that even though changes to the state of a crtc different than
the one passed as an argument to __intel_set_mode() will be saved, the
modeset logic still deals with only one crtc.

Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-08 13:04:10 +02:00
Ander Conselvan de Oliveira d4afb8cc3a drm/i915: Don't use plane update helper in legacy mode set
Use lower level calls to better integrate with the modeset code and
allow a full state swap in a follow up patch.

Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-08 13:04:10 +02:00
Ander Conselvan de Oliveira 4978cc93d9 drm/i915: Preserve shared DPLL information in new pipe_config
When a new pipe_config is calculated, the fields related to shared dplls
are reset, under the assumption that they will be recalculated as part
of the modeset, which is true with the current state of the code.

As we convert to atomic, however, it will be possible to calculate a new
pipe_config and skip the modeset. In that case, after the state swap we
still want the shared dplls to be preserved.

Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-08 13:04:09 +02:00
Ander Conselvan de Oliveira 2bfb462758 drm/i915: Take ownership of atomic state on success in intel_set_mode()
To match the behavior of ->atomic_commit().

Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-08 13:04:09 +02:00
Ander Conselvan de Oliveira 8c7b5ccb72 drm/i915: Use atomic helpers for computing changed flags
Replace the drivers own logic for computing mode_changed, active_changed
and planes_changed flags with the check_modeset() atomic helper. Since
that function needs to compare the crtc's new mode with the current,
this patch also moves the set up of crtc_state->mode earlier in the call
chain.

Note that for the call to check_plane() to work properly, we need to
check new plane state against new crtc state. But since we still use the
plane update helper, which doesn't have a full atomic state, we need to
hack around that in intel_plane_atomic_check().

Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-08 13:04:08 +02:00
Ander Conselvan de Oliveira 840bfe9533 drm/atomic: Make mode_fixup() optional for check_modeset()
So the i915 driver can use the same logic for setting mode and active
changed flags, without having to implement encoder helpers and the
mode_fixup() callback.

Cc: dri-devel@lists.freedestkop.org
Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Acked-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-08 13:04:08 +02:00
Ander Conselvan de Oliveira 0f63cca2af drm/i915: Update crtc state active flag based on DPMS
In a follow up patch the function that computes mode changes will be
replaced with the one from the atomic helpers. To preserve the behavior
of legacy modeset forcing DPMS on, that function will need to detect a
change in the active state of the crtc, so that has to be kept up to
date.

Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-08 13:04:07 +02:00
Ander Conselvan de Oliveira 7cbf41d610 drm/i915: Remove save/restore logic from intel_crtc_set_config()
This is no longer necessary since we only update the staged config on
successfull modeset. The new configuration is stored in an atomic state
struct which is freed in case of failure.

Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-08 13:04:07 +02:00
Ander Conselvan de Oliveira d5432a9d19 drm/i915: Stage new modeset state straight into atomic state
The logic that stages the state before the modeset was still updating
first the old staged config and then populating the atomic state based
on that. Change this to use only the atomic state.

Note that now the staged config is updated in the function
intel_modeset_commit_output_state(). This is done so that the modeset
check and the force restore path in the hw state read out code continue
to work.

Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-08 13:04:06 +02:00
Ander Conselvan de Oliveira b788526464 drm/i915: Simplify intel_set_config_compute_mode_changes() a bit
Add a helper function to make the code slightly more readable.

Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-08 13:04:06 +02:00
Ander Conselvan de Oliveira bb54662350 drm/i915: Unify modeset and flip paths of intel_crtc_set_config()
Call intel_set_mode() uncondionally from intel_crtc_set_config(), since
the former function is now properly wired to ignore all the modesets if
the mode_changed and active_changed flags are false in crtc_state.

Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-08 13:04:05 +02:00
Ander Conselvan de Oliveira 41227c8c52 drm/i915: Don't use staged config to calculate mode_changed flags
Use the atomic state instead.

Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-08 13:04:05 +02:00
Ander Conselvan de Oliveira 8d8c9b5197 drm/i915: Don't use struct intel_set_config *_changed flags
Use the similar fields in crtc_state instead, so that this code can be
moved to our future implementation of atomic_check().

Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-08 13:04:04 +02:00
Ander Conselvan de Oliveira cf6d0d76cf drm/i915: Delete fb, x and y parameters from mode set functions
We don't need to pass it down the call chain anymore now that the plane
state is set up properly.

Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-08 13:04:04 +02:00
Ander Conselvan de Oliveira d3a40d1bc8 drm/i915: Add primary plane to atomic state in legacy modeset
Add the primary plane state to the legacy modeset atomic state and use
it when configuring the primary plane in __intel_set_mode(). This is a
first step towards merging the flip path in intel_crtc_set_config() and
__intel_set_mode().

v2: Set crtc to NULL if fb is NULL. (Maarten)

Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-08 13:04:03 +02:00
Ander Conselvan de Oliveira 561c8bda8f drm/i915: Don't modeset with old mode when set_crtc fails
The modeset code is now properly divided in two phases, so that it only
changes hardware state if it succeeds, so there's no ill-effect that
needs to be undone on failure anymore.

Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-08 13:04:03 +02:00
Ander Conselvan de Oliveira 9eb45f228f drm/i915: Simplify error handling in __intel_set_mode()
The remaining parts of the failure path could only be reached if the
allocation of crtc_state_copy would fail. In that case, there is nothing
to undo, so just get rid of the label for error handling and return an
error code immediately.

We also always allocate a pipe_config, even if the pipe is being
disabled, so the remaining part of what was the error/done case can be
simplified a little too.

v2: Ignore return value from drm_plane_helper_update(). (Ander)

Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-08 13:04:02 +02:00
Ander Conselvan de Oliveira 054518ddff drm/i915: Move compute part of __intel_set_mode() to separate function
The first function calls done in that function can still cause changes
to the atomic state and may fail. This should eventually be part of our
atomic check function, while the rest of the code in __intel_set_mode()
is the commit hook. So this makes the legacy mode set more atomic-y.

Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-08 13:04:02 +02:00
Ander Conselvan de Oliveira e13be66517 drm/i915: Remove saved_mode from __intel_set_mode()
There's no way that function can fail after it sets crtc->mode anymore,
so there's no need to save the old mode for the failure case.

Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-08 13:04:01 +02:00
Ander Conselvan de Oliveira 0a9ab303b8 drm/i915: Remove all *_pipes flags from modeset
Set the mode_changed field on the crtc_states and use that instead.

Note that even though this patch doesn't completely replace the logic in
intel_modeset_affected_pipes(), that logic was never fully used to its
full extent. Since the commit mentioned below, modeset_pipes and
prepare_pipes would only contain at most the pipe for which the set_crtc
ioctl was called. We can grow back that logic when the time comes.

commit b6c5164d7b
Author: Daniel Vetter <daniel.vetter@ffwll.ch>
Date:   Fri Apr 12 18:48:43 2013 +0200

    drm/i915: Fixup Oops in the pipe config computation

v2: Don't set mode_changed unconditionally for modeset_crtc. (Ander)
    Check for needs_modeset() before trying to allocate a PLL. (Ander)
    Only call .crtc_enable() for pipes that were disabled. (Maarten)

Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-08 13:04:01 +02:00
Ander Conselvan de Oliveira 4fed33f648 drm/i915: Calculate a new pipe_config based on new enabled state
With the current implementation of intel_modeset_affected_pipes(), if a
pipe will be enabled then it is in modeset_pipes. We'll remove that mask
in a follow up patch, but want to preserve this behavior, so just make
that explicit.

Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-08 13:04:00 +02:00
Ander Conselvan de Oliveira 548ee15b38 drm/i915: Don't pretend we can calculate multiple pipe_configs
The code in intel_modeset_pipe_config() still needs changes before it
can calculate more than just one pipe_config, and pretending it can will
only make those changes more difficult.

Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-08 13:04:00 +02:00
Ander Conselvan de Oliveira 4be0731786 drm/i915: Add crtc states before calling compute_config()
The function intel_modeset_compute_config() needs to eventually become
part of atomic_check(). At that point, all the affected crtcs need to be
in the atomic state with the new values. So move the logic of adding
crtc states out of that function.

v2: Set crtc_state->enable in all cases. (Ander)

Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-08 13:03:59 +02:00
Ander Conselvan de Oliveira 462a425aa5 drm/i915: Extract mode_changed computation out of stage_output_config()
This should make the conversion to atomic easier, by splitting the
initialization of the atomic state from the logic that decides if a
modeset is needed.

Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-08 13:03:59 +02:00
Ander Conselvan de Oliveira da3ced2986 drm/i915: Use for_each_connector_in_state helper macro
Simplifies looping over connector states a bit.

Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-08 13:03:58 +02:00
Ander Conselvan de Oliveira f0c60574eb drm/i915: Call drm helpers when duplicating crtc and plane states
Use the helpers introduced by the commit below to properly initialize
the duplicated states.

commit f5e7840b0c
Author: Thierry Reding <treding@nvidia.com>
Date:   Wed Jan 28 14:54:32 2015 +0100

    drm/atomic: Add helpers for state-subclassing drivers

Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-08 13:03:58 +02:00
Ander Conselvan de Oliveira e5d958ef42 drm/i915: Don't check for NULL before freeing state
This is not necessary after the below commit.

commit a0211bb482
Author: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Date:   Mon Mar 30 14:05:43 2015 +0300

    drm/atomic: Don't try to free a NULL state

Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-08 13:03:57 +02:00
Maarten Lankhorst ce22dba92d drm/i915: Move toggling planes out of crtc enable/disable.
This makes disabling planes more explicit.

Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
[anderco: fixed warning due to using drm_crtc instead of intel_crtc]
Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-08 13:03:56 +02:00
Maarten Lankhorst 7cac945fbe drm/i915: Rename intel_crtc_dpms_overlay.
To make it clear that it isn't called during crtc enable.

Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reviewed-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-08 13:03:55 +02:00
Maarten Lankhorst 87d4300a7d drm/i915: Move intel_(pre_disable/post_enable)_primary to intel_display.c, and use it there.
They're the same code, so why not?

Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reviewed-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-08 13:03:54 +02:00
Maarten Lankhorst b70709a6f0 drm/i915: get rid of primary_enabled and use atomic state
This was an optimization from way back before we had primary plane
support to be able to disable the primary plane. But with primary
plane support userspace can tell the kernel this directly, so there's
no big need for this any more. And it's getting in the way of the
atomic conversion.

If need be we can resurrect this later on properly again.

Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reviewed-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
[danvet: Explain why removing this is ok.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-08 13:03:53 +02:00
Maarten Lankhorst 27321ae88c drm/i915: Use the disable callback for disabling planes.
This allows disabling all planes affecting a crtc without caring what type it is.

Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reviewed-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-08 13:03:52 +02:00
Maarten Lankhorst a8ad0d8e17 drm/i915: Add a way to disable planes without updating state
This is used by the next commit to disable all planes on a crtc
without caring what type it is.

Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reviewed-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-08 13:03:51 +02:00
Maarten Lankhorst ecce87ea3a drm/i915: Remove implicitly disabling primary plane for now
Some of the flags that were used are still useful when transitioning
to atomic, so keep those around for now. This removes some of the
complications of crtc->primary_enabled, making it easier to remove.

Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reviewed-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-08 13:03:49 +02:00
Todd Previte eb3394faeb drm/i915: Add debugfs test control files for Displayport compliance testing
This patch adds 3 debugfs files for handling Displayport compliance testing
and supercedes the previous patches that implemented debugfs support for
compliance testing. Those patches were:

- [PATCH 04/17] drm/i915: Add debugfs functions for Displayport
                          compliance testing
- [PATCH 08/17] drm/i915: Add new debugfs file for Displayport
                          compliance test control
- [PATCH 09/17] drm/i915: Add debugfs write and test param parsing
                          functions for DP test control

This new patch simplifies the debugfs implementation by places a single
test control value into an individual file. Each file is readable by
the usersapce application and the test_active file is writable to
indicate to the kernel when userspace has completed its portion of the
test sequence.

Replacing the previous files simplifies operation and speeds response
time for the user app, as it is required to poll on the test_active file
in order to determine when it needs to begin its operations.

V2:
- Updated the test active variable name to match the change in
  the initial patch of the series
V3:
- Added a fix in the test_active_write function to prevent a NULL pointer
  dereference if the encoder on the connector is invalid

Signed-off-by: Todd Previte <tprevite@gmail.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-08 13:03:48 +02:00
Todd Previte 559be30cb7 drm/i915: Implement the intel_dp_autotest_edid function for DP EDID complaince tests
Updates the EDID compliance test function to perform the analyze and react to
the EDID data read as a result of a hot plug event. The results of this
analysis are handed off to userspace so that the userspace app can set the
display mode appropriately for the test result/response.

The compliance_test_active flag now appears at the end of the individual
test handling functions. This is so that the kernel-side operations can
be completed without the risk of interruption from the userspace app
that is polling on that flag.

V2:
- Addressed mailing list feedback
- Removed excess debug messages
- Removed extraneous comments
- Fixed formatting issues (line length > 80)
- Updated the debug message in compute_edid_checksum to output hex values
  instead of decimal
V3:
- Addressed more list feedback
- Added the test_active flag to the autotest function
- Removed test_active flag from handler
- Added failsafe check on the compliance test active flag
  at the end of the test handler
- Fixed checkpatch.pl issues
V4:
- Removed the checksum computation function and its use as it has been
  rendered superfluous by changes to the core DRM EDID functions
- Updated to use the raw header corruption detection mechanism
- Moved the declaration of the test_data variable here
V5:
- Update test active flag variable name to match the change in the
  first patch of the series.
- Relocated the test active flag declaration and initialization
  to this patch
V6:
- Updated to use the new flag for raw EDID header corruption
- Removed the extra EDID read from the autotest function
- Added the edid_checksum variable to struct intel_dp so that the
  autotest function can write it to the sink device
- Moved the update to the hpd_pulse function to another patch
- Removed extraneous constants
V7:
- Fixed erroneous placement of the checksum assignment. In some cases
  such as when the EDID read fails and is NULL, this causes a NULL ptr
  dereference in the kernel. Bad news. Fixed now.
V8:
- Updated to support the kfree() on the EDID data added previously
V9:
- Updated for the long_hpd flag propagation
V10:
- Updated to use actual checksum from the EDID read that occurs during
  normal hot plug path execution
- Removed variables from intel_dp struct that are no longer needed
- Updated the patch subject to more closely match the nature and contents
  of the patch
- Fixed formatting problem (long line)
V11:
- Removed extra debug messages
- Updated comments to be more informative
- Removed extra variable
V12:
- Removed the 4 bit offset of the resolution setting in compliance data
- Changed to DRM_DEBUG_KMS instead of DRM_DEBUG_DRIVER

Signed-off-by: Todd Previte <tprevite@gmail.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-08 13:03:47 +02:00
Todd Previte 6ba2bd3da7 drm: Add edid_corrupt flag for Displayport Link CTS 4.2.2.6
Displayport compliance test 4.2.2.6 requires that a source device be capable of
detecting a corrupt EDID. The test specification states that the sink device
sets up the EDID with an invalid checksum. To do this, the sink sets up an
invalid EDID header, expecting the source device to generate the checksum and
compare it to the value stored in the last byte of the block data.

Unfortunately, the DRM EDID reading and parsing functions are actually too good
in this case; the header is fixed before the checksum is computed and thus the
test never sees the invalid checksum. This results in a failure to pass the
compliance test.

To correct this issue, when the EDID code detects that the header is invalid,
a flag is set to indicate that the EDID is corrupted. In this case, it sets
edid_corrupt flag and continues with its fix-up code. This flag is also set in
the case of a more seriously damaged header (fixup score less than the
threshold). For consistency, the edid_corrupt flag is also set when the
checksum is invalid as well.

V2:
- Removed the static bool global
- Added a bool to the drm_connector struct to reaplce the static one for
  holding the status of raw edid header corruption detection
- Modified the function signature of the is_valid function to take an
  additional parameter to store the corruption detected value
- Fixed the other callers of the above is_valid function
V3:
- Updated the commit message to be more clear about what and why this
  patch does what it does.
- Added comment in code to clarify the operations there
- Removed compliance variable and check_link_status update; those
  have been moved to a later patch
- Removed variable assignment from the bottom of the test handler
V4:
- Removed i915 tag from subject line as the patch is not i915-specific
V5:
- Moved code causing a compilation error to this patch where the variable
  is actually declared
- Maintained blank lines / spacing so as to not contaminate the patch
V6:
- Removed extra debug messages
- Added documentation to for the added parameter on drm_edid_block_valid
- Fixed more whitespace issues in check_link_status
- Added a clear of the header_corrupt flag to the end of the test handler
  in intel_dp.c
- Changed the usage of the new function prototype in several places to use
  NULL where it is not needed by compliance testing
V7:
- Updated to account for long_pulse flag propagation
V8:
- Removed clearing of header_corrupt flag from the test handler in intel_dp.c
- Added clearing of header_corrupt flag in the drm_edid_block_valid function
V9:
- Renamed header_corrupt flag to edid_corrupt to more accurately reflect its
  value and purpose
- Updated commit message
V10:
- Updated for versioning and patch swizzle
- Revised the title to more accurately reflect the nature and contents of
  the patch
- Fixed formatting/whitespace problems
- Added set flag when computed checksum is invalid

Signed-off-by: Todd Previte <tprevite@gmail.com>
Cc: dri-devel@lists.freedesktop.org
Acked-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-08 13:03:46 +02:00
Nick Hoath 83a24979c4 drm/i915/bxt: Add WaForceContextSaveRestoreNonCoherent
Note that we also need this for skl.

Signed-off-by: Nick Hoath <nicholas.hoath@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
[danvet: Note that we also need this for skl, requested by Imre.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-08 13:03:45 +02:00
Damien Lespiau f1d3d34d17 drm/i915/skl: Fix WaDisableChickenBitTSGBarrierAckForFFSliceCS
Robert noticed that the FF_SLICE_CS_CHICKEN2 offset was wrong. Ooops.

Ville noticed that the write was wrong since FF_SLICE_CS_CHICKEN2 is a
masked register. Re-oops.

A wonder if went through 2 people while having roughly a bug per line...

The problem was introduced in the original patch:

  commit 2caa3b260a
  Author: Damien Lespiau <damien.lespiau@intel.com>
  Date:   Mon Feb 9 19:33:20 2015 +0000

      drm/i915/skl: Implement WaDisableChickenBitTSGBarrierAckForFFSliceCS

v2: Also fix the register write (Ville)

Reported-by: Robert Beckett <robert.beckett@intel.com>
Reported-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Robert Beckett <robert.beckett@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Nick Hoath <nicholas.hoath@intel.com>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-08 13:03:44 +02:00
Ville Syrjälä 22e02c0b4b drm/i915: Add missing POSTING_READ()s to BXT dbuf enable sequence
Do a POSTING_READ() between the DBUF_CTL register write and the
udelay() to make sure we really wait after the register write has
happened.

Spotted while reviewing Damien's SKL cdclk patch which had the
POSTING_READ()s.

Cc: Imre Deak <imre.deak@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-08 13:03:43 +02:00
Ville Syrjälä 813b5e6971 drm/i915: s/9/intel_freq_opcode(450)/
Replace the hardcoded 9 with a call to intel_freq_opcode(450).

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-08 13:03:42 +02:00
Sonika Jindal 9e45803465 drm/i915/skl: Add module parameter to select edp vswing table
This provides an option to override the value set by VBT
for selecting edp Vswing Pre-emph setting table.

v2: Adding comment about this being a temporary workaround and
making the parameter read-only (Jani)
v3: Changing mode to 0400 instead of 0 (Jani)

https://bugs.freedesktop.org/show_bug.cgi?id=89554
Signed-off-by: Sonika Jindal <sonika.jindal@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-08 13:03:41 +02:00
Nick Hoath 983b4b9def drm/i915/bxt: Add WaDisableSbeCacheDispatchPortSharing
Note that we also need this for skl.

Signed-off-by: Nick Hoath <nicholas.hoath@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
[danvet: Note that we also need this for skl, requested by Imre.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-08 13:03:40 +02:00
Ville Syrjälä abab6311a5 drm/i915: Use POSTING_READ() in intel_sdvo_write_sdvox()
Use POSTING_READ() in intel_sdvo_write_sdvox() as appropriate.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-08 13:03:39 +02:00
Vandana Kannan 0fb890c013 drm/i915/bxt: BLC implementation
Enabling BLC on BXT.
Includes register definition, and new functions for BXT.

In BXT, there are 2 sets of registers for BLC. Until there is clarity
about which set would be effective, set 1 is being used.
This would have to be re-visited if there is any change or when 2 LFPs are
enabled on BXT.

This patch enables brightness change which would be effected by use of
hot-keys or sysfs entry.

TODO:- BLC implementation will have to re-visited when
1. there is clarity about which set of registers has to be used and when.
2. CDCLK frequency is changed

v2: Jani's review comments
	- Modified comment in i915_reg.h
	- Renamed register defintions
	- Removed definition of duty cycle max. Not required now and its not 64-bit.

v3:
  - Rebase on top of VLV/CHV backlight changes, in particuliar
    bxt_set_backlight() now has a different prototype (Damien)

Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Vandana Kannan <vandana.kannan@intel.com>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Shankar, Uma <uma.shankar@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-08 13:03:38 +02:00
Mika Kuoppala b3da4a627e drm/i915: Free wa_batchbuffer when freeing error state
wa_batchbuffer is part of some error states. Make sure it
is freed.

Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-08 13:03:37 +02:00
Jani Nikula d3902c3eba drm/i915/audio: do not mess with audio registers if port is invalid
We should no longer enter the codec enable/disable functions in question
with port A anyway, but to err on the safe side, keep the warnings. Just
bail out early without messing with the registers.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Sivakumar Thulasimani <sivakumar.thulasimani@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-08 13:03:36 +02:00
Damien Lespiau 6222709d60 drm/i915/skl: Make the Misc I/O power well part of the PLLS domain
The specs tell us to ungate PG1 and Misc I/O at display init. We'll use
the PLLS power domain to ensure those two power wells are up.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-08 13:03:35 +02:00
Damien Lespiau 57520bc55c drm/i915: Merge the GEN9 memory latency PCU opcode with its friends
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-08 13:03:34 +02:00
Damien Lespiau 9043ae0205 drm/i915: Re-order the PCU opcodes
Let's keep that list sorted!

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-08 13:03:33 +02:00
Damien Lespiau 71cd8423cd drm/i915/skl: Fix the CTRL typo in the DPLL_CRTL1 defines
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-08 13:03:32 +02:00
Damien Lespiau aeaa2122af drm/i915/skl: Add the INIT power domain to the MISC I/O power well
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-08 13:03:31 +02:00
Michel Thierry 4dd738e9cd drm/i915: Fix 32b overflow check in gen8_ppgtt_alloc_page_directories
The patch 69876bed7e008f5fe01538a2d47c09f2862129d0: "drm/i915/gen8:
page directories rework allocation" added an overflow warning, but the
mask had an extra 0. Use less typo-prone option suggested by Dave
instead, to check for (start + length) >= 0x100000000ULL.

This check will be unnecessary after gen8_alloc_va_range handles more
than 4 PDPs (48b addressing).

v2: Really check for 32b overflow (Ville)

Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Cc: Dave Gordon <david.s.gordon@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-08 13:03:30 +02:00
Mika Kuoppala 5e562f1ddd drm/i915: Clear vma->bound on unbinding
Unbinding doesn't always lead to unconditional destruction
of vma. This destruction avoidance happens if vma is part of
execbuffer relocation list or if vma is being considered for
eviction in i915_gem_evict_something().

For those other users, mark the vma unbound so that
the correct state of this vma is preserved.

Reported-by: Chris Wilson <chris@chris-wilson.co.ok>
Cc: Chris Wilson <chris@chris-wilson.co.ok>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-08 13:03:29 +02:00
Jani Nikula 65b38e0d87 drm/i915: make drm_crtc_helper_funcs const data
Because they can be.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-08 13:03:28 +02:00
Mika Kahola 5fa836a9d8 drm/i915: DP link training optimization
This patch adds DP link training optimization by reusing the
previously trained values.

v2:
- rebase

V3:
- rebase

V4:
- when HPD long pulse is received, the flag is cleared
  that indicates if DP link training is required or not
  (based on Sivakumar's comment)

Signed-off-by: Mika Kahola <mika.kahola@intel.com>
Reviewed-by: Sivakumar Thulasimani <sivakumar.thulasimani@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-08 13:03:27 +02:00
Mika Kahola 4e96c97742 drm/i915: eDP link training optimization
This is a first of series patches that optimize DP link
training. The first patch is for eDP only where we reuse
the previously trained link training values from cache
i.e. voltage swing and pre-emphasis levels.

In case we are not able to train the link by reusing
the known values, the link training parameters are set
to zero and training is restarted.

V2:
- flag that indicates if DP link is trained and valid
  renamed from 'link_trained' to 'train_set_valid'
- removed routine 'intel_dp_reuse_link_train'

V3:
- rebased against the latest drm-intel-nightly

V4:
- removed HPD long pulse handling for eDP case to clear the
  flag that indicates to reuse the current link training
  parameters. (based on Sivakumar's comment)

Signed-off-by: Mika Kahola <mika.kahola@intel.com>
Reviewed-by: Sivakumar Thulasimani <sivakumar.thulasimani@intel.com>
[danvet: s/DP/eDP/ in subject to make scope clear.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-08 13:03:26 +02:00
Deepak S 3ef62342bd drm/i915: Setup static bias for GPU
Based on the spec, Setting up static BIAS for GPU to improve the
rps performace.

v2: rename reg defn to match spec. (Ville)

v3: Updated bias setting for chv (Deepak)

Signed-off-by: Deepak S <deepak.s@linux.intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-08 13:03:25 +02:00
Dan Carpenter 3126a660f3 drm/i915: checking IS_ERR() instead of NULL
We switched from calling i915_gem_alloc_context_obj() to calling
i915_gem_alloc_object() so the error handling needs to be updated to
check for NULL instead of IS_ERR().

Fixes: 149c86e74f ('drm/i915: Allocate context objects from stolen')
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-08 13:03:23 +02:00
Chris Wilson d4dc5e92c0 drm/i915: Remove incorrect restriction on 32bit offsets in ppGTT backend
This is the wrong layer to apply an arbitrary restriction and the wrong
error code (object too large!). If we do want to prevent large offsets
being return to the user on 32bit systems (to hide bugs in userspace),
you want to restrict the drm_mm range manager instead. This first tells
userspace about the correct size of the GTT they can use (so they don't
try and overallocate object or batches), and fixes the eviction logic to
avoid the eventual and *guaranteed* error.

Fixes regression in
commit d7b2633dba
Author: Michel Thierry <michel.thierry@intel.com>
Date:   Wed Apr 8 12:13:34 2015 +0100

    drm/i915/gen8: Dynamic page table allocations

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Michel Thierry <michel.thierry@intel.com>
Cc: Mika Kuoppala <mika.kuoppala@intel.com>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-08 13:03:22 +02:00
Chris Wilson d86ed34a4e drm/i915: Add RPS thresholds to debugfs/i915_frequency_info
Expose some more of our internal RPS bookkeeping for debugging.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-08 13:03:21 +02:00
Fabian Frederick 0b6cc18810 drm/i915: use ERR_CAST instead of ERR_PTR/PTR_ERR
Inspired by scripts/coccinelle/api/err_cast.cocci

Signed-off-by: Fabian Frederick <fabf@skynet.be>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-08 13:03:20 +02:00
Joonas Lahtinen 06615ee5c5 drm/i915: Do not clear mappings beyond VMA size
Do not to clear mappings outside the allocated VMA under any
circumstances. Only clear the smaller of VMA or object page count.

This is required to allow creating partial object VMAs which in
turn are needed for partial GGTT views.

Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-08 13:03:19 +02:00
Todd Previte 09b1eb130e drm/i915: Move Displayport test request and sink IRQ logic to intel_dp_detect()
Due to changes in the driver and to support Displayport compliance testing,
the test request and sink IRQ logic has been relocated from
intel_dp_check_link_status to intel_dp_detect. This is because the bulk of the
compliance tests that set the TEST_REQUEST bit in the DEVICE_IRQ field of the
DPCD issue a long pulse / hot plug event to signify the start of the test.
Currently, for a long pulse, intel_dp_check_link_status is not called for a
long HPD pulse, so if test requests come in, they cannot be detected by the
driver.

Once located in the intel_dp_detect, in the regular hot plug event path,
proper detection of Displayport compliance test requests occurs which then
invokes the test handler to support them. Additionally, this places compliance
testing in the normal operational paths, eliminating as much special case code
as possible.

The only change in intel_dp_check_link_status with this patch is that when
the IRQ is the result of a test request from the sink, the test handler is not
invoked during the short pulse path. Short pulse test requests are for a
particular variety of tests (mainly link training) that will be implemented
in the future. Once those tests are available, the test request handler will
be called from here as well.

V2:
- Rewored the commit message to be more clear about the content and intent
  of this patch
- Restore IRQ detection logic to intel_dp_check_link_status(). Continue to
  detect and clear sink IRQs in the short pulse case. Ignore test requests
  in the short pulses for now since they are for future test implementations.

Signed-off-by: Todd Previte <tprevite@gmail.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-08 13:03:18 +02:00
Suketu Shah 00776511da drm/i915/skl: Enable runtime PM
Enable runtime PM for Skylake platform

v2: After adding dmc ver 1.0 support rebased on top of nightly. (Animesh)

Issue: VIZ-2819
Signed-off-by: A.Sunil Kamath <sunil.kamath@intel.com>
Signed-off-by: Suketu Shah <suketu.j.shah@intel.com>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Animesh Manna <animesh.manna@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-08 13:03:17 +02:00
Suketu Shah 93c7cb6c3a drm/i915/skl: Assert the requirements to enter or exit DC6.
Warn if the conditions to enter or exit DC6 are not satisfied such
as support for runtime PM, state of power well, CSR loading etc.

v2: Removed camelcase in functions and variables.

v3: Do some minimal check to assert if CSR program is not loaded.

v4:
1] Correct the check for backlight-disabling in assert_can_enable_dc6().
2] Check csr.loaded = false before disabling DC6 and simplify other checks.

v5:
1] Remove checks for DC5 state from assert_can_enable_dc6 function as DC5 is no
   longer enabled before enabling DC6.
2] Correct the check for CSR-loading in assert_can_disable_dc6 function as CSR must
   be loaded for context restore to happen on DC6 disabling.

v6:
1] It's okay to explicitly disable DC6 during driver-load/resume even though it might
   already be disabled and so don't warn about it.

v7: Rebase to latest.

v8: Sqashed the patch from Imre -
[PATCH] drm/i915/skl: avoid false CSR fw not loaded WARN during driver load/resume

v9: After adding dmc ver 1.0 support rebased on top of nightly. (Animesh)

v10: During initialization added a early return before disabling DC5. (Animesh)

Issue: VIZ-2819
Signed-off-by: A.Sunil Kamath <sunil.kamath@intel.com>
Signed-off-by: Suketu Shah <suketu.j.shah@intel.com>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Animesh Manna <animesh.manna@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-08 13:03:16 +02:00
A.Sunil Kamath 74b4f371f5 Implement enable/disable for Display C6 state
This patch just implements the basic enable and disable
functions of DC6 state which is needed for SKL platform.

Its important to load SKL CSR program before calling enable.

DC6 is a deeper power saving state where hardware dynamically
disables power well 0 and saves the associated registers.
DC6 can be entered when software allows it, the conditions
for DC5 are met, and the PCU allows DC6.
DC6 cannot be used if the backlight is being driven from the
display utility pin.

Its better to configure display engine to have power well 2
disabled before getting into DC6 enable function. Hence rpm
framework will ensure to check status of power well 2 and DC5
before calling skl_enable_dc6.

v2: Replace HAS_ with IS_ check as per Daniel's review comments

v3: Cleared the bits dc5/dc6 enable of DC_STATE_EN register
before setting them as per Satheesh's review comments.

v4: No need to call gen9_disable_dc5 inside enable sequence of
DC6, as its already take care above.

v5: call POSTING_READ for every write to a register to ensure that
its written immediately.
Call intel_prepare_ddi during DC6 exit as it's required on low-power exit.

v6: Protect DC6-enabling-disabling functionality with locks to synchronize
with CSR-loading code.

v7: Remove grabbing CSR-related mutex in skl_enable/disable_dc6 functions as
    deferred DC5-enabling functionality is now removed.

v8: Remove 'Disabling DC5' from the debug comment during DC6 enabling as when
    DC6 is allowed, DC5 is not programmed at all.

v9:
- Rebase to latest.
- Move all DC6-related functions from intel_display.c to intel_runtime_pm.c.

v10: After adding dmc ver 1.0 support rebased on top of nightly. (Animesh)

Issue: VIZ-2819
Signed-off-by: A.Sunil Kamath <sunil.kamath@intel.com>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Animesh Manna <animesh.manna@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-08 13:03:15 +02:00
Suketu Shah f75a198513 drm/i915/skl: Add DC6 Trigger sequence.
Add triggers for DC6 as per details provided in skl_enable_dc6
and skl_disable_dc6 implementations.

Also Call POSTING_READ for every write to a register to ensure
it is written to immediately

v1: Remove POSTING_READ and intel_prepare_ddi calls as they've been added in previous patches.

v2:
1] Remove check for backlight disabled as it should be the case by that time.
2] Mark DC5 as disabled when enabling DC6.
3] Return from DC5-disabling function early if DC5 is already be disabled which can happen
   due to DC6-enabling earlier.
3] Ensure CSR firmware is loaded after resume from DC6 as corresponding memory contents won't
   be retained after runtime-suspend.
4] Ensure that CSR isn't identified as loaded before CSR-loading program is called during
   runtime-resume.

v3: Rebase to latest
Modified as per review comments from Imre and after discussion with Art:
1] DC6 should be preferably enabled when PG2 is disabled by SW as the check for PG1 being
   disabled is taken of by HW to enter DC6, and disabled when PG2 is enabled respectively.
   This helps save more power, especially in the case when display is disabled but GT is
   enabled. Accordingly, replacing DC5 trigger sequence with DC6 for SKL.
2] DC6 could be enabled from intel_runtime_suspend() function, if DC5 is already enabled.
3] Move CSR-load-status setting code from intel_runtime_suspend function to a new function.

v4:
1] Enable/disable DC6 only when toggling the power-well using a newly defined macro ENABLE_DC6.

v5:
1] Load CSR on system resume too as firmware may be lost on system suspend preventing
   enabling DC5, DC6.
2] DDI buffers shouldn't be programmed during driver-load/resume as it's already done
   during modeset initialization then and also that the encoder list is still uninitialized by
   then. Therefore, call intel_prepare_ddi function right after disabling DC6 but outside
   skl_disable_dc6 function and not during driver-load/resume.

v6:
1] Rebase to latest.
2] Move SKL_ENABLE_DC6 macro definition from intel_display.c to intel_runtime_pm.c.

v7:
1) Refactored the code for removing the warning got from checkpatch.
2) After adding dmc ver 1.0 support rebased on top of nightly. (Animesh)

v8:
- Reverted the changes done in v7.
- Removed the condition check in skl_prepare_resune(). (Animesh)

Issue: VIZ-2819
Signed-off-by: A.Sunil Kamath <sunil.kamath@intel.com>
Signed-off-by: Suketu Shah <suketu.j.shah@intel.com>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Animesh Manna <animesh.manna@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-08 13:03:14 +02:00
Suketu Shah 5aefb2398a drm/i915/skl: Assert the requirements to enter or exit DC5.
Warn if the conditions to enter or exit DC5 are not satisfied such
as support for runtime PM, state of power well, CSR loading etc.

v2: Removed camelcase in functions and variables.

v3: Do some minimal check to assert if CSR program is not loaded.

v4:
1] Used an appropriate function lookup_power_well() to identify power well,
instead of using a magic number which can change in future.
2] Split the conditions further in assert_can_enable_DC5() and added more checks.
3] Removed all WARNs from assert_can_disable_DC5 as they were unnecessary and added two
   new ones.
4] Changed variable names as updated in earlier patches.

v5:
1] Change lookup_power_well function to take an int power well id.
2] Define a new intel_display_power_well_is_enabled helper function to check whether a
   particular power well is enabled.
3] Use CSR-related mutex in assert_csr_loaded function.

v6: Remove use of dc5_enabled variable as it's no longer needed.

v7:
1] Rebase to latest.
2] Move all DC5-related functions from intel_display.c to intel_runtime_pm.c.

v8: After adding dmc ver 1.0 support rebased on top of nightly. (Animesh)

v9: Modified below changes based on review comments from Imre.
- Moved intel_display_power_well_is_enabled() to intel_runtime_pm.c.
- Removed mutex lock from assert_csr_loaded(). (Animesh)

Issue: VIZ-2819
Signed-off-by: A.Sunil Kamath <sunil.kamath@intel.com>
Signed-off-by: Suketu Shah <suketu.j.shah@intel.com>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Animesh Manna <animesh.manna@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-08 13:03:13 +02:00
A.Sunil Kamath 6b457d31ea drm/i915/skl: Implement enable/disable for Display C5 state.
This patch just implements the basic enable and disable
functions of DC5 state which is needed for both SKL and BXT.

Its important to load respective CSR program before calling
enable, which anyways will happen as CSR program is executed
during boot.

DC5 is a power saving state where hardware dynamically disables
power well 1 and the CDCLK PLL and saves the associated registers.

DC5 can be entered when software allows it, power well 2 is
disabled, and hardware detects that all pipes are disabled
or pipe A is enabled with PSR active.

Its better to configure display engine to have power well 2 disabled before
getting into DC5 enable function. Hence rpm framework will have to
ensure to check status of power well 2 before calling gen9_enable_dc5.

Rather dc5 entry criteria should be decided based on power well 2 status.
If disabled, then call gen9_enable_dc5.

v2: Replace HAS_ with IS_ check as per Daniel's review comments

v3: Cleared the bits dc5/dc6 enable of DC_STATE_EN register
before setting them as per Satheesh's review comments.

v4: call POSTING_READ for every write to a register to ensure that
its written immediately.

v5: Modified as per review comments from Imre.
- Squashed register definitions into this patch.
- Finetuned comments and functions.

v6:
Avoid redundant writes in gen9_set_dc_state_debugmask_memory_up function.

v7:
- Rebase to latest.
- Move all runtime PM functions defined in intel_display.c to
  intel_runtime_pm.c.

v8: Rebased to drm-intel-nightly. (Animesh)

Issue: VIZ-2819
Signed-off-by: A.Sunil Kamath <sunil.kamath@intel.com>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Animesh Manna <animesh.manna@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-08 13:03:12 +02:00
Suketu Shah dc17430054 drm/i915/skl: Add DC5 Trigger Sequence
Add triggers as per expectations mentioned in gen9_enable_dc5
and gen9_disable_dc5 patch.

Also call POSTING_READ for every write to a register to ensure that
its written immediately.

v1: Remove POSTING_READ calls as they've already been added in previous patches.

v2: Rebase to move all runtime pm specific changes to intel_runtime_pm.c file.

Modified as per review comments from Imre:
1] Change variable name 'dc5_allowed' to 'dc5_enabled' to correspond to relevant
   functions.
2] Move the check dc5_enabled in skl_set_power_well() to disable DC5 into
   gen9_disable_DC5 which is a more appropriate place.
3] Convert checks for 'pm.dc5_enabled' and 'pm.suspended' in skl_set_power_well()
   to warnings. However, removing them for now as they'll be included in a future patch
   asserting DC-state entry/exit criteria.
4] Enable DC5, only when CSR firmware is verified to be loaded. Create new structure
   to track 'enabled' and 'deferred' status of DC5.
5] Ensure runtime PM reference is obtained, if CSR is not loaded, to avoid entering
   runtime-suspend and release it when it's loaded.
6] Protect necessary CSR-related code with locks.
7] Move CSR-loading call to runtime PM initialization, as power domains needed to be
   accessed during deferred DC5-enabling, are not initialized earlier.

v3: Rebase to latest.

Modified as per review comments from Imre:
1] Use blocking wait for CSR-loading to finish to enable DC5  for simplicity, instead of
   deferring enabling DC5 until CSR is loaded.
2] Obtain runtime PM reference during CSR-loading initialization itself as deferred DC5-
   enabling is removed and release it at the end of CSR-loading functionality.
3] Revert calling CSR-loading functionality to the beginning of i915 driver-load
   functionality to avoid any delay in loading.
4] Define another variable to track whether CSR-loading failed and use it to avoid enabling
   DC5 if it's true.
5] Define CSR-load-status accessor functions for use later.

v4:
1] Disable DC5 before enabling PG2 instead of after it.
2] DC5 was being mistaken enabled even when CSR-loading timed-out. Fix that.
3] Enable DC5-related functionality using a macro.
4] Remove dc5_enabled tracking variable and its use as it's not needed now.

v5:
1] Mark CSR failed to load where necessary in finish_csr_load function.
2] Use mutex-protected accessor function to check if CSR loaded instead of directly
   accessing the variable.
3] Prefix csr_load_status_get/set function names with intel_.

v6: rebase to latest.
v7: Rebase on top of nightly (Damien)
v8: Squashed the patch from Imre - added csr helper pointers to simplify the code. (Imre)
v9: After adding dmc ver 1.0 support rebased on top of nightly. (Animesh)
v10: Added a enum for different csr states, suggested by Imre. (Animesh)

v11: Based on review comments from Imre, Damien and Daniel following changes done
- enum name chnaged to csr_state (singular form).
- FW_UNINITIALIZED used as zeroth element in enum csr_state.
- Prototype changed for helper function(set/get csr status), using enum csr_state instead of bool.

v12: Based on review comment from Imre, introduced bool fw_loaded local to finish_csr_load() which helps
calling once to set the csr status. The same flag used to fail RPM if find any issue during
firmware loading.

Issue: VIZ-2819
Signed-off-by: A.Sunil Kamath <sunil.kamath@intel.com>
Signed-off-by: Suketu Shah <suketu.j.shah@intel.com>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Animesh Manna <animesh.manna@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-08 13:03:11 +02:00
Daniel Vetter eb805623d8 drm/i915/skl: Add support to load SKL CSR firmware.
Display Context Save and Restore support is needed for
various SKL Display C states like DC5, DC6.

This implementation is added based on first version of DMC CSR program
that we received from h/w team.

Here we are using request_firmware based design.
Finally this firmware should end up in linux-firmware tree.

For SKL platform its mandatory to ensure that we load this
csr program before enabling DC states like DC5/DC6.

As CSR program gets reset on various conditions, we should ensure
to load it during boot and in future change to be added to load
this system resume sequence too.

v1: Initial relese as RFC patch

v2: Design change as per Daniel, Damien and Shobit's review comments
request firmware method followed.

v3: Some optimization and functional changes.
Pulled register defines into drivers/gpu/drm/i915/i915_reg.h
Used kmemdup to allocate and duplicate firmware content.
Ensured to free allocated buffer.

v4: Modified as per review comments from Satheesh and Daniel
Removed temporary buffer.
Optimized number of writes by replacing I915_WRITE with I915_WRITE64.

v5:
Modified as per review comemnts from Damien.
- Changed name for functions and firmware.
- Introduced HAS_CSR.
- Reverted back previous change and used csr_buf with u8 size.
- Using cpu_to_be64 for endianness change.

Modified as per review comments from Imre.
- Modified registers and macro names to be a bit closer to bspec terminology
and the existing register naming in the driver.
- Early return for non SKL platforms in intel_load_csr_program function.
- Added locking around CSR program load function as it may be called
concurrently during system/runtime resume.
- Releasing the fw before loading the program for consistency
- Handled error path during f/w load.

v6: Modified as per review comments from Imre.
- Corrected out_freecsr sequence.

v7: Modified as per review comments from Imre.
Fail loading fw if fw->size%8!=0.

v8: Rebase to latest.

v9: Rebase on top of -nightly (Damien)

v10: Enabled support for dmc firmware ver 1.0.
According to ver 1.0 in a single binary package all the firmware's that are
required for different stepping's of the product will be stored. The package
contains the css header, followed by the package header and the actual dmc
firmwares. Package header contains the firmware/stepping mapping table and
the corresponding firmware offsets to the individual binaries, within the
package. Each individual program binary contains the header and the payload
sections whose size is specified in the header section. This changes are done
to extract the specific firmaware from the package. (Animesh)

v11: Modified as per review comemnts from Imre.
- Added code comment from bpec for header structure elements.
- Added __packed to avoid structure padding.
- Added helper functions for stepping and substepping info.
- Added code comment for CSR_MAX_FW_SIZE.
- Disabled BXT firmware loading, will be enabled with dmc 1.0 support.
- Changed skl_stepping_info based on bspec, earlier used from config DB.
- Removed duplicate call of cpu_to_be* from intel_csr_load_program function.
- Used cpu_to_be32 instead of cpu_to_be64 as firmware binary in dword aligned.
- Added sanity check for header length.
- Added sanity check for mmio address got from firmware binary.
- kmalloc done separately for dmc header and dmc firmware. (Animesh)

v12: Modified as per review comemnts from Imre.
- Corrected the typo error in skl stepping info structure.
- Added out-of-bound access for skl_stepping_info.
- Sanity check for mmio address modified.
- Sanity check added for stepping and substeppig.
- Modified the intel_dmc_info structure, cache only the required header info. (Animesh)

v13: clarify firmware load error message.
The reason for a firmware loading failure can be obscure if the driver
is built-in. Provide an explanation to the user about the likely reason for
the failure and how to resolve it. (Imre)

v14: Suggested by Jani.
- fix s/I915/CONFIG_DRM_I915/ typo
- add fw_path to the firmware object instead of using a static ptr (Jani)

v15:
1) Changed the firmware name as dmc_gen9.bin, everytime for a new firmware version a symbolic link
with same name will help not to build kernel again.
2) Changes done as per review comments from Imre.
- Error check removed for intel_csr_ucode_init.
- Moved csr-specific data structure to intel_csr.h and optimization done on structure definition.
- fw->data used directly for parsing the header info & memory allocation
only done separately for payload. (Animesh)

v16:
- No need for out_regs label in i915_driver_load(), so removed it.
- Changed the firmware name as skl_dmc_ver1.bin, followed naming convention <platform>_dmc_<api-version>.bin (Animesh)

Issue: VIZ-2569
Signed-off-by: A.Sunil Kamath <sunil.kamath@intel.com>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Animesh Manna <animesh.manna@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-08 13:03:10 +02:00
Daniel Vetter c6b8a4bc1e drm/i915: Simplify cmd-parser DISPATCH_SECURE check
i915_needs_cmd_parser already checks that for us.

Suggested-by: Mika Kuoppala <mika.kuoppala@intel.com>
Cc: Mika Kuoppala <mika.kuoppala@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
2015-05-08 13:03:09 +02:00
Nick Hoath dfb601e6d2 drm/i915/bxt: Add WaDisableThreadStallDopClockGating
Signed-off-by: Nick Hoath <nicholas.hoath@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-08 13:03:08 +02:00
Chandra Konduru c331879ce8 drm/i915: skylake sprite plane scaling using shared scalers
This patch enables skylake sprite plane display scaling using shared
scalers atomic desgin.

v2:
-use single copy of scaler limits (Matt)

v3:
-detaching scalers moved to crtc commit path (Matt)

v4:
-changes to align with updated scaler structures (Matt, me)
-keep sprite src rect in 16.16 format (Matt, Daniel)

v5:
-rebased on top of 90/270 rotation changes (me)
-Refactored skl_update_plane to reduce its size (Daniel)
 It is a step towards having a single function covering all planes.

Signed-off-by: Chandra Konduru <chandra.konduru@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Testcase: igt/kms_plane_scaling
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-08 13:03:07 +02:00
Chandra Konduru 6156a45602 drm/i915: skylake primary plane scaling using shared scalers
This patch enables skylake primary plane scaling using shared
scalers atomic desgin.

v2:
-use single copy of scaler limits (Matt)

v3:
-move detach_scalers to crtc commit path (Matt)
-use values in plane_state->src as regular integers (me)

v4:
-changes to align with updated scaler structures (Matt, me)
-keep plane src rect in 16.16 format (Matt, Daniel)

v5:
-Rebased on top of 90/270 rotation changes (me)
-Fixed an issue introduced by 90/270 changes where plane programming
 is using drm_plane->state rect instead of intel_plane->state rect.
 This change also required for scaling to work properly. (me)
-With 90/270, updated limits to cover both portrait and landscape usages (me)
-Refactored skylake_update_primary_plane to reduce its size (Daniel)
 Added helper functions for refactoring are comprehended enough to be
 used for skylake_update_plane (for sprite) too. One stop towards
 having single function for all planes.

v6:
-Added fixme note when checking plane_state->src width in update_plane (Daniel)
-Release lock when failing to colorkey request with active scaler (Daniel)

Signed-off-by: Chandra Konduru <chandra.konduru@intel.com>
Reviewed-by: matthew.d.roper@intel.com
Reviewed-by: sonika.jindal@intel.com (v5)
Testcase: igt/kms_plane_scaling
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-08 13:03:06 +02:00
Mario Kleiner 3790e395b8 drm/tegra: Don't use vblank_disable_immediate on incapable driver.
Tegra would not only need a hardware vblank counter that
increments at leading edge of vblank, but also support
for instantaneous high precision vblank timestamp queries, ie.
a proper implementation of dev->driver->get_vblank_timestamp().

Without these, there can be off-by-one errors during vblank
disable/enable if the scanout is inside vblank at en/disable
time, and additionally clients will never see any useable
vblank timestamps when querying via drmWaitVblank ioctl. This
would negatively affect swap scheduling under X11 and Wayland.

Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-05-08 20:56:34 +10:00
Dave Airlie 94754c183a Merge tag 'drm-amdkfd-fixes-2015-05-07' of git://people.freedesktop.org/~gabbayo/linux into drm-fixes
- Add missing initialization of SDMA vm register when creating an SDMA queue
- Don't report local memory size, as we don't support local memory allocation
  yet.
- Allow to unregister process with exisiting queues. Until now we blocked
  it with BUG_ON, which was also an error by itself.

* tag 'drm-amdkfd-fixes-2015-05-07' of git://people.freedesktop.org/~gabbayo/linux:
  drm/amdkfd: Initialize sdma vm when creating sdma queue
  drm/amdkfd: Don't report local memory size
  drm/amdkfd: allow unregister process with queues
2015-05-08 20:52:51 +10:00
Dave Airlie e1dee1973c Merge tag 'drm-intel-next-2015-04-23-fixed' of git://anongit.freedesktop.org/drm-intel into drm-next
drm-intel-next-2015-04-23:
- dither support for ns2501 dvo (Thomas Richter)
- some polish for the gtt code and fixes to finally enable the cmd parser on hsw
- first pile of bxt stage 1 enabling (too many different people to list ...)
- more psr fixes from Rodrigo
- skl rotation support from Chandra
- more atomic work from Ander and Matt
- pile of cleanups and micro-ops for execlist from Chris
drm-intel-next-2015-04-10:
- cdclk handling cleanup and fixes from Ville
- more prep patches for olr removal from John Harrison
- gmbus pin naming rework from Jani (prep for bxt)
- remove ->new_config from Ander (more atomic conversion work)
- rps (boost) tuning and unification with byt/bsw from Chris
- cmd parser batch bool tuning from Chris
- gen8 dynamic pte allocation (Michel Thierry, based on work from Ben Widawsky)
- execlist tuning (not yet all of it) from Chris
- add drm_plane_from_index (Chandra)
- various small things all over

* tag 'drm-intel-next-2015-04-23-fixed' of git://anongit.freedesktop.org/drm-intel: (204 commits)
  drm/i915/gtt: Allocate va range only if vma is not bound
  drm/i915: Enable cmd parser to do secure batch promotion for aliasing ppgtt
  drm/i915: fix intel_prepare_ddi
  drm/i915: factor out ddi_get_encoder_port
  drm/i915/hdmi: check port in ibx_infoframe_enabled
  drm/i915/hdmi: fix vlv infoframe port check
  drm/i915: Silence compiler warning in dvo
  drm/i915: Update DRIVER_DATE to 20150423
  drm/i915: Enable dithering on NatSemi DVO2501 for Fujitsu S6010
  rm/i915: Move i915_get_ggtt_vma_pages into ggtt_bind_vma
  drm/i915: Don't try to outsmart gcc in i915_gem_gtt.c
  drm/i915: Unduplicate i915_ggtt_unbind/bind_vma
  drm/i915: Move ppgtt_bind/unbind around
  drm/i915: move i915_gem_restore_gtt_mappings around
  drm/i915: Fix up the vma aliasing ppgtt binding
  drm/i915: Remove misleading comment around bind_to_vm
  drm/i915: Don't use atomics for pg_dirty_rings
  drm/i915: Don't look at pg_dirty_rings for aliasing ppgtt
  drm/i915/skl: Support Y tiling in MMIO flips
  drm/i915: Fixup kerneldoc for struct intel_context
  ...

Conflicts:
	drivers/gpu/drm/i915/i915_drv.c
2015-05-08 20:51:06 +10:00
Christian König 12e49feadf drm/radeon: stop trying to suspend UVD sessions
Saving the current UVD state on suspend and restoring it on resume
just doesn't work reliable. Just close cleanup all sessions on suspend.

Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-05-07 11:00:18 -04:00
Christian König d52cdfa4a0 drm/radeon: more strictly validate the UVD codec
MPEG 2/4 are only supported since UVD3.

Signed-off-by: Christian König <christian.koenig@amd.com>
CC: stable@vger.kernel.org
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-05-07 11:00:17 -04:00
Christian König a1b403da70 drm/radeon: make UVD handle checking more strict
Invalid messages can crash the hw otherwise.

Signed-off-by: Christian König <christian.koenig@amd.com>
CC: stable@vger.kernel.org
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-05-07 11:00:16 -04:00
Christian König 29c63fe22a drm/radeon: make VCE handle check more strict
Invalid handles can crash the hw.

Signed-off-by: Christian König <christian.koenig@amd.com>
CC: stable@vger.kernel.org
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-05-07 11:00:16 -04:00
Christian König 247c405098 drm/radeon: fix userptr lockup
We shouldn't try to reserve and wait for a BO that isn't bound. Otherwise
we can run into a deadlock if we have a fault during binding the BO.

Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-05-07 11:00:15 -04:00
monk.liu db12973cd5 drm/radeon: fix userptr BO unpin bug v3
Fixing a memory leak with userptrs.

v2: clean up the loop, use an iterator instead
v3: remove unused variable

Signed-off-by: monk.liu <monk.liu@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
CC: stable@vger.kernel.org
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-05-07 11:00:15 -04:00
Xihan Zhang 79b066bd76 drm/amdkfd: Initialize sdma vm when creating sdma queue
This patch fixes a bug where sdma vm wasn't initialized when
an sdma queue was created in HWS mode.

This caused GPUVM faults to appear on dmesg and it is one of the
causes that SDMA queues are not working.

Signed-off-by: Xihan Zhang <xihan.zhang@amd.com>
Reviewed-by: Ben Goz <ben.goz@amd.comt>
Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
Cc: stable@vger.kernel.org
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-05-07 17:38:06 +03:00
Oded Gabbay 42e08c7836 drm/amdkfd: Don't report local memory size
This patch sets the local memory size that is reported to userspace to 0.
This is done to make sure that userspace won't try to allocate local memory
for HSA.

As long as amdkfd doesn't support allocating local memory for HSA,
we need this patch.

Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
Cc: stable@vger.kernel.org
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-05-07 17:37:52 +03:00
Oded Gabbay 1e5ec956a0 drm/amdkfd: allow unregister process with queues
Sometimes we might unregister process that have queues, because we couldn't
preempt the queues. Until now we blocked it with BUG_ON but instead just
print it as debug.

Reviewed-by: Ben Goz <ben.goz@amd.com>
Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
Cc: stable@vger.kernel.org
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-05-07 17:37:41 +03:00
Chris Wilson 736a69ca8c drm/i915: Drop PIPE-A quirk for 945GSE HP Mini
Since the introduction of BIOS fb preservation, circa 3.17, we began
encountering a failure during boot when trying to use force-detect
before GEM was initialised. That bug is from

commit 7fad798e16
Author: Daniel Vetter <daniel.vetter@ffwll.ch>
Date:   Wed Jul 4 17:51:47 2012 +0200

    drm/i915: ensure the force pipe A quirk is actually followed

but investigation of the affected machine revealed that it was using a
PIPE-A quirk even though it was a 945GSE and the quirk is only supposed
to be used to workaround a hardware issue on 830/845. That quirk was
added for this HP Mini in

commit 6b93afc564a5e74b0eaaa46c95f557449951b3b9
Author: Bryce Harrington <bryce@bryceharrington.org>
Date:   Wed May 27 03:40:52 2009 -0700

    add pipe a force quirk for Dell mini

in order to workaround an issue with the BIOS behaving strangely during
lid-close. Since then we have a much larger hammer to thwart the BIOS
after opening the lid and the PIPE-A quirk is no longer required.

Reported-and-tested-by: Apostolos B. <barz621@gmail.com>
References: https://bugs.freedesktop.org/show_bug.cgi?id=21960
Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=87521
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2015-05-07 15:28:34 +03:00
Daniel Stone 4339ed82b2 drm: Don't leak path blob property when updating
Previously, when updating the path blob property, we would leak the
existing one. Make this symmetrical with the tile and EDID blob
pointers.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Cc: Dave Airlie <airlied@redhat.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-07 11:10:58 +02:00
Daniel Stone 9b0adc29d2 drm/atomic: Don't open-code CRTC state destroy
One failure path in crtc_helper had an open-coded CRTC state destroy
which didn't actually call through to the driver's specified state
destroy. Fix that.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-07 11:03:02 +02:00
Ville Syrjälä bfcd74d2ae drm/edid: Add DMT modes with ID > 0x50
DMT Version 1.0, Rev. 13 lists a bunch of new modes we don't currently
have in our dmt mode table. So add them.

The order may look a bit weird since it's not sorted based on the DMT
ID, but this is the order they appear in the standard. I suppose they
are ordered by the resolution, pixel clock, or some such factor. I
decided that it's perhaps best to keep the same order as the spec.

Cc: "liu,lei" <lei.a.liu@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-07 11:02:21 +02:00
Ville Syrjälä 24b856b136 drm/edid: Add the DMT ID in the comments
To help with matching things to spec, include the DMT ID in the comments
in out DMT mode table.

Cc: "liu,lei" <lei.a.liu@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-07 11:02:20 +02:00
Ville Syrjälä fcf22d0567 drm/edid: Fix up DMT modes
Liu Lei noticed that our 1856x1392@75Hz DMT mode doesn't match the spec.
Fix that up, and also fix up a few other inconsistencies I discovered
by parsing the spec (DMT version 1.0, revision 13) and comparing the
results to our current DMT mode table.

Also clean up the indentation mess for the 1024x768i mode.

Cc: "liu,lei" <lei.a.liu@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-07 11:02:19 +02:00
Sonika Jindal af77b97413 drm/i915: Sink rate read should be saved in deca-kHz
The sink rate read from supported link rate table is in KHz as per spec
while in drm, the saved clock is in deca-KHz. So divide the link rate by
10 before storing.

Reading of rates was added by:
commit fc0f8e2531 ("drm/i915/skl: Read sink supported rates from edp
panel")

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Sonika Jindal <sonika.jindal@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2015-05-07 11:57:00 +03:00
Gerd Hoffmann c0fe07aa50 drm/qxl: rewrite framebuffer support
Completely different approach:  Instead of encoding each and every
framebuffer update as spice operation simply update the shadow
framebuffer and maintain a dirty rectangle.  Also schedule a worker
to push an update for the dirty rectangle as spice operation.  Usually
a bunch of dirty rectangle updates are collected before the worker
actually runs.

What changes:  Updates get batched now.  Instead of sending tons of
small updates a few large ones are sent.  When the same region is
updated multiple times within a short timeframe (scrolling multiple
lines for example) we send a single update only.  Spice server has an
easier job now:  The dependency tree for display operations which spice
server maintains for lazy rendering is alot smaller now.  Spice server's
image compression probably works better too with the larger image blits.

Net effect:  framebuffer console @ qxldrmfb is an order of magnitude
faster now.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-05-07 13:09:25 +10:00
Dave Airlie 49f897647a Merge tag 'topic/drm-misc-2015-05-06' of git://anongit.freedesktop.org/drm-intel into drm-next
misc drm core patches.

* tag 'topic/drm-misc-2015-05-06' of git://anongit.freedesktop.org/drm-intel:
  drm: simplify master cleanup
  drm: simplify authentication management
  drm: drop unused 'magicfree' list
  drm: fix a memleak on mutex failure path
  drm/atomic-helper: Really recover pre-atomic plane/cursor behavior
  drm/qxl: Fix qxl_noop_get_vblank_counter()
  drm: Zero out invalid vblank timestamp in drm_update_vblank_count. (v2)
  drm: Prevent invalid use of vblank_disable_immediate. (v2)
  drm/vblank: Fixup and document timestamp update/read barriers
  DRM: Don't re-poll connector for disconnect
  drm: Fix for DP CTS test 4.2.2.5 - I2C DEFER handling
  drm: Fix the 'native defer' message in drm_dp_i2c_do_msg()
  drm/atomic-helper: Don't call atomic_update_plane when it stays off
2015-05-07 13:02:39 +10:00
Jani Nikula 9fcb1704d1 drm/i915/dp: there is no audio on port A
The eDP port A register on PCH split platforms has a slightly different
register layout from the other ports, with bit 6 being either alternate
scrambler reset or reserved, depending on the generation. Our
misinterpretation of the bit as audio has lead to warning.

Fix this by not enabling audio on port A, since none of our platforms
support audio on port A anyway.

v2: DDI doesn't have audio on port A either (Sivakumar Thulasimani)

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89958
Reported-and-tested-by: Chris Bainbridge <chris.bainbridge@gmail.com>
Cc: stable@vger.kernel.org
Reviewed-by: Sivakumar Thulasimani <sivakumar.thulasimani@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2015-05-06 12:17:31 +03:00
Lukas Wunner 3916e3fd81 drm/i915: Add missing MacBook Pro models with dual channel LVDS
Single channel LVDS maxes out at 112 MHz. The 15" pre-retina models
shipped with 1440x900 (106 MHz) by default or 1680x1050 (119 MHz)
as a BTO option, both versions used dual channel LVDS even though
the smaller one would have fit into a single channel.

Notes:
  Bug report showing that the MacBookPro8,2 with 1440x900 uses dual
  channel LVDS (this lead to it being hardcoded in intel_lvds.c by
  Daniel Vetter with commit 618563e394):
    https://bugzilla.kernel.org/show_bug.cgi?id=42842

  If i915.lvds_channel_mode=2 is missing even though the machine needs
  it, every other vertical line is white and consequently, only the left
  half of the screen is visible (verified by myself on a MacBookPro9,1).

  Forum posting concerning a MacBookPro6,2 with 1440x900, author is
  using i915.lvds_channel_mode=2 on the kernel command line, proving
  that the machine uses dual channels:
    https://bbs.archlinux.org/viewtopic.php?id=185770

  Chi Mei N154C6-L04 with 1440x900 is a replacement panel for all
  MacBook Pro "A1286" models, and that model number encompasses the
  MacBookPro6,2 / 8,2 / 9,1. Page 17 of the panel's datasheet shows it's
  driven with dual channel LVDS:
    http://www.ebay.com/itm/-/400690878560
    http://www.everymac.com/ultimate-mac-lookup/?search_keywords=A1286
    http://www.taopanel.com/chimei/datasheet/N154C6-L04.pdf

  Those three 15" models, MacBookPro6,2 / 8,2 / 9,1, are the only ones
  with i915 graphics and dual channel LVDS, so that list should be
  complete. And the 8,2 is already in intel_lvds.c.

  Possible motivation to use dual channel LVDS even on the 1440x900
  models: Reduce the number of different parts, i.e. use identical logic
  boards and display cabling on both versions and the only differing
  component is the panel.

Signed-off-by: Lukas Wunner <lukas@wunner.de>
Acked-by: Jani Nikula <jani.nikula@intel.com>
Cc: stable@vger.kernel.org
[Jani: included notes in the commit message for posterity]
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2015-05-05 17:14:36 +03:00
Lukas Wunner 6f317cfe42 drm/i915: Assume dual channel LVDS if pixel clock necessitates it
Single channel LVDS maxes out at 112 MHz, anything above must be dual
channel. This avoids the need to specify i915.lvds_channel_mode=2 on
all 17" MacBook Pro models with i915 graphics since they had 1920x1200
(193 MHz), plus those 15" pre-retina models which had a resolution
of 1680x1050 (119 MHz) as a BTO option.

Source for 112 MHz limit of single channel LVDS is section 2.3 of:
https://01.org/linuxgraphics/sites/default/files/documentation/ivb_ihd_os_vol3_part4.pdf

v2: Avoid hardcoding 17" models by assuming dual channel LVDS if the
resolution necessitates it, suggested by Jani Nikula.

v3: Fix typo, thanks Joonas Lahtinen.

v4: Split commit in two, suggested by Ville Syrjälä.

Signed-off-by: Lukas Wunner <lukas@wunner.de>
Tested-by: Lukas Wunner <lukas@wunner.de>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: stable@vger.kernel.org
[Jani: included spec reference into the commit message]
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2015-05-05 17:09:44 +03:00
Alex Deucher d73a824acc drm/radeon: don't setup audio on asics that don't support it
bug: https://bugzilla.kernel.org/show_bug.cgi?id=97701

Reported-by: Mikael Pettersson <mikpelinux@gmail.com>
Tested-by: Mikael Pettersson <mikpelinux@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2015-05-05 09:46:10 -04:00
David Herrmann 4a324d33bf drm: simplify master cleanup
In drm_master_destroy() we _free_ the master object. There is no reason to
hold any locks while dropping its static members, nor do we have to reset
it to 0.

Furthermore, kfree() already does NULL checks, so call it directly on
master->unique and drop the redundant reset-code.

Signed-off-by: David Herrmann <dh.herrmann@gmail.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-05 09:46:38 +02:00
David Herrmann 32e7b94a3f drm: simplify authentication management
The magic auth tokens we have are a simple map from cyclic IDs to drm_file
objects. Remove all the old bulk of code and replace it with a simple,
direct IDR.

The previous behavior is kept. Especially calling authmagic multiple times
on the same magic results in EINVAL except on the first call. The only
difference in behavior is that we never allocate IDs multiple times as
long as a client has its FD open.

v2:
 - Fix return code of GetMagic()
 - Use non-cyclic IDR allocator
 - fix off-by-one in "magic > INT_MAX" sanity check

v3:
 - drop redundant "magic > INT_MAX" check

Signed-off-by: David Herrmann <dh.herrmann@gmail.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-05 09:45:57 +02:00
David Herrmann acab18b5c3 drm: drop unused 'magicfree' list
This list is write-only. It's never used for read-access, so no reason to
keep it around. Drop it!

Signed-off-by: David Herrmann <dh.herrmann@gmail.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-05 09:40:50 +02:00
Oleg Drokin ed1817036b drm: fix a memleak on mutex failure path
Need to free just allocated ctx allocation if we cannot
get our config mutex.

This one has been flagged by kbuild bot all the way back in August,
but somehow nobody picked it up:
https://lists.01.org/pipermail/kbuild/2014-August/001691.html

In addition there is another failure path that leaks the same
ctx reference that is fixed.

Found with smatch.

Signed-off-by: Oleg Drokin <green@linuxhacker.ru>
CC: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-05 09:26:43 +02:00
Christian König 013ead48a8 drm/radeon: disable semaphores for UVD V1 (v2)
Hardware doesn't seem to work correctly, just block userspace in this case.

v2: add missing defines

Bugs: https://bugs.freedesktop.org/show_bug.cgi?id=85320

Signed-off-by: Christian König <christian.koenig@amd.com>
CC: stable@vger.kernel.org
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-05-04 15:03:56 -04:00
Daniel Vetter 3671c580e5 drm/atomic-helper: Really recover pre-atomic plane/cursor behavior
I've fumbled this in

commit f02ad907cd
Author: Daniel Vetter <daniel.vetter@ffwll.ch>
Date:   Thu Jan 22 16:36:23 2015 +0100

    drm/atomic-helpers: Recover full cursor plane behaviour

and accidentally put the assignment for legacy_cursor_upate after the
atomic commit, where it is pretty useless.

Reported-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
2015-05-04 15:40:52 +02:00
Mario Kleiner 337eb43c8d drm/qxl: Fix qxl_noop_get_vblank_counter()
This breaks under the vblank timestamp cleanup patch
by Daniel Vetter. Also it is pointless to return anything
but zero (or any other constant) if the function doesn't
actually query a hw vblank counter. The bogus return of
the current drm vblank counter via direct readout or via
drm_vblank_count() is found in many of the new kms drivers,
but it does exactly nothing different from returning any
arbitrary constant - it's a no operation.

Let's simply return 0 - Easy and fast.

Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com>
Cc: Dave Airlie <airlied@redhat.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-04 11:14:55 +02:00
Mario Kleiner d66a1e3828 drm: Zero out invalid vblank timestamp in drm_update_vblank_count. (v2)
Since commit 844b03f277 we make
sure that after vblank irq off, we return the last valid
(vblank count, vblank timestamp) pair to clients, e.g., during
modesets, which is good.

An overlooked side effect of that commit for kms drivers without
support for precise vblank timestamping is that at vblank irq
enable, when we update the vblank counter from the hw counter, we
can't update the corresponding vblank timestamp, so now we have a
totally mismatched timestamp for the new count to confuse clients.

Restore old client visible behaviour from before Linux 3.18, but
zero out the timestamp at vblank counter update (instead of disable
as in original implementation) if we can't generate a meaningful
timestamp immediately for the new vblank counter. This will fix
this regression, so callers know they need to retry again later
if they need a valid timestamp, but at the same time preserves
the improvements made in the commit mentioned above.

v2: Rebased on top of Daniel Vetter's fixup and documentation
    patch for timestamp updates. Drop request for stable kernel
    backport as this would be more difficult, unless the original
    patch would get applied to stable kernels.

Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Daniel Vetter <daniel@ffwll.ch>
Cc: Dave Airlie <airlied@redhat.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-04 11:13:23 +02:00
Mario Kleiner 5a8b21b222 drm: Prevent invalid use of vblank_disable_immediate. (v2)
For a kms driver to support immediate disable of vblank
irq's reliably without introducing off by one errors or
other mayhem for clients, it must not only support a
hardware vblank counter query, but also high precision
vblank timestamping, so vblank count and timestamp can be
instantaneously reinitialzed to valid values. Additionally
the exposed hardware counter must behave as if it is
incrementing at leading edge of vblank to avoid off by
one errors during reinitialization of the counter while
the display happens to be inside or close to vblank.

Check during drm_vblank_init that a driver which claims to
be capable of vblank_disable_immediate at least supports
high precision timestamping and prevent use of instant
disable if that isn't present as a minimum requirement.

v2: Changed from DRM_ERROR to DRM_INFO and made message
    more clear, as suggested by Michel Dänzer.

Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Cc: Dave Airlie <airlied@redhat.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-04 11:11:21 +02:00
Daniel Vetter 99264a61df drm/vblank: Fixup and document timestamp update/read barriers
This was a bit too much cargo-culted, so lets make it solid:
- vblank->count doesn't need to be an atomic, writes are always done
  under the protection of dev->vblank_time_lock. Switch to an unsigned
  long instead and update comments. Note that atomic_read is just a
  normal read of a volatile variable, so no need to audit all the
  read-side access specifically.

- The barriers for the vblank counter seqlock weren't complete: The
  read-side was missing the first barrier between the counter read and
  the timestamp read, it only had a barrier between the ts and the
  counter read. We need both.

- Barriers weren't properly documented. Since barriers only work if
  you have them on boths sides of the transaction it's prudent to
  reference where the other side is. To avoid duplicating the
  write-side comment 3 times extract a little store_vblank() helper.
  In that helper also assert that we do indeed hold
  dev->vblank_time_lock, since in some cases the lock is acquired a
  few functions up in the callchain.

Spotted while reviewing a patch from Chris Wilson to add a fastpath to
the vblank_wait ioctl.

v2: Add comment to better explain how store_vblank works, suggested by
Chris.

v3: Peter noticed that as-is the 2nd smp_wmb is redundant with the
implicit barrier in the spin_unlock. But that can only be proven by
auditing all callers and my point in extracting this little helper was
to localize all the locking into just one place. Hence I think that
additional optimization is too risky.

Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Mario Kleiner <mario.kleiner.de@gmail.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Michel Dänzer <michel@daenzer.net>
Cc: Peter Hurley <peter@hurleysoftware.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-and-tested-by: Mario Kleiner <mario.kleiner.de@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
2015-05-04 10:57:00 +02:00
Dave Airlie 71aee81937 Merge tag 'drm-intel-fixes-2015-04-30' of git://anongit.freedesktop.org/drm-intel into drm-fixes
Just a single intel fix
* tag 'drm-intel-fixes-2015-04-30' of git://anongit.freedesktop.org/drm-intel:
  drm/i915/chv: Implement WaDisableShadowRegForCpd
2015-05-04 08:56:47 +10:00
Dave Airlie df9ebeb2da Merge branch 'drm-next0420' of https://github.com/markyzq/kernel-drm-rockchip into drm-fixes
one fix and maintainers update
* 'drm-next0420' of https://github.com/markyzq/kernel-drm-rockchip:
  drm/rockchip: fix error check when getting irq
  MAINTAINERS: add entry for Rockchip drm drivers
2015-05-04 08:56:27 +10:00
Mika Kuoppala 75d04a3773 drm/i915/gtt: Allocate va range only if vma is not bound
When we have bound vma into an address space, the layout
of page table structures is immutable. So we can be absolutely
certain that if vma is already bound, there is no need to
(re)allocate a virtual address range for it.

v2: - add sanity checks and remove superfluous GLOBAL_BIND set
    - we might do update for an unbound vma (Chris)

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90224
Testcase: igt/gem_exec_big #bdw
Reported-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Michel Thierry <michel.thierry@intel.com>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2015-04-30 13:31:24 +03:00
Daniel Vetter 245054a1fe drm/i915: Enable cmd parser to do secure batch promotion for aliasing ppgtt
With the binding regression from the original full ppgtt patches
fixed we can throw the switch. Yay!

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90190
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
[Jani: tweaked commit title per Chris' suggestion]
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2015-04-30 13:29:56 +03:00
Imre Deak faa0cdbec1 drm/i915: fix intel_prepare_ddi
At the moment intel_prepare_ddi buffer will iterate through both MST and
CRT encoders, which is incorrect. Neither of these encoder types have an
embedding intel_digital_port object, so for these encoder types we will
use random data when dereferencing the corresponding
intel_digital_port->port field.

Introduced in
commit b403745c84
Author: Damien Lespiau <damien.lespiau@intel.com>
Date:   Mon Aug 4 22:01:33 2014 +0100

    drm/i915: Iterate through the initialized DDIs to prepare their buffers

v2:
- fix getting at the port for MST encoders too
- make sure that intel_prepare_ddi_buffers() gets called for port E too
  (Paulo)

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90067
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2015-04-30 12:33:09 +03:00
Imre Deak a1e6ad6675 drm/i915: factor out ddi_get_encoder_port
In the next patch we'll need to get at both the encoder's intel_digital_port
object - which maybe NULL for a CRT - and it's port, so factor out this
functionality.

No functional change.

Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2015-04-30 12:23:33 +03:00
Jani Nikula 052f62f789 drm/i915/hdmi: check port in ibx_infoframe_enabled
Add port check for ibx similar to vlv in

commit 535afa2e9e
Author: Jesse Barnes <jbarnes@virtuousgeek.org>
Date:   Wed Apr 15 16:52:29 2015 -0700

    drm/i915/vlv: check port in infoframe_enabled v2

Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2015-04-30 11:09:39 +03:00
Jani Nikula eeea3e67a4 drm/i915/hdmi: fix vlv infoframe port check
Due to missing shifting, the vlv infoframe port check only works for
port A. Fix it. Broken since introduction in

commit 535afa2e9e
Author: Jesse Barnes <jbarnes@virtuousgeek.org>
Date:   Wed Apr 15 16:52:29 2015 -0700

    drm/i915/vlv: check port in infoframe_enabled v2

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90059
Tested-by: xubin <bin.a.xu@intel.com>
Tested-by: Ye Tian <yex.tian@intel.com>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2015-04-30 10:51:29 +03:00
Chris Wilson 699ab78715 drm/i915: Silence compiler warning in dvo
drivers/gpu/drm/i915/intel_dvo.c: In function ‘intel_dvo_init’:
drivers/gpu/drm/i915/intel_dvo.c:531:8: warning: array subscript is above array bounds [-Warray-bounds]

gcc -v
Using built-in specs.
COLLECT_GCC=gcc
COLLECT_LTO_WRAPPER=/usr/lib/gcc/x86_64-linux-gnu/4.7/lto-wrapper
Target: x86_64-linux-gnu
Configured with: ../src/configure -v --with-pkgversion='Debian 4.7.2-5'
--with-bugurl=file:///usr/share/doc/gcc-4.7/README.Bugs
--enable-languages=c,c++,go,fortran,objc,obj-c++ --prefix=/usr
--program-suffix=-4.7 --enable-shared --enable-linker-build-id
--with-system-zlib --libexecdir=/usr/lib --without-included-gettext
--enable-threads=posix --with-gxx-include-dir=/usr/include/c++/4.7
--libdir=/usr/lib --enable-nls --with-sysroot=/ --enable-clocale=gnu
--enable-libstdcxx-debug --enable-libstdcxx-time=yes
--enable-gnu-unique-object --enable-plugin --enable-objc-gc
--with-arch-32=i586 --with-tune=generic --enable-checking=release
--build=x86_64-linux-gnu --host=x86_64-linux-gnu
--target=x86_64-linux-gnu
Thread model: posix

and

gcc -v
Using built-in specs.
COLLECT_GCC=gcc
COLLECT_LTO_WRAPPER=/usr/lib/gcc/i686-linux-gnu/4.8/lto-wrapper
Target: i686-linux-gnu
Configured with: ../src/configure -v --with-pkgversion='Ubuntu
4.8.2-19ubuntu1' --with-bugurl=file:///usr/share/doc/gcc-4.8/README.Bugs
--enable-languages=c,c++,java,go,d,fortran,objc,obj-c++ --prefix=/usr
--program-suffix=-4.8 --enable-shared --enable-linker-build-id
--libexecdir=/usr/lib --without-included-gettext --enable-threads=posix
--with-gxx-include-dir=/usr/include/c++/4.8 --libdir=/usr/lib
--enable-nls --with-sysroot=/ --enable-clocale=gnu
--enable-libstdcxx-debug --enable-libstdcxx-time=yes
--enable-gnu-unique-object --disable-libmudflap --enable-plugin
--with-system-zlib --disable-browser-plugin --enable-java-awt=gtk
--enable-gtk-cairo
--with-java-home=/usr/lib/jvm/java-1.5.0-gcj-4.8-i386/jre
--enable-java-home
--with-jvm-root-dir=/usr/lib/jvm/java-1.5.0-gcj-4.8-i386
--with-jvm-jar-dir=/usr/lib/jvm-exports/java-1.5.0-gcj-4.8-i386
--with-arch-directory=i386
--with-ecj-jar=/usr/share/java/eclipse-ecj.jar --enable-objc-gc
--enable-targets=all --enable-multiarch --disable-werror
--with-arch-32=i686 --with-multilib-list=m32,m64,mx32
--with-tune=generic --enable-checking=release --build=i686-linux-gnu
--host=i686-linux-gnu --target=i686-linux-gnu
Thread model: posix
gcc version 4.8.2 (Ubuntu 4.8.2-19ubuntu1)

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Dave Gordon <david.s.gordon@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2015-04-29 14:37:48 +03:00
Deepak S a04f90a33f drm/i915/chv: Implement WaDisableShadowRegForCpd
This WA is avoid problem between shadow vs wake FIFO unload
problem during CPD/RC6 transactions on CHV.

v2: Define individual bits GTFIFOCTL (Ville)

v3: move WA to uncore_early_sanitize (ville)

Signed-off-by: Deepak S <deepak.s@linux.intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
[Jani: fixed some whitespace issues while applying]
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2015-04-28 17:31:29 +03:00
Christian König 9fb2bcf928 drm/radeon: fix userptr return value checking (v2)
Otherwise we print false warning from time to time.

v2: agd5f: rebase

Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
CC: stable@vger.kernel.org
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-04-27 11:38:28 -04:00
Christian König c29c0876ec drm/radeon: check new address before removing old one
Otherwise the change isn't atomic.

Signed-off-by: Christian König <christian.koenig@amd.com>
CC: stable@vger.kernel.org
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-04-27 11:29:56 -04:00
Christian König 48afbd70ac drm/radeon: reset BOs address after clearing it.
Otherwise it is possible that we will have page table corruption
if we change a BOs address multiple times.

Signed-off-by: Christian König <christian.koenig@amd.com>
CC: stable@vger.kernel.org
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-04-27 11:29:14 -04:00
Christian König 26d4d129b6 drm/radeon: fix lockup when BOs aren't part of the VM on release
If we unmap BOs before releasing them them the intervall tree locks
up because we try to remove an entry not inside the tree.

Based on a patch from Michel Dänzer.

Signed-off-by: Christian König <christian.koenig@amd.com>
CC: stable@vger.kernel.org
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-04-27 11:27:59 -04:00
Alex Deucher cd17e02ff4 drm/radeon: add SI DPM quirk for Sapphire R9 270 Dual-X 2G GDDR5
Seems to have problems with high mclks.

bug:
https://bugs.freedesktop.org/show_bug.cgi?id=76490

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2015-04-27 09:54:58 -04:00
Alex Deucher 7fe04d6fa8 drm/radeon: adjust pll when audio is not enabled
Fixes display problems with some monitors when audio
is not enabled.

Bugs:
https://bugs.freedesktop.org/show_bug.cgi?id=89505
https://bugzilla.kernel.org/show_bug.cgi?id=94171
Plus several reports on IRC.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2015-04-27 09:54:57 -04:00
Alex Deucher 38aef1549b drm/radeon: only enable audio streams if the monitor supports it
Selectively enable which packets we send based on monitor caps.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2015-04-27 09:54:56 -04:00
Alex Deucher 0f55db36d4 drm/radeon: only mark audio as connected if the monitor supports it (v3)
Otherwise the driver may try and send audio which may confuse the
monitor.

v2: set pin to NULL if no audio
v3: avoid crash with analog encoders

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2015-04-27 09:54:55 -04:00
Alex Deucher 362ff25139 drm/radeon/audio: don't enable packets until the end
Don't enable the audio and avi infoframes and audio stream
until all the state is set up.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2015-04-27 09:54:54 -04:00
Alex Deucher 12428327bb drm/radeon: drop dce6_dp_enable
It's mostly duplicated with evergreen_dp_enable. This
is a prerequisite for fix implemented in another patch.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2015-04-27 09:54:53 -04:00
Alex Deucher 304f07e9c8 drm/radeon: fix ordering of AVI packet setup
Set the line first, then enable the stream.  May fix
pink line problems on some displays.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2015-04-27 09:54:52 -04:00
Michel Dänzer b421ed15d2 drm/radeon: Use drm_calloc_ab for CS relocs
The number of relocs is passed in by userspace and can be large. It has
been observed to cause kcalloc failures in the wild.

Cc: stable@vger.kernel.org
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-04-27 09:54:50 -04:00
Dave Airlie 59fd7e4b0b Merge tag 'drm-intel-next-fixes-2015-04-25' of git://anongit.freedesktop.org/drm-intel into drm-fixes
three fixes for i915.

* tag 'drm-intel-next-fixes-2015-04-25' of git://anongit.freedesktop.org/drm-intel:
  drm/i915: vlv: fix save/restore of GFX_MAX_REQ_COUNT reg
  drm/i915: Workaround to avoid lite restore with HEAD==TAIL
  drm/i915: cope with large i2c transfers
2015-04-27 10:35:15 +10:00
Imre Deak b5f1c97f94 drm/i915: vlv: fix save/restore of GFX_MAX_REQ_COUNT reg
Due this typo we don't save/restore the GFX_MAX_REQ_COUNT register across
suspend/resume, so fix this.

This was introduced in

commit ddeea5b0c3
Author: Imre Deak <imre.deak@intel.com>
Date:   Mon May 5 15:19:56 2014 +0300

    drm/i915: vlv: add runtime PM support

I noticed this only by reading the code. To my knowledge it shouldn't
cause any real problems at the moment, since the power well backing this
register remains on across a runtime s/r. This may change once
system-wide s0ix functionality is enabled in the kernel.

v2:
- resend after a missing git add -u :/

Cc: stable@vger.kernel.org
Signed-off-by: Imre Deak <imre.deak@intel.com>
Tested-By: PRC QA PRTS (Patch Regression Test System Contact: shuang.he@intel.com)
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2015-04-24 00:24:54 +03:00
Michel Thierry 53292cdb06 drm/i915: Workaround to avoid lite restore with HEAD==TAIL
WaIdleLiteRestore is an execlists-only workaround, and requires the driver
to ensure that any context always has HEAD!=TAIL when attempting lite
restore.

Add two extra MI_NOOP instructions at the end of each request, but keep
the requests tail pointing before the MI_NOOPs. We may not need to
executed them, and this is why request->tail is sampled before adding
these extra instructions.

If we submit a context to the ELSP which has previously been submitted,
move the tail pointer past the MI_NOOPs. This ensures HEAD!=TAIL.

v2: Move overallocation to gen8_emit_request, and added note about
sampling request->tail in commit message (Chris).

v3: Remove redundant request->tail assignment in __i915_add_request, in
lrc mode this is already set in execlists_context_queue.
Do not add wa implementation details inside gem (Chris).

v4: Apply the wa whenever the req has been resubmitted and update
comment (Chris).

Cc: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Thomas Daniel <thomas.daniel@intel.com>
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2015-04-23 23:56:52 +03:00
Dmitry Torokhov 9535c4757b drm/i915: cope with large i2c transfers
The hardware, according to the specs, is limited to 256 byte transfers,
and current driver has no protections in case users attempt to do larger
transfers. The code will just stomp over status register and mayhem
ensues.

Let's split larger transfers into digestable chunks. Doing this allows
Atmel MXT driver on Pixel 1 function properly (it hasn't since commit
9d8dc3e529 "Input: atmel_mxt_ts -
implement T44 message handling" which tries to consume multiple
touchscreen/touchpad reports in a single transaction).

Cc: stable@vger.kernel.org
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2015-04-23 23:48:18 +03:00
Daniel Vetter de4de566f8 drm/i915: Update DRIVER_DATE to 20150423
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-04-23 22:02:54 +02:00
Thomas Richter 14f1fa2d0c drm/i915: Enable dithering on NatSemi DVO2501 for Fujitsu S6010
This patch enables the (unfortunately undocumented) scaler of the
NatSemi 2501 DVO found in the Fujitsu-Siemens S6010 laptop and other
machines of the same series and age.

Parts of the DVO scaler logic have been revealed by reverse
engineering and trial and error, so your milage may vary. The
patch (and the whole ns2501 DVO code) is currently only good for
the 1024x768 panel of the S6010, and may hopefully work on other
machines with the same panel size.

The mode-specific configuration of the scaler have been moved out
into a separate class, the mode-agnostic settings remain as raw
register list as their purpose remains unclear at this point.
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

Signed-off-by: Thomas Richter <thor@math.tu-berlin.de>
[danvet: Make the thing apply and conform to kernel patch
expectations.]
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
2015-04-23 21:31:58 +02:00
Daniel Vetter 70b9f6f832 rm/i915: Move i915_get_ggtt_vma_pages into ggtt_bind_vma
We have this neat abstraction between ppgtt and ggtt for (un)bind_vma
and didn't end up using it really. What a shame, so fix this and make
the ->bind_vma hook a bit more useful.

Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
2015-04-23 21:07:53 +02:00
Daniel Vetter 2c642b07eb drm/i915: Don't try to outsmart gcc in i915_gem_gtt.c
Sprinkling static inline all over the place is carg-culting. Remove
it.

Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-04-23 21:07:14 +02:00
Daniel Vetter d369d2d968 drm/i915: Unduplicate i915_ggtt_unbind/bind_vma
ggtt_bind/unbind_vma already has checks for aliasing ppgtt or not,
there's nothing else magic they do. Resurrect i915_ggtt_insert_entries
to make the reuse possibel.

Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-04-23 21:07:06 +02:00
Daniel Vetter 4755265977 drm/i915: Move ppgtt_bind/unbind around
Again avoids some forward declarations.

Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-04-23 21:07:00 +02:00
Daniel Vetter fa42331b4c drm/i915: move i915_gem_restore_gtt_mappings around
Avoids 2 forward declarations.

Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-04-23 21:06:52 +02:00
Daniel Vetter 0875546c53 drm/i915: Fix up the vma aliasing ppgtt binding
Currently we have the problem that the decision whether ptes need to
be (re)written is splattered all over the codebase. Move all that into
i915_vma_bind. This needs a few changes:
- Just reuse the PIN_* flags for i915_vma_bind and do the conversion
  to vma->bound in there to avoid duplicating the conversion code all
  over.
- We need to make binding for EXECBUF (i.e. pick aliasing ppgtt if
  around) explicit, add PIN_USER for that.
- Two callers want to update ptes, give them a PIN_UPDATE for that.

Of course we still want to avoid double-binding, but that should be
taken care of:
- A ppgtt vma will only ever see PIN_USER, so no issue with
  double-binding.
- A ggtt vma with aliasing ppgtt needs both types of binding, and we
  track that properly now.
- A ggtt vma without aliasing ppgtt could be bound twice. In the
  lower-level ->bind_vma functions hence unconditionally set
  GLOBAL_BIND when writing the ggtt ptes.

There's still a bit room for cleanup, but that's for follow-up
patches.

v2: Fixup fumbles.

v3: s/PIN_EXECBUF/PIN_USER/ for clearer meaning, suggested by Chris.

Cc: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
2015-04-23 21:06:39 +02:00
Daniel Vetter cd102a687b drm/i915: Remove misleading comment around bind_to_vm
It's true that we might need to context switch, but both the signalling
and implementation of the same are a few source files away. Remove it.

Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-04-23 21:06:03 +02:00
Daniel Vetter 9258811c96 drm/i915: Don't use atomics for pg_dirty_rings
It's already protected by the bkl^Wdev->struct_mutex. While at it
realign some related code.

Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
2015-04-23 21:06:02 +02:00
Daniel Vetter 71b7e54f71 drm/i915: Don't look at pg_dirty_rings for aliasing ppgtt
We load the ppgtt ptes once per gpu reset/driver load/resume and
that's all that's needed. Note that this only blows up when we're
using the allocate_va_range funcs and not the special-purpose ones
used. With this change we can get rid of that duplication.

Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
2015-04-23 21:06:02 +02:00
Sumit Semwal d8fbe341be dma-buf: cleanup dma_buf_export() to make it easily extensible
At present, dma_buf_export() takes a series of parameters, which
makes it difficult to add any new parameters for exporters, if required.

Make it simpler by moving all these parameters into a struct, and pass
the struct * as parameter to dma_buf_export().

While at it, unite dma_buf_export_named() with dma_buf_export(), and
change all callers accordingly.

Reviewed-by: Maarten Lankhorst <maarten.lankhorst@canonical.com>
Reviewed-by: Daniel Thompson <daniel.thompson@linaro.org>
Acked-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
Acked-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Sumit Semwal <sumit.semwal@linaro.org>
2015-04-21 14:47:16 +05:30
Linus Torvalds bf2ae5d337 fbdev changes for v4.1
* Small fixes and improvements to various fbdev drivers
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Merge tag 'fbdev-4.1' of git://git.kernel.org/pub/scm/linux/kernel/git/tomba/linux

Pull fbdev updates from Tomi Valkeinen:
 "Small fixes and improvements to various fbdev drivers"

* tag 'fbdev-4.1' of git://git.kernel.org/pub/scm/linux/kernel/git/tomba/linux: (24 commits)
  omapdss: extend pm notifier to handle hibernation
  OMAPDSS: Correct video ports description file path in DT binding doc
  OMAPDSS: disable VT switch
  fbdev: sh_mobile_lcdc: Fix destruction of uninitialized mutex
  video: fbdev: sh_mobile_lcdcfb: Fix ROP3 sysfs attribute parsing
  fbdev: pm3fb: cleanup some confusing indenting
  hyperv: hyperv_fb: match wait_for_completion_timeout return type
  video: fbdev: use msecs_to_jiffies for time conversions
  fbdev: via/via_clock: fix sparse warning
  video: fbdev: make of_device_id array const
  fbdev: sm501fb: use memset_io
  OMAPDSS: workaround for MFLAG + NV12 issue
  OMAPDSS: Add support for MFLAG
  OMAPDSS: setup default fifo thresholds
  OMAPDSS: DISPC: lock access to DISPC_CONTROL & DISPC_CONFIG
  OMAPDSS: DISPC: fix div by zero issue in overlay scaling
  OMAPDSS: DISPC: change sync_pclk_edge default value
  OMAPDSS: change signal_level & signal_edge enum values
  OMAPDSS: DISPC: explicit handling for sync and de levels
  OMAPDSS: DISPC: remove OMAPDSS_DRIVE_SIG_OPPOSITE_EDGES
  ...
2015-04-20 15:16:25 -07:00
Tvrtko Ursulin 2ebef630fd drm/i915/skl: Support Y tiling in MMIO flips
Add Y tiling support to skl_do_mmio_flip.

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Damien Lespiau <damien.lespiau@intel.com>
Cc: Sonika Jindal <sonika.jindal@intel.com>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-04-20 10:26:47 -07:00
Josef Holzmayr a3c6d68644 DRM: Don't re-poll connector for disconnect
DRM probe should not repoll a connector if it is already
connected and the DRM_CONNECTOR_POLL_DISCONNECT flag is not set.

Signed-off-by: Josef Holzmayr <holzmayr@rsi-elektrotechnik.de>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-04-20 09:38:58 -07:00
Todd Previte 396aa4451e drm: Fix for DP CTS test 4.2.2.5 - I2C DEFER handling
For test 4.2.2.5 to pass per the Link CTS Core 1.2 rev1.1 spec, the source
device must attempt at least 7 times to read the EDID when it receives an
I2C defer. The normal DRM code makes only 7 retries, regardless of whether
or not the response is a native defer or an I2C defer. Test 4.2.2.5 fails
since there are native defers interspersed with the I2C defers which
results in less than 7 EDID read attempts.

The solution is to add the numer of defers to the retry counter when an I2C
DEFER is returned such that another read attempt will be made. This situation
should normally only occur in compliance testing, however, as a worse case
real-world scenario, it would result in 13 attempts ( 6 native defers, 7 I2C
defers) for a single transaction to complete. The net result is a slightly
slower response to an EDID read that shouldn't significantly impact overall
performance.

V2:
- Added a check on the number of I2C Defers to limit the number
  of times that the retries variable will be decremented. This
  is to address review feedback regarding possible infinite loops
  from misbehaving sink devices.
V3:
- Fixed the limit value to 7 instead of 8 to get the correct retry
  count.
- Combined the increment of the defer count into the if-statement
V4:
- Removed i915 tag from subject as the patch is not i915-specific
V5:
- Updated the for-loop to add the number of i2c defers to the retry
  counter such that the correct number of retry attempts will be
  made

Signed-off-by: Todd Previte <tprevite@gmail.com>
Cc: dri-devel@lists.freedesktop.org
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-04-20 09:29:41 -07:00
Tvrtko Ursulin 7df113e473 drm/i915: Fixup kerneldoc for struct intel_context
commit ae6c480692
   Author: Daniel Vetter <daniel.vetter@ffwll.ch>
   Date:   Wed Aug 6 15:04:53 2014 +0200

       drm/i915: Only track real ppgtt for a context

Changed the code but didn't update kerneldoc.

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: "Thierry, Michel" <michel.thierry@intel.com>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-04-20 09:07:39 -07:00
Daniel Vetter 070c1d059f drm/i915: Drop redundant GGTT rebinding
Since

commit bf3d149b25
Author: Daniel Vetter <daniel.vetter@ffwll.ch>
Date:   Fri Feb 14 14:01:12 2014 +0100

    drm/i915: split PIN_GLOBAL out from PIN_MAPPABLE

i915_gem_obj_ggtt_pin always binds into the ggtt, but I've forgotten
to remove the now redundant additional bind call later on. Fix this
up.

Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
2015-04-20 09:00:11 -07:00
Daniel Vetter 0229da324d drm/i915: Dont clear PIN_GLOBAL in the execbuf pinning fallback
PIN_GLOBAL is set only when userspace asked for it, and that
is only the case for the gen6 PIPE_CONTROL workaround. We're not
allowed to just clear this.

The important part of the fallback is to drop the restriction to
the mappable range.

This issue has been introduced in

commit edf4427b80
Author: Chris Wilson <chris@chris-wilson.co.uk>
Date:   Wed Jan 14 11:20:56 2015 +0000

    drm/i915: Fallback to using CPU relocations for large batch buffers

v2: Chris pointed out that we also miss to set PIN_GLOBAL when the
buffer is already bound. Fix this up too.

Cc: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-04-20 08:59:50 -07:00
Daniel Vetter f329f5f6eb drm/i915: Move PTE_READ_ONLY to ->pte_encode vfunc
It's only used as a flag there, so unconfuse things a bit.
Also separate the bind_vma flag space from the pte_encode flag
space in the code.

Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-04-20 08:59:14 -07:00
Daniel Vetter 5c5f645773 drm/i915: Unify aliasing ppgtt handling
With the dynamic pagetable alloc code aliasing ppgtt special-cases
where again mixed in all over the place with the low-level init code.

Extract the va preallocation and clearing again into the common code
where aliasing ppgtt gets set up.

Note that with this we don't set the size of the aliasing ppgtt to the
size of the parent ggtt address space. Which isn't required at all
since except for the ppgtt setup/cleanup code no one ever looks at
this.

Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
2015-04-20 08:55:19 -07:00
Daniel Vetter 061dd49310 drm/i915: Clean up aliasing ppgtt correctly on error paths
While at it inline the free functions - they don't actually free the
ppgtt, just clean up the allocations done for it.

Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-04-20 08:54:44 -07:00
Daniel Vetter 777dc5bb26 drm/i915: Move vma vfuns to adddress_space
They change with the address space and not with each vma, so move them
into the right pile of vfuncs. Save 2 pointers per vma and clarifies
the code.

Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
2015-04-20 08:54:29 -07:00
Daniel Vetter c7e16f22e8 drm/i915: Move gen8 clear_range vfunc setup into common code
Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
2015-04-20 08:53:20 -07:00
Tvrtko Ursulin 8a0c39b162 drm/i915: Simplify and fix object to display tracking
Purpose of this tracking is to know when to flush the cache between
the CPU and the non-coherent display engine. Prior to:

   commit 121920faf2
   Author: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
   Date:   Mon Mar 23 11:10:37 2015 +0000

       drm/i915/skl: Query display address through a wrapper

This worked by a mix of direct flag manipulation and checking for
existence of a pinned GGTT VMA.

With the introduction of rotated display mappings this approach is
no longer correct.

New simpler approach is to just keep this count over calls which pin
and unpin objects to and from display, at the slight cost of extra
space in every bo.

(Inspired and extracted code from a larger rework by Chris Wilson.)

v2: Remove the limit since it is not well defined. (Chris Wilson, Ville Syrjälä)
v3: Commit message corrections. (Chris Wilson)

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-04-20 08:51:45 -07:00
Dave Airlie 2c33ce009c Merge Linus master into drm-next
The merge is clean, but the arm build fails afterwards,
due to API changes in the regulator tree.

I've included the patch into the merge to fix the build.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-04-20 13:05:20 +10:00
Heiko Stuebner 3ea68922fc drm/rockchip: fix error check when getting irq
platform_get_irq() can return negative error values and we already test for
these. Therefore the variable holding this value should be signed to not
loose possible error values.

Reported-by: David Binderman <dcb314@hotmail.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-By: Daniel Kurtz <djkurtz@chromium.org>
2015-04-20 09:02:31 +08:00
Linus Torvalds 7505256626 Devicetree changes for v4.1
devicetree changes queued up for v4.1. Here are the highlights:
 - Lots of unittest cleanup from Frank Rowand
 - Bugfixes and updates to the of_graph code
 - Tighten up of_get_mac_address() code
 - Documentation updates
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Merge tag 'devicetree-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/glikely/linux

Pull devicetree changes from Grant Likely:
 "Here are the devicetree changes queued up for v4.1.  Nothing really
  exciting here.  Rob has another few commits for big-endian attached
  UARTs, but those will be sent in a separate merge request since they
  haven't been as thoroughly tested as this batch.

  Here are the highlights:

   - lots of unittest cleanup from Frank Rowand

   - bugfixes and updates to the of_graph code

   - tighten up of_get_mac_address() code

   - documentation updates"

* tag 'devicetree-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/glikely/linux:
  of/unittest: Fix of_platform_depopulate test case
  of/unittest: early return from test skips tests
  of/unittest: breadcrumbs to reduce pain of future maintainers
  of/unittest: reduce checkpatch noise - line after declarations
  of/unittest: typo in error string
  of/unittest: add const where needed
  of_net: factor out repetitive code from of_get_mac_address()
  drivers/of: Add empty ranges quirk for PA-Semi
  of: Allow selection of OF_DYNAMIC and OF_OVERLAY if OF_UNITTEST
  of: Empty node & property flag accessors when !OF
  of: Explicitly include linux/types.h in of_graph.h
  dt-bindings: brcm: rationalize Broadcom documentation naming
  of/unittest: replace 'selftest' with 'unittest'
  Documentation: rename of_selftest.txt to of_unittest.txt
  Documentation: update the of_selftest.txt
  dt: OF_UNITTEST make dependency broken
  MAINTAINERS: Pantelis Antoniou device tree overlay maintainer
  of: Add of_graph_get_port_by_id function
  of: Add for_each_endpoint_of_node helper macro
  of: Decrement refcount of previous endpoint in of_graph_get_next_endpoint
2015-04-18 08:30:10 -04:00
Javi Merino f766093ecb kernel.h: implement DIV_ROUND_CLOSEST_ULL
We have grown a number of different implementations of
DIV_ROUND_CLOSEST_ULL throughout the kernel.  Move the i915 one to
kernel.h so that it can be reused.

Signed-off-by: Javi Merino <javi.merino@arm.com>
Reviewed-by: Jeff Epler <jepler@unpythonic.net>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: David Airlie <airlied@linux.ie>
Cc: Guenter Roeck <linux@roeck-us.net>
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: "Rafael J. Wysocki" <rafael.j.wysocki@intel.com>
Cc: Alex Elder <elder@linaro.org>
Cc: Antti Palosaari <crope@iki.fi>
Cc: Javi Merino <javi.merino@arm.com>
Cc: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
Cc: Mel Gorman <mgorman@suse.de>
Cc: Mike Turquette <mturquette@linaro.org>
Cc: Stephen Boyd <sboyd@codeaurora.org>
Cc: Stephen Hemminger <shemminger@linux-foundation.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2015-04-17 09:03:55 -04:00
Wei Yongjun 097f8261dd drm/i915/audio: remove duplicated include from intel_audio.c
Remove duplicated include.

Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-04-16 17:53:15 +02:00
Deepak S f4f71c7dfc drm/i915: Re-adjusting rc6 promotional timer for chv
After feedback from the hardware team we are changing the RC6
promotional timer to increase the power saving without
changing performance.

Signed-off-by: Deepak S <deepak.s@linux.intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-04-16 16:05:24 +02:00
Todd Previte 747552b947 drm: Fix the 'native defer' message in drm_dp_i2c_do_msg()
The debug message is missing a newline at the end and it makes the
logs hard to read when a device defers a lot. Simple 2-character fix
adds the newline at the end.

Signed-off-by: Todd Previte <tprevite@gmail.com>
Cc: dri-devel@lists.freedesktop.org
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-04-16 14:42:04 +02:00
Todd Previte 74ebf294a1 drm/i915: Add a delay in Displayport AUX transactions for compliance testing
The Displayport Link Layer Compliance Testing Specification 1.2 rev 1.1
specifies that repeated AUX transactions after a failure (no response /
invalid response) must have a minimum delay of 400us before the resend can
occur. Tests 4.2.1.1 and 4.2.1.2 are two tests that require this specifically.

Also, the check for DP_AUX_CH_CTL_TIME_OUT_ERROR has been moved out into a
separate case. This case just continues with the next iteration of the loop
as the HW has already waited the required amount of time.

V2:
- Changed udelay() to usleep_range()
V3:
- Removed extraneous check for timeout
- Updated comment to reflect this change
V4:
- Reformatted a comment
V5:
- Added separate check for HW timeout on AUX transactions. A message
  is logged upon detection of this case.
V6:
- Add continue statement to HW timeout detect case
- Remove the log message indicating a timeout has been
  detected (review feedback)
V7:
- Updated the commit message to remove verbage about the HW timeout
  case that is no longer valid.

Signed-off-by: Todd Previte <tprevite@gmail.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-04-16 13:31:46 +02:00
Todd Previte c5d5ab7a05 drm/i915: Add automated testing support for Displayport compliance testing
Add the skeleton framework for supporting automation for Displayport compliance
testing. This patch adds the necessary framework for the source device to
appropriately respond to test automation requests from a sink device.

V2:
- Addressed previous mailing list feedback
- Fixed compilation issue (struct members declared in a later patch)
- Updated debug messages to be more accurate
- Added status checks for the DPCD read/write calls
- Removed excess comments and debug messages
- Fixed debug message compilation warnings
- Fixed compilation issue with missing variables
- Updated link training autotest to ACK

V3:
- Fixed the checks on the DPCD return code to be <= 0
  rather than != 0
- Removed extraneous assignment of a NAK return code in the
  DPCD read failure case
- Changed the return in the DPCD read failure case to a goto
  to the exit point where the status code is written to the sink
- Removed FAUX test case since it's deprecated now
- Removed the compliance flag assignment in handle_test_request

V4:
- Moved declaration of type_type here
- Removed declaration of test_data (moved to a later patch)
- Added reset to 0 for compliance test variables

V5:
- Moved test_active variable declaration and initialization out of
  this patch and into the patch where it's used
- Changed variable name compliance_testing_active to
  compliance_test_active to unify the naming convention
- Added initialization for compliance_test_type variable

Signed-off-by: Todd Previte <tprevite@gmail.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-04-16 13:26:43 +02:00
kbuild test robot b3f9d7d7bc drm/i915: fix semicolon.cocci warnings
drivers/gpu/drm/i915/i915_debugfs.c:4850:2-3: Unneeded semicolon

 Removes unneeded semicolon.

Generated by: scripts/coccinelle/misc/semicolon.cocci

CC: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Fengguang Wu <fengguang.wu@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-04-16 12:59:57 +02:00
Daniel Vetter 5829975ce0 drm/i915/dp: Remove intel_ prefix from hw signal_levels functions
intel_ is for generic code bxt_ and friends for platform specific
functions. Remove the intel_ prefix to be consistent with our naming.

Random OCD bikeshed I've spotted while merging bxt patches.

v2: Oops, git add fail.

Cc: Imre Deak <imre.deak@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
2015-04-16 11:47:50 +02:00
Vandana Kannan 9314726b9f drm/i915/bxt: Update max level of vswing
Broxton supports 3 voltage swing levels on all DP ports.
Max level of pre-emphasis will be taken care with the existing code.

v2: Patch rebased

v3: (imre)
- keep existing behavior for other platforms
- clarify commit message

Signed-off-by: Vandana Kannan <vandana.kannan@intel.com> (v2)
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Sivakumar Thulasimani <sivakumar.thulasimani@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-04-16 11:42:40 +02:00
Vandana Kannan 96fb9f9b15 drm/i915/bxt: VSwing programming sequence
VSwing programming sequence as specified in the updated BXT BSpec

v2: Satheesh's review comments addressed.
- clear value before setting into registers
- move print statement to bxt function
Other changes
- since signal level will not be set into DDI_BUF_CTL, the value need
  not be returned to intel_dp_set_signal_levels(). Making the bxt
  specific function to return void and setting signal_levels = 0 for
  bxt inside intel_dp_set_signal_levels()
- instead of signal levels, printing vswing level and pre-emphasis
  level
- in case none of the pre-emphasis levels or vswing levels are set,
  setting default of 400mV + 0dB

v3: Satheesh's review comments
- Check for mask before printing signal_levels.
- Removing redundant register writes
- Call intel_prepare_ddi_buffers only for HAS_PCH_SPLIT
- Making register write part generic as it will be required for HDMI as
  well.

Re-structure the code to include an array for vswing related values, set
signal levels

v4: Satheesh's review comments
- Rebase over latest renaming patches
- use hsw_signal_levels for HAS_DDI
Other changes
- Modified vswing_sequence() func definition
- Rebased on top of register macro definitions

v5: Satheesh's review comments
- Check ddi translation table size

v6: Imre's review comments
- removed comments in vswing sequence
- added vswing, pre-emphasis prints in intel_dp_set_signal_levels
- added comment explaining use of DP vswing values for eDP
- initialize n_entries and ddi_transaltion table based on encoder type
- create bxt_ddi_buf_trans structure and use decimal values
- adding a flag in bxt buffer translation table to indicate def entry

v7: (imre)
- squash in Vandana's "VSwing register definition",
  "HDMI VSwing programming", "Re-enable vswing programming",
  "Fix vswing sequence" patches
- use BXT_PORT_* regs directly instead of via a temp var
- simplify BXT_PORT_* macro definitions
- add code comment why we read lane while write group registers
- fix readout of DP_TRAIN_PRE_EMPHASIS in debug message

Signed-off-by: Vandana Kannan <vandana.kannan@intel.com> (v6)
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Sivakumar Thulasimani <sivakumar.thulasimani@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-04-16 11:42:39 +02:00
Damien Lespiau ce3b7e9bcf drm/i915: Don't write the HDMI buffer translation entry when not needed
We don't actually need to write the HDMI entry on DDIs that have no
chance to be used as HDMI ports.

While this patch shouldn't change the current behaviour, it makes
further enabling work easier as we'll have an eDP table filling the full
10 entries.

v2: Rely on the logic from intel_ddi_init() to figure out if the DDI port
    supports HDMI or not (Paulo).

Suggested-by: Satheeshakrishna M <satheeshakrishna.m@intel.com>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Reviewed-by: Sivakumar Thulasimani <sivakumar.thulasimani@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-04-16 11:42:39 +02:00
Damien Lespiau b403745c84 drm/i915: Iterate through the initialized DDIs to prepare their buffers
Not every DDIs is necessarily connected can be strapped off and, in the
future, we'll have platforms with a different number of default DDI
ports. So, let's only call intel_prepare_ddi_buffers() on DDI ports that
are actually detected.

We also use the opportunity to give a struct intel_digital_port to
intel_prepare_ddi_buffers() as we'll need it in a following patch to
query if the port supports HMDI or not.

On my HSW machine this removes the initialization of a couple of
(unused) DDIs.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Reviewed-by: Sivakumar Thulasimani <sivakumar.thulasimani@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-04-16 11:42:38 +02:00
Imre Deak 503604038b drm/i915: suppress false PLL state warnings on non-GMCH platforms
The checks for PLL enabled state on CPU ports are valid only on GMCH
platforms but atm we'd also call them on non-PCH-split/non-GMCH
platforms like BXT, triggering false warnings. Until the proper check is
implented for these platforms simply disable the check.

Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-04-16 11:42:38 +02:00
Satheeshakrishna M 977bb38d2d drm/i915/bxt: Determine programmed frequency
Add placeholder function for calculating programmed pixel clock.
Note: Formula to back calculate link clock from dividers not
available currently.

v2:
- rebased on upstream s/crtc_config/crtc_state/ change (imre)

Signed-off-by: Satheeshakrishna M <satheeshakrishna.m@intel.com> (v1)
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-04-16 11:42:37 +02:00
Satheeshakrishna M 3760b59cba drm/i915/bxt: Determine PLL attached to pipe
Determine PLL attached to pipe (which is same as DDI PLL)

v2:
- rebased on upstream s/crtc_config/crtc_state/ (imre)

Signed-off-by: Satheeshakrishna M <satheeshakrishna.m@intel.com> (v1)
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-04-16 11:42:37 +02:00
Satheeshakrishna M bcddf61077 drm/i915/bxt: Assign PLL for pipe
Assign PLL for pipe (dependent on port attached to the pipe)

v2:
- fix incorrect encoder vs. new_encoder check for crtc (imre)

v3:
- warn and return error if no encoder is attached (imre)

Signed-off-by: Satheeshakrishna M <satheeshakrishna.m@intel.com> (v2)
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
[danvet: Don't move intel_ddi_get_crtc_new_encoder around.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-04-16 11:42:36 +02:00
Satheeshakrishna M d683f3bc48 drm/i915/bxt: BXT clock divider calculation
Calculate and cache clock parameters. Follow bspec algorithm for HDMI.
Use precalculated values for DisplayPort linkrates.

v2: (imre)
- rebase against upstream crtc_state change
- use the existing CHV based helper instead of handrolling the same

Signed-off-by: Satheeshakrishna M <satheeshakrishna.m@intel.com> (v1)
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-04-16 11:29:07 +02:00
Imre Deak 5ab7b0b71e drm/i915/bxt: add bxt_find_best_dpll
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-04-16 11:29:07 +02:00
Satheeshakrishna M dfb8240847 drm/i915/bxt: Define bxt DDI PLLs and implement enable/disable sequence
Plug bxt PLL code into existing shared DPLL framework.

v2: (imre)
- squash in Satheeshakrishna's "Define BXT clock registers" and
  "Add state variables for bxt clock registers" patches
- squash in Vandanas's "Change grp access to lane access for PLL"
- fix group vs. lane access in bxt_ddi_pll_get_hw_state
- add code comment why we read from lane registers while writing to
  group registers
- clean up register macros
- use BXT_PORT_PLL_* macros instead of open-coding the same
- check if BXT_PORT_PCS_DW12_LN01 matches BXT_PORT_PCS_DW12_LN23
  during hardware state readout
- add missing LANESTAGGER_STRAP_OVRD masking
- add note about missing step according to the latest BUN for
  PORT_PLL_9/lockthresh

Signed-off-by: Satheeshakrishna M <satheeshakrishna.m@intel.com> (v1)
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-04-16 11:29:06 +02:00
Jesse Barnes ff6d9f55fe drm/i915/bxt: fix panel fitter setup in crtc disable/enable
Broxton has the same panel fitter registers as Skylake.

v2:
- add MISSING_CASE for future platforms (daniel)

Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Sagar Kamble <sagar.a.kamble@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-04-16 11:29:06 +02:00
Satheeshakrishna M 1ab23380f8 drm/i915/bxt: Restrict PORT_CLK_SEL programming below gen9
PORT_CLK_SEL programming is needed only on HSW/BDW.

v2:
- don't program PORT_CLK_SEL from mst encoders either (imre)
v3:
- fix the check for GEN9+ in intel_mst_pre_enable_dp() (damien)

Signed-off-by: Satheeshakrishna M <satheeshakrishna.m@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Sagar Kamble <sagar.a.kamble@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-04-16 11:29:05 +02:00
Jesse Barnes 535afa2e9e drm/i915/vlv: check port in infoframe_enabled v2
Same as IBX and G4x, they all share the same genetic material.

v2: we all need a bit more port in our lives

Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-04-16 11:20:30 +02:00
Chris Wilson baaa5cfb42 drm/i915: Update meaning of debugfs object's pin_flag
Since the pin_ioctl is defunct, we only care about whether an object is
pinned into the display for debug purposes.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-04-16 11:20:30 +02:00
Chris Wilson 1f30a61482 drm/i915: Simplify i915_gem_obj_is_pinned() test for set-tiling
Since the removal of the user pin_ioctl, the only means for pinning an
object is either through binding to the scanout or during execbuf
reservation. As the later prevents a call to set-tiling, we need only
check if the obj is pinned into the display plane to see if we need
reject the set-tiling ioctl.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-04-16 11:20:29 +02:00
Sonika Jindal b7192a567c drm/i915/skl: Add back HDMI translation table
The HDMI translation table is added back to bspec, so adding it,
and defaulting the 800mV+0dB entry.

The HDMI translation table was removed by following commit as per HW team's
recommendation:
commit 7ff446708b ("drm/i915/skl: Only use the 800mV+2bB HDMI translation entry")

v2: Adding reference to commit which removed this table (Jani)

Cc: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Sonika Jindal <sonika.jindal@intel.com>
Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-04-16 11:20:29 +02:00
Daniel Vetter 8805aa713e drm/i915: Drop unecessary fb arguments from function signatures
This is a separate patch to simplify conflict handling with other
ongoing atomic work.

Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
Reviewed-by: Ander Conselvan de Oliveira <conselvan2@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-04-16 11:20:28 +02:00
Daniel Vetter d328c9d78d drm/i915: Select starting pipe bpp irrespective or the primary plane
Since universal planes the primary plane might not be around, and it's
kinda silly to restrict the pipe bpp to the primary plane if we might
end up displaying a 10bpc video overlay. And with atomic we might very
well enable a pipe without a primary plane. So just use the platform
max as a starting point and then restrict appropriately.

Of course this is all still a bit moot as long as we artificially
compress everything to max 8bpc because we don't use the hi-bpc gamma
tables.

Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
Reviewed-by: Ander Conselvan de Oliveira <conselvan2@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-04-16 11:20:28 +02:00
Tvrtko Ursulin 5678ad7367 drm/i915: Fix view type in warning message
One month passed between posting a patch and it getting merged, and
unfortunately even though it still applies, it needs fixing to account
for changes in function parameters since:

   commit d385612e15b8b6eb3db328d83f1872ef8a381788
   Author: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
   Date:   Tue Mar 17 14:45:29 2015 +0000

       drm/i915: Log view type when printing warnings

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
[danvet: Squash in fixup from Tvrtko to fix the rebase conflict.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-04-16 11:20:07 +02:00
Daniel Vetter 475d231be9 drm/atomic-helper: Don't call atomic_update_plane when it stays off
It's a silly thing to do and surprises driver writers. Most likely
this did already blow up for exynos.

It's also a silly thing to change plane state when it's off, but fbdev
is silly (it does an unconditional modeset over all planes). And
userspace can be evil. So I think we need this.

With this check in the helpers we can remove the one in i915 code for
the same conditions (becuase ->crtc iff ->fb).

Cc: Gustavo Padovan <gustavo@padovan.org>
Cc: dri-devel@lists.freedesktop.org
Cc: Inki Dae <inki.dae@samsung.com>
Cc: Matt Roper <matthew.d.roper@intel.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Tested-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
2015-04-16 09:50:27 +02:00
Suketu Shah 31335cec02 drm/i915/bxt: Add DC9 Trigger sequence
Add triggers for DC9 as per details provided in bxt_enable_dc9
and bxt_disable_dc9 implementations.

v1:
- Add SKL check in gen9_disable_dc5 as it is possible for DC5
  to remain disabled only for SKL.
- Add additional checks for whether DC5 is already disabled during
  DC5-disabling only for BXT.

v2:
- rebase to latest.
- Load CSR during DC9 disabling in the beginning before DC9 is
  disabled.
- Make gen9_disable_dc5 function non-static as it's being called by
  functions in i915_drv.c.
- Enable DC9-related functionality using a macro.

v3: (imre)
- remove BXT_ENABLE_DC9, we want DC9 always, and it's only valid on BXT
- remove DC5 disabling and CSR FW loaded check, these are nop atm
- squash in Vandana's "Do ddi_phy_init always" patch

v4:
- add TODO to re-enable DC5 during resume if CSR FW is available (sagar)

Signed-off-by: Suketu Shah <suketu.j.shah@intel.com>
Signed-off-by: A.Sunil Kamath <sunil.kamath@intel.com> (v2)
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Sagar Kamble <sagar.a.kamble@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-04-16 09:27:17 +02:00
A.Sunil Kamath 664326f8a5 drm/i915/bxt: Implement enable/disable for Display C9 state
v2: Modified as per review comments from Imre
- Mention enabling instead of allowing in the debug trace and
  remove unnecessary comments.

v3:
- Rebase to latest.
- Move DC9-related functions from intel_display.c to intel_runtime_pm.c.

v4: (imre)
- remove DC5 disabling, it's a nop at this point
- squashed in Suketu's "Assert the requirements to enter or exit DC9"
  patch
- remove check for RUNTIME_PM from assert_can_enable_dc9, it's not a
  dependency

Signed-off-by: A.Sunil Kamath <sunil.kamath@intel.com> (v3)
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Sagar Kamble <sagar.a.kamble@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-04-16 09:20:16 +02:00
Imre Deak eee215660c drm/i915/bxt: add description about the BXT PHYs
Extend the VLV/CHV DPIO (PHY) documentation with the BXT specifics.

v2:
- add more detail about the mapping between ports and transcoders (ville)

Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-04-16 09:20:15 +02:00
Vandana Kannan 5c6706e564 drm/i915/bxt: add display initialize/uninitialize sequence (PHY)
Add PHY specific display initialization sequence as per BSpec.

Note that the PHY initialization/uninitialization are done
at their current place only for simplicity, in a future patch - when more
of the runtime PM features will be enabled - these will be moved to
power well#1 and modeset encoder enabling/disabling hooks respectively.

The call to uninitialize the PHY during system/runtime suspend will be
added later in this patchset.

v1: Added function definitions in header files
v2: Imre's review comments addressed
- Moved CDCLK related definitions to i915_reg.h
- Removed defintions for CDCLK frequency
- Split uninit_cdclk() by adding a phy_uninit function
- Calculate freq and decimal based on input frequency
- Program SSA precharge based on input frequency
- Use wait_for 1ms instead 200us udelay for DE PLL locking
- Removed initial value for divider, freq, decimal, ratio.
- Replaced polling loops with wait_for
- Parameterized latency optim setting
- Fix the parts where DE PLL has to be disabled.
- Call CDCLK selection from mode set

v3: (imre)
- add note about the plan to move the cdclk/phy init to a better place
- take rps.hw_lock around pcode access
- fix DDI PHY timeout value
- squash in Vandana's "PORT_CL2CM_DW6_A BUN fix",
  "DDI PHY programming register defn", "Do ddi_phy_init always",
- move PHY register macros next to the corresponding CHV/VLV macros
- move DE PLL register macros here from another patch since they are
  used here first
- add BXT_ prefix to CDCLK flags
- s/COMMON_RESET/COMMON_RESET_DIS/ and clarify related code comments
- fix incorrect read value for the RMW of BXT_PHY_CTL_FAMILY_DDI
- fix using GT_DISPLAY_EDP_POWER_ON vs. GT_DISPLAY_DDI_POWER_ON
  when powering on DDI ports
- fix incorrect port when setting BXT_PORT_TX_DW14_LN for DDI ports
- add missing masking when programming CDCLK_FREQ_DECIMAL
- add missing powering on for DDI-C port, rename OCL2_LDOFUSE_PWR_EN
  to OCL2_LDOFUSE_PWR_DIS to reduce confusion
- add note about mismatch with bspec in the PORT_REF_DW6 fields
- factor out PHY init code to a new function, so we can call it for
  PHY1 and PHY0, instead of open-coding the same

v4: (ville)
- split the CDCLK/PHY parts into two patches, update commit message
  accordingly
- use the existing dpio_phy enum instead of adding a new one for the
  same purpose
- flip the meaning of PHYs so that PHY_A is PHY1 and PHY_BC is PHY0 to
  better match CHV
- s/BXT_PHY/_BXT_PHY/
- use _PIPE for _BXT_PHY instead of open-coding it
- drop _0_2_0_GTTMMADR suffix from BXT_P_CR_GT_DISP_PWRON
- define GT_DISPLAY_POWER_ON in a more standard way
- make a note that the CHV ConfigDB also disagrees about GRC_CODE field
  definitions
- fix lane optimization refactoring fumble from v3
- add per PHY uninit functions to match the init counterparts

Signed-off-by: Vandana Kannan <vandana.kannan@intel.com> (v2)
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-04-16 09:20:15 +02:00
Vandana Kannan f8437dd1b5 drm/i915/bxt: add display initialize/uninitialize sequence (CDCLK)
Add CDCLK specific display clock initialization sequence as per BSpec.

Note that the CDCLK initialization/uninitialization are done at their
current place only for simplicity, in a future patch - when more of the
runtime PM features will be enabled - these will be moved to power
well#1 and modeset encoder enabling/disabling hooks respectively. This
also means that atm dynamic power gating power well #1 is effectively
disabled.

The call to uninitialize CDCLK during system/runtime suspend will be
added later in this patchset.

v1: Added function definitions in header files
v2: Imre's review comments addressed
- Moved CDCLK related definitions to i915_reg.h
- Removed defintions for CDCLK frequency
- Split uninit_cdclk() by adding a phy_uninit function
- Calculate freq and decimal based on input frequency
- Program SSA precharge based on input frequency
- Use wait_for 1ms instead 200us udelay for DE PLL locking
- Removed initial value for divider, freq, decimal, ratio.
- Replaced polling loops with wait_for
- Parameterized latency optim setting
- Fix the parts where DE PLL has to be disabled.
- Call CDCLK selection from mode set

v3: (imre)
- add note about the plan to move the cdclk/phy init to a better place
- take rps.hw_lock around pcode access
- move DE PLL register macros here from another patch since they are
  used here first
- add BXT_ prefix to CDCLK flags
- add missing masking when programming CDCLK_FREQ_DECIMAL

v4: (ville)
- split the CDCLK/PHY parts into two patches, update commit message
  accordingly
- s/DISPLAY_PCU_CONTROL/HSW_PCODE_DE_WRITE_FREQ_REQ/
- simplify BXT_DE_PLL_RATIO macros
- fix BXT_DE_PLL_RATIO_MASK
- s/bxt_select_cdclk_freq/broxton_set_cdclk_freq/
- move cdclk init/uninit/set code from intel_ddi.c to intel_display.c
- remove redundant code comments for broxton_set_cdclk_freq()
- sanitize fixed point<->integer frequency value conversion
- use DRM_ERROR instead of WARN
- do RMW when programming BXT_DE_PLL_CTL for safety
- add note about PLL lock timeout being exactly 200us
- make PCU error messages more descriptive
- instead of using 0 freq to mean PLL off/bypass freq use 19200
  for clarity, as the latter one is the actual rate
- simplify pcode programming, removing duplicated
  sandybridge_pcode_write() call
- sanitize code flow, remove unnecessary scratch vars in
  broxton_set_cdclk() (imre)
- Remove bound check for maxmimum freq to match current code.
  This check will be added later at a more proper platform
  independent place once atomic support lands.
- add note to remove freq guard band which isn't needed on BXT
- add note to reduce freq to minimum if no pipe is enabled
- combine broxton_modeset_global_pipes() with
  valleyview_modeset_global_pipes()

Signed-off-by: Vandana Kannan <vandana.kannan@intel.com> (v2)
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-04-16 09:20:14 +02:00
Vandana Kannan 164dfd2877 drm/i915: Rename vlv_cdclk_freq to cdclk_freq
Rename vlv_cdclk_freq to cdclk_freq so that it can be used for all
platforms as required. Needed by the next patch.

Signed-off-by: Vandana Kannan <vandana.kannan@intel.com>
Signed-off-by: A.Sunil Kamath <sunil.kamath@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-04-16 09:20:13 +02:00
Dave Airlie aa219a0dd7 Merge tag 'drm-intel-next-fixes-2015-04-15' of git://anongit.freedesktop.org/drm-intel into drm-next
Misc i915 fixes.

* tag 'drm-intel-next-fixes-2015-04-15' of git://anongit.freedesktop.org/drm-intel:
  drm/i915: Dont enable CS_PARSER_ERROR interrupts at all
  drm/i915: Move drm_framebuffer_unreference out of struct_mutex for takeover
  drm/i915: Allocate connector state together with the connectors
  drm/i915/chv: Remove DPIO force latency causing interpair skew issue
  drm/i915: Don't cancel DRRS worker synchronously for flush/invalidate
  drm/i915: Fix locking in DRRS flush/invalidate hooks
2015-04-16 08:34:51 +10:00
Dave Airlie 4a11248856 Merge tag 'topic/drm-misc-2015-04-15' of git://anongit.freedesktop.org/drm-intel into drm-next
One more drm-misch pull for 4.1 with mostly simple stuff and boring
refactoring. Even the cursor fix from Matt is just to make a really anal
igt happy.

* tag 'topic/drm-misc-2015-04-15' of git://anongit.freedesktop.org/drm-intel:
  drm: fix trivial typo mistake
  drm: Make integer overflow checking cover universal cursor updates (v2)
  drm: make crtc/encoder/connector/plane helper_private a const pointer
  drm/armada: constify struct drm_encoder_helper_funcs pointer
  drm/radeon: constify more struct drm_*_helper funcs pointers
  drm/edid: add #defines for ELD versions
  drm/atomic: Add for_each_{connector,crtc,plane}_in_state helper macros
  drm: Use kref_put_mutex in drm_gem_object_unreference_unlocked
  drm/drm: constify all struct drm_*_helper funcs pointers
  drm/qxl: constify all struct drm_*_helper funcs pointers
  drm/nouveau: constify all struct drm_*_helper funcs pointers
  drm/radeon: constify all struct drm_*_helper funcs pointers
  drm/gma500: constify all struct drm_*_helper funcs pointers
  drm/mgag200: constify all struct drm_*_helper funcs pointers
  drm/exynos: constify all struct drm_*_helper funcs pointers
  drm: Fix some typos
2015-04-16 08:34:24 +10:00
Dave Airlie 52139bdea1 Merge branch 'drm-dwhdmi-devel' of git://ftp.arm.linux.org.uk/~rmk/linux-arm into drm-next
This set of patches adjust the setup of the HDMI CTS/N values for audio
support to be compliant with the work-around given in the iMX6 errata
documentation as part of the preparation for integrating audio support
for this driver, and also update the HDMI phy configuration for Rockchip
devices to improve the HDMI eye pattern.

* 'drm-dwhdmi-devel' of git://ftp.arm.linux.org.uk/~rmk/linux-arm:
  drm: rockchip/dw_hdmi-rockchip: improve for HDMI electrical test
  drm: bridge/dw_hdmi: separate VLEVCTRL settting into platform driver
  drm: bridge/dw_hdmi: fixed codec style
  drm: bridge/dw_hdmi: adjust n/cts setting order
  drm: bridge/dw_hdmi: protect n/cts setting with a mutex
  drm: bridge/dw_hdmi: combine hdmi_set_clock_regenerator_n() and hdmi_regenerate_cts()

Conflicts:
	drivers/gpu/drm/imx/dw_hdmi-imx.c
2015-04-16 08:33:30 +10:00
Dave Airlie fc16fc4d69 Merge branch 'drm-next-4.1' of git://people.freedesktop.org/~agd5f/linux into drm-next
Some final bits for 4.1.  Some fixes for userptrs and allow a new
packet for VCE to enable some new features in mesa.

* 'drm-next-4.1' of git://people.freedesktop.org/~agd5f/linux:
  drm/radeon: allow creating overlapping userptrs
  drm/radeon: add userptr config option
  drm/radeon: add video usability info support for VCE
2015-04-16 08:00:06 +10:00
Linus Torvalds eeee78cf77 Some clean ups and small fixes, but the biggest change is the addition
of the TRACE_DEFINE_ENUM() macro that can be used by tracepoints.
 
 Tracepoints have helper functions for the TP_printk() called
 __print_symbolic() and __print_flags() that lets a numeric number be
 displayed as a a human comprehensible text. What is placed in the
 TP_printk() is also shown in the tracepoint format file such that
 user space tools like perf and trace-cmd can parse the binary data
 and express the values too. Unfortunately, the way the TRACE_EVENT()
 macro works, anything placed in the TP_printk() will be shown pretty
 much exactly as is. The problem arises when enums are used. That's
 because unlike macros, enums will not be changed into their values
 by the C pre-processor. Thus, the enum string is exported to the
 format file, and this makes it useless for user space tools.
 
 The TRACE_DEFINE_ENUM() solves this by converting the enum strings
 in the TP_printk() format into their number, and that is what is
 shown to user space. For example, the tracepoint tlb_flush currently
 has this in its format file:
 
      __print_symbolic(REC->reason,
         { TLB_FLUSH_ON_TASK_SWITCH, "flush on task switch" },
         { TLB_REMOTE_SHOOTDOWN, "remote shootdown" },
         { TLB_LOCAL_SHOOTDOWN, "local shootdown" },
         { TLB_LOCAL_MM_SHOOTDOWN, "local mm shootdown" })
 
 After adding:
 
      TRACE_DEFINE_ENUM(TLB_FLUSH_ON_TASK_SWITCH);
      TRACE_DEFINE_ENUM(TLB_REMOTE_SHOOTDOWN);
      TRACE_DEFINE_ENUM(TLB_LOCAL_SHOOTDOWN);
      TRACE_DEFINE_ENUM(TLB_LOCAL_MM_SHOOTDOWN);
 
 Its format file will contain this:
 
      __print_symbolic(REC->reason,
         { 0, "flush on task switch" },
         { 1, "remote shootdown" },
         { 2, "local shootdown" },
         { 3, "local mm shootdown" })
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 Version: GnuPG v1
 
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Merge tag 'trace-v4.1' of git://git.kernel.org/pub/scm/linux/kernel/git/rostedt/linux-trace

Pull tracing updates from Steven Rostedt:
 "Some clean ups and small fixes, but the biggest change is the addition
  of the TRACE_DEFINE_ENUM() macro that can be used by tracepoints.

  Tracepoints have helper functions for the TP_printk() called
  __print_symbolic() and __print_flags() that lets a numeric number be
  displayed as a a human comprehensible text.  What is placed in the
  TP_printk() is also shown in the tracepoint format file such that user
  space tools like perf and trace-cmd can parse the binary data and
  express the values too.  Unfortunately, the way the TRACE_EVENT()
  macro works, anything placed in the TP_printk() will be shown pretty
  much exactly as is.  The problem arises when enums are used.  That's
  because unlike macros, enums will not be changed into their values by
  the C pre-processor.  Thus, the enum string is exported to the format
  file, and this makes it useless for user space tools.

  The TRACE_DEFINE_ENUM() solves this by converting the enum strings in
  the TP_printk() format into their number, and that is what is shown to
  user space.  For example, the tracepoint tlb_flush currently has this
  in its format file:

     __print_symbolic(REC->reason,
        { TLB_FLUSH_ON_TASK_SWITCH, "flush on task switch" },
        { TLB_REMOTE_SHOOTDOWN, "remote shootdown" },
        { TLB_LOCAL_SHOOTDOWN, "local shootdown" },
        { TLB_LOCAL_MM_SHOOTDOWN, "local mm shootdown" })

  After adding:

     TRACE_DEFINE_ENUM(TLB_FLUSH_ON_TASK_SWITCH);
     TRACE_DEFINE_ENUM(TLB_REMOTE_SHOOTDOWN);
     TRACE_DEFINE_ENUM(TLB_LOCAL_SHOOTDOWN);
     TRACE_DEFINE_ENUM(TLB_LOCAL_MM_SHOOTDOWN);

  Its format file will contain this:

     __print_symbolic(REC->reason,
        { 0, "flush on task switch" },
        { 1, "remote shootdown" },
        { 2, "local shootdown" },
        { 3, "local mm shootdown" })"

* tag 'trace-v4.1' of git://git.kernel.org/pub/scm/linux/kernel/git/rostedt/linux-trace: (27 commits)
  tracing: Add enum_map file to show enums that have been mapped
  writeback: Export enums used by tracepoint to user space
  v4l: Export enums used by tracepoints to user space
  SUNRPC: Export enums in tracepoints to user space
  mm: tracing: Export enums in tracepoints to user space
  irq/tracing: Export enums in tracepoints to user space
  f2fs: Export the enums in the tracepoints to userspace
  net/9p/tracing: Export enums in tracepoints to userspace
  x86/tlb/trace: Export enums in used by tlb_flush tracepoint
  tracing/samples: Update the trace-event-sample.h with TRACE_DEFINE_ENUM()
  tracing: Allow for modules to convert their enums to values
  tracing: Add TRACE_DEFINE_ENUM() macro to map enums to their values
  tracing: Update trace-event-sample with TRACE_SYSTEM_VAR documentation
  tracing: Give system name a pointer
  brcmsmac: Move each system tracepoints to their own header
  iwlwifi: Move each system tracepoints to their own header
  mac80211: Move message tracepoints to their own header
  tracing: Add TRACE_SYSTEM_VAR to xhci-hcd
  tracing: Add TRACE_SYSTEM_VAR to kvm-s390
  tracing: Add TRACE_SYSTEM_VAR to intel-sst
  ...
2015-04-14 10:49:03 -07:00
Rodrigo Vivi c7240c3bc5 drm/i915: PSR VLV: Add single frame update.
According to spec: "In PSR HW or SW mode, SW set this bit before writing
registers for a flip. It will be self-clear when it gets to the PSR
active state."

Some versions of spec mention that this is needed when in
"Persistent mode" but define it as same as "SW mode". Since this
fix the page flip case let's assume this is exactly what we need.

Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-04-14 19:15:23 +02:00
Rodrigo Vivi 89251b177b drm/i915: PSR: deprecate link_standby support for core platforms.
On Haswell and Broadwell with link in standby when exit event happens
between vblank and VSC packet, PSR exit on panel but DPA transmitter
still sends black pixel. When this condition hits, panel will intermittently
display black frame.

The known W/A for this case involve the of single_frame update
that isn't supported on Haswell and to be supported on Broadwell
3 other workarounds would be required. So it is better and safe to
just deprecate link_standby for now.

Also, link fully off saves more power than link_standby and afwk
no OEM is requesting link standby on VBT. There is no reason for that.

For Skylake let's just consider it behaves like Broadwell until
we prove otherwise.

v2: Fix commit message (Durga).

v3: Fix conflict with PSR2.

Reference: HSD: bdwgfx/1912559
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Durgadoss R <durgadoss.r@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-04-14 19:15:17 +02:00
Rodrigo Vivi 3301d40921 drm/i915: PSR: Fix DP_PSR_NO_TRAIN_ON_EXIT logic
Since the beginning there is a missunderstanding on the meaning of this
dpcd bit.
This bit shouldn't indicate whether to use link standby or not, but just
be used to configure TP1, TP2 and TP3 times and tell hw aux should be skiped
since HW is the responsible one.

Even with help of frontbuffer tracking, HW is still fully responsible for
PSR exit logic with/without DP training.

DP_PSR_NO_TRAIN_ON_EXIT means the source doesn't need to do the training, but
it doesn't tell to avoid TP patterns, so we will send minimal TP1 and avoid
TP2. It also means that sink itself can take up to 5 idle frames for training.
6 in our case since we might be off by 1. So we also increment idle_frames by 4
here.

v2: Fix and improve commit message (Durga).
v3: Use minimal TP1 time avoiding TP2 and increase idle frame.

Cc: Durgadoss R <durgadoss.r@intel.com>
Cc: Arthur Runyan <arthur.j.runyan@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Durgadoss R <durgadoss.r@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-04-14 19:15:01 +02:00
Rodrigo Vivi cff5190cb9 drm/i915: PSR: Remove wrong LINK_DISABLE.
This wrong logic and useless define came from first versions and
came along with all rework. Just now I notice how ugly, wrong and
useless this is.

val is already defined as 0 anyway and logic is completelly wrong
and useless. So let's starting the link_standby fix with this
cleaning.

Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Durgadoss R <durgadoss.r@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-04-14 19:14:53 +02:00
Daniel Vetter 37ef01ab5d drm/i915: Dont enable CS_PARSER_ERROR interrupts at all
We stopped handling them in

commit aaecdf611a
Author: Daniel Vetter <daniel.vetter@ffwll.ch>
Date:   Tue Nov 4 15:52:22 2014 +0100

    drm/i915: Stop gathering error states for CS error interrupts

but just clearing is apparently not enough: A sufficiently dead gpu
left behind by firmware (*cough* coreboot *cough*) can keep the gpu in
an endless loop of such interrupts, eventually leading to the nmi
firing. And definitely to what looks like a machine hang.

Since we don't even enable these interrupts on gen5+ let's do the same
on earlier platforms.

Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=93171
Tested-by: Mono <mono-for-kernel-org@donderklumpen.de>
Tested-by: info@gluglug.org.uk
Cc: stable@vger.kernel.org
Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2015-04-14 17:03:12 +03:00
Tvrtko Ursulin e0d6149b3d drm/i915: Move drm_framebuffer_unreference out of struct_mutex for takeover
intel_user_framebuffer_destroy() requires the struct_mutex for its
object bookkeeping, so this means that all calls to
drm_framebuffer_unreference must be held without that lock.

This is a simplified version of the identically named patch by Chris Wilson.

    Regression from commit ab8d66752a
    Author: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
    Date:   Mon Feb 2 15:44:15 2015 +0000

        drm/i915: Track old framebuffer instead of object

v2: Bikeshedding.

References: https://bugs.freedesktop.org/show_bug.cgi?id=89166
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2015-04-14 16:09:05 +03:00
Satheeshakrishna M 0b4a2a36d0 drm/i915/bxt: Define BXT power domains
Add BXT power domains

v2: Use DOMAIN_PLLS instead of a new CDCLK one, whitespace fixes
    (Damien)
v3: add VGA, TRANSCODER_A power domains (imre)

Signed-off-by: Satheeshakrishna M <satheeshakrishna.m@intel.com> (v1)
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-04-14 15:05:47 +02:00
Shashank Sharma 9e63743ebb drm/i915/bxt: Enable GMBUS IRQ
GMBUS interrupt has been moved to CPU side in BXT.
What this patch does is:
1. Enable GMBUS IRQ in de_post_install function
2. Handle this interrupt as a port interrupt in display irq
   handler

v2: Rebase on top of the for_each_pipe() change adding dev_priv as
    first argument (Damien).
v3: read BXT_DE_PORT_GMBUS IIR flag only on BXT on other platforms
    it's reserved (imre)
v4: (jani)
- remove redundant 'BXT GMBUS' comment
- fix formatting of BXT_DE_PORT_GMBUS definition

Reviewed-by: Satheeshakrishna M <satheeshakrishna.m@intel.com>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Shashank Sharma <shashank.sharma@intel.com> (v1)
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-04-14 14:53:04 +02:00
Shashank Sharma 266ea3d9c4 drm/i915/bxt: Add BXT support in gen8_irq functions
This patch adds conditional checks in gen8_irq functions
to support BXT. Most of the checks just look for PCH split
availability, and block the call to PCH interrupt functions if
not available.

v2: (jani)
- drop redundant TODO comment about PCH IRQ flags on BXT
- check HAS_PCH_SPLIT instead of IS_BROXTON when handling PCH specific
  IRQ events in gen8_irq_handler()
- check HAS_PCH_SPLIT before calling the function instead of a
  corresponding early return within the called function for
  ibx_irq_reset(), ibx_irq_pre_postinstall(), ibx_irq_postinstall()
v3: (jani)
- in ironlake_irq_postinstall() and ironlake_irq_reset() HAS_PCH_SPLIT
  is always true, so drop the check for it

Reviewed-by: Satheeshakrishna M <satheeshakrishna.m@intel.com>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Shashank Sharma <ppashank.sharma@intel.com> (v1)
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-04-14 14:53:03 +02:00
Shashank Sharma d04a492dd5 drm/i915/bxt: Add DDI hpd handler
This patch adds a hot plug interrupt handler function for BXT.
What this function typically does is:
1. Check if hot plug is enabled from hot plug control register.
2. Call hpd_irq_handler with appropriate trigger to detect a
   plug storm and schedule a bottom half.
3. Clear sticky status bits in hot plug control register..

v2: (jani)
- drop redundant unlikely()
- s/Todo/FIXME:/ in code comment
- declare 'found' var in the scope where it's used
- check for IS_BROXTON before handling BXT_DE_PORT_HOTPLUG_MASK

Reviewed-by: Satheeshakrishna M <satheeshakrishna.m@intel.com>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Shashank Sharma <shashank.sharma@intel.com> (v1)
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-04-14 14:53:03 +02:00
Imre Deak 6b5ad42f0a drm/i915/bxt: support for HPD long/short status decoding
All non-GMCH platforms have the same register layout for HPD long/short
status, so let's use this condition instead of HAS_PCH_SPLIT, as the
latter doesn't apply for BXT.

Noticed by Daniel.

Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-04-14 14:53:02 +02:00
Shashank Sharma e0a20ad78c drm/i915/bxt: DDI Hotplug interrupt setup
In BXT, DDI hotplug control has been moved to CPU from PCH.
This patch adds a new IRQ setup function for BXT which:
1. Checks which HPD ports are requested to be enabled by encoders.
2. Enables those ports in the hot plug control register.
3. Un-masks these port interrupts in the IMR register.
4. Enables these port interrupts in the IER register.

V3: Kept the default HPD filter count to default (500 us) as per
    satheesh's comment
v4: Remove unused HPD filter defines (Damien)
v5: warn if trying to setup HPD on port A (imre)
v6: fix order of definitions for register bitfields (Daniel)
v7: (jani)
- define the size of the hpd_bxt array explicitly for bound checking
- use for_each_intel_encoder instead of open coding it
- fix format/order of definitions for BXT_HOTPLUG_CTL reg bitfields

Reviewed-by: Satheeshakrishna M <satheeshakrishna.m@intel.com>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Shashank Sharma <shashank.sharma@intel.com> (v4)
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-04-14 14:53:02 +02:00
Jani Nikula 4c27283415 drm/i915: add bxt gmbus support
For BXT gmbus is pulled from PCH to CPU. From implementation point of
view only pin pair configuration will change. The existing
implementation supports all platforms previous to GEN8 and also SKL. But
for BXT pin pair configuration is completely different than SKL or other
previous GEN's. This patch introduces the new pin pair configuration
structure specific to BXT and also ensures every real gmbus port has a
gpio pin.

v3 by Jani: with the platform independent prep work in place, the bxt
enabling reduces to a fairly trivial patch. Credits are due Sunil for
giving me the ideas (with his patches) what the platform independent
parts should look like.

v4: Fix intel_hdmi_init_connector() for bxt. Abstract gmbus_pin access
more. s/GPU/PCH/ in commit message.

v5: Rebase.

Issue: VIZ-3574
Signed-off-by: A.Sunil Kamath <sunil.kamath@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-04-14 14:01:55 +02:00
Daniel Vetter c5fe557dde Merge branch 'topic/bxt-stage1' into drm-intel-next-queued
Separate topic branch for bxt didn't work out since we needed to
refactor the gmbus code a bit to make it look decent. So backmerge.

Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
2015-04-14 14:00:56 +02:00
Vandana Kannan c776eb2edf drm/i915/bxt: don't use unsupported port detection
The port detection register flags in SFUSE_STRAP and DDI_BUF_CTL_A are
not defined for BXT, so don't use them.

Suggested by Satheesh.

v2:
- DDI_BUF_CTL_A bit 0 is not useful on BXT. Making changes to use this
  bit when simulator or BXT is not applicable. Code re-arranged as per
  Damien's suggestion.

v3:
- clarify commit message, add code comment (imre)

Signed-off-by: Vandana Kannan <vandana.kannan@intel.com> (v2)
Cc: M, Satheeshakrishna <satheeshakrishna.m@intel.com>
Cc: Lespiau, Damien <damien.lespiau@intel.com>
Cc: Shankar, Uma <uma.shankar@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-04-14 13:55:24 +02:00
Robert Beckett e3a290553f drm/i915/bxt: add workaround to avoid PTE corruption
Set TLBPF in TILECTL. This fixes an issue with BXT HW seeing
corrupted pte entries.

v2:
- move the workaround to bxt_init_clock_gating (imre)

Signed-off-by: Robert Beckett <robert.beckett@intel.com> (v1)
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Nick Hoath <nicholas.hoath@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-04-14 13:55:23 +02:00
Ben Widawsky 8d09c8123d drm/i915/skl: add WaDisableMaskBasedCammingInRCC workaround
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Nick Hoath <nicholas.hoath@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-04-14 13:55:23 +02:00
Ben Widawsky 38a39a7be7 drm/i915/bxt: add WaDisableMaskBasedCammingInRCC workaround
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Nick Hoath <nicholas.hoath@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-04-14 13:55:22 +02:00
Ben Widawsky 868434c51e drm/i915/bxt: add GEN8_HDCUNIT_CLOCK_GATE_DISABLE_HDCREQ workaround
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Nick Hoath <nicholas.hoath@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-04-14 13:55:22 +02:00
Imre Deak 32608ca255 drm/i915/bxt: add GEN8_SDEUNIT_CLOCK_GATE_DISABLE workaround
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Nick Hoath <nicholas.hoath@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-04-14 13:55:21 +02:00
Imre Deak a82abe43ce drm/i915/bxt: add bxt_init_clock_gating
v2:
- Make the condition to select between SKL and BXT consistent with the
  corresponding condition in init_workarounds_ring (Nick)

Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Nick Hoath <nicholas.hoath@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-04-14 13:55:21 +02:00
Imre Deak 9647ff36ae drm/i915/gen9: fix PIPE_CONTROL flush for VS_INVALIDATE
On GEN9+ per specification a NULL PIPE_CONTROL needs to be emitted
before any PIPE_CONTROL command with the VS_INVALIDATE flag set.

Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Nick Hoath <nicholas.hoath@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-04-14 13:55:20 +02:00
Matt Roper 3968be946a drm: Make integer overflow checking cover universal cursor updates (v2)
Our legacy SetPlane updates perform integer overflow checking on a
plane's destination rectangle in drm_mode_setplane(), and atomic updates
handled as part of a drm_atomic_state transaction do the same checking
in drm_atomic_plane_check().  However legacy cursor updates that get
routed through universal plane interfaces may bypass this overflow
checking if the driver's .update_plane is serviced by the transitional
plane helpers rather than the full atomic plane helpers.

Move the check for destination rectangle integer overflow from the
drm_mode_setplane() to __setplane_internal() so that it also covers
cursor operations.

This fixes an issue first noticed with i915 commit:

        commit ff42e093e9
        Author: Daniel Vetter <daniel.vetter@ffwll.ch>
        Date:   Mon Mar 2 16:35:20 2015 +0100

            Revert "drm/i915: Switch planes from transitional helpers to full
            atomic helpers"

The above revert switched us from full atomic helpers back to the
transitional helpers, and in doing so we lost the overflow checking here
for universal cursor updates.  Even though such extreme cursor positions
are unlikely to actually happen in the wild, we still don't want there
to be a change of behavior when drivers switch from transitional helpers
to full helpers.

v2: Move check from setplane ioctl to setplane_internal rather than
    adding an additional copy of the checks to the transitional plane
    helpers.  (Daniel)

Cc: Daniel Vetter <daniel@ffwll.ch>
Testcase: igt/kms_cursor_crc
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=84269
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-04-14 09:07:46 +02:00
Jan Vesely 4195f40685 drm/nouveau/bios: fix fetching from acpi on certain systems
nvbios_extend() returns 1 to indicate "extended the array" and 0 to
indicate the array is already big enough.  This is used by the core
shadowing code to prevent re-fetching chunks of the image that have
already been shadowed.

The ACPI fetching code may possibly need to extend this further due
to requiring fetches to happen in 4KiB chunks.

Under certain circumstances (that happen if the total image size is
a multiple of 4KiB), the memory allocated to store the shadow will
already be big enough, causing the ACPI code's nvbios_extend() call
to return 0, which is misinterpreted as a failure.

The fix is simple, accept >= 0 as a successful condition here.  The
core will have already made sure that we're not re-fetching data we
already have.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89047

v2 (Ben Skeggs):
- dropped hunk which would cause unnecessary re-fetching
- more descriptive explanation

Signed-off-by: Jan Vesely <jano.vesely@gmail.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-04-14 17:00:59 +10:00
Ben Skeggs 426b20e42e drm/nouveau/gr/gm206: initial init+ctx code
Uncertain whether the GPC pack change is due to a newer driver version,
or a legitimate difference from GM204.  My GM204 has broken vram, so
can't currently try a newer binary driver on it to confirm.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-04-14 17:00:58 +10:00
Ben Skeggs 985826bccd drm/nouveau/ce/gm206: enable support via gm204 code
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-04-14 17:00:58 +10:00
Ben Skeggs 5dd7fb771a drm/nouveau/fifo/gm206: enable support via gm204 code
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-04-14 17:00:57 +10:00
Ben Skeggs 3fed3ea9fd drm/nouveau/gr/gm204: initial init+ctx code
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-04-14 17:00:57 +10:00
Ben Skeggs 990b454704 drm/nouveau: support for buffer moves via MaxwellDmaCopyA
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-04-14 17:00:57 +10:00
Ben Skeggs b44881e453 drm/nouveau/ce/gm204: initial support
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-04-14 17:00:56 +10:00
Ben Skeggs a1020afe88 drm/nouveau: add support for gm20x fifo channels
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-04-14 17:00:56 +10:00
Ben Skeggs 89025bd458 drm/nouveau/fifo/gm204: initial support
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-04-14 17:00:55 +10:00
Ben Skeggs 91c772ec12 drm/nouveau/gr/gk104-: prevent reading non-existent regs in intr handler
Under certain circumstances the trapped address will contain subc 7,
which GK104 GR doesn't have anymore.

Notice this case to avoid causing additional priv ring faults.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-04-14 17:00:55 +10:00
Ben Skeggs ddec1a2b4c drm/nouveau/gr/gm107: very slightly demagic part of attrib cb setup
No idea if "3" is a constant or derived from something else, but the
value is unchanged in the limited traces of gm107/gm204 I have here.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-04-14 17:00:54 +10:00
Ben Skeggs 6eb7082621 drm/nouveau/gr/gk104-: correct crop/zrop num_active_fbps setting
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-04-14 17:00:54 +10:00
Ben Skeggs 3740c82590 drm/nouveau/gr/gf100-: add symbolic names for classes
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-04-14 17:00:54 +10:00
Ben Skeggs 8fd4b7d438 drm/nouveau/gr/gm107: support tpc "strand" ctxsw in gpccs ucode
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-04-14 17:00:53 +10:00
Ben Skeggs 2a19b3ed65 drm/nouveau/gr/gf100-: support mmio access with gpc offset from gpccs ucode
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-04-14 17:00:53 +10:00
Ben Skeggs 7b03ac2ce0 drm/nouveau/gr: fix engine name, cosmetic search+replace mistake
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-04-14 17:00:52 +10:00
Alexandre Courbot 7120908d12 drm/nouveau/pmu/gk20a: add some missing statics
Make static a few functions and structures that should be.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-04-14 17:00:52 +10:00
Alexandre Courbot bbf2e92f91 drm/nouveau/platform: fix probe error path
A "return 0" found its way in the middle of the error path of
nouveau_platform_probe(), remove it as it will make the kernel crash if
we try to unload the module afterwards.

While we are at it, also remove the IOMMU domain if it has been created,
as we should.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-04-14 17:00:51 +10:00
Alexandre Courbot 25eb3a924f drm/nouveau/platform: release IOMMU's mm upon exit
nvkm_mm_fini() was not called when exiting the driver, resulting in a
memory leak. Fix this.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-04-14 17:00:51 +10:00
Ben Skeggs ed22e68462 drm/nouveau/gr/gk104-gk20a: call pmu to disable any power-gating before ctor()
On some of these chipsets, reading NV_PGRAPH_GPC_GPM_PD_PES_TPC_ID_MASK
can trigger a PRI fault and return an error code instead of a TPC mask,
unless PGOB has been disabled first.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-04-14 17:00:51 +10:00
Ben Skeggs f02a0e849d drm/nouveau/pmu/gk208: implement gr power-up magic with gk110_pmu_pgob()
Before we moved gk110's implementation of this to pmu, the functions were
identical.  This commit just switches GK208 to use the new (more complete)
implementation of the power-up sequence.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-04-14 17:00:50 +10:00
Ben Skeggs e1fc44fb9d drm/nouveau/pmu/gk110: implement gr power-up magic like PGOB on earlier chips
Turns out the PTHERM part of this dance is bracketed by the same PMU
fiddling that occurs on GK104/6, let's assume it's also PGOB.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-04-14 17:00:50 +10:00
Roy Spliet d9da545e10 drm/nouveau/pbus/hwsq: Make code size u16
So we can actually use the full 512 byte code space

Signed-off-by: Roy Spliet <rspliet@eclipso.eu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-04-14 17:00:49 +10:00
Roy Spliet 3834b632b2 drm/nouveau/pbus/hwsq: Support strided register writes
Signed-off-by: Roy Spliet <rspliet@eclipso.eu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-04-14 17:00:49 +10:00
Alexandre Courbot df16896b86 drm/nouveau/instmem/gk20a: fix crash during error path
If a memory allocation fails when using the DMA allocator,
gk20a_instobj_dtor_dma() will be called on the failed instmem object.
At this time, node->handle might not be NULL despite the call to
dma_alloc_attrs() having failed. node->cpuaddr is the right member to
check for such a failure, so use it instead.

Reported-by: Vince Hsu <vinceh@nvidia.com>
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-04-14 17:00:49 +10:00
Ben Skeggs b03eaa4d34 drm/nouveau/disp/gf110-: fix base channel update debug/error output
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-04-14 17:00:48 +10:00
Ben Skeggs 963e965033 drm/nouveau/disp/nv50-: fix push buffers in vram
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-04-14 17:00:47 +10:00
Ben Skeggs 824527551c drm/nouveau: bump driver patchlevel for coherent flag
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-04-14 17:00:47 +10:00