Commit Graph

5 Commits

Author SHA1 Message Date
Thomas Gleixner fda8d26e61 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 177
Based on 1 normalized pattern(s):

  licensed under the gpl 2

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-only

has been chosen to replace the boilerplate/reference in 135 file(s).

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Allison Randal <allison@lohutok.net>
Reviewed-by: Richard Fontana <rfontana@redhat.com>
Reviewed-by: Alexios Zavras <alexios.zavras@intel.com>
Reviewed-by: Steve Winslow <swinslow@gmail.com>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190528170026.071193225@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-05-30 11:29:19 -07:00
Lars-Peter Clausen 5d76de61dd ASoC: adau17x1: Add support for specifying the MCLK using the CCF
The devices from the ADAU17X1 family all have a MCLK clock input which
supplies the master clock for the device. The master clock is used as the
input clock for the PLL. Currently the MCLK rate as well as the desired PLL
output frequency need to be supplied by calling snd_soc_dai_set_pll() form
a machine driver.

Add support for specifying the MCLK using the common clock framework. In
addition to that also automatically configure the PLL to a suitable rate
if the master clock was provided using the CCW. This allows to use the
CODEC driver without any special configuration requirements from the
machine driver.

While the PLL output frequency can be configured over a (more or less)
continuous range the narrowness of the range and the other constraints of
the clocking tree usually only result in two output frequencies that will
actually be chosen. One for 44.1kHz based rates and one for 48kHz based
rates, these are the rates that the automatic PLL configuration will use.
For the rare case where a non-standard setup is required a machine driver
can disable the auto-configuration and configure a custom frequency using
the existing mechanisms.

If the common clock framework is not enabled clk_get() will return NULL and
the driver will function as before and the clock rate needs to be
configured manually.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Mark Brown <broonie@kernel.org>
2016-06-15 14:42:40 +01:00
Andreas Irestål aaf0f3aeeb ASoC: adau17x1: Add basic DT support for adau17x1
Signed-off-by: Andreas Irestål <andire@axis.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2016-02-24 13:14:05 +09:00
Andrew F. Davis 3821a065f5 spi: Drop owner assignment from spi_drivers
An spi_driver does not need to set an owner, it will be populated by the
driver core.

Signed-off-by: Andrew F. Davis <afd@ti.com>
Acked-by: Jonathan Cameron <jic23@kernel.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-10-28 10:30:17 +09:00
Lars-Peter Clausen 2923af0246 ASoC: Add ADAU1381/ADAU1781 audio CODEC support
This patch adds support for the Analog Devices ADAU1381 and ADAU1781 audio
CODECs. The device is a low-power, 24-bit stereo audio CODEC with multiple
analog inputs and outputs, two digital microphone inputs and an I2S interface.
The device can be controlled either using I2C or SPI. The main difference
between the two variants is that the ADAU1781 has a freely programmable SigmaDSP
processor, while the ADAU1381 has a fixed function wind noise reduction filter.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Mark Brown <broonie@linaro.org>
2014-05-27 20:54:51 +01:00