During RTC-only suspend, power is lost to the wkup domain, so we need to
save and restore the state of that domain. We also need to store some
information within the RTC registers so that u-boot can do the right thing
at powerup.
The state is entered by getting the RTC to bring the pmic_power_en line low
which will instruct the PMIC to disable the appropriate power rails after
putting DDR into self-refresh mode. To bring pmic_power_en low, we need to
get an ALARM2 event. Since we are running from SRAM at that point, it means
calculating what the next second is (via ASM) and programming that into the
RTC. This patch also adds support for wake up source detection.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Move the am33xx_push_sram_idle function to the top as a preparation
for rtc+ddr mode as the function will be called by multiple functions
currently present before it.
No functional changes.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
We forgot to set "err" on this error path.
Fixes: 1a2d397a6e ("gpio/powerpc: Eliminate duplication of of_get_named_gpio_flags()")
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
The memremap() function doesn't return error pointers, it returns NULL.
This code is returning "ret = PTR_ERR(NULL);" which is success, but it
should return -ENOMEM.
Fixes: 312416d917 ("drivers: qcom: add command DB driver")
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Current QMI clients are not userspace facing, if their threads are
signaled, they do not do any signal checking or propagate the
ERESTARTSYS return code up. Remove the interruptible option so clients
can finish their QMI transactions even if the thread is signaled.
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Chris Lew <clew@codeaurora.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This change adds mmap functionality to rmtfs_mem driver.
Userspace application can map the address and use this
mapped address directly as buffer for read/write call to disk.
and avoid the read/write call to the shared path to copy the
buffer to userspace application.
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Ankit Jain <jankit@codeaurora.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
By implementing the acquire/release protocol, the resets can be shared
with other drivers that also adhere to this protocol. This will be used
for example by the SOR driver to put hardware into a known good state,
irrespective of whether or not the power domain can be reset.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Replace explicit polling loop with a call to
regmap_read_poll_timeout() to avoid code repetition. Also fix
misspelled "failed" while at it.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Cc: Lucas Stach <l.stach@pengutronix.de>
Cc: Chris Healy <cphealy@gmail.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
enabled, and fixes the driver in the presence of -EPROBE_DEFER.
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEE/JuuFDWp9/ZkuCBXtdYpNtH8nugFAlyIEPoACgkQtdYpNtH8
nuiYqg/9H21xnIvbzN2V9SeaZvKp9XYLw9wK+kLlQl0oFxeXanTbKLU8AEDkxCI/
tnjlNtIWKa09cv1n6hiMKlNRAEXqy7sg2o06twGfXTpHka9Z289HH6CXxXK75GIG
NqE/u+hNLRZeWQMiiOC+RodGMUH2Dn5+whl8cMb3bUhLvql7WlyCUipiQxhMEW66
b8TAomUzqeGSWd8SALXtrnO0d6NNpQyQFQIqoJ5Nf/EZylBasDQlAgpHsfYpJALl
vX1UDPOHs25nunuZNuQY9HLxkWL5yTCYnKHXN/f4HMLXpSdg48+pibLyGULfn9qn
PYjeLyLWOUYOcC490FpB1oNz7jOaj/Q7TEipuhGuMdgCH5ZR+F6jKKp5q2i8DpPc
GABWyYdPrZ9riUkQ3uu0eTlted3+V/SpOieJ8gi51vcG1KEG4CHKRHouXzJgzQ7N
KHGGjq9EviHxLxlGQ+mPK0pFsXXii3tAVyvPjwoUNvr2kWIJ0xNXlTF+Ap4rTKA+
o6Q5JFKWJdf+lgqlFBRV148T8KldWfsvmPIHhZn5X7fMAZboEarSbuMb9G2IfiL5
wR3Lny/348E3pbVMa1aSQSWteslz1mrxx6j03fweX1iSGTJUFNdMadCQVeCvMa/e
ARHAsYW5cX1naNvY+lr21MvA63xHaZ8qO0Mlebmi1enDjj6sXCM=
=UemV
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEm+Rq3+YGJdiR9yuFh9CWnEQHBwQFAlyP1fcACgkQh9CWnEQH
BwR4Yw//frUR+z1K5caZyZqjTTS/Pi7fDbVCOENG/P0Ea8EQsVvFTzapnHoiM6Ed
wtJzop/0KnnMypgMXTSij+yJoI7moP6bEUqBSy2GNidqgbGxdMjXcriFhb2AO4L3
WSEYkHNH4zoa5nIabyZ+jAWdyfxMU7Fq3dJXkKQAe3bovFw/8iWUpHvmdlfR7M5M
q6Q0iuP5oZiD/oQBRh/SsynW4qwGb5uxLu+x2szD7M/VEqJgXv3aJHOu36kbdX3Y
wtdeaofYpH6EMPSY2LyxVSXIMTpsX570o9r5LnJ98V75ZLY8p1vGLIJZdGKS2hXn
C1DzqRXCdhKvr83iNixvsbC9/xmxpoyiFzcUlckctsh3QR3LRVLg4OHfLf1J3Jid
3KBL0mwXaSyO224Bgtka6sGEqw6fpcmyI8pvPNSY2mELY/GIUpLw10yniKGgJeC7
AgKUf0pvCz/M+MaqTxma3p8MmJUIgzvMg42i/N/gmgNw6TYCAQf7YZlSv9hW961M
HGofMEx1VfjTAD1mucecKfcnzKolCJlOlmZKeKWsMqt2+DbpJq7NX9Fg6Q6x40jB
pjdHU0hXixMVb5T0d0GBHTS6aA2G+zxm3zUCQYG89kmI+rgL7unE70OhHqEbENRv
hk1SUMYo8cezv//1eAz584TUs2jF3b90Ev6HdcCDCscf94VW9tM=
=2uY0
-----END PGP SIGNATURE-----
Merge tag 'tags/bcm2835-drivers-next-2019-03-12' into soc/fixes
This pull request brings in a build fix for arm64 with bcm2835
enabled, and fixes the driver in the presence of -EPROBE_DEFER.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Add an of_node_put when a tested device node is not available.
The semantic patch that fixes this problem is as follows
(http://coccinelle.lip6.fr):
// <smpl>
@@
identifier f;
local idexpression e;
expression x;
@@
e = f(...);
... when != of_node_put(e)
when != x = e
when != e = x
when any
if (<+...of_device_is_available(e)...+>) {
... when != of_node_put(e)
(
return e;
|
+ of_node_put(e);
return ...;
)
}
// </smpl>
Fixes: a9daaba296 ("soc: Add Amlogic SoC Information driver")
Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
This adds the:
- G12A SoC ID and S905X2, S905D2 package IDs, found booting the
X96 Max and U200 Reference Board
- G12B SoC ID and S922X package ID, found booting the Odroid-N2
- S805X, S805Y package IDs found in the vendor U-Boot source
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
When updated IDs on f842c41adc ("amlogic: meson-gx-socinfo: Update soc ids")
we introduced packages ids using the full 8bit value, but in the function
socinfo_to_package_id() the id was filtered with the 0xf0 mask.
While the 0xf0 mask is valid for most board, it filters out the lower
4 bits which encodes some characteristics of the chip.
This patch moves the mask into the meson_gx_package_id table to be applied
on each package name independently and add the correct mask for some
specific entries.
An example is the S905, in the vendor code the S905 is package_id
different from 0x20, and S905M is exactly 0x20.
Another example are the The Wetek Hub & Play2 boards using a S905-H
variant, which is the S905 SoC with some licence bits enabled.
These licence bits are encoded in the lower 4bits, so to detect
the -H variant, we must detect the id == 0x3 with the 0xf mask.
Fixes: f842c41adc ("amlogic: meson-gx-socinfo: Update soc ids")
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Driver needs ZynqMP firmware interface to call EEMI
APIs. In case firmware is not ready, dependent drivers
should wait until the firmware is ready.
Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Signed-off-by: Jolly Shah <jollys@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
The Product Register of R-Car M3-W ES1.3 incorrectly identifies the SoC
revision as ES2.1. Add a workaround to fix this.
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
As usual, the drivers/tee and drivers/reset subsystems get merged
here, with the expected set of smaller updates and some new hardware
support. The tee subsystem now supports device drivers to be attached
to a tee, the first example here is a random number driver with its
implementation in the secure world.
Three new power domain drivers get added for specific chip families:
- Broadcom BCM283x chips (used in Raspberry Pi)
- Qualcomm Snapdragon phone chips
- Xilinx ZynqMP FPGA SoCs
One new driver is added to talk to the BPMP firmware on NVIDIA
Tegra210
Existing drivers are extended for new SoC variants from NXP,
NVIDIA, Amlogic and Qualcomm.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2
iQIcBAABCAAGBQJcfpKpAAoJEGCrR//JCVInMpYQANwKKWOTm5NHqtf7/ZKBzx6/
Yk7Jj8QLGKrHScnuBZSBvTwv5Cc5O5Ye+tAuGVArOoD2ktXlLZmHZ/ZPFAudT3di
aFYbA44RNhv+O/xOmToDCCjSHm176hwUY0Cs5bFnfx6TcMsdOYIQIG+XQKx/a9zg
3ZBEv7wZqcBArLc0X2Z2/uiVrEIh3wWwXytvw+8TG8ifUfpbDxRUxDlj1JRDpjMu
yX4q8JDhdQvi2FTXbXcEHTdQ6RT11svPM/YxQDxfULRK9aNKf4GZJ4QlwZy+SO7N
cEFxDd4ML/iJ1LjalvtXGkR0xrw9/gOlO3vbB9Uw3EngBDUSQfHmqJet10a14l8q
KcToe3teIB+Z1R+plrt+h5UDJTbVibgZXhU6wIdkDgtF6oTyg1moIbTqNKHgcA3b
HLJv4gFejeluQzJ/3dZHBnkvJo1XFAvGFmFXle0bmJRFtDx73CKnf6MA9N82l2/x
nTn4LTxXIJVKWTWAs1qkrFyIx1gOrpGhiHPQ2JiOPMZLstz3Sr6tiJuWOr+1Ex4/
UlZsD/CrRb+SbPBonpkD+bvzSR+j0M72A7hGmfZcDzainciWgunyXglUlzO/MT24
C6p4R9MZ2Fffoe8pESppabRNUItp8gNsNGI7CY1IK8pgpxLrujw8OnqykpV0VETo
As+6dZrHfPNSuI7udJi5
=+DOl
-----END PGP SIGNATURE-----
Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM SoC driver updates from Arnd Bergmann:
"As usual, the drivers/tee and drivers/reset subsystems get merged
here, with the expected set of smaller updates and some new hardware
support. The tee subsystem now supports device drivers to be attached
to a tee, the first example here is a random number driver with its
implementation in the secure world.
Three new power domain drivers get added for specific chip families:
- Broadcom BCM283x chips (used in Raspberry Pi)
- Qualcomm Snapdragon phone chips
- Xilinx ZynqMP FPGA SoCs
One new driver is added to talk to the BPMP firmware on NVIDIA
Tegra210
Existing drivers are extended for new SoC variants from NXP, NVIDIA,
Amlogic and Qualcomm"
* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (113 commits)
tee: optee: update optee_msg.h and optee_smc.h to dual license
tee: add cancellation support to client interface
dpaa2-eth: configure the cache stashing amount on a queue
soc: fsl: dpio: configure cache stashing destination
soc: fsl: dpio: enable frame data cache stashing per software portal
soc: fsl: guts: make fsl_guts_get_svr() static
hwrng: make symbol 'optee_rng_id_table' static
tee: optee: Fix unsigned comparison with less than zero
hwrng: Fix unsigned comparison with less than zero
tee: fix possible error pointer ctx dereferencing
hwrng: optee: Initialize some structs using memset instead of braces
tee: optee: Initialize some structs using memset instead of braces
soc: fsl: dpio: fix memory leak of a struct qbman on error exit path
clk: tegra: dfll: Make symbol 'tegra210_cpu_cvb_tables' static
soc: qcom: llcc-slice: Fix typos
qcom: soc: llcc-slice: Consolidate some code
qcom: soc: llcc-slice: Clear the global drv_data pointer on error
drivers: soc: xilinx: Add ZynqMP power domain driver
firmware: xilinx: Add APIs to control node status/power
dt-bindings: power: Add ZynqMP power domain bindings
...
Pull timer and clockevent updates from Thomas Gleixner:
"The time(r) core and clockevent updates are mostly boring this time:
- A new driver for the Tegra210 timer
- Small fixes and improvements alll over the place
- Documentation updates and cleanups"
* 'timers-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (22 commits)
soc/tegra: default select TEGRA_TIMER for Tegra210
clocksource/drivers/tegra: Add Tegra210 timer support
dt-bindings: timer: add Tegra210 timer
clocksource/drivers/timer-cs5535: Rename the file for consistency
clocksource/drivers/timer-pxa: Rename the file for consistency
clocksource/drivers/tango-xtal: Rename the file for consistency
dt-bindings: timer: gpt: update binding doc
clocksource/drivers/exynos_mct: Remove unused header includes
dt-bindings: timer: mediatek: update bindings for MT7629 SoC
clocksource/drivers/exynos_mct: Fix error path in timer resources initialization
clocksource/drivers/exynos_mct: Remove dead code
clocksource/drivers/riscv: Add required checks during clock source init
dt-bindings: timer: renesas: tmu: Document r8a774c0 bindings
dt-bindings: timer: renesas, cmt: Document r8a774c0 CMT support
clocksource/drivers/exynos_mct: Clear timer interrupt when shutdown
clocksource/drivers/exynos_mct: Move one-shot check from tick clear to ISR
clocksource/drivers/arch_timer: Workaround for Allwinner A64 timer instability
clocksource/drivers/sun5i: Fail gracefully when clock rate is unavailable
timers: Mark expected switch fall-throughs
timekeeping/debug: No need to check return value of debugfs_create functions
...
- Support for the MIPSr6 MemoryMapID register & Global INValidate TLB
(GINVT) instructions, allowing for more efficient TLB maintenance when
running on a CPU such as the I6500 that supports these.
- Enable huge page support for MIPS64r6.
- Optimize post-DMA cache sync by removing that code entirely for kernel
configurations in which we know it won't be needed.
- The number of pages allocated for interrupt stacks is now calculated
correctly, where before we would wastefully allocate too much memory
in some configurations.
- The ath79 platform migrates to devicetree.
- The bcm47xx platform sees fixes for the Buffalo WHR-G54S board.
- The ingenic/jz4740 platform gains support for appended devicetrees.
- The cavium_octeon, lantiq, loongson32 & sgi-ip27 platforms all see
cleanups as do various pieces of core architecture code.
-----BEGIN PGP SIGNATURE-----
iIsEABYIADMWIQRgLjeFAZEXQzy86/s+p5+stXUA3QUCXH3BQxUccGF1bC5idXJ0
b25AbWlwcy5jb20ACgkQPqefrLV1AN1+4wD+Oh4JTfZN/NEOQMlrSkXxjEHqjX3u
1Y6CiiPCs+q2UnYBANb+ic+ZH5MnvJxxmcvlYI2q3rIh4b8TDriip4KMUTUP
=Sw9X
-----END PGP SIGNATURE-----
Merge tag 'mips_5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux
Pull MIPS updates from Paul Burton:
- Support for the MIPSr6 MemoryMapID register & Global INValidate TLB
(GINVT) instructions, allowing for more efficient TLB maintenance
when running on a CPU such as the I6500 that supports these.
- Enable huge page support for MIPS64r6.
- Optimize post-DMA cache sync by removing that code entirely for
kernel configurations in which we know it won't be needed.
- The number of pages allocated for interrupt stacks is now calculated
correctly, where before we would wastefully allocate too much memory
in some configurations.
- The ath79 platform migrates to devicetree.
- The bcm47xx platform sees fixes for the Buffalo WHR-G54S board.
- The ingenic/jz4740 platform gains support for appended devicetrees.
- The cavium_octeon, lantiq, loongson32 & sgi-ip27 platforms all see
cleanups as do various pieces of core architecture code.
* tag 'mips_5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux: (66 commits)
MIPS: lantiq: Remove separate GPHY Firmware loader
MIPS: ingenic: Add support for appended devicetree
MIPS: SGI-IP27: rework HUB interrupts
MIPS: SGI-IP27: do boot CPU init later
MIPS: SGI-IP27: do xtalk scanning later
MIPS: SGI-IP27: use pr_info/pr_emerg and pr_cont to fix output
MIPS: SGI-IP27: clean up bridge access and header files
MIPS: SGI-IP27: get rid of volatile and hubreg_t
MIPS: irq: Allocate accurate order pages for irq stack
MIPS: dma-noncoherent: Remove bogus condition in dma_sync_phys()
MIPS: eBPF: Remove REG_32BIT_ZERO_EX
MIPS: eBPF: Always return sign extended 32b values
MIPS: CM: Fix indentation
MIPS: BCM47XX: Fix/improve Buffalo WHR-G54S support
MIPS: OCTEON: program rx/tx-delay always from DT
MIPS: OCTEON: delete board-specific link status
MIPS: OCTEON: don't lie about interface type of CN3005 board
MIPS: OCTEON: warn if deprecated link status is being used
MIPS: OCTEON: add fixed-link nodes to in-kernel device tree
MIPS: Delete unused flush_cache_sigtramp()
...
Pull crypto update from Herbert Xu:
"API:
- Add helper for simple skcipher modes.
- Add helper to register multiple templates.
- Set CRYPTO_TFM_NEED_KEY when setkey fails.
- Require neither or both of export/import in shash.
- AEAD decryption test vectors are now generated from encryption
ones.
- New option CONFIG_CRYPTO_MANAGER_EXTRA_TESTS that includes random
fuzzing.
Algorithms:
- Conversions to skcipher and helper for many templates.
- Add more test vectors for nhpoly1305 and adiantum.
Drivers:
- Add crypto4xx prng support.
- Add xcbc/cmac/ecb support in caam.
- Add AES support for Exynos5433 in s5p.
- Remove sha384/sha512 from artpec7 as hardware cannot do partial
hash"
[ There is a merge of the Freescale SoC tree in order to pull in changes
required by patches to the caam/qi2 driver. ]
* 'linus' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6: (174 commits)
crypto: s5p - add AES support for Exynos5433
dt-bindings: crypto: document Exynos5433 SlimSSS
crypto: crypto4xx - add missing of_node_put after of_device_is_available
crypto: cavium/zip - fix collision with generic cra_driver_name
crypto: af_alg - use struct_size() in sock_kfree_s()
crypto: caam - remove redundant likely/unlikely annotation
crypto: s5p - update iv after AES-CBC op end
crypto: x86/poly1305 - Clear key material from stack in SSE2 variant
crypto: caam - generate hash keys in-place
crypto: caam - fix DMA mapping xcbc key twice
crypto: caam - fix hash context DMA unmap size
hwrng: bcm2835 - fix probe as platform device
crypto: s5p-sss - Use AES_BLOCK_SIZE define instead of number
crypto: stm32 - drop pointless static qualifier in stm32_hash_remove()
crypto: chelsio - Fixed Traffic Stall
crypto: marvell - Remove set but not used variable 'ivsize'
crypto: ccp - Update driver messages to remove some confusion
crypto: adiantum - add 1536 and 4096-byte test vectors
crypto: nhpoly1305 - add a test vector with len % 16 != 0
crypto: arm/aes-ce - update IV after partial final CTR block
...
The clock driver may probe after ours and so we need to pass the
-EPROBE_DEFER out. Fix the other error path while we're here.
v2: Use dom->name instead of dom->gov as the flag for initialized
domains, since we aren't setting up a governor. Make sure to
clear ->clk when no clk is present in the DT.
Signed-off-by: Eric Anholt <eric@anholt.net>
Fixes: 670c672608 ("soc: bcm: bcm2835-pm: Add support for power domains under a new binding.")
We don't have ASB master/slave regs for this domain, so just skip that
step.
Signed-off-by: Eric Anholt <eric@anholt.net>
Fixes: 670c672608 ("soc: bcm: bcm2835-pm: Add support for power domains under a new binding.")
DPIO driver
- Add support for cache stashing and enable it in dpaa2-eth driver
GUTS driver
- Make fsl_guts_get_svr() API internal in favor of more generic
soc_device_match()
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEhb3UXAyxp6UQ0v6khtxQDvusFVQFAlx11WsACgkQhtxQDvus
FVTxahAApjB6xxpMBkBlX4lZ+o3HdX/fyyjna6iZIdG5YPm2sGnlAQ7dZb/sLMCk
1U+s52hc+aowfL23/x6XDu6vk0Oa05Qc8qmqT5zAyzw8el5r0lFr6S6KI3QmlSBI
9m3CJTWMRMEJVPribWEIUb/DrrylKEHhZORRBeNqHBPV9J7yh/zvTc3zJiSRG4b5
Pl1l+iCykTvxazcoz/mXlM7qIe5jinFU5odhAnbbrK+2oPs0NjblLqPCQe96l3/3
NUVxO0pYqvHDDNc6SbIpylvLp8Yd3N3L+VmdfJiNDKIH1/19R47EBAXvNvWONcao
DooHNVv3ltwJ3UB5aGcM9Pqr0qJyCtXzRcrfC5q5z7/kMJcTUxB1bbbfPlzsXqKi
FvL2JpQwqAnF8IJh7Z81bdGIfHfl4YbbY3gp1x4keXo7zRyUtuS2+fkiE+Q/LaWL
3reJSDoXcPpozZ0ds5m4szbEB1vlm6zzCYpVXaXgZfr8uuV8OXG9CZ6Cl+OYyofc
GkoyampBIWd8OLNfodOpa5GqcdPDgMZ4Ha8eafN3wNIT+PUYS0Eixy4tk+BNYjiw
Yu4JHwZzbsGzLzpsT/BgYvznMXg3rpOTpak3WdeUb9VSlOE+vWngUSDMLiNRLdFE
1rJzCXBe43MOqYEfqc/FbffX+ddPpNWVUrRdMtKD5jYJm/luqKE=
=tNfD
-----END PGP SIGNATURE-----
Merge tag 'soc-fsl-next-v5.1-4' of git://git.kernel.org/pub/scm/linux/kernel/git/leo/linux into arm/drivers
NXP/FSL SoC driver updates for v5.1 take4
DPIO driver
- Add support for cache stashing and enable it in dpaa2-eth driver
GUTS driver
- Make fsl_guts_get_svr() API internal in favor of more generic
soc_device_match()
* tag 'soc-fsl-next-v5.1-4' of git://git.kernel.org/pub/scm/linux/kernel/git/leo/linux:
dpaa2-eth: configure the cache stashing amount on a queue
soc: fsl: dpio: configure cache stashing destination
soc: fsl: dpio: enable frame data cache stashing per software portal
soc: fsl: guts: make fsl_guts_get_svr() static
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Depending on the SoC version and the CPU id, configure the cache
stashing destination for a specific dpio.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
Enable cache stashing on the frame data dequeued using this software
portal. Also, enable dropping a stash request transaction when the
target request queue is almost full.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
The export of fsl_guts_get_svr() is a left-over, it's currently used
only internally and users needing SoC information should use the generic
soc_device infrastructure.
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
Acked-by: Yangbo Lu <yangbo.lu@nxp.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
The separate GPHY Firmware loader driver is not used any more, the GPHY
firmware is now loaded by the GSWIP switch driver which also makes use
of the GPHY.
Remove the old unused GPHY firmware loader driver.
The GPHY firmware is useless without an Ethernet and switch driver, it
should not harm if loading this does not work for system using an old
device tree.
I am not aware of any vendor separating the device tree from the kernel
binary, it should be ok to remove this.
The code and the functionality form this separate GPHY firmware loader
was added to the gswip driver in commit 14fceff477 ("net: dsa: Add
Lantiq / Intel DSA driver for vrx200")
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: Paul Burton <paul.burton@mips.com>
Cc: linux-mips@vger.kernel.org
Cc: devicetree@vger.kernel.org
Cc: john@phrozen.org
Cc: netdev@vger.kernel.org
The tegra timer is necessary for Tegra210 to support CPU idle power-down
state. So select it by default.
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
DPIO driver
- fixed a use after free problem
- fixed a memory leak on error path
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEhb3UXAyxp6UQ0v6khtxQDvusFVQFAlxsbpsACgkQhtxQDvus
FVTLjBAAtoB2WjG6f8QPPsUi+qsnxW3WoIyZoVvhy+epc9yfhvnXTH5d63sWdlZU
ZfCtDwtRSaeac/uTq7ph1aqz4N5o/XS0/oLsvAKfKOlc3acTszMlF/oQe9nHpEZB
dStyU0ZYmJD2DIQYQc1565FaN4Zik4dKZvj78hK2uR8mzHD+MlphV0aXG1MXFWgA
1VuGCQ8BXF6AiGd24wGqEjXHFSZngpcf9Wa7qU12BtUB0VEL7vrkHaabsLpVdcmN
oOp3P8O0EJzew1cSxwfXOd+X8usXFvUC6WDTUHB7yraJlpC5AteDURdhldOiueEp
9Qi+f46txjvFklA/L+Ji2gagR4bxy55XNaWZcppmuLPRD1GmisTM/9oAL3UO6cDB
uadMZCkw/QpBMVH8Ng/rXqNpy3r8tVc6/xZIt+hFHkizpXmqpGSwpNWAsRH9aM8m
5XV1CxHIied0WiK54ZIdcHbxE5R06Eq6jaB2VlZlnusPwuFmh+GolNlvj87QBvkZ
J6dMIJE9/xCfoyp5p1KfYJ713IAAfeSpeoks134dkhDApYRZlDoRNyJBQaBQCMRc
YImTFw1sECCfH2UsQgDXKAHQm0KSFotFKodM/YOeeQpjXTJxDMTQrfMjiMhcsgn5
BZLXivkHpPfcGKAYVV6l026Vib5m1Ton39DN3KcKB8wrEfjE9tw=
=GogM
-----END PGP SIGNATURE-----
Merge tag 'soc-fsl-next-v5.1-3' of git://git.kernel.org/pub/scm/linux/kernel/git/leo/linux into arm/drivers
NXP/FSL SoC driver updates for v5.1 take3
DPIO driver
- fixed a use after free problem
- fixed a memory leak on error path
* tag 'soc-fsl-next-v5.1-3' of git://git.kernel.org/pub/scm/linux/kernel/git/leo/linux:
soc: fsl: dpio: fix memory leak of a struct qbman on error exit path
soc: fsl: dpio: Use after free in dpaa2_dpio_remove()
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Currently the error check for a null reg leaks a struct qbman
that was allocated earlier. Fix this by kfree'ing p on the error exit
path.
Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
This patch fixes typos in the llcc-slice driver.
Fixes: 72d1cd0331 ("qcom: soc: llcc-slice: Clear the global drv_data pointer on error")
Signed-off-by: Andy Gross <andy.gross@linaro.org>
* Fixups/Cleanup for Qualcomm LLCC
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJcZxHLAAoJEFKiBbHx2RXV6cwP/jCRdTI6gXaUcbrSoDdN5LZt
SffUYjYdde/ppYAK+XucjFCzL9+D9G+NYXP9lsRZMDPBcEWf1xlRqxQA29PMIJt1
c70etrr9zeq0EGFxtfAZIYo5cHRKORDDv7ZfwWhHMwCjEdqKzRYN+CMxTsLBgP1a
zIPDTZ3WbKUboB/XPcedRAfHStgn7DiF6Xbi3MOxsGW/zprBejPAQyKaOPvMdHuV
4jU8zdI0RvjXDrjHFcJ01L18cUMiWX6jFhjyR/hcBir41cR8WCD70X+zviH5KtoX
b9pnDjFRlfSiXbB9lxCWPycPrpy2DJ9rNVypn7Me37ZpLkdUCV5BZAY7WntniZlw
MoMn+DZSwwYjIg532w84bY2oDHDwhqm+cW3iu6O+hLTlZ+djCDV2P4d2dQJ/6jzC
dZyugSwwkjLLE7V4VfZdTCIDdjOthqocBc7cOAPke3F4dsQmeODBHcbAm22pFtVu
TeLLhllrC+Ou4Xho/53jP7VNMkaDiRyxFdQuXOoLX8MRAWg9OvFgubR/XdVHK1Pa
u52joTwGXLqTVfEKZnA2Kb4QZ6rg9CdfFh1YpLPJr00Uwd91DpVrRPMRMFRtWhQk
4um3qYIkSnWNHQoPC2XndwvWbUYmDhnGBTXnHA6SR/u6OmFdgpIF0OnKmCX6Ts6L
LsA1hID91DzsYXsqu3eb
=URKt
-----END PGP SIGNATURE-----
Merge tag 'qcom-drivers-for-5.1-2' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux into arm/drivers
Qualcomm ARM Based Driver Updates for v5.1 - Part 2
* Fixups/Cleanup for Qualcomm LLCC
* tag 'qcom-drivers-for-5.1-2' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux:
qcom: soc: llcc-slice: Consolidate some code
qcom: soc: llcc-slice: Clear the global drv_data pointer on error
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Fix the Clang warning for enum in Navigator dma
- Simplify code in ti_sci with DEFINE_SHOW_ATTRIBUTE macro
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJcVIjTAAoJEHJsHOdBp5c/xWQP+QFHtLYwGlX1hlcoNksh4TuE
fkR3J6XaslJTHQmMfhDJjWiM5xCbMLW2WO86rfTDb32kXzoG4iZAvgCptbMiFUmr
E6tJDzvR72fJjPyYK7LPxY9Ke9pl4fiiowV+vk87nl4ikfjp8OCHLok0aYXYBOXj
MQjd3AEc3tO6FE/LBPH/q96qg90psgYzj8F6BLrVZjXKhF57vjdAw6Fe+tavn4bz
jXnC6WbpwFccfkkoDAHE3A31HlKSR9c9Llrp/emHpVd78vD5fjWwv2SMcJcRVF8s
yGEnZ7z3SHVpnqnMFzceXjaHVo4pVIOGGm7GvNNgP0VEUMYjCL2Z++2bobT1//5I
EO1KAiyAWebqmi5nqYfktI4HBPN4gH83htN44GDG6X/Us5SAh399aBeZgkrLE4F8
tdiZO4ubLRmkhUER4sa1v80hxGYO5sKOoMnhGwHmapyzhC7nQgd/BpYCAXsFvZWO
CvJcYpCiw5JfIvua9gvbBc3jHtfu1/Ct22vClEzkAu0DJso0dYpzqz0SE1ZxrFLg
iDXrsmJPpPDqCxQl66jY5NgMDmaUTpTzNES28mC/K1wzlMHQFAKvR8BdFG5d9Usa
CSbyZ8QVt8dCo+r6eu6GAFpSS0bg0/yTwlpsdDTIbzXklA45P8TjW40FCCRQcSuh
keLDFnJPUTcfck07+XKI
=h0cu
-----END PGP SIGNATURE-----
Merge tag 'drivers_soc_for_5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone into arm/drivers
soc: ti: couple of non critical fixes for v5.1
- Fix the Clang warning for enum in Navigator dma
- Simplify code in ti_sci with DEFINE_SHOW_ATTRIBUTE macro
* tag 'drivers_soc_for_5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone:
soc: ti: knav_dma: Use proper enum in pktdma_init_chan
firmware: ti_sci: Change to use DEFINE_SHOW_ATTRIBUTE macro
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
for 5.1, please pull the following:
- Stefan updates the BCM2835 SoC driver with downstream properties and
uses that to implement a reboot notifier to tell the VC4 firmware when
Linux on the ARM CPU is rebooting
- Eric adds a proper power domain driver for the BCM283x SoCs and
updates a bunch of drivers to have a better and clearer Device Tree
definition to support power domains/breaking up of functionality. This
requires converting the existing watchdog driver into a MFD and then
breaking up the functionality into separate drivers and finally
updating the DTS files to leverage the power domains information.
- Wei provides a fix for making a symbol static
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEm+Rq3+YGJdiR9yuFh9CWnEQHBwQFAlxV0IYACgkQh9CWnEQH
BwQIHA//TL12EfHws6C64EKspqsg9NE5/+K3HRRJbgwtuBQ/n6oYBMyJx+6x6Nwc
7QjuCkZ/VWKxy0Fn+ToGnX0JgrQL5kND3Cm0d8cyZ0VJ6juppizyAa1YkFplShSr
l0XlYaJo1HrB3hBd/+YbGZnLp9flbii5d3MIcy8ZoWmN7zLeHnQbHaf8jcbJC+Iw
Mal8ojk2ru0rMimMQieTiPzWwiec08wtSIYs2590rOVWFyhGIn/KmHqpG6iYjdwj
oQbr86R0jMPCb/g3SXRttxW8wFbtYdmILdkzhOaEd4JyJEwUCNDciM3E04OyE9VN
fNMc1l0zh7dfyo9bFRpgS6AAxYQVj3led+B1NGtpnjDPybVWU10gipGdgFt9UPRE
pJnS1LcPbAJ1FdbcYFU0TsiViWLZehm2cbc4rPYvqKp1Y+82FJZTYyu0GmBOUwB6
jpM5ZVvET8k3nw6ImeE3jjT3kBfF31u552+iO4RQvKHRm/GBMtyTDrFZVUwgqMFE
NEKnj3/VLSCxP3dnQImw1ro2493piZNdlBEs6mAugFUGqcb+40KOtOOpWiGMFH7h
BZN0kj128ryG/YCVKDOnZSbYRLhpxc1VcVYJ3rYJgn8mrFFmNo/fjDgaRogrJN/s
LmCiSIqsmuy8f36/IWd+aHk6ex5yskJe7x5M/7tlmz03oXg1viQ=
=t5+u
-----END PGP SIGNATURE-----
Merge tag 'arm-soc/for-5.1/drivers' of https://github.com/Broadcom/stblinux into arm/drivers
This pull request contains Broadcom ARM/ARM64/MIPS based SoCs changes
for 5.1, please pull the following:
- Stefan updates the BCM2835 SoC driver with downstream properties and
uses that to implement a reboot notifier to tell the VC4 firmware when
Linux on the ARM CPU is rebooting
- Eric adds a proper power domain driver for the BCM283x SoCs and
updates a bunch of drivers to have a better and clearer Device Tree
definition to support power domains/breaking up of functionality. This
requires converting the existing watchdog driver into a MFD and then
breaking up the functionality into separate drivers and finally
updating the DTS files to leverage the power domains information.
- Wei provides a fix for making a symbol static
* tag 'arm-soc/for-5.1/drivers' of https://github.com/Broadcom/stblinux:
ARM: bcm283x: Switch V3D over to using the PM driver instead of firmware.
ARM: bcm283x: Extend the WDT DT node out to cover the whole PM block. (v4)
soc: bcm: bcm2835-pm: Make local symbol static
soc: bcm: Make PM driver default for BCM2835
soc: bcm: bcm2835-pm: Add support for power domains under a new binding.
bcm2835-pm: Move bcm2835-watchdog's DT probe to an MFD.
dt-bindings: soc: Add a new binding for the BCM2835 PM node. (v4)
firmware: raspberrypi: notify VC4 firmware of a reboot
soc: bcm2835: sync firmware properties with downstream
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* Add Qualcomm RPMh power domain driver and related changes
* Fix issues with sleep/wake sets and batch API in RPMh
* Update MAINTAINERS Qualcomm entry
* Fixup RMTFS-mem sysfs and uevents
* Fix error handling in GSBI
* Add SMD-RPM compatible entry for SDM660
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJcV75tAAoJEFKiBbHx2RXV3ZcQAJ4xdmg0eVXrzu4ltl/ZbF7m
walu7pGtLF7lIXJoJZWgpzS6SAmDQAMG++pp6zP6+3t6fB8heSNVBImgo2l6fHzr
KEHoH1PFhrdZwyOhswE/5n5CZBOb4xrL+m94NufDh7Yv8h5ukC8DH3xE9PFsoh4A
GnDc6qkHByNJKuNxlKKASq6VRMqzpnys2Ibzs6G5/6UDzvnEAYj5VoHLLCjsh6r+
+bKusJPUZKujyLU85rbtpEjO1HxHiOq7TJI5FZ8dta+iXSyIc/2nM9InTgr68ATq
VN7mOtclMEiVN8uQaXN0D/FWK3JYBIY5Mvd8zYzzkE+NDj0tnZDZoLjK2VnTX9o+
nORX7vQc/JmBayLcMaBZ/ZB+i2lsg37ziFCZaZiP9GYR1DAvm3yLfaxbWmkVKbGq
lhf/dR7qyXKjIP8rPO2qp4sCKww2RbkDa2p+xnQ2/psjvpgkmy4lcfIhw5HWonQR
eJ1UgoLsdQf/Xi6cKKmuzbdQsmZGr95sTHh06Gw1yeMRGuoXTHSNYx5epLdwJmD5
OWcIwh+sfZdmKUhMB/895EFpRuK/+L07N+n48DYaaU4CHXcowp80Ng5V6FnEnEWm
tI9oKt3N2kAYQAPlgpb3azTtAmB+yAcaYGrNQXzd7nYLnLma40qCR0Nx8bMXCjeq
sgRdF06ATCQDbBruztw3
=CcrU
-----END PGP SIGNATURE-----
Merge tag 'qcom-drivers-for-5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux into arm/drivers
Qualcomm ARM Based Driver Updates for v5.1
* Add Qualcomm RPMh power domain driver and related changes
* Fix issues with sleep/wake sets and batch API in RPMh
* Update MAINTAINERS Qualcomm entry
* Fixup RMTFS-mem sysfs and uevents
* Fix error handling in GSBI
* Add SMD-RPM compatible entry for SDM660
* tag 'qcom-drivers-for-5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux:
soc: qcom: smd-rpm: Add sdm660 compatible
soc: qcom: gsbi: Fix error handling in gsbi_probe()
soc: qcom: rpmh: Avoid accessing freed memory from batch API
drivers: qcom: rpmh: avoid sending sleep/wake sets immediately
soc: qcom: rmtfs-mem: Make sysfs attributes world-readable
soc: qcom: rmtfs-mem: Add class to enable uevents
soc: qcom: update config dependencies for QCOM_RPMPD
soc: qcom: rpmpd: Drop family A RPM dependency
MAINTAINERS: update list of qcom drivers
soc: qcom: rpmhpd: Mark mx as a parent for cx
soc: qcom: rpmhpd: Add RPMh power domain driver
soc: qcom: rpmpd: Add support for get/set performance state
soc: qcom: rpmpd: Add a Power domain driver to model corners
dt-bindings: power: Add qcom rpm power domain driver bindings
OPP: Add support for parsing the 'opp-level' property
dt-bindings: opp: Introduce opp-level bindings
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This contains a couple of miscellaneous fixes for minor issues and a
largish rework of the PMC driver to make it work on systems where the
PMC has been locked down and can only be accessed from secure firmware.
-----BEGIN PGP SIGNATURE-----
iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAlxdmF8THHRyZWRpbmdA
bnZpZGlhLmNvbQAKCRDdI6zXfz6zodlTD/44v+tiZRB+6P6XafKvwBEruq1INqab
5vTj7OOhmL2WPonruTUaze6bWqpV84gaqorVfR8JYvWL6nT+JGVvEnQwBTgwMqlL
PYmPc93PlvieBJMQGmKjLYypLWFfaihjIkdAgosVKkFhHcP4SqKBhtq1Gs+1nFaC
6uWdz+9S+ad/JPiYnoBHC6DoeXBDM8izpRLlsqPPAZkfzAcH7vTXbKoXN+VOeB/l
wvD5wlG90LwcoSoFlQsBEcEdklBGPO90ItJFJiqnjrHsxoHVzYSRfdy72/hXuTsp
5p/L5OWjcMG9DP5cF0HbmWetqEgTOLoRseyXuZZN3O3XHdkj37IRXEbSugHI5pi4
Oybm01TPvhyprNXjCDM6vxf3f0mlh3sPoHXRyM8KJuMkg5vb1L43Vs9BYCkKUMaO
I/nR5EUXb3R5/PvumL6LEiZVvjtpPWXL4swmbRbKoKd2K9kgFxGoYYbbbdDVZNim
KWGbo9LWL2BHMXi0exN+8XWE3lpdKQJWlWADpXhbZltEcq6oJCWqPe9glrAXl877
jd552NrRL9wiZikI+iwWpIMEkX4DLdxlZLw5r5kjInqsyo6H/N9kpRZMvDVo3VIi
d1o0gc2Y1wJbhkE1TXSYhZG9nbqKFPvT7V5aBbI6rYdNA3AgxwY4Rq65Ex0a3KGV
WFWxanWAqhn9Vw==
=C9+u
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-5.1-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/drivers
soc/tegra: Changes for v5.1-rc1
This contains a couple of miscellaneous fixes for minor issues and a
largish rework of the PMC driver to make it work on systems where the
PMC has been locked down and can only be accessed from secure firmware.
* tag 'tegra-for-5.1-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
soc/tegra: pmc: Support systems where PMC is marked secure
soc/tegra: pmc: Explicitly initialize all fields
soc/tegra: pmc: Make alignment consistent
soc/tegra: pmc: Pass struct tegra_pmc * where possible
soc/tegra: pmc: Make tegra_powergate_is_powered() a local function
soc/tegra: pmc: Add missing kerneldoc
soc/tegra: pmc: Sort includes alphabetically
soc/tegra: pmc: Use TEGRA186_ prefix for GPIO names
soc/tegra: fuse: Fix typo in tegra210_init_speedo_data
soc/tegra: fuse: Fix illegal free of IO base address
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Do not get GPCv2 driver depend on SOC_IMX8MQ since the driver is
going to be used on more SoCs than just i.MX8MQ.
- Add power domain information into SCU bindings document.
- Add support of start/stop a CPU into imx firmware driver.
- Support multiple address ranges per child node for imx-weim bus
driver.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJcYi+0AAoJEFBXWFqHsHzOtdYH/jX/y0r7OvX5GVSrrnW8PlkC
3i2EQ0sGOxWOMqBegZIpFe9W7IddAetMf6praPGz/efHPnoVC4jO8Yqe4TZwQXLB
vOxoN4G7NH9Al9RX11ce96kd/tUgVK/JHuQJ9fu+ogrprLpAS3w1sbIkidOMSF3M
/5VrmFCxUNOPwTHRnyjw8QsyypKnKEBu0jA8sgyUmg99ii6rqQ5OKh1vgKf62J0f
1BbJLalI0CxGcYVQxYBy2ML37+XxCcN9Vl8FxiI4tVRtZox8/YkU9V5vEgVWN2fS
ZWfgT9w7cJxI5x8Em8Cxe4zcyVdbn5w26lXc6WbXazIncm206Ps+DIeHkQI9jPA=
=8C2m
-----END PGP SIGNATURE-----
Merge tag 'imx-drivers-5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/drivers
i.MX drivers update for 5.1:
- Do not get GPCv2 driver depend on SOC_IMX8MQ since the driver is
going to be used on more SoCs than just i.MX8MQ.
- Add power domain information into SCU bindings document.
- Add support of start/stop a CPU into imx firmware driver.
- Support multiple address ranges per child node for imx-weim bus
driver.
* tag 'imx-drivers-5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
firmware: imx: Add support to start/stop a CPU
soc: imx: Break dependency on SOC_IMX8MQ for GPCv2
firmware: imx: scu-pd: add fallback compatible string support
dt-bindings: fsl: scu: add imx8qm scu power domain support
dt-bindings: fsl: scu: add fallback compatible string for power domain
bus: imx-weim: guard against timing configuration conflicts
bus: imx-weim: support multiple address ranges per child node
dt-bindings: bus: imx-weim: document multiple address ranges per child node
soc: imx: gpcv2: handle reset clocks
soc: imx: gpcv2: handle additional power-down bits in handshake register
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Make the code a little bit clearer (and use less gotos)
by consolidating some of the initialization.
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Currently the data structure for llc-slice is devm allocated and
stored as a global but never cleared if the probe function fails.
This is a problem because devm managed memory gets freed on probe
failure the API functions could access the pointer after it has been
freed.
Initialize the drv_data pointer to an error and reset it to an error
on probe failure or device destroy and add protection to the API
functions to make sure the memory doesn't get accessed.
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
The zynqmp-genpd driver communicates the usage requirements
for logical power domains / devices to the platform FW.
FW is responsible for choosing appropriate power states,
taking Linux' usage information into account.
Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Signed-off-by: Jolly Shah <jolly.shah@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Add ZynqMP PM driver. PM driver provides power management
support for ZynqMP.
Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Signed-off-by: Jolly Shah <jolly.shah@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Add support for the axg and g12a SoC family in amlogic clk measure
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
[khilman: squashed some fixups from Martin]
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
When probe fails, a platforn_device is still associated to the node,
but dev_get_drvdata() returns NULL.
Handle this case by returning a consistent error.
Fixes: d4983983d9 ("soc: amlogic: add meson-canvas driver")
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Maxime Jourdan <mjourdan@baylibre.com>
[khilman: fixed minor typo in comment ]
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
The call to of_parse_phandle returns a node pointer with refcount
incremented thus it must be explicitly decremented here after the last
usage.
Signed-off-by: Wen Yang <yellowriver2010@hotmail.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Fixes: d4983983d9 ("soc: amlogic: add meson-canvas driver")
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
The dpaa2_io_down(priv->io) call frees "priv->io" so I've shifted the
code around a little bit to avoid the use after free.
Fixes: 991e873223 ("soc: fsl: dpio: use a cpumask to identify which cpus are unused")
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
Add the compatible for the RPM in SDM660, so that rpm resources can be
made available.
Signed-off-by: Craig Tatlor <ctatlor97@gmail.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
If of_platform_populate() fails in gsbi_probe(),
gsbi->hclk is left undisabled.
Found by Linux Driver Verification project (linuxtesting.org).
Signed-off-by: Alexey Khoroshilov <khoroshilov@ispras.ru>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Using the batch API from the interconnect driver sometimes leads to a
KASAN error due to an access to freed memory. This is easier to trigger
with threadirqs on the kernel commandline.
BUG: KASAN: use-after-free in rpmh_tx_done+0x114/0x12c
Read of size 1 at addr fffffff51414ad84 by task irq/110-apps_rs/57
CPU: 0 PID: 57 Comm: irq/110-apps_rs Tainted: G W 4.19.10 #72
Call trace:
dump_backtrace+0x0/0x2f8
show_stack+0x20/0x2c
__dump_stack+0x20/0x28
dump_stack+0xcc/0x10c
print_address_description+0x74/0x240
kasan_report+0x250/0x26c
__asan_report_load1_noabort+0x20/0x2c
rpmh_tx_done+0x114/0x12c
tcs_tx_done+0x450/0x768
irq_forced_thread_fn+0x58/0x9c
irq_thread+0x120/0x1dc
kthread+0x248/0x260
ret_from_fork+0x10/0x18
Allocated by task 385:
kasan_kmalloc+0xac/0x148
__kmalloc+0x170/0x1e4
rpmh_write_batch+0x174/0x540
qcom_icc_set+0x8dc/0x9ac
icc_set+0x288/0x2e8
a6xx_gmu_stop+0x320/0x3c0
a6xx_pm_suspend+0x108/0x124
adreno_suspend+0x50/0x60
pm_generic_runtime_suspend+0x60/0x78
__rpm_callback+0x214/0x32c
rpm_callback+0x54/0x184
rpm_suspend+0x3f8/0xa90
pm_runtime_work+0xb4/0x178
process_one_work+0x544/0xbc0
worker_thread+0x514/0x7d0
kthread+0x248/0x260
ret_from_fork+0x10/0x18
Freed by task 385:
__kasan_slab_free+0x12c/0x1e0
kasan_slab_free+0x10/0x1c
kfree+0x134/0x588
rpmh_write_batch+0x49c/0x540
qcom_icc_set+0x8dc/0x9ac
icc_set+0x288/0x2e8
a6xx_gmu_stop+0x320/0x3c0
a6xx_pm_suspend+0x108/0x124
adreno_suspend+0x50/0x60
cr50_spi spi5.0: SPI transfer timed out
pm_generic_runtime_suspend+0x60/0x78
__rpm_callback+0x214/0x32c
rpm_callback+0x54/0x184
rpm_suspend+0x3f8/0xa90
pm_runtime_work+0xb4/0x178
process_one_work+0x544/0xbc0
worker_thread+0x514/0x7d0
kthread+0x248/0x260
ret_from_fork+0x10/0x18
The buggy address belongs to the object at fffffff51414ac80
which belongs to the cache kmalloc-512 of size 512
The buggy address is located 260 bytes inside of
512-byte region [fffffff51414ac80, fffffff51414ae80)
The buggy address belongs to the page:
page:ffffffbfd4505200 count:1 mapcount:0 mapping:fffffff51e00c680 index:0x0 compound_mapcount: 0
flags: 0x4000000000008100(slab|head)
raw: 4000000000008100 ffffffbfd4529008 ffffffbfd44f9208 fffffff51e00c680
raw: 0000000000000000 0000000000200020 00000001ffffffff 0000000000000000
page dumped because: kasan: bad access detected
Memory state around the buggy address:
fffffff51414ac80: fb fb fb fb fb fb fb fb fb fb fb fb fb fb fb fb
fffffff51414ad00: fb fb fb fb fb fb fb fb fb fb fb fb fb fb fb fb
>fffffff51414ad80: fb fb fb fb fb fb fb fb fb fb fb fb fb fb fb fb
^
fffffff51414ae00: fb fb fb fb fb fb fb fb fb fb fb fb fb fb fb fb
fffffff51414ae80: fc fc fc fc fc fc fc fc fc fc fc fc fc fc fc fc
The batch API sets the same completion for each rpmh message that's sent
and then loops through all the messages and waits for that single
completion declared on the stack to be completed before returning from
the function and freeing the message structures. Unfortunately, some
messages may still be in process and 'stuck' in the TCS. At some later
point, the tcs_tx_done() interrupt will run and try to process messages
that have already been freed at the end of rpmh_write_batch(). This will
in turn access the 'needs_free' member of the rpmh_request structure and
cause KASAN to complain. Furthermore, if there's a message that's
completed in rpmh_tx_done() and freed immediately after the complete()
call is made we'll be racing with potentially freed memory when
accessing the 'needs_free' member:
CPU0 CPU1
---- ----
rpmh_tx_done()
complete(&compl)
wait_for_completion(&compl)
kfree(rpm_msg)
if (rpm_msg->needs_free)
<KASAN warning splat>
Let's fix this by allocating a chunk of completions for each message and
waiting for all of them to be completed before returning from the batch
API. Alternatively, we could wait for the last message in the batch, but
that may be a more complicated change because it looks like
tcs_tx_done() just iterates through the indices of the queue and
completes each message instead of tracking the last inserted message and
completing that first.
Fixes: c8790cb6da ("drivers: qcom: rpmh: add support for batch RPMH request")
Cc: Lina Iyer <ilina@codeaurora.org>
Cc: "Raju P.L.S.S.S.N" <rplsssn@codeaurora.org>
Cc: Matthias Kaehlcke <mka@chromium.org>
Cc: Evan Green <evgreen@chromium.org>
Cc: stable@vger.kernel.org
Reviewed-by: Lina Iyer <ilina@codeaurora.org>
Reviewed-by: Evan Green <evgreen@chromium.org>
Signed-off-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Fix the redundant call being made to send the sleep and wake requests
immediately to the controller.
As per the patch [1], the sleep and wake request votes are cached in
rpmh controller and sent during rpmh_flush(). These requests needs to be
sent only during entry of deeper system low power modes or suspend.
[1] https://patchwork.kernel.org/patch/10477533/
Reviewed-by: Lina Iyer <ilina@codeaurora.org>
Reviewed-by: Evan Green <evgreen@chromium.org>
Signed-off-by: Raju P.L.S.S.S.N <rplsssn@codeaurora.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
In order to run an rmtfs daemon as an unprivileged user, that user would
need access to the phys_addr and size sysfs attributes. Sharing these
attributes with unprivileged users doesn't really leak anything
sensitive, since if you have access to physical memory, the jig is
up anyway.
Make those attributes readable by all.
Reviewed-by: Brian Norris <briannorris@chromium.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Evan Green <evgreen@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Currently the qcom_rmtfs_memN devices are entirely invisible to the udev world.
Add a class to the rmtfs device so that uevents fire when the device is added.
Reviewed-by: Brian Norris <briannorris@chromium.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Evan Green <evgreen@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Fixes the following sparse warning:
drivers/soc/bcm/bcm2835-power.c:556:32: warning:
symbol 'bcm2835_reset_ops' was not declared. Should it be static?
Fixes: 670c672608 ("soc: bcm: bcm2835-pm: Add support for power domains under a new binding.")
Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com>
Acked-by: Scott Branden <scott.branden@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
DPIO driver
- Clean up the remove path in the dpio driver so that successive
bind/unbind commands behave properly
- Add the ability to automatically create a device link between a
consumer device on the fsl-mc bus and a supplier one
- Add prefetch to dpio dequeue to improve performance
- Update the type of dpio APIs to align with buffer pool id register
field
guts driver
- Prevent allocation failure by reuse the machine type data from device
tree directly
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEhb3UXAyxp6UQ0v6khtxQDvusFVQFAlw5G5IACgkQhtxQDvus
FVQvaQ//cjbBukwMXT5KxcXDT9vwxnSgU0q2kQ82K0McuVJ2oxDEGiTNsvR+abE8
PsvZLcQEAw/FWFGD4ZksXoBlhGZ9KCvO1UQ7v+RgljRc9SiCW08OjOr1bO3dyAte
W5sCvnmIp3mVdrsvUI3n02wHXZvYoqJhwu40NiyDaXFWdgP83TvLIbNvuqE2Sew/
PF970qaqdHMOS2ce6Hqlk0cOzRI72oiRt1vNCTrCYk5le7kEgN7EwV5+vJUpMhMc
FkJruRpElNh5b74q7MSHDDINR7Sp+YRqvsmK08aezhimQRyLPKWoPVWvK/3SiQsT
KZkt9ETwVnEccffmuIZo62gCWMoeg1aZOY4eIEPeyRsd3YhlFYeaSKIl9GNy6IKX
H6yoBKaoK6Dmms1xe2DruafM21jCAjrT/iQTzkC6q/wO9hC9/2nJdpEioemc3/YY
LbQNM2z8zG++5pykmvOhUQiLZUxSKIlgcU4wdAIt8blzQDFopqZMBpurMIy5YfiO
R0Y0LxmgPzEnbgFyB68gzDclQZsa3OsWkaQeXsiaqdT8VFVGVmjbaVt3HXMkR0qz
151C8Gbrb5k/HxN6/QHtGbs0Q2Zg0f5DPKQln9d4zpaew90CrCZzO2EdTS1bnpi4
mCHtjh7PU6WjbRFuWMiXFQnAegiJ+8IjL3uYhJxTAflVVdTNcec=
=0PWU
-----END PGP SIGNATURE-----
Merge tag 'soc-fsl-next-v5.1-2' of git://git.kernel.org/pub/scm/linux/kernel/git/leo/linux into arm/drivers
NXP/FSL SoC driver updates for v5.1
DPIO driver
- Clean up the remove path in the dpio driver so that successive
bind/unbind commands behave properly
- Add the ability to automatically create a device link between a
consumer device on the fsl-mc bus and a supplier one
- Add prefetch to dpio dequeue to improve performance
- Update the type of dpio APIs to align with buffer pool id register
field
guts driver
- Prevent allocation failure by reuse the machine type data from device
tree directly
* tag 'soc-fsl-next-v5.1-2' of git://git.kernel.org/pub/scm/linux/kernel/git/leo/linux:
soc: fsl: guts: reuse machine name from device tree
soc: fsl: dpio: Change bpid type to u16
soc: fsl: dpio: Add prefetch instruction
bus: fsl-mc: automatically add a device_link on fsl_mc_[portal,object]_allocate
soc: fsl: dpio: add a device_link at dpaa2_io_service_register
soc: fsl: dpio: store a backpointer to the device backing the dpaa2_io
soc: fsl: dpio: keep a per dpio device MC portal
soc: fsl: dpio: perform DPIO Reset on Probe
soc: fsl: dpio: use a cpumask to identify which cpus are unused
soc: fsl: dpio: cleanup the cpu array on dpaa2_io_down
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Clang warns when one enumerated type is implicitly converted to another:
drivers/soc/ti/knav_dma.c:601:20: warning: implicit conversion from
enumeration type 'enum dma_data_direction' to different enumeration type
'enum dma_transfer_direction' [-Wenum-conversion]
chan->direction = DMA_NONE;
~ ^~~~~~~~
1 warning generated.
While DMA_NONE and DMA_TRANS_NONE have different values, there is no
functional change because direction is never checked against DMA_NONE,
only against DMA_MEM_TO_DEV and DMA_DEV_TO_MEM.
Signed-off-by: Nathan Chancellor <natechancellor@gmail.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
On Tegra210 systems with new enough boot software, direct register
accesses to PMC register space from the non-secure world are not
allowed. Instead a monitor call may be used to read and write PMC
registers.
Add code to detect such a system by attempting to write a scratch
register and detecting if the write happened or not. If not, we switch
to doing all register accesses through the monitor call.
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
It's not strictly necessary to initialize the fields in struct
tegra_pmc_soc if they are 0/false. However, we already initialize them
explicitly even if unnecessary, so keep doing that for consistency.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Some recently added code used weird alignment and indentation. Fix these
occurrences to make them consistent with the rest of the code.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Instead of using the global pmc variable, pass around a pointer where
possible. Also, replace most occurrences of pr_*() functions by their
equivalent dev_*() functions, reusing the pmc->dev pointer.
It's not possible to get completely rid of the global variable because
some of the public API that this driver exposes still relies on it.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Now there are no more external users of tegra_powergate_is_powered(),
make this a local function.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Some of the fields in struct tegra_pmc had not been documented when they
were added. Add the missing kerneldoc.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
This will make it easier to insert new includes in the right place in
subsequent patches.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
The new prefix allows the GPIOs to be uniquely identified on a per-chip
basis, which makes it easier to distinguish Tegra186 specific GPIOs from
those of later chips such as Tegra194 which supports a very different
set of GPIOs.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Fix typo when reading SoC speedo value from fuse SoC speedo register.
Reported-by: Mark Zhang <markz@nvidia.com>
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Since commit 52a4adbaebcc ("ARM: bcm283x: Switch V3D over to using the
PM driver instead of firmware.") VC4 on BCM2835 requires the power driver.
Otherwise the driver won't probe and HDMI output stays black:
vc4_v3d 20c00000.v3d: ignoring dependency for device, assuming no driver
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Since QCOM_RPMPD is bool and it depends on QCOM_SMD_RPM
which is tristate, configurations such as arm64:allmodconfig
result in
CONFIG_QCOM_RPMPD=y
CONFIG_QCOM_SMD_RPM=m
This in turn results in
drivers/soc/qcom/rpmpd.o: In function `rpmpd_send_corner':
rpmpd.c:(.text+0x10c): undefined reference to `qcom_rpm_smd_write'
drivers/soc/qcom/rpmpd.o: In function `rpmpd_power_on':
rpmpd.c:(.text+0x3b4): undefined reference to `qcom_rpm_smd_write'
drivers/soc/qcom/rpmpd.o: In function `rpmpd_power_off':
rpmpd.c:(.text+0x520): undefined reference to `qcom_rpm_smd_write'
make: *** [vmlinux] Error 1
Fix it by making QCOM_RPMPD depend on QCOM_SMD_RPM=y
Reported-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
The MFD_QCOM_RPM is the RPM in family A, but the rpmpd driver only implements
support for SMD based devices. Drop the dependency and remove includes of the
family A headers. No functional change.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Rajendra Nayak <rnayak@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Specify the active + sleep and active-only MX power domains as
the parents of the corresponding CX power domains. This will ensure that
performance state requests on CX automatically generate equivalent requests
on MX power domains.
This is used to enforce a requirement that exists for various
hardware blocks on SDM845 that MX performance state >= CX performance
state for a given operating frequency.
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
The RPMh power domain driver aggregates the corner votes from various
consumers for the ARC resources and communicates it to RPMh.
With RPMh we use 2 different numbering space for corners, one used
by the clients to express their performance needs, and another used
to communicate to RPMh hardware.
The clients express their performance requirements using a sparse
numbering space which are mapped to meaningful levels like RET, SVS,
NOMINAL, TURBO etc which then get mapped to another number space
between 0 and 15 which is communicated to RPMh. The sparse number space,
also referred to as vlvl is mapped to the continuous number space of 0
to 15, also referred to as hlvl, using command DB.
Some power domain clients could request a performance state only while
the CPU is active, while some others could request for a certain
performance state all the time regardless of the state of the CPU.
We handle this by internally aggregating the votes from both type of
clients and then send the aggregated votes to RPMh.
There are also 3 different types of votes that are comunicated to RPMh
for every resource.
1. ACTIVE_ONLY:
This specifies the requirement for the resource when the CPU is
active
2. SLEEP:
This specifies the requirement for the resource when the CPU is
going to sleep
3. WAKE_ONLY:
This specifies the requirement for the resource when the CPU is
coming out of sleep to active state
We add data for all power domains on sdm845 SoC as part of the patch.
The driver can be extended to support other SoCs which support RPMh
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Add support for the .set_performace_state() and .opp_to_performance_state()
callbacks in the rpmpd driver.
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
The Power domains for corners just pass the performance state set by the
consumers to the RPM (Remote Power manager) which then takes care
of setting the appropriate voltage on the corresponding rails to
meet the performance needs.
We add all power domain data needed on msm8996 here. This driver can easily
be extended by adding data for other qualcomm SoCs as well.
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
By clearing all interrupt sources, not only those that
already occurred, the existing code may acknowledge by
mistake interrupts that occurred after the code checks
for them.
Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com>
Signed-off-by: Roy Pledge <roy.pledge@nxp.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
Pull networking fixes from David Miller:
1) Fix regression in multi-SKB responses to RTM_GETADDR, from Arthur
Gautier.
2) Fix ipv6 frag parsing in openvswitch, from Yi-Hung Wei.
3) Unbounded recursion in ipv4 and ipv6 GUE tunnels, from Stefano
Brivio.
4) Use after free in hns driver, from Yonglong Liu.
5) icmp6_send() needs to handle the case of NULL skb, from Eric
Dumazet.
6) Missing rcu read lock in __inet6_bind() when operating on mapped
addresses, from David Ahern.
7) Memory leak in tipc-nl_compat_publ_dump(), from Gustavo A. R. Silva.
8) Fix PHY vs r8169 module loading ordering issues, from Heiner
Kallweit.
9) Fix bridge vlan memory leak, from Ido Schimmel.
10) Dev refcount leak in AF_PACKET, from Jason Gunthorpe.
11) Infoleak in ipv6_local_error(), flow label isn't completely
initialized. From Eric Dumazet.
12) Handle mv88e6390 errata, from Andrew Lunn.
13) Making vhost/vsock CID hashing consistent, from Zha Bin.
14) Fix lack of UMH cleanup when it unexpectedly exits, from Taehee Yoo.
15) Bridge forwarding must clear skb->tstamp, from Paolo Abeni.
* git://git.kernel.org/pub/scm/linux/kernel/git/davem/net: (87 commits)
bnxt_en: Fix context memory allocation.
bnxt_en: Fix ring checking logic on 57500 chips.
mISDN: hfcsusb: Use struct_size() in kzalloc()
net: clear skb->tstamp in bridge forwarding path
net: bpfilter: disallow to remove bpfilter module while being used
net: bpfilter: restart bpfilter_umh when error occurred
net: bpfilter: use cleanup callback to release umh_info
umh: add exit routine for UMH process
isdn: i4l: isdn_tty: Fix some concurrency double-free bugs
vhost/vsock: fix vhost vsock cid hashing inconsistent
net: stmmac: Prevent RX starvation in stmmac_napi_poll()
net: stmmac: Fix the logic of checking if RX Watchdog must be enabled
net: stmmac: Check if CBS is supported before configuring
net: stmmac: dwxgmac2: Only clear interrupts that are active
net: stmmac: Fix PCI module removal leak
tools/bpf: fix bpftool map dump with bitfields
tools/bpf: test btf bitfield with >=256 struct member offset
bpf: fix bpffs bitfield pretty print
net: ethernet: mediatek: fix warning in phy_start_aneg
tcp: change txhash on SYN-data timeout
...
Since this is going to be used on more SoCs than just i.MX8MQ, make
the dependency here more generic by using ARCH_MXC instead.
Also remove the SOC_IMX7D since it is also included by the ARCH_MXC.
Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
A bigger batch than I anticipated this week, for two reasons:
- Some fallout on Davinci from board file -> DTB conversion, that also
includes a few longer-standing fixes (i.e. not recent regressions).
- drivers/reset material that has been in linux-next for a while, but
didn't get sent to us until now for a variety of reasons (maintainer out
sick, holidays, etc). There's a functional dependency in there such that
one platform (Altera's SoCFPGA) won't boot without one of the patches;
instead of reverting the patch that got merged, I looked at this set
and decided it was small enough that I'll pick it up anyway. If you
disagree I can revisit with a smaller set.
That being said, there's also a handful of the usual stuff:
- Fix for a crash on Armada 7K/8K when the kernel touches PSCI-reserved
memory
- Fix for PCIe reset on Macchiatobin (Armada 8K development board, what
this email is sent from in fact :)
- Enable a few new-merged modules for Amlogic in arm64 defconfig
- Error path fixes on Integrator
- Build fix for Renesas and Qualcomm
- Initialization fix for Renesas RZ/G2E
+ A few more fixlets.
-----BEGIN PGP SIGNATURE-----
iQJDBAABCAAtFiEElf+HevZ4QCAJmMQ+jBrnPN6EHHcFAlw7hv0PHG9sb2ZAbGl4
b20ubmV0AAoJEIwa5zzehBx3rrYP/ixwKcLu9mEW9pbTmQw9m/vAGRgah4b+prT2
KNWfphwPEfFjzEE1zNwnELEJMip3Sq0s9vEbju6VHeaUeLBfGQl7160HtLK7isHX
nnJOgz0r1jDJbXmbijbcQEYLagnxV6bwh30skCx/HjUGd/IgTAsFJ2zXtaQNob2u
QAlCp7E21eVleNnoRkU+tGys+8+JooS6QXzi3hhvqnwQAuAMRAa05C36jtYPnNcg
jpLtBcxgtngHprqxfNCNpsiAsacWL1K62B3atY77+wl0Fv25pH0q67e+YAtaXLDP
iRd79pmZ803C8guAAUantxjRWoog4wCf1o97EEMpqfeY0Q4bdUAgn3+ZCG+rYTIW
tQFm8KqYvdo29Aub6ytNnhC+VzYLCrApDkEhBKEq92J2weBvq0cnw3JmGsTeeiWX
uS6ittI6VAQOXzgZ5uOrnLFlpqgGb9BZt8aCzXzwbffApNVj6CUtuYXTE4PJNLB1
yeO7IIrCXupTnJklNUrveWjfNhs2bJ6RN2OgifDhxEZBDd8PH9JJKmRfi/mSo7u+
5O1d2UoeL6NFKDlaqvEy5mzgD2z0dA5VEcnY663khu0UxRpp8Vm1z5D+Ay/23D6W
BrF1GVafcrX374tgqKF78k+z++WRuqE7ThhHR0SQQpM9I+3CYdl6BlqghwqN2P5a
bhm5RFIK
=qjfZ
-----END PGP SIGNATURE-----
Merge tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC fixes from Olof Johansson:
"A bigger batch than I anticipated this week, for two reasons:
- Some fallout on Davinci from board file -> DTB conversion, that
also includes a few longer-standing fixes (i.e. not recent
regressions).
- drivers/reset material that has been in linux-next for a while, but
didn't get sent to us until now for a variety of reasons
(maintainer out sick, holidays, etc). There's a functional
dependency in there such that one platform (Altera's SoCFPGA) won't
boot without one of the patches; instead of reverting the patch
that got merged, I looked at this set and decided it was small
enough that I'll pick it up anyway. If you disagree I can revisit
with a smaller set.
That being said, there's also a handful of the usual stuff:
- Fix for a crash on Armada 7K/8K when the kernel touches
PSCI-reserved memory
- Fix for PCIe reset on Macchiatobin (Armada 8K development board,
what this email is sent from in fact :)
- Enable a few new-merged modules for Amlogic in arm64 defconfig
- Error path fixes on Integrator
- Build fix for Renesas and Qualcomm
- Initialization fix for Renesas RZ/G2E
.. plus a few more fixlets"
* tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (28 commits)
ARM: integrator: impd1: use struct_size() in devm_kzalloc()
qcom-scm: Include <linux/err.h> header
gpio: pl061: handle failed allocations
ARM: dts: kirkwood: Fix polarity of GPIO fan lines
arm64: dts: marvell: mcbin: fix PCIe reset signal
arm64: dts: marvell: armada-ap806: reserve PSCI area
ARM: dts: da850-lcdk: Correct the sound card name
ARM: dts: da850-lcdk: Correct the audio codec regulators
ARM: dts: da850-evm: Correct the sound card name
ARM: dts: da850-evm: Correct the audio codec regulators
ARM: davinci: omapl138-hawk: fix label names in GPIO lookup entries
ARM: davinci: dm644x-evm: fix label names in GPIO lookup entries
ARM: davinci: dm355-evm: fix label names in GPIO lookup entries
ARM: davinci: da850-evm: fix label names in GPIO lookup entries
ARM: davinci: da830-evm: fix label names in GPIO lookup entries
arm64: defconfig: enable modules for amlogic s400 sound card
reset: uniphier-glue: Add AHCI reset control support in glue layer
dt-bindings: reset: uniphier: Add AHCI core reset description
reset: uniphier-usb3: Rename to reset-uniphier-glue
dt-bindings: reset: uniphier: Replace the expression of USB3 with generic peripherals
...
Reuse the string machine from the device tree data structure instead
of duplicating the data again. This also prevents a potential memory
allocation failure that was not handled previously. Also fixes an early
put of root device node.
Reported-by: Nicholas Mc Guire <hofrat@osadl.org>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
In all QBMan registers, the buffer pool id field is two bytes long.
The low level qbman APIs reflect this, but the high level DPIO ones
use u32. Modify them in order to avoid implicit downcasts.
Signed-off-by: Ioana Radulescu <ruxandra.radulescu@nxp.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
Automatically add a device link between the actual device requesting the
dpaa2_io_service_register and the underlying dpaa2_io used. This link
will ensure that when a DPIO device, which is indirectly used by other
devices, is unbound any consumer devices will be also unbound from their
drivers.
For example, any DPNI, bound to the dpaa2-eth driver, which is using
DPIO devices will be unbound before its supplier device.
Also, add a new parameter to the dpaa2_io_service_[de]register functions
to specify the requesting device (ie the consumer).
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Reviewed-by: Horia Geanta <horia.geanta@nxp.com>
Reviewed-by: Ioana Radulescu <ruxandra.radulescu@nxp.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
In dpaa2_io_store_next(), if the current dequeue entry is not
the last, prefetch the next one as most likely it will be
requested shortly by the consumer driver.
This brings a ~3% improvement for dpaa2 ethernet driver
IP forwarding with small size frames.
Signed-off-by: Ioana Radulescu <ruxandra.radulescu@nxp.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
Add a new field in the dpaa2_io structure to hold a backpointer to the
actual DPIO device.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
At the moment, the dpio-driver allocates an MC portal at probe time and
frees it right after usage. The same thing happens on the remove path.
This behavior could lead to scenarios where an MC portal is available
for use at probing but not longer free on the remove path which could
lead to unproper unbind of resources.
Change the driver's behavior in such a way that an MC portal is
allocated at probe and kept until the DPIO device is removed. This will
ensure that at any time after a DPIO device was successfully probed, all
its dependencies will be met.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
Invoke a DPIO reset command when a DPIO device is probed. This
will ensure the QBMan portal is in the state the driver expects.
Signed-off-by: Roy Pledge <roy.pledge@nxp.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
Some power domains handled by the GPCv2 driver need to enable the clocks
for devies inside the domain, so that the reset propagation and proper
power-up sequencing happens. Handle them in the same way as on GPCv1.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Some of the i.MX8MQ domains have an additional control bit in the PU
handshake (HSK) register. Documentation about this bit is a bit sparse
at the moment, but it seems that it controls a power-down request to
the AMBA domain bridge (ADB-400) attached to those domains.
As the documentation doesn't desribe the usage of this bit yet, handle
it in the same way as done in the ATF implementation.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This provides a free software alternative to raspberrypi-power.c's
firmware calls to manage power domains. It also exposes a reset line,
where previously the vc4 driver had to try to force power off the
domain in order to trigger a reset.
Signed-off-by: Eric Anholt <eric@anholt.net>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Stefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
The current implementation of the dpio driver uses a static next_cpu
variable to keep track of the index of the next cpu available. This
approach does not handle well unbinding and binding dpio devices in a
random order. For example, unbinding a dpio and then binding it again
with the driver, will generate the below error:
$ echo dpio.5 > /sys/bus/fsl-mc/drivers/fsl_mc_dpio/unbind
$ echo dpio.5 > /sys/bus/fsl-mc/drivers/fsl_mc_dpio/bind
[ 103.946380] fsl_mc_dpio dpio.5: probe failed. Number of DPIOs exceeds
NR_CPUS.
[ 103.955157] fsl_mc_dpio dpio.5: fsl_mc_driver_probe failed: -34
-bash: echo: write error: No such device
Fix this error by keeping a global cpumask of unused cpus that will be
updated at every dpaa2_dpio_[probe,remove].
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
The dpio_by_cpu array should not contain a reference to a freed dpaa2_io
object. This patch adds the necessary cleanup in dpaa2_io_down.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
We already need to zero out memory for dma_alloc_coherent(), as such
using dma_zalloc_coherent() is superflous. Phase it out.
This change was generated with the following Coccinelle SmPL patch:
@ replace_dma_zalloc_coherent @
expression dev, size, data, handle, flags;
@@
-dma_zalloc_coherent(dev, size, handle, flags)
+dma_alloc_coherent(dev, size, handle, flags)
Suggested-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Luis Chamberlain <mcgrof@kernel.org>
[hch: re-ran the script on the latest tree]
Signed-off-by: Christoph Hellwig <hch@lst.de>
The workaround for the wrong hierarchy of the 3DG-{A,B} power domains on
RZ/G2E ES1.0 corrected the parent domains. However, the 3DG-{A,B} power
domains were still initialized and powered in the wrong order, causing
3DG operation to fail.
Fix this by changing the order in the table at runtime, when running on
an affected SoC.
This work is based on the work done by Geert for R-Car E3.
Fixes: f37d211c68 ("soc: renesas: rcar-sysc: Add r8a774c0 support")
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
A number of Kconfig options have become available now to random ARM
platforms outside of ARCH_MULTIPLATFORM, which now causes Kconfig
warnings, and other build errors when those select options that
lack additional dependencies, e.g.:
WARNING: unmet direct dependencies detected for HAVE_ARM_ARCH_TIMER
Depends on [n]: CPU_V7 [=n]
Selected by [y]:
- ARCH_RCAR_GEN2 [=y] && SOC_RENESAS [=y]
- ARCH_R8A73A4 [=y] && SOC_RENESAS [=y] && ARM [=y]
WARNING: unmet direct dependencies detected for SYS_SUPPORTS_EM_STI
Depends on [n]: GENERIC_CLOCKEVENTS [=n]
Selected by [y]:
- ARCH_EMEV2 [=y] && SOC_RENESAS [=y] && ARM [=y]
Put the old dependency on ARCH_RENESAS back for the moment to restore
the previous behavior.
Fixes: 062887bf5e ("ARM: shmobile: Move SoC Kconfig symbols to drivers/soc/renesas/")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Currently there are some issues with the ucc_of_parse_tdm function:
1, a possible null pointer dereference in ucc_of_parse_tdm,
detected by the semantic patch deref_null.cocci,
with the following warning:
drivers/soc/fsl/qe/qe_tdm.c:177:21-24: ERROR: pdev is NULL but dereferenced.
2, dev gets modified, so in any case that devm_iounmap() will fail
even when the new pdev is valid, because the iomap was done with a
different pdev.
3, there is no driver bind with the "fsl,t1040-qe-si" or
"fsl,t1040-qe-siram" device. So allocating resources using devm_*()
with these devices won't provide a cleanup path for these resources
when the caller fails.
This patch fixes them.
Suggested-by: Li Yang <leoyang.li@nxp.com>
Suggested-by: Christophe LEROY <christophe.leroy@c-s.fr>
Signed-off-by: Wen Yang <wen.yang99@zte.com.cn>
Reviewed-by: Peng Hao <peng.hao2@zte.com.cn>
CC: Julia Lawall <julia.lawall@lip6.fr>
CC: Zhao Qiang <qiang.zhao@nxp.com>
CC: David S. Miller <davem@davemloft.net>
CC: netdev@vger.kernel.org
CC: linuxppc-dev@lists.ozlabs.org
CC: linux-kernel@vger.kernel.org
Signed-off-by: David S. Miller <davem@davemloft.net>
Misc driver updates for platforms, many of them power related.
- Rockchip adds power domain support for rk3066 and rk3188
- Amlogic adds a power measurement driver
- Allwinner adds SRAM support for three platforms (F1C100, H5, A64 C1)
- Wakeup and ti-sysc (platform bus) fixes for OMAP/DRA7
- Broadcom fixes suspend/resume with Thumb2 kernels, and improves
stability of a handful of firmware/platform interfaces
- PXA completes their conversion to dmaengine framework
- Renesas does a bunch of PM cleanups across many platforms
- Tegra adds support for suspend/resume on T186/T194, which includes
some driver cleanups and addition of wake events
- Tegra also adds a driver for memory controller (EMC) on Tegra2
- i.MX tweaks power domain bindings, and adds support for i.MX8MQ in GPC
- Atmel adds identifiers and LPDDR2 support for a new SoC, SAM9X60
+ misc cleanups across several platforms
-----BEGIN PGP SIGNATURE-----
iQJDBAABCAAtFiEElf+HevZ4QCAJmMQ+jBrnPN6EHHcFAlwqd4APHG9sb2ZAbGl4
b20ubmV0AAoJEIwa5zzehBx3HXoP/icWJTGrbf9R6T7r0RWB3xeV8ouTPMM8YM5C
6wD4LkkjgZ16Hz/ellJ0Oug77LdnJ/ZI7jH2u0IcKRXr4sL94hEo11jAJLLtCHpt
rGiItMuEDMhNFcAK/yREI6FtRqjNZhsTuR+gkcjzMnGLCaTA1+RwQNdugH0hh0fF
z8C6tjN+fRIeS0wInBzR/402GcgRU0DIJrr0kmklS0u6tc2QW24ffv8ymvMiVO46
l8VemmdxVZsBU2iehraPy6mSXsyTm04dNTuHnrIw3nE3kTJF7jMvpqI/euU1eZl6
6EzrrCym8nC66IlqhHMBB427PK8sRqJTqwqSXO6e90AqiK4H2bMovXKiob/Psq+e
yWqPOrAr8YBLqTgauvCzVm/xneT5rZM4N0BYhOk172Uk52qenNWDnqHj41A4CMSM
/id3L1cHs5nf2qwuMncXvLX+Y2vO2n6cMmF8cDRLu592OBZRcVepUM0xoaSdZScv
LJsP3jH3RRcY3L2rf7bY2Mitp48bDgZMZdw/viSHsFS+SVr225uNFALFDQ9kNEoZ
2d9i9IvC7xOMhdVAX03U7DuRcpKXBPcv+arA57PiVvR4M1HeU7VvD4ayP5loVX2J
GoDIKiPQitAsOKzyPyZ5Jw04lxio3xZbrbmmVzEH8uKWIV5omdiMnSrFsEfduRCT
rU+Mqe2j
=yEX2
-----END PGP SIGNATURE-----
Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC driver updates from Olof Johansson:
"Misc driver updates for platforms, many of them power related.
- Rockchip adds power domain support for rk3066 and rk3188
- Amlogic adds a power measurement driver
- Allwinner adds SRAM support for three platforms (F1C100, H5, A64
C1)
- Wakeup and ti-sysc (platform bus) fixes for OMAP/DRA7
- Broadcom fixes suspend/resume with Thumb2 kernels, and improves
stability of a handful of firmware/platform interfaces
- PXA completes their conversion to dmaengine framework
- Renesas does a bunch of PM cleanups across many platforms
- Tegra adds support for suspend/resume on T186/T194, which includes
some driver cleanups and addition of wake events
- Tegra also adds a driver for memory controller (EMC) on Tegra2
- i.MX tweaks power domain bindings, and adds support for i.MX8MQ in
GPC
- Atmel adds identifiers and LPDDR2 support for a new SoC, SAM9X60
and misc cleanups across several platforms"
* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (73 commits)
ARM: at91: add support in soc driver for new SAM9X60
ARM: at91: add support in soc driver for LPDDR2 SiP
memory: omap-gpmc: Use of_node_name_eq for node name comparisons
bus: ti-sysc: Check for no-reset and no-idle flags at the child level
ARM: OMAP2+: Check also the first dts child for hwmod flags
soc: amlogic: meson-clk-measure: Add missing REGMAP_MMIO dependency
soc: imx: gpc: Increase GPC_CLK_MAX to 7
soc: renesas: rcar-sysc: Fix power domain control after system resume
soc: renesas: rcar-sysc: Merge PM Domain registration and linking
soc: renesas: rcar-sysc: Remove rcar_sysc_power_{down,up}() helpers
soc: renesas: r8a77990-sysc: Fix initialization order of 3DG-{A,B}
dt-bindings: sram: sunxi: Add compatible for the A64 SRAM C1
dt-bindings: sram: sunxi: Add bindings for the H5 with SRAM C1
dt-bindings: sram: Add Allwinner suniv F1C100s
soc: sunxi: sram: Add support for the H5 SoC system control
soc: sunxi: sram: Enable EMAC clock access for H3 variant
soc: imx: gpcv2: add support for i.MX8MQ SoC
soc: imx: gpcv2: move register access table to domain data
soc: imx: gpcv2: prefix i.MX7 specific defines
dmaengine: pxa: make the filter function internal
...
SoC updates, mostly refactorings and cleanups of old legacy platforms,
but also a few more things:
New SoC support this release:
- NXP/Freescale i.MX7ULP (1x Cortex-A7, Cortex-M4, graphics, etc)
- Allwinner F1C100, older platform with an ARM926-EJS (ARMv5) core
Cleanups of various platforms:
- OMAP1 ams-delta does some GPIO cleanups
- Davinci removes of at24 platform data
- Samsung cleans up old wakeup, PM debug and secondary core boot code
- Renesas moves around config options and PM code to drivers/soc for
sharing with 64-bit and more consistency
- i.MX, Broadcom and SoCFPGA all have tweaks to lowlevel debug console setups
- SoCFPGA adds explicit selection of ARM errata and removes some unused code
This tag also contains a few patches that I had queued up as fixes for
4.20 but didn't send in before the release.
-----BEGIN PGP SIGNATURE-----
iQJDBAABCAAtFiEElf+HevZ4QCAJmMQ+jBrnPN6EHHcFAlwqdD8PHG9sb2ZAbGl4
b20ubmV0AAoJEIwa5zzehBx3NQQP+gNhDCR01wy8EqmCuUn1nmoatnF9ViYER9yw
tlWysax29ba5DGuSKkBCRooTDUNlVIMPdb7vE74CWoDVubexab67qFVJz+uRsXC5
Gt/10STcU/i/Ga4bpkJxz47PfLHpVw1IwKUV1eoFWtLF7QQwfxiH8mr7vZj7XQo2
3K95Adf13E6iIfbHcfBgEF0CjImUiZVq2E0DWMsE0Yti0ygVkNZeRXGHAUfQm/kD
bBYOaHuuuiCXKp7dF9vzAC+iAqerudWYvxuHKPY0pU8T8hpj5P+UjGgCSeRdsLJz
30MRr3t9WhPKvUYDVdIwsE5o1y1S2ZzO1FrTeRiJ8pem8PTliljXE3bIeTvu7uct
n9lNquwvcjVutX7uYOesUmfGLGKQlCwwgg0l997OLe7/o9hzAdnptVvTciCVoanI
r0ACjazbgIHGdb5rFLb5/Kkb+IqOc0d57CHiQacri1MN5zSQ9wLCZpXH8YEdibcI
zY0DBlH2ga7Qh7rtlPi4I0gLNUG8jYclUwRbQYUKGlh0Bsv/J4abR49UC4byn2Vj
kdEO1ASaNIwMJgBgSNAIoop/JhEnO+/ECJoB/pYCvNts6W/LckbMtPVhAofTIVTz
B0pAexDPT4HW//vQ7iOmXraIeUi/HDTaT/64gWsoMnF6LntgcF79NDx4KJDXNRId
Jra+EkHq
=m7me
-----END PGP SIGNATURE-----
Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull arm SoC platform updates from Olof Johansson:
"SoC updates, mostly refactorings and cleanups of old legacy platforms,
but also a few more things:
New SoC support this release:
- NXP/Freescale i.MX7ULP (1x Cortex-A7, Cortex-M4, graphics, etc)
- Allwinner F1C100, older platform with an ARM926-EJS (ARMv5) core
Cleanups of various platforms:
- OMAP1 ams-delta does some GPIO cleanups
- Davinci removes of at24 platform data
- Samsung cleans up old wakeup, PM debug and secondary core boot code
- Renesas moves around config options and PM code to drivers/soc for
sharing with 64-bit and more consistency
- i.MX, Broadcom and SoCFPGA all have tweaks to lowlevel debug
console setups
- SoCFPGA adds explicit selection of ARM errata and removes some
unused code
This also contains a few patches that I had queued up as fixes for
4.20 but didn't send in before the release"
* tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (68 commits)
arm64: dts: renesas: draak: Fix CVBS input
ARM: omap2: avoid section mismatch warning
ARM: tegra: avoid section mismatch warning
ARM: ks8695: fix section mismatch warning
ARM: pxa: avoid section mismatch warning
ARM: mmp: fix pxa168_device_usb_phy use on aspenite
ARM: mmp: fix timer_init calls
ARM: OMAP1: fix USB configuration for device-only setups
ARM: OMAP1: add MMC configuration for Palm Tungsten E
ARM: imx: fix dependencies on imx7ulp
ARM: meson: select HAVE_ARM_TWD and ARM_GLOBAL_TIMER
MAINTAINERS: add drivers/soc/amlogic/ to amlogic list
ARM: imx: add initial support for imx7ulp
ARM: debug-imx: only define DEBUG_IMX_UART_PORT if needed
ARM: dts: Fix OMAP4430 SDP Ethernet startup
ARM: dts: am335x-pdu001: Fix polarity of card detection input
ARM: OMAP1: ams-delta: Fix audio permanently muted
ARM: dts: omap5: Fix dual-role mode on Super-Speed port
arm64: dts: rockchip: fix rk3399-rockpro64 regulator gpios
ARM: davinci: da850-evm: remove unnecessary include
...
Pull networking updates from David Miller:
1) New ipset extensions for matching on destination MAC addresses, from
Stefano Brivio.
2) Add ipv4 ttl and tos, plus ipv6 flow label and hop limit offloads to
nfp driver. From Stefano Brivio.
3) Implement GRO for plain UDP sockets, from Paolo Abeni.
4) Lots of work from Michał Mirosław to eliminate the VLAN_TAG_PRESENT
bit so that we could support the entire vlan_tci value.
5) Rework the IPSEC policy lookups to better optimize more usecases,
from Florian Westphal.
6) Infrastructure changes eliminating direct manipulation of SKB lists
wherever possible, and to always use the appropriate SKB list
helpers. This work is still ongoing...
7) Lots of PHY driver and state machine improvements and
simplifications, from Heiner Kallweit.
8) Various TSO deferral refinements, from Eric Dumazet.
9) Add ntuple filter support to aquantia driver, from Dmitry Bogdanov.
10) Batch dropping of XDP packets in tuntap, from Jason Wang.
11) Lots of cleanups and improvements to the r8169 driver from Heiner
Kallweit, including support for ->xmit_more. This driver has been
getting some much needed love since he started working on it.
12) Lots of new forwarding selftests from Petr Machata.
13) Enable VXLAN learning in mlxsw driver, from Ido Schimmel.
14) Packed ring support for virtio, from Tiwei Bie.
15) Add new Aquantia AQtion USB driver, from Dmitry Bezrukov.
16) Add XDP support to dpaa2-eth driver, from Ioana Ciocoi Radulescu.
17) Implement coalescing on TCP backlog queue, from Eric Dumazet.
18) Implement carrier change in tun driver, from Nicolas Dichtel.
19) Support msg_zerocopy in UDP, from Willem de Bruijn.
20) Significantly improve garbage collection of neighbor objects when
the table has many PERMANENT entries, from David Ahern.
21) Remove egdev usage from nfp and mlx5, and remove the facility
completely from the tree as it no longer has any users. From Oz
Shlomo and others.
22) Add a NETDEV_PRE_CHANGEADDR so that drivers can veto the change and
therefore abort the operation before the commit phase (which is the
NETDEV_CHANGEADDR event). From Petr Machata.
23) Add indirect call wrappers to avoid retpoline overhead, and use them
in the GRO code paths. From Paolo Abeni.
24) Add support for netlink FDB get operations, from Roopa Prabhu.
25) Support bloom filter in mlxsw driver, from Nir Dotan.
26) Add SKB extension infrastructure. This consolidates the handling of
the auxiliary SKB data used by IPSEC and bridge netfilter, and is
designed to support the needs to MPTCP which could be integrated in
the future.
27) Lots of XDP TX optimizations in mlx5 from Tariq Toukan.
* git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next: (1845 commits)
net: dccp: fix kernel crash on module load
drivers/net: appletalk/cops: remove redundant if statement and mask
bnx2x: Fix NULL pointer dereference in bnx2x_del_all_vlans() on some hw
net/net_namespace: Check the return value of register_pernet_subsys()
net/netlink_compat: Fix a missing check of nla_parse_nested
ieee802154: lowpan_header_create check must check daddr
net/mlx4_core: drop useless LIST_HEAD
mlxsw: spectrum: drop useless LIST_HEAD
net/mlx5e: drop useless LIST_HEAD
iptunnel: Set tun_flags in the iptunnel_metadata_reply from src
net/mlx5e: fix semicolon.cocci warnings
staging: octeon: fix build failure with XFRM enabled
net: Revert recent Spectre-v1 patches.
can: af_can: Fix Spectre v1 vulnerability
packet: validate address length if non-zero
nfc: af_nfc: Fix Spectre v1 vulnerability
phonet: af_phonet: Fix Spectre v1 vulnerability
net: core: Fix Spectre v1 vulnerability
net: minor cleanup in skb_ext_add()
net: drop the unused helper skb_ext_get()
...
Add FQ (Frame Queue) and BP (Buffer Pool) query APIs that
users of QBMan can invoke to see the status of the queues
and pools that they are using.
Signed-off-by: Roy Pledge <roy.pledge@nxp.com>
Signed-off-by: Ioana Radulescu <ruxandra.radulescu@nxp.com>
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
When CONFIG_SMP is disabled, the tegra clk driver now fails to build:
drivers/clk/tegra/clk-tegra30.c: In function ‘tegra30_cpu_rail_off_ready’:
drivers/clk/tegra/clk-tegra30.c:1151:2: error: implicit declaration of function ‘tegra_pmc_cpu_is_powered’ [-Werror=implicit-function-declaration]
cpu_pwr_status = tegra_pmc_cpu_is_powered(1) ||
^
Fix the above error by removing the CONFIG_SMP ifdef around the
declaration around the PMC CPU APIs because although these are not
needed for non-SMP configurations, there is no harm in including these
for non-SMP builds either.
Fixes: 61866523ed6e ("clk: tegra30: Use Tegra CPU powergate helper function")
Reported-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
- Add new SoC IDs
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEXx9Viay1+e7J/aM4AyWl4gNJNJIFAlwRAXIACgkQAyWl4gNJ
NJIx8g//f5N6q54+SNUxi6rWGcpOaCbKX4XDCvTaPl0hxtrVJNp/gLCYp+byKaIl
9sP4VMP6GiJS63E5YdtVdJM4WAemf5GCtnPafNXjk3f75q25GaSsxbfgo+Yim746
74h+DgBbb9JF8t3Ohpb+t5qeTyyqvaN4qf9aX3lslrc6MQtXWpj/4HEsXvynIWjE
tNg+IRFq2woYZUY9LiuTzIds5vlKnx4rI77+PLcozYJ1lGWVEHiqsrVBWERcH0z6
3m5lSO1rKvjszZREJ57nrj6NtGSesbcgvW6XCIYFflSw56RNpwR2aZMOo4rD6lMx
FyUrinqvmYjs9sxI09AuQAqJAnGLDiX+NV1vhHZ+eS3pQNaLqBiZwwAIJZf05Pgj
ds0Fc6o+uFw4663ZDejxWzNZwxunvPSj0dmkA/RsE9bQaIou1PYX75UTz/eswkmb
Tfrt/9Fd5XEk4YQFvRWL1uYjuRrt3JH2CVN20c+kZs7U5rfxuHPm047+WG50M23+
Cb9V1Lmge9sNs6R+0XGu8gTJftNftkAWAYH1muG7PklgiOzO+cUg1lILpzJD2igZ
BWD/Prs2WCMbSF13AcqB57UzsQ3f1vZk/0X06JPR/nRyUGWv+58vaLfHxQ84/qZ/
CC094RDpITcGVwPELVwwWTKGSlVh4V7qnm0WzjxdoDchR5BxaP4=
=u+dH
-----END PGP SIGNATURE-----
Merge tag 'at91-4.21-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into next/drivers
AT91 SoC for 4.21:
- Add new SoC IDs
* tag 'at91-4.21-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
ARM: at91: add support in soc driver for new SAM9X60
ARM: at91: add support in soc driver for LPDDR2 SiP
Signed-off-by: Olof Johansson <olof@lixom.net>
- A series from Aisheng that improves SCU power domain bindings by
defining '#power-domain-cells' as 1, and adds i.MX8 SCU power domain
driver support on top of it.
- A series from Lucas that updates gpcv2 driver for scalability and
adds i.MX8MQ support into the driver.
- Increase gpc driver GPC_CLK_MAX definition to 7, as DISPLAY power
domain on imx6sx has 7 clocks.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJcDbkEAAoJEFBXWFqHsHzO1C4H/05Khi/tWF6xZNMw7C4Q6wf6
WIFhB73tTLxZ8W0n8gIS+Y2YKFw6+dy8J/ZpkFBpe+f6rqVsyTzUvGB+6Ii3Nomu
V2juCn8XaHfv32FfaPBCelnitcpgFrnEvXYS6u8mSEt1DSu8rK2y2yMcnrkdcurq
Jy9eAYjUrdXYGsH9uw36mco7q25I5wSnXOLzZ0SLXSqB//a9YlzPKGRmQqF0uQ3t
K8uT5PwqEBrjNAP6sTvSzMf6vSeXD5MGqrEvd/LnGp6IPwx7R+z4Y+HUw/RtTIdg
rP1hAt3PLDD7Ibk+GHH5q/M2+9fI2dn2y44JXGOlQvqdmoLVg1vCpTLEj8OioFU=
=/3Mg
-----END PGP SIGNATURE-----
Merge tag 'imx-drivers-4.21' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/drivers
i.MX drivers change for 4.21:
- A series from Aisheng that improves SCU power domain bindings by
defining '#power-domain-cells' as 1, and adds i.MX8 SCU power domain
driver support on top of it.
- A series from Lucas that updates gpcv2 driver for scalability and
adds i.MX8MQ support into the driver.
- Increase gpc driver GPC_CLK_MAX definition to 7, as DISPLAY power
domain on imx6sx has 7 clocks.
* tag 'imx-drivers-4.21' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
soc: imx: gpc: Increase GPC_CLK_MAX to 7
soc: imx: gpcv2: add support for i.MX8MQ SoC
soc: imx: gpcv2: move register access table to domain data
soc: imx: gpcv2: prefix i.MX7 specific defines
firmware: imx: add SCU power domain driver
firmware: imx: add pm svc headfile
dt-bindings: fsl: scu: update power domain binding
firmware: imx: remove resource id enums
dt-bindings: imx: add scu resource id headfile
Signed-off-by: Olof Johansson <olof@lixom.net>
the global command engine (GCE) device using the
command queue driver (cmdq).
-----BEGIN PGP SIGNATURE-----
iQJLBAABCAA1FiEEiUuSfQSYnG8EMsBltDliWyzx00MFAlwNjZQXHG1hdHRoaWFz
LmJnZ0BnbWFpbC5jb20ACgkQtDliWyzx00Ps4hAApGe/nRj5kZgmnLpMqXlWtH82
Qr1+hP8UKPtLxM5YuoY4iF75QzwzMtxMbPLyhIt5ySnorLQu2E/Lya2drsTzS+Xr
/3mHd3V5OVGwTk4KzN+tL5SSIB3MdMzWtVxfZ9iXKhJU8T0hgZKo+PTR6bjLMyj0
Fx3arobOhSuG0GnwdQhDZzECJsmblCSTYiDJeO/5o+4RWee4UI4j4uC4aFZ5X0/w
hng05kutwV+g6DCDrXJXq/jL572G0hJt4Vs3PIfXuWfpMGbAwhvGQ9KrYNAskopA
9lOrM45ZsGslpB23+zUYzEc1x9vC3BJcnKH2SXVez2fSmNtR4z/9Zpmc+/nzUKz4
Jd6bqQBHKf6mr9H5V4Y3DF3wqXva36hfFfhCM0fcy9UKy2WmCjT3R4FxmEdC/pPd
wSjOFUNrPS4m859DNn6DRJM0cOOQPUTy//d62/P7CcLg0dESaRBPdBlIW/cCdGz/
3NsGwvOIbhhTKRPRtZtvDOTjcRxq11Q68TblNnLaixr7V3Ut4tMRY6Y+UNwhbeZG
ySJbAyiV0CvvMEYAYoCkxG3FRPN4cZm9kfITgeX+uMd34PP5oDMQLVdZITwmLlkg
FxIBCVE+6qJ6v9ttu9YNOU+ryhGjLohZoHiDDuTD1rBKPU1xgX6Awtay7DH6PDs2
iDfalau2MUA4X6Gx8mM=
=FlvC
-----END PGP SIGNATURE-----
Merge tag 'v4.20-next-soc' of https://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into next/drivers
add helper functions to create and send commands to
the global command engine (GCE) device using the
command queue driver (cmdq).
* tag 'v4.20-next-soc' of https://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux:
soc: mediatek: Add Mediatek CMDQ helper
Signed-off-by: Olof Johansson <olof@lixom.net>
Those patches are all about our SRAM driver, to enable new SoCs: the
F1c100s, the H5 and the A64 C1 SRAM, that is used by the video decoding
engine.
-----BEGIN PGP SIGNATURE-----
iHUEABYIAB0WIQRcEzekXsqa64kGDp7j7w1vZxhRxQUCXAqDmQAKCRDj7w1vZxhR
xQxsAPwMd/pS6L2+mRZuBrog4P4PHSHO4cSY76YpYanjygNh6AEAm/IfGtiHaFwe
A4Mjtwmw7Rg/HmvETBlgGLE7aAHppw8=
=UHav
-----END PGP SIGNATURE-----
Merge tag 'sunxi-drivers-for-4.21' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into next/drivers
Allwinner drivers changes for 4.21
Those patches are all about our SRAM driver, to enable new SoCs: the
F1c100s, the H5 and the A64 C1 SRAM, that is used by the video decoding
engine.
* tag 'sunxi-drivers-for-4.21' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
dt-bindings: sram: sunxi: Add compatible for the A64 SRAM C1
dt-bindings: sram: sunxi: Add bindings for the H5 with SRAM C1
dt-bindings: sram: Add Allwinner suniv F1C100s
soc: sunxi: sram: Add support for the H5 SoC system control
soc: sunxi: sram: Enable EMAC clock access for H3 variant
soc: sunxi: Change to use DEFINE_SHOW_ATTRIBUTE macro
Signed-off-by: Olof Johansson <olof@lixom.net>
These changes are mostly cleanups to the PMC driver, but they also add
support for wake events on Tegra186 and Tegra194, which can be used to
wake the system from sleep. With this and the corresponding device
tree additions suspend/resume is finally working on these SoCs.
-----BEGIN PGP SIGNATURE-----
iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAlwKfqMTHHRyZWRpbmdA
bnZpZGlhLmNvbQAKCRDdI6zXfz6zoaxjD/sGuOfraz8kRxXGnFHIemloej/jMEDS
A77AYbE5wHLu8+1UHSxsFh3hCOn4kii/l4r74XODeJ4zNWkFTwb2p8YyN5jXB53U
A7xENp3UPD2l47WDq5FTzhZ9Cqb3agE4J/4HRcjbLGztlvz+NG7Y8oWV0YcWbzCv
ltvxFesiDxtm+ZGYlYIRqnyu8ucG34GTgXVTC2Y2FhinbUezFh5pMizGdmc5Nn2x
Uy2eoZZtxma+3i/5BHzvVdZ5+lZ7QKxOfqHVVIpBhf0fEu7pbNjiHuFHxYKXq/Nu
UxU4vPt+zFn3CeCQDFpNkSU/N5enypRZ0JLhvyzTt893C941/JE9AHDW03KbShk8
AqHgwCDxMOY+oRt5YVucCdJFCb/gBg2HdyG4ru2d7jrLw8tMaF7yiG3kK2pqAYu7
v8yC6DFge90JjPRlVZdwdY6/JKZIh7LuM7iYxXm1VpIfsCdrWAInEsqyiW3gu5+Z
OPWY0OctSfoAF2LPUgdPAItjjhooGPt4gzrU2sncUlvEo8kFLR8aMZ5UDcjv2xkX
nQ+caDAaPhnWD/ENI1BMWFyzRwLxIhgVtmKgJDx4DWj+KVJZ7Vslxl/1/gTXEGX+
AyQ1qql24CNUpaa/kVutY0TB/E92YKuRX9EuU4PQZfTg5R1qAzs6KV1R3C4D+t5X
Gdfes5B6zLrr6w==
=lNWz
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-4.21-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/drivers
soc/tegra: Changes for v4.21-rc1
These changes are mostly cleanups to the PMC driver, but they also add
support for wake events on Tegra186 and Tegra194, which can be used to
wake the system from sleep. With this and the corresponding device
tree additions suspend/resume is finally working on these SoCs.
* tag 'tegra-for-4.21-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
soc/tegra: pmc: Add initial Tegra194 wake events
soc/tegra: pmc: Add initial Tegra186 wake events
soc/tegra: pmc: Add wake event support
soc/tegra: pmc: Add Tegra194 support
soc/tegra: pmc: Change to use DEFINE_SHOW_ATTRIBUTE macro
soc/tegra: Don't leak device tree node reference
soc/tegra: fuse: Remove duplicated function declaration
soc/tegra: pmc: Drop locking from tegra_powergate_is_powered()
soc/tegra: pmc: Add sysfs entries for reset info
soc/tegra: pmc: Don't power-up XUSB power-domains
Signed-off-by: Olof Johansson <olof@lixom.net>
Add detection of new SAM9X60 by this soc.c driver.
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
[nicolas.ferre@microchip.com: split patch]
Signed-off-by: Sandeep Sheriker Mallikarjun <sandeepsheriker.mallikarjun@microchip.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Add some more SiP components to be detected by this soc.c driver.
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
This patchs adds a missing dependency on REGMAP_MMIO.
This cause the following build failure on SPARC:
drivers/soc/amlogic/meson-clk-measure.o: In function `meson_msr_probe':
meson-clk-measure.c:(.text+0xc4): undefined reference to `__devm_regmap_init_mmio_clk'
Signed-off-by: Corentin Labbe <clabbe@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
The DISPLAY power domain on imx6sx has 7 clocks.
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
To control power to a power domain, the System Controller (SYSC) needs
the corresponding interrupt source to be enabled, but masked, to prevent
the CPU from receiving it.
Currently this is handled in the driver's probe() routine, and set up
for every domain present, even if it will not be controlled directly by
SYSC (CPU domains are powered through the APMU on R-Car Gen2 and later).
On R-Car Gen3, PSCI powers down the SoC during system suspend, thus
losing any configured interrupt state. Hence after system resume, power
domains not controlled through the APMU (e.g. A3IR, A3VC, A3VP) fail to
power up.
Fix this by replacing the global interrupt setup in the probe() routine
by a domain-specific interrupt setup in rcar_sysc_power(), where the
domain's power is actually controlled. This brings the code more in
line with the flowchart in the Hardware User's Manual.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Commit 977d5ba450 ("soc: renesas: rcar-sysc: Make PM domain
initialization more robust") split PM Domain registration and the
linking of children to their parents, to accommodate PM Domain tables
that list child domains before their parents.
However, this failed to realize that parent power domains must be
powered up before their children anyway, and that this thus must be
reflected by the order in the PM Domain tables.
Revert the split, as it did not help anyway.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Until commit 7e8a50df26 ("soc: renesas: rcar-sysc: Drop legacy
handling"), the rcar_sysc_power_{down,up}() helpers were public, as they
were called by the legacy (pre-DT) CPU power management code on R-Car H1
and R-Car Gen2 before.
As they are just one-line wrappers around rcar_sysc_power(), it makes
sense to just remove them.
This also avoids a bool/helper/bool conversion in rcar_sysc_power_cpu(),
where a bool is checked to call one of two helper functions, which
just call rcar_sysc_power() with hardcoded boolean values again.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The workaround for the wrong hierarchy of the 3DG-{A,B} power
domains on R-Car E3 ES1.0 corrected the parent domains.
However, the 3DG-{A,B} power domains were still initialized and powered
in the wrong order, causing 3DG operation to fail.
Fix this by changing the order in the table at runtime, when running on
an affected SoC.
Fixes: 086b399965 ("soc: renesas: r8a77990-sysc: Add workaround for 3DG-{A,B}")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This adds the H5 SoC compatible to the list of device-tree matches for
the SRAM driver. Since the variant is the same as the A64 (that precedes
the H5), the same variant description is used.
Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Just like the A64 and H5, the H3 SoC uses the system control block
to enable the EMAC clock.
Add a variant structure definition for the H3 and use it over the A10
one. This will allow using the H3-specific binding for the syscon node
attached to the EMAC instead of the generic syscon binding.
Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
The GPCv2 on the Freescale i.MX8MQ SoC works in the same way as the
GPCv2 on the i.MX7, but only controls more power domains with a
different mapping.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The valid register ranges are defined by the implemented power domains,
which are different between the individual SoCs where the GPCv2 is used.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
So we can add i.MX8M support without introducing name clashes.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
* Fix llcc license, includes, and error checks
* Remove use of memcpy in cmd-db and fix API breakage
* Add QCS404 compatible to SMD-RPM
* Minor fixes for QMI
* Add irq clear handling in QCOM Geni SE during init
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJcAHmCAAoJEFKiBbHx2RXVJLwQAKXbtYh7Kl8xQPJpRtHmOTJE
zagPkIb9xDqG2O7rWfYi6ye3/brSZv+9kv02tqwtHVlDfxtd64KHw3jor6yxozB4
6d8F1thFiM5+lXo6ISSFJaVYwpN0AYCExFLbSup/XSyo3a70HchtXlvT0NPPTecT
EXinXUDOizVM8SypZksoWfJWd+qWskPNxfMRQZ1e5nJlnqcRD/9XQtmZha/WZe76
Kz78QfxLbT4KKhTEE+TAOWERT2STlxfHP0611E00LXlivqh7twtfe5u5yUntOVq0
+56RY1K0W++Cl4P2HJrpcp+16OI2wPG1KfP4kWySXaa0HfcW4qaZvGGiOWrr1mQs
sxRntblg0x56i4lnSTFxTrirDBiBFuzXLvLGE/RxbgACGafVh0mEtl58wJxwShKB
a3zaztuRPcimOWbcAJN2O3nOB64lYha61JY7lo+th+IxbYAaVtp76GsVq36DHDbx
oVREMg/zNUHRKqIQuRM372sj2VnngJ8Bw/7ecLTwydvmmb7QB6UDXI1D/L2p6Tqq
+7Z1UHB8XIWhu2GkLjakEHs+XPcUULofWeNSsOwftv2Bmo4xw9COlQiDQjf15/ZR
IVZp1tYFHR9v2mFMM1ZI/GdQWSl4EDE3rwvwRMlCHcEZYN4jjyv9XzV2IeMw7Tpq
qdevDn4scHx05nBm6ZQh
=hySS
-----END PGP SIGNATURE-----
Merge tag 'qcom-drivers-for-4.21' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux into next/drivers
Qualcomm ARM Based Driver Updates for v4.21
* Fix llcc license, includes, and error checks
* Remove use of memcpy in cmd-db and fix API breakage
* Add QCS404 compatible to SMD-RPM
* Minor fixes for QMI
* Add irq clear handling in QCOM Geni SE during init
* tag 'qcom-drivers-for-4.21' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux:
drm: msm: Check cmd_db_read_aux_data() for failure
soc: qcom: smd-rpm: Add QCS404 compatible
soc: qcom: llcc-slice: Remove duplicated include from llcc-slice.c
soc: qcom: cmd-db: Stop memcpy()ing in cmd_db_read_aux_data()
soc: qcom: cmd-db: Remove memcpy()ing from cmd_db_get_header()
soc: qcom: Drop help text for QCOM_QMI_HELPERS
soc: qcom: qmi_interface: Limit txn ids to U16_MAX
soc: qcom: llcc-slice: Add error checks for API functions
soc: qcom/llcc: add MODULE_LICENSE tag
soc: qcom: Add irq clear handling during SE init
Signed-off-by: Olof Johansson <olof@lixom.net>
for 4.21, please pull the following changes:
- James fixes the firmware interface after a commit changed the use of
VLA and broke large transfers
- Stefan adds a timeout check for Raspberry Pi firmware transactions and
updates a bunch of SoC/firmware files to use SPDX tags
- Wolfram switches the GISB bus arbiter to use dev_get_drvdata()
- Yangtao provides a fix for a reference leak due to a call to
of_find_node_by_path()
- Florian fixes the CPU re-entry point out of S3 suspend with kernels
built in Thumb2 mode
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEm+Rq3+YGJdiR9yuFh9CWnEQHBwQFAlwC0o4ACgkQh9CWnEQH
BwSYfxAA0AmUWIJ65Tp+UyfmKXI4ufa7Rznf7x3pJs788Fulz1Q/158oifIBHZY9
p6wc9MOFGk0uPc4HN4eVYXuUnQ1liJ6YfWPDj+rBvk9IVOZCKjRSbiELeSjEMeTy
J/nC/N69rIkwkOaTNFne8SNdKba/DMgsYTLz+p0WOyktO50AAcrG4qL1avx/7QnM
TjpUkQ1wKsLJZftJCUSSOcMCnSTuBpcAlRickacuFnoDi+S3QZ1Ub0rtDFP+fjb/
AHfV7jIsVJUuiWcKFrLLWFrR3lGC0Z7AB/w/EE1a8SiDfDC/dgXzZTP6j40aWL4c
aYOQZI4zmrqiajEIjTOk1lV/+yp8CD+qkQ3F5WHAUi/vRTI8UiCYGw6UgsfLyi5s
TE4c35HWgQs4HOmcYuzYV+7TWQ0+cwodGqom0M8As28W+/G0kw7VkmyHJw0F28Bh
2UlOETpUzKv+k+xwa17+FcT897uLGnE97N9g96BoO9EuTramBGTzKShRezC5M9Dj
7/ie8v0IY6UWasSFncT39g8P//oz/Xo5KnlPNUPYBU0Vt9aAQUCJ+O75rgPXWcYn
n1qmauBiCQBv4j8JkHLxpiZEYSSBulE7/DoWt+U7A5OJQmrchi9vW2QSWPWuax3c
1DwOmo5S4M0mPveL+2v28kLfioL4qov1aEYtO/6xshGMzrCm4OQ=
=yGiB
-----END PGP SIGNATURE-----
Merge tag 'arm-soc/for-4.21/drivers' of https://github.com/Broadcom/stblinux into next/drivers
This pull request contains Broadcom ARM/ARM64/MIPS SoCs drivers changes
for 4.21, please pull the following changes:
- James fixes the firmware interface after a commit changed the use of
VLA and broke large transfers
- Stefan adds a timeout check for Raspberry Pi firmware transactions and
updates a bunch of SoC/firmware files to use SPDX tags
- Wolfram switches the GISB bus arbiter to use dev_get_drvdata()
- Yangtao provides a fix for a reference leak due to a call to
of_find_node_by_path()
- Florian fixes the CPU re-entry point out of S3 suspend with kernels
built in Thumb2 mode
* tag 'arm-soc/for-4.21/drivers' of https://github.com/Broadcom/stblinux:
soc: bcm: brcmstb: Don't leak device tree node reference
firmware: raspberrypi: Switch to SPDX identifier
firmware: raspberrypi: Fix firmware calls with large buffers
soc: bcm: Switch raspberrypi-power to SPDX identifier
firmware: raspberrypi: Define timeout for transactions
bus: brcmstb_gisb: simplify getting .driver_data
soc: bcm: brcmstb: Fix re-entry point with a THUMB2_KERNEL
Signed-off-by: Olof Johansson <olof@lixom.net>
Few SoC related driver changes to add PRCM as the wake-up source
for wkup_m3_ipc driver, and to improve ti-sysc driver for dra7
mcasp and device detection when debug is enabled.
There is also a non-critical fix for ti-sysc to fix handling of
the optional clocks but this can wait for the merge window no problem.
-----BEGIN PGP SIGNATURE-----
iQJFBAABCAAvFiEEkgNvrZJU/QSQYIcQG9Q+yVyrpXMFAlwAQXYRHHRvbnlAYXRv
bWlkZS5jb20ACgkQG9Q+yVyrpXMExw/5Ad2hx/IMMQlnbyut0KYlM4vrG5K4gioR
8KfxX60Hb26N6iUUNrBRTWiekqTSpa9kkguZ4i+CSIWoC8oZ0i/L/06BIr+wu68+
cofccy1v+HKN2tKu8EfdxSM8GTL9wKrVCFtQZlO6i/z2wIURBR67DmrhM+WGWR1A
p9/tU9wEOHL2ueJOwGgxsUMyr4oy7QXzeE9E/6t9IWYE4wpE94Onj/ktBPMJX4/x
swGHElr5iirDMAuncruqTq3xmIPZsgQsjMsNySqGWB/rk0En2HIsmo4SBswKewia
v6yfewDttExUx5fQKDKVMXwEZMUAGZjhXUaCru+mDjYwWPkWMSqw6c2YDhBnq7HJ
yzOPlRteG1Rf+bPMGjaz1nW2bz1R3MwBZio/TG8Lro65Gzjk86CQ2SclNO00+0tj
OgU0/JzDq/yoDyLc8Fv6yNGmj7RvgM6K1oySXKhfsnXYRi8D+z7SQnI7Iuns5Roo
SqfNZrYOlqhJiB+VkGrsf48EMlporL8PkonSedBRhXcXkB2Fu3lRkO7+No+IDSs5
1e0h69WWam0PFc8GGkggsQeCpmqnH17xorX12RvBEDL2Eg2AmX7y6+hnvc6//+s8
9icJ0wHHxzxnrWrc6opOoo9rsw1wutTXnNQR6oCmub+eL6CFol26p6O94rEys67r
RME1Xeui07E=
=n5+4
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v4.21/driver-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/drivers
Driver changes for omaps for v4.21 merge window
Few SoC related driver changes to add PRCM as the wake-up source
for wkup_m3_ipc driver, and to improve ti-sysc driver for dra7
mcasp and device detection when debug is enabled.
There is also a non-critical fix for ti-sysc to fix handling of
the optional clocks but this can wait for the merge window no problem.
* tag 'omap-for-v4.21/driver-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
soc: ti: wkup_m3: Add PRCM int16 as the wake up source
bus: ti-sysc: Detect devices for debug on omap5
bus: ti-sysc: Add mcasp optional clocks flag
bus: ti-sysc: Fix getting optional clocks in clock_roles
Signed-off-by: Olof Johansson <olof@lixom.net>
The pm-rmobile driver is really a driver for the System Controller
(SYSC) found in R-Mobile SoCs. An equivalent driver for R-Car SoCs is
already located under drivers/soc/renesas/.
Hence move the pm-rmobile driver from arch/arm/mach-shmobile/ to
drivers/soc/renesas/, and rename it to rmobile-sysc.
Enable compile-testing on non-ARM and non-R-Mobile SoCs.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The R-Car Gen3 HardWare Manual Errata for Rev. 0.80 (Feb 28, 2018)
renamed the A3VIP power domain on R-Car V3H to A3VIP0, and clarified the
power domain hierarchy for the A3VIP[012] power domains.
As the definition for the A3VIP0 domain is not yet used from DT, it can
just be renamed.
Fixes: 7755b40d07 ("dt-bindings: power: add R8A77980 SYSC power domain definitions")
Fixes: 41d6d8bd8a ("soc: renesas: rcar-sysc: add R8A77980 support")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The R-Car Gen3 HardWare Manual Errata for Rev. 0.80 (Feb 28, 2018)
renamed the A2PD0 and A2DP0 power domains on R-Car V3H to A2DP0 resp.
A2DP1.
As these definitions are not yet used from DT, they can just be renamed.
Fixes: 7755b40d07 ("dt-bindings: power: add R8A77980 SYSC power domain definitions")
Fixes: 41d6d8bd8a ("soc: renesas: rcar-sysc: add R8A77980 support")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The R-Car Gen3 HardWare Manual Errata for Rev. 0.80 (Feb 28, 2018)
renamed the A2IR2 and A2IR3 power domains on R-Car V3M to A2DP resp.
A2CN.
As these definitions are not yet used from DT, they can just be renamed.
While at it, fix the indentation of the A3IR definition.
Fixes: 833bdb47c8 ("dt-bindings: power: add R8A77970 SYSC power domain definitions")
Fixes: bab9b2a74f ("soc: renesas: rcar-sysc: add R8A77970 support")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The R-Car Gen3 HardWare Manual Errata for Rev. 0.80 (Feb 28, 2018)
removed the CR7 power domain on R-Car V3M, as this SoC does not have an
ARM Cortex-R7 Realtime Core.
As this definition was never used from DT, it can just be removed.
Fixes: 833bdb47c8 ("dt-bindings: power: add R8A77970 SYSC power domain definitions")
Fixes: bab9b2a74f ("soc: renesas: rcar-sysc: add R8A77970 support")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The R-Car Gen3 HardWare Manual Errata for Rev. 0.80 (Feb 28, 2018)
removed the A3IR power domain on R-Car M3-N, as this SoC does not have
an Image Processing Unit (IMP-X5).
The definition in the DT bindings header cannot be removed yet, until
its (incorrect) user has been removed.
Fixes: a527709b78 ("soc: renesas: rcar-sysc: Add R-Car M3-N support")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This patch adds a compatible for the rpm on the Qualcomm QCS404 platform.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
The Amlogic Meson SoCs embeds a clock measurer IP to measure the internal
clock paths frequencies.
The precision is determined by stepping into the duration until the counter
overflows.
The debugfs slows a pretty summary and each clock can be measured
individually aswell.
Cc: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Tested-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
of_find_node_by_path() acquires a reference to the node returned by it
and that reference needs to be dropped by its caller. soc_is_brcmstb()
doesn't do that, so fix it.
[treding: slightly rewrite to avoid inline comparison]
Fixes: d52fad2620 ("soc: add stubs for brcmstb SoC's")
Signed-off-by: Yangtao Li <tiny.windzz@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Tegra194 supports 96 wake events in total. Many of them are never used,
so only the most common ones (RTC alarm and power key) are currently
defined.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Tegra186 support 96 wake events in total. Many of them are never used,
so only the most common ones (RTC alarm and power key) are currently
defined.
Signed-off-by: Thierry Reding <treding@nvidia.com>
The power management controller has top-level controls that allow
certain interrupts (such as from the RTC or a subset of GPIOs) to
wake the system from sleep. Implement infrastructure to support
these wake events.
Signed-off-by: Thierry Reding <treding@nvidia.com>
the firmware driver (silently hanging if the VPU doesn't respond to a
mailbox transaction, and undersized buffers in the firmware property
transactions for tags that aren't used yet in the upstream).
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEE/JuuFDWp9/ZkuCBXtdYpNtH8nugFAlv9sfwACgkQtdYpNtH8
nugJFxAAmcu7Z979i1tD7jiy/lgmVPsS9W2zYv/lKrZscFPVh1Mqq3UApypFHgkK
0qjtawFRAwRPzYV7RpHkVREvJsqPTygxxrSgkNEZPsP/r3ytygbZfB7KhFnoF93X
h2HH3czBTxsbajEDwG8BUW2bK8YoefaoaVB72oW6kslv3Mh4RPScf1UJHCRyVOgo
2BH9tq8dOaN+geqDX1VSVUb7r/lnUtwdykC5kxMmEBx5O272vzqBRvFMTFyABXxM
q9jEAd91PbNzX/YgjSM00ZqGmoB3MlchnHPbU2UzeTBuLMhpOc9TiD+ZWxTw0YI1
AHPIZnZ2yOpOhQcR+pF3BsAIG3lxWe0Es8QV1hZWYtOMgmVcwU8ahWGBhFO48v2l
zZIWeBP67nWWlK4mYXLFUhcDnIeM5ddcMiy1hsPdYpZn+3hM7iWBuZx4swmcKqHj
5Dsc45UpFbNgv98U3SKFznn8FsHXHBUvUJrlURBf/RVLiNH5E/chdjRLLQ7wlBV/
5gS41QgkUxz+QorFqrB3TH9HaEK1tIE/YSpz9At8XPaujWBMebssHZBVSddqNXFR
YvRIgRJ0LUBWqcMTzvNes3zUmbY9FZUXZson1UxtcsSkigrOj7nRPUMrlnA23pHE
wxBRHy7SbVEuWFrxi8GW+79OKgkwvqqU/5x/YPTxjSnoX7NM23w=
=Wn6c
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEm+Rq3+YGJdiR9yuFh9CWnEQHBwQFAlv90nAACgkQh9CWnEQH
BwSzIhAApvM869EXH3+SKWBNJYCPVk74eVlCsqEhPE21VHJxDo3i4S223ATkwUlP
YrEtmbY1q61bfwaImlg8NhKPkbQ2MU9OKH5HOiOcfnftpHWfltGQWfhjFEGaY0zM
aNxTMF/6JzY//VYF+nT3JL0Y3cZkBInjnr5Nm4XQAkuzUkpXnT3arYii9q4IFDId
eHyBbANmAvkU6JbupEYe05pXdfFrN5W6sSUw9oAALR1SedphkcXBhgPklIO4mhsA
E1LWswVl3PaoWlIycjjElU9I7Axb6A5ECpgZ0esbeIC7hQMbSMvXjxJorIfF6gq+
4Dvcb9PFmHg/bBrC3gIndJP0W707dyJldIWqYtcZMzbjcLMFzO4l74EoiDOcUD2E
ZCbipRLJqdA2jQ1DYcxgWfkdsomEAhqPOlMJ+OqvVXSBf36aYVNCVq+RGlUS5XMB
uv02mvbJ5BHyKLf+VdZwkAU3WeIJ7cP35ywNdqWy47u89aRF0elOK6BWAuL6HI2Y
FXrIgFxmb5QuL3JQVulpiij6iCwmSZjoOlcLDJhAGj0a6/AYcmYhn/nznZ9Y2uTM
j+8yA//FrE5CnKW506OST31CSwf28u0Q2rFeFu581AJSvSeY3LLvarh7N5PNLvM3
l89TNCfWSKxvXA1/H6/Nrc4TCPKIH3egzpFMxQMAnyk35VV9CNE=
=5L8p
-----END PGP SIGNATURE-----
Merge tag 'tags/bcm2835-drivers-next-2018-11-27' into drivers/next
This pull request adds SPDX to BCM2835 drivers, and fixes some bugs in
the firmware driver (silently hanging if the VPU doesn't respond to a
mailbox transaction, and undersized buffers in the firmware property
transactions for tags that aren't used yet in the upstream).
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Check that the values received by the portal interrupt coalesce
change APIs are in range.
Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com>
Signed-off-by: Roy Pledge <roy.pledge@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Read the DQRR interrupt threshold directly from the hardware.
Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com>
Signed-off-by: Roy Pledge <roy.pledge@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Use DEFINE_SHOW_ATTRIBUTE macro to simplify the code.
Signed-off-by: Yangtao Li <tiny.windzz@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Use DEFINE_SHOW_ATTRIBUTE macro to simplify the code.
Signed-off-by: Yangtao Li <tiny.windzz@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
of_find_node_by_path() acquires a reference to the node returned by it
and that reference needs to be dropped by its caller. soc_is_tegra()
doesn't do that, so fix it.
Signed-off-by: Yangtao Li <tiny.windzz@gmail.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
[treding: slightly rewrite to avoid inline comparison]
Signed-off-by: Thierry Reding <treding@nvidia.com>
For consistency with arm64, where vendors have a single Kconfig symbol
in arch/arm64/Kconfig.platforms.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
arch/arm64/Kconfig.platforms has SoC-specific Kconfig symbols for
Renesas SoCs, while other vendors have only a single Kconfig symbol.
Increase consistency with other vendors by moving the SoC-specific
Kconfig symbols to drivers/soc/renesas/Kconfig.
Increase consistency with R-Car Gen1 and Gen2 SoCs on arm32 by
introducing a family-specific Kconfig symbol for R-Car Gen3
(ARCH_RCAR_GEN3), which enables family-specific hardware features.
While so far only a single family (R-Car Gen3 and derivatives) of
Renesas arm64 SoCs is supported by Linux, this will make it easier
to add support for other SoC families later.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The current condition makes it difficult to compile the amlogic/
drivers with COMPILE_TEST, or without ARCH_MESON in general.
Fixes kbuild errors with patch series that depend on drivers in that
directory, for instance the meson video decoder.
Signed-off-by: Maxime Jourdan <mjourdan@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Adopt the SPDX license identifier headers to ease license compliance
management.
Cc: Alexander Aring <aring@mojatatu.com>
Cc: Eric Anholt <eric@anholt.net>
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Let's change the function signature to return the pointer to memory or
an error pointer on failure, and take an argument that lets us return
the size of the aux data read. This way we can remove the
cmd_db_read_aux_data_len() API entirely and also get rid of the memcpy
operation from cmd_db to the caller. Updating the only user of this code
shows that making this change allows us to remove a function and put the
lookup where the user is.
Cc: Mahesh Sivasubramanian <msivasub@codeaurora.org>
Cc: Lina Iyer <ilina@codeaurora.org>
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: Evan Green <evgreen@chromium.org>
Cc: Jordan Crouse <jcrouse@codeaurora.org>
Cc: Rob Clark <robdclark@gmail.com>
Signed-off-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
The cmd_db_get_header() function is a static local function that doesn't
need to copy anything from one place to another. Instead, it can just
point into the region by returning pointers to what we're looking for.
If we do that, we should mark what we're returning as const so that code
can't modify cmd-db without an obvious cast.
Cc: Mahesh Sivasubramanian <msivasub@codeaurora.org>
Cc: Lina Iyer <ilina@codeaurora.org>
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: Evan Green <evgreen@chromium.org>
Signed-off-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
The help text is visible in menuconfig, however QCOM_QMI_HELPERS is a
hidden kconfig, so it is not selectable in menuconfig.
Remove the help text so that it is more clear that this is intentionally
a hidden kconfig.
Signed-off-by: Niklas Cassel <niklas.cassel@linaro.org>
Reviewed-by: Alex Elder <elder@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Txn IDs created up to INT_MAX cause overflow while storing
the IDs in u16 type supported by QMI header.
Limit the txn IDs max value to U16_MAX to avoid overflow.
Signed-off-by: Arun Kumar Neelakantam <aneela@codeaurora.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
llcc_slice_getd can return a ERR_PTR code on failure. Add a IS_ERR_OR_NULL
check to subsequent API calls that use struct llcc_slice_desc to guard
against faults and to let the leaf drivers get away with safely using a
ERR_PTR() encoded "pointer" in the aftermath of a llcc_slice_getd error.
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Reviewed-by: Vivek Gautam <vivek.gautam@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
The lack of a MODULE_LICENSE tag prevents building the llcc driver
as a loadable module:
FATAL: modpost: GPL-incompatible module llcc-slice.ko uses GPL-only symbol 'ktime_get'
This adds the appropriate license and description tags.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
when the kernel inits a SE, its quite possible we have pending interrupts
from bootloaders which did not handle/clear them. So do this in kernel at
the SE init, to avoid some of it causing bad behavior, while at it also
club all the register writes needed to clear the se irqs into a function
to avoid repeating it over.
Signed-off-by: Alok Chauhan <alokc@codeaurora.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This fixes splats like the one below if CONFIG_DEBUG_ATOMIC_SLEEP=y
and machine (Tegra30) booted with SMP=n or all secondary CPU's are put
offline. Locking isn't needed because it protects atomic operation.
BUG: sleeping function called from invalid context at kernel/locking/mutex.c:254
in_atomic(): 1, irqs_disabled(): 128, pid: 0, name: swapper/0
CPU: 0 PID: 0 Comm: swapper/0 Tainted: G C 4.18.0-next-20180821-00180-gc3ebb6544e44-dirty #823
Hardware name: NVIDIA Tegra SoC (Flattened Device Tree)
[<c01134f4>] (unwind_backtrace) from [<c010db2c>] (show_stack+0x20/0x24)
[<c010db2c>] (show_stack) from [<c0bd0f3c>] (dump_stack+0x94/0xa8)
[<c0bd0f3c>] (dump_stack) from [<c0151df8>] (___might_sleep+0x13c/0x174)
[<c0151df8>] (___might_sleep) from [<c0151ea0>] (__might_sleep+0x70/0xa8)
[<c0151ea0>] (__might_sleep) from [<c0bec2b8>] (mutex_lock+0x2c/0x70)
[<c0bec2b8>] (mutex_lock) from [<c0589844>] (tegra_powergate_is_powered+0x44/0xa8)
[<c0589844>] (tegra_powergate_is_powered) from [<c0581a60>] (tegra30_cpu_rail_off_ready+0x30/0x74)
[<c0581a60>] (tegra30_cpu_rail_off_ready) from [<c0122244>] (tegra30_idle_lp2+0xa0/0x108)
[<c0122244>] (tegra30_idle_lp2) from [<c0853438>] (cpuidle_enter_state+0x140/0x540)
[<c0853438>] (cpuidle_enter_state) from [<c08538a4>] (cpuidle_enter+0x40/0x4c)
[<c08538a4>] (cpuidle_enter) from [<c01595e0>] (call_cpuidle+0x30/0x48)
[<c01595e0>] (call_cpuidle) from [<c01599f8>] (do_idle+0x238/0x28c)
[<c01599f8>] (do_idle) from [<c0159d28>] (cpu_startup_entry+0x28/0x2c)
[<c0159d28>] (cpu_startup_entry) from [<c0be76c8>] (rest_init+0xd8/0xdc)
[<c0be76c8>] (rest_init) from [<c1200f50>] (start_kernel+0x41c/0x430)
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Implement read-only reset_reason and reset_level sysfs attributes that
can be used to query the reset reason and level at runtime.
Signed-off-by: Sandipan Patra <spatra@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Now that the Tegra xHCI driver manages the XUSB power-domains itself,
remove the code to power-up the power-domains used by the xHCI device
from the PMC driver on boot.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
When the kernel is built with CONFIG_THUMB2_KERNEL we would set the
kernel's resume entry point to be a function that is already built as
Thumb-2 code while the boot agent doing the resume is in ARM mode, so
this does not work. There is a header label defined: cpu_resume_arm
which we can use to do the switching for us.
Fixes: 0b741b8234 ("soc: bcm: brcmstb: Add support for S2/S3/S5 suspend states (ARM)")
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
The Keystone QMSS driver is pretty damaged, in the sense that it
does things like this:
irq_set_affinity_hint(irq, to_cpumask(&cpu_map));
where cpu_map is a local variable. As we leave the function, this
will point to nowhere-land, and things will end-up badly.
Instead, let's use a proper cpumask that gets allocated, giving
the driver a chance to actually work with things like irqbalance
as well as have a hypothetical 64bit future.
Cc: stable@vger.kernel.org
Acked-by: Santosh Shilimkar <ssantosh@kernel.org>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
The most noteworthy SoC driver changes this time include:
- The TEE subsystem gains an in-kernel interface to access the TEE
from device drivers.
- The reset controller subsystem gains a driver for the Qualcomm
Snapdragon 845 Power Domain Controller.
- The Xilinx Zynq platform now has a firmware interface for its
platform management unit. This contains a firmware "ioctl" interface
that was a little controversial at first, but the version we merged
solved that by not exposing arbitrary firmware calls to user space.
- The Amlogic Meson platform gains a "canvas" driver that is used
for video processing and shared between different high-level drivers.
The rest is more of the usual, mostly related to SoC specific power
management support and core drivers in drivers/soc:
- Several Renesas SoCs (RZ/G1N, RZ/G2M, R-Car V3M, RZ/A2M) gain new
features related to power and reset control.
- The Mediatek mt8183 and mt6765 SoC platforms gain support for
their respective power management chips.
- A new driver for NXP i.MX8, which need a firmware interface for
power management.
- The SCPI firmware interface now contains support estimating power
usage of performance states
- The NVIDIA Tegra "pmc" driver gains a few new features, in particular
a pinctrl interface for configuring the pads.
- Lots of small changes for Qualcomm, in particular the "smem"
device driver.
- Some cleanups for the TI OMAP series related to their sysc
controller.
Additional cleanups and bugfixes in SoC specific drivers include the
Meson, Keystone, NXP, AT91, Sunxi, Actions, and Tegra platforms.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJb1zEhAAoJEGCrR//JCVInnYQP/1pPXWsR/DV4COf4kGJFSAFn
EfHXJM1vKtb7AWl6SClpHFlUMt+fvL+dzDNJ9aeRr2GjcuWfzKDcrBM1ZvM70I31
C1Oc3b6OXEERCozDpRg/Vt8OpIvvWnVpaVffS9E5y6KqF8KZ0UbpWIxUJ87ik44D
UvNXYOU/LUGPxR1UFm5rm2zWF4i+rBvqnpVaXbeOsXsLElzxXVfv2ymhhqIpo2ws
o6e00DSjUImg8hLL4HCGFs2EX1KSD+oFzYaOHIE0/DEaiOnxVOpMSRhX2tZ+tRRb
DekbjL+wz5gOAKJTQfQ2sNNkOuK8WFqmE5G0RJ0iYPXuNsB/17UNb2bhTJeqGdcD
dqCQBLQuDUD2iHJ/d4RK5Kx3a8h2X63n5bdefgF5UX/2RBpXwFk1QtHr8X0DuY8c
o/dPGFNBOn3egzMyXrD5VEtnaTwK1Y6/h09qfuOOF1ZuYDmELKRkWMV9l8dIsvd8
ANjaw5B8MOUAf8DccBmPgUGu0XLCDyuFGqNVd9Kj5u3az+tyggIsgkEjWg1pxTv0
7dDDyv4Ara1V1HVDZ23l3CgmYCZQx2R/vdpX/DjuDPGEHGjZ5s2TW8P6oegdxtIh
LcTonNoTsRYzMrGD/aqhG/8fYsAScXePa3CLKl1Hrl+wFVV0XcaggH23GwD/k+7S
eDBrEzLkOTxM+WXvsvKY
=c/PQ
-----END PGP SIGNATURE-----
Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC driver updates from Arnd Bergmann:
"The most noteworthy SoC driver changes this time include:
- The TEE subsystem gains an in-kernel interface to access the TEE
from device drivers.
- The reset controller subsystem gains a driver for the Qualcomm
Snapdragon 845 Power Domain Controller.
- The Xilinx Zynq platform now has a firmware interface for its
platform management unit. This contains a firmware "ioctl"
interface that was a little controversial at first, but the version
we merged solved that by not exposing arbitrary firmware calls to
user space.
- The Amlogic Meson platform gains a "canvas" driver that is used for
video processing and shared between different high-level drivers.
The rest is more of the usual, mostly related to SoC specific power
management support and core drivers in drivers/soc:
- Several Renesas SoCs (RZ/G1N, RZ/G2M, R-Car V3M, RZ/A2M) gain new
features related to power and reset control.
- The Mediatek mt8183 and mt6765 SoC platforms gain support for their
respective power management chips.
- A new driver for NXP i.MX8, which need a firmware interface for
power management.
- The SCPI firmware interface now contains support estimating power
usage of performance states
- The NVIDIA Tegra "pmc" driver gains a few new features, in
particular a pinctrl interface for configuring the pads.
- Lots of small changes for Qualcomm, in particular the "smem" device
driver.
- Some cleanups for the TI OMAP series related to their sysc
controller.
Additional cleanups and bugfixes in SoC specific drivers include the
Meson, Keystone, NXP, AT91, Sunxi, Actions, and Tegra platforms"
* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (129 commits)
firmware: tegra: bpmp: Implement suspend/resume support
drivers: clk: Add ZynqMP clock driver
dt-bindings: clock: Add bindings for ZynqMP clock driver
firmware: xilinx: Add zynqmp IOCTL API for device control
Documentation: xilinx: Add documentation for eemi APIs
MAINTAINERS: imx: include drivers/firmware/imx path
firmware: imx: add misc svc support
firmware: imx: add SCU firmware driver support
reset: Fix potential use-after-free in __of_reset_control_get()
dt-bindings: arm: fsl: add scu binding doc
soc: fsl: qbman: add interrupt coalesce changing APIs
soc: fsl: bman_portals: defer probe after bman's probe
soc: fsl: qbman: Use last response to determine valid bit
soc: fsl: qbman: Add 64 bit DMA addressing requirement to QBMan
soc: fsl: qbman: replace CPU 0 with any online CPU in hotplug handlers
soc: fsl: qbman: Check if CPU is offline when initializing portals
reset: qcom: PDC Global (Power Domain Controller) reset controller
dt-bindings: reset: Add PDC Global binding for SDM845 SoCs
reset: Grammar s/more then once/more than once/
bus: ti-sysc: Just use SET_NOIRQ_SYSTEM_SLEEP_PM_OPS
...
Notable changes:
- A large series to rewrite our SLB miss handling, replacing a lot of fairly
complicated asm with much fewer lines of C.
- Following on from that, we now maintain a cache of SLB entries for each
process and preload them on context switch. Leading to a 27% speedup for our
context switch benchmark on Power9.
- Improvements to our handling of SLB multi-hit errors. We now print more debug
information when they occur, and try to continue running by flushing the SLB
and reloading, rather than treating them as fatal.
- Enable THP migration on 64-bit Book3S machines (eg. Power7/8/9).
- Add support for physical memory up to 2PB in the linear mapping on 64-bit
Book3S. We only support up to 512TB as regular system memory, otherwise the
percpu allocator runs out of vmalloc space.
- Add stack protector support for 32 and 64-bit, with a per-task canary.
- Add support for PTRACE_SYSEMU and PTRACE_SYSEMU_SINGLESTEP.
- Support recognising "big cores" on Power9, where two SMT4 cores are presented
to us as a single SMT8 core.
- A large series to cleanup some of our ioremap handling and PTE flags.
- Add a driver for the PAPR SCM (storage class memory) interface, allowing
guests to operate on SCM devices (acked by Dan).
- Changes to our ftrace code to handle very large kernels, where we need to use
a trampoline to get to ftrace_caller().
Many other smaller enhancements and cleanups.
Thanks to:
Alan Modra, Alistair Popple, Aneesh Kumar K.V, Anton Blanchard, Aravinda
Prasad, Bartlomiej Zolnierkiewicz, Benjamin Herrenschmidt, Breno Leitao,
Cédric Le Goater, Christophe Leroy, Christophe Lombard, Dan Carpenter, Daniel
Axtens, Finn Thain, Gautham R. Shenoy, Gustavo Romero, Haren Myneni, Hari
Bathini, Jia Hongtao, Joel Stanley, John Allen, Laurent Dufour, Madhavan
Srinivasan, Mahesh Salgaonkar, Mark Hairgrove, Masahiro Yamada, Michael
Bringmann, Michael Neuling, Michal Suchanek, Murilo Opsfelder Araujo, Nathan
Fontenot, Naveen N. Rao, Nicholas Piggin, Nick Desaulniers, Oliver O'Halloran,
Paul Mackerras, Petr Vorel, Rashmica Gupta, Reza Arbab, Rob Herring, Sam
Bobroff, Samuel Mendoza-Jonas, Scott Wood, Stan Johnson, Stephen Rothwell,
Stewart Smith, Suraj Jitindar Singh, Tyrel Datwyler, Vaibhav Jain, Vasant
Hegde, YueHaibing, zhong jiang,
-----BEGIN PGP SIGNATURE-----
iQIcBAABAgAGBQJb01vTAAoJEFHr6jzI4aWADsEP/jqL3+2qxs098ra80tpXCpXJ
tgXCosEs4b35sGtyHeUWZZZfWXeisaPAIlP8zTx1n50HACZduDYRAl0Ew9XB7Xdw
enDHRVccD21FsmHBOx/Ii1rVJlovWlj6EQCWHKeZmNjeRoFuClVZ7CYmf+mBifKR
sw2Db2fKA/59wMTq2zIMy5pqYgqlAs4jTWS6uN5hKPoBmO/82ARnNG+qgLuloD3Z
O8zSDM9QQ7PpuyDgTjO9SAo2YjmEfXlEG6cOCCejsU3DMctaEAK5PUZ+blsHYHBH
BYZYKs/x4pcw0SO41GtTh0M2YqDYBVuBIpRw8lLZap97Xo9ucSkAm5WD3rGxk4CY
YeZKEPUql6MHN3+DKl8mx2F0V+Et/tio2HNqc9KReR1tfoolZAbe+SFZHfgmc/Rq
RD9nnG8KRd4K2K1BTqpkTmI1EtE7jPtPJPSV8gMGhgL/N5vPmH3mql/qyOtYx48E
6/hPzWESgs16VRZ/opLh8VvjlY1HBDODQhehhhl+o23/Vb8qEgRf8Uqhq50rQW1H
EeOqyyYQ90txSU31Sgy1kQkvOgIFAsBObWT1ZCJ3RbfGbB4/tdEAvZqTZRlXo2OY
7P0Sqcw/9Le5eJkHIlLtBv0TF7y1OYemCbLgRQzFlcRP+UKtYyg8eFnFjqbPEEmP
ulwhn/BfFVSgaYKQ503u
=I0pj
-----END PGP SIGNATURE-----
Merge tag 'powerpc-4.20-1' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux
Pull powerpc updates from Michael Ellerman:
"Notable changes:
- A large series to rewrite our SLB miss handling, replacing a lot of
fairly complicated asm with much fewer lines of C.
- Following on from that, we now maintain a cache of SLB entries for
each process and preload them on context switch. Leading to a 27%
speedup for our context switch benchmark on Power9.
- Improvements to our handling of SLB multi-hit errors. We now print
more debug information when they occur, and try to continue running
by flushing the SLB and reloading, rather than treating them as
fatal.
- Enable THP migration on 64-bit Book3S machines (eg. Power7/8/9).
- Add support for physical memory up to 2PB in the linear mapping on
64-bit Book3S. We only support up to 512TB as regular system
memory, otherwise the percpu allocator runs out of vmalloc space.
- Add stack protector support for 32 and 64-bit, with a per-task
canary.
- Add support for PTRACE_SYSEMU and PTRACE_SYSEMU_SINGLESTEP.
- Support recognising "big cores" on Power9, where two SMT4 cores are
presented to us as a single SMT8 core.
- A large series to cleanup some of our ioremap handling and PTE
flags.
- Add a driver for the PAPR SCM (storage class memory) interface,
allowing guests to operate on SCM devices (acked by Dan).
- Changes to our ftrace code to handle very large kernels, where we
need to use a trampoline to get to ftrace_caller().
And many other smaller enhancements and cleanups.
Thanks to: Alan Modra, Alistair Popple, Aneesh Kumar K.V, Anton
Blanchard, Aravinda Prasad, Bartlomiej Zolnierkiewicz, Benjamin
Herrenschmidt, Breno Leitao, Cédric Le Goater, Christophe Leroy,
Christophe Lombard, Dan Carpenter, Daniel Axtens, Finn Thain, Gautham
R. Shenoy, Gustavo Romero, Haren Myneni, Hari Bathini, Jia Hongtao,
Joel Stanley, John Allen, Laurent Dufour, Madhavan Srinivasan, Mahesh
Salgaonkar, Mark Hairgrove, Masahiro Yamada, Michael Bringmann,
Michael Neuling, Michal Suchanek, Murilo Opsfelder Araujo, Nathan
Fontenot, Naveen N. Rao, Nicholas Piggin, Nick Desaulniers, Oliver
O'Halloran, Paul Mackerras, Petr Vorel, Rashmica Gupta, Reza Arbab,
Rob Herring, Sam Bobroff, Samuel Mendoza-Jonas, Scott Wood, Stan
Johnson, Stephen Rothwell, Stewart Smith, Suraj Jitindar Singh, Tyrel
Datwyler, Vaibhav Jain, Vasant Hegde, YueHaibing, zhong jiang"
* tag 'powerpc-4.20-1' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux: (221 commits)
Revert "selftests/powerpc: Fix out-of-tree build errors"
powerpc/msi: Fix compile error on mpc83xx
powerpc: Fix stack protector crashes on CPU hotplug
powerpc/traps: restore recoverability of machine_check interrupts
powerpc/64/module: REL32 relocation range check
powerpc/64s/radix: Fix radix__flush_tlb_collapsed_pmd double flushing pmd
selftests/powerpc: Add a test of wild bctr
powerpc/mm: Fix page table dump to work on Radix
powerpc/mm/radix: Display if mappings are exec or not
powerpc/mm/radix: Simplify split mapping logic
powerpc/mm/radix: Remove the retry in the split mapping logic
powerpc/mm/radix: Fix small page at boundary when splitting
powerpc/mm/radix: Fix overuse of small pages in splitting logic
powerpc/mm/radix: Fix off-by-one in split mapping logic
powerpc/ftrace: Handle large kernel configs
powerpc/mm: Fix WARN_ON with THP NUMA migration
selftests/powerpc: Fix out-of-tree build errors
powerpc/time: no steal_time when CONFIG_PPC_SPLPAR is not selected
powerpc/time: Only set CONFIG_ARCH_HAS_SCALED_CPUTIME on PPC64
powerpc/time: isolate scaled cputime accounting in dedicated functions.
...
- Sync dtc with upstream version v1.4.7-14-gc86da84d30e4
- Work to get rid of direct accesses to struct device_node name and
type pointers in preparation for removing them. New helpers for
parsing DT cpu nodes and conversions to use the helpers. printk
conversions to %pOFn for printing DT node names. Most went thru
subystem trees, so this is the remainder.
- Fixes to DT child node lookups to actually be restricted to child
nodes instead of treewide.
- Refactoring of dtb targets out of arch code. This makes the support
more uniform and enables building all dtbs on c6x, microblaze, and
powerpc.
- Various DT binding updates for Renesas r8a7744 SoC
- Vendor prefixes for Facebook, OLPC
- Restructuring of some ARM binding docs moving some peripheral bindings
out of board/SoC binding files
- New "secure-chosen" binding for secure world settings on ARM
- Dual licensing of 2 DT IRQ binding headers
-----BEGIN PGP SIGNATURE-----
iQJEBAABCgAuFiEEktVUI4SxYhzZyEuo+vtdtY28YcMFAlvTKWYQHHJvYmhAa2Vy
bmVsLm9yZwAKCRD6+121jbxhw8J5EACMAnrTxWQmXfQXOZEVxztcFavH6LP8mh2e
7FZIZ38jzHXXvl81tAg1nBhzFUU/qtvqW8NDCZ9OBxKvp6PFDNhWu241ZodSB1Kw
MZWy2A9QC+qbHYCC+SB5gOT0+Py3v7LNCBa5/TxhbFd35THJM8X0FP7gmcCGX593
9Ml1rqawT4mK5XmCpczT0cXxyC4TgVtpfDWZH2KgJTR/kwXVQlOQOGZ8a1y/wrt7
8TLIe7Qy4SFRzjhwbSta1PUehyYfe4uTSsXIJ84kMvNMxinLXQtvd7t9TfsK8p/R
WjYUneJskVjtxVrMQfdV4MxyFL1YEt2mYcr0PMKIWxMCgGDAZsHPoUZmjyh/PrCI
uiZtEHn3fXpUZAV/xEHHNirJxYyQfHGiksAT+lPrUXYYLCcZ3ZmqiTEYhGoQAfH5
CQPMuxA6yXxp6bov6zJwZSTZtkXciju8aQRhUhlxIfHTqezmGYeql/bnWd+InNuR
upANLZBh6D2jTWzDyobconkCCLlVkSqDoqOx725mMl6hIcdH9d2jVX7hwRf077VI
5i3CyPSJOkSOLSdB8bAPYfBoaDtH2bthxieUrkkSbIjbwHO1H6a2lxPeG/zah0a3
ePMGhi7J84UM4VpJEi000cP+bhPumJtJrG7zxP7ldXdfAF436sQ6KRptlcpLpj5i
IwMhUQNH+g==
=335v
-----END PGP SIGNATURE-----
Merge tag 'devicetree-for-4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux
Pull Devicetree updates from Rob Herring:
"A bit bigger than normal as I've been busy this cycle.
There's a few things with dependencies and a few things subsystem
maintainers didn't pick up, so I'm taking them thru my tree.
The fixes from Johan didn't get into linux-next, but they've been
waiting for some time now and they are what's left of what subsystem
maintainers didn't pick up.
Summary:
- Sync dtc with upstream version v1.4.7-14-gc86da84d30e4
- Work to get rid of direct accesses to struct device_node name and
type pointers in preparation for removing them. New helpers for
parsing DT cpu nodes and conversions to use the helpers. printk
conversions to %pOFn for printing DT node names. Most went thru
subystem trees, so this is the remainder.
- Fixes to DT child node lookups to actually be restricted to child
nodes instead of treewide.
- Refactoring of dtb targets out of arch code. This makes the support
more uniform and enables building all dtbs on c6x, microblaze, and
powerpc.
- Various DT binding updates for Renesas r8a7744 SoC
- Vendor prefixes for Facebook, OLPC
- Restructuring of some ARM binding docs moving some peripheral
bindings out of board/SoC binding files
- New "secure-chosen" binding for secure world settings on ARM
- Dual licensing of 2 DT IRQ binding headers"
* tag 'devicetree-for-4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (78 commits)
ARM: dt: relicense two DT binding IRQ headers
power: supply: twl4030-charger: fix OF sibling-node lookup
NFC: nfcmrvl_uart: fix OF child-node lookup
net: stmmac: dwmac-sun8i: fix OF child-node lookup
net: bcmgenet: fix OF child-node lookup
drm/msm: fix OF child-node lookup
drm/mediatek: fix OF sibling-node lookup
of: Add missing exports of node name compare functions
dt-bindings: Add OLPC vendor prefix
dt-bindings: misc: bk4: Add device tree binding for Liebherr's BK4 SPI bus
dt-bindings: thermal: samsung: Add SPDX license identifier
dt-bindings: clock: samsung: Add SPDX license identifiers
dt-bindings: timer: ostm: Add R7S9210 support
dt-bindings: phy: rcar-gen2: Add r8a7744 support
dt-bindings: can: rcar_can: Add r8a7744 support
dt-bindings: timer: renesas, cmt: Document r8a7744 CMT support
dt-bindings: watchdog: renesas-wdt: Document r8a7744 support
dt-bindings: thermal: rcar: Add device tree support for r8a7744
Documentation: dt: Add binding for /secure-chosen/stdout-path
dt-bindings: arm: zte: Move sysctrl bindings to their own doc
...
The networking merge brought in the experimental support for the
Qualcomm ath10k system NOC, which selects QCOM_QMI_HELPERS as a
dependency.
But the ATH10K_SNOC option (which selects QCOM_QMI_HELPERS) depends on
ARCH_QCOM || COMPILE_TEST in order to get wider build testing than just
the unusual QCOM architecture build, while the QCOM_QMI_HELPERS option
doesn't have that COMPILE_TEST option and is limited to only ARCH_QCOM.
As a result, a "make allmodconfig" complains
WARNING: unmet direct dependencies detected for QCOM_QMI_HELPERS
Depends on [n]: ARCH_QCOM && NET [=y]
Selected by [m]:
- ATH10K_SNOC [=m] && NETDEVICES [=y] && WLAN [=y] && WLAN_VENDOR_ATH [=y] && ATH10K [=m] && (ARCH_QCOM || COMPILE_TEST [=y])
Fix the config-time warning by making QCOM_QMI_HELPERS available when
COMPILE_TEST, since the result seems to build fine.
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: Govind Singh <govinds@codeaurora.org>
Cc: Kalle Valo <kvalo@codeaurora.org>
Cc: David Miller <davem@davemloft.net>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
ioremap_prot() with flag set to 0 relies on a hack in
__ioremap_caller() which adds PAGE_KERNEL flags when the
handed flags don't look like a valid set of flags
(ie don't include _PAGE_PRESENT)
The intention being to map cached memory, use ioremap_cache() instead.
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
- Update qbman driver to better work with CPU hotplug
- Add Kconfig dependency of 64-bit DMA addressing for qbman driver
- Use last reponse to determine valid bit for qbman driver
- Defer bman_portals probe if bman is not probed
- Add interrupt coalescing APIs to qbman driver
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEhb3UXAyxp6UQ0v6khtxQDvusFVQFAlu3uhEACgkQhtxQDvus
FVTZuhAAg2G6q2ERXWe2CwI+Is8TYAc7HmD06q22+BZrmqtb1VlX56ON7HkTDzMN
NXWw3smNs6OIKJp7f5bRpEKex8GIdqrUYOzE7vzavwXBKiQFjkYTlyyUpd1zygns
dw8MPj5drvKWLRYonHdeLIlpuIdeau7pxOJze1odT3a5QlJQFnULIT5JA4b4LRjy
9JNhlcr3eecQ9XMabW2cN00Ve0IjhXiIkf2sA4f8ZxHaHlt7lts7/f5fd6gnUxyc
vLaNLj1Ul798SpiwwPEi+rog67tnuIijJggv0CM9+AAmwrs4dW5nlzKhe5WlGI53
6o7PDFqfhD+2oeeePU8YMTwJwPv4h+8/gOM46NNs3M10VxbMwpbajXc2OLOi9qHO
6B/+upql0kS6MORN8uMhr6Bg5QD+tTEMZUKmOi9eXxM7TIIsZPaUPkJa5SIlVXKm
vqzA7fzmXIOlECEsXJOnXev6VARQjLK3aisZ8SCZMRV5NMIExSye5yqkEsMihblH
qH+5CG19I24qPBp3ThnrOCkcVluzt9TWdnQ7x25752HY/UVv/lc0pbv47AZmIhdI
MZyhjVXqXssX1EgDKEoc34KHRTj94XyLum6FaUsIc2NrO1wUTT92Q1kVdipIWC4g
uHlr1swyUxglGAoJUIh51OZSMsu51PtTCG1pz6+uHmxfPAr+IQA=
=2fhR
-----END PGP SIGNATURE-----
Merge tag 'soc-fsl-next-v4.20-2' of git://git.kernel.org/pub/scm/linux/kernel/git/leo/linux into next/drivers
NXP/FSL SoC drivers updates for v4.20 take 2
- Update qbman driver to better work with CPU hotplug
- Add Kconfig dependency of 64-bit DMA addressing for qbman driver
- Use last reponse to determine valid bit for qbman driver
- Defer bman_portals probe if bman is not probed
- Add interrupt coalescing APIs to qbman driver
* tag 'soc-fsl-next-v4.20-2' of git://git.kernel.org/pub/scm/linux/kernel/git/leo/linux:
soc: fsl: qbman: add interrupt coalesce changing APIs
soc: fsl: bman_portals: defer probe after bman's probe
soc: fsl: qbman: Use last response to determine valid bit
soc: fsl: qbman: Add 64 bit DMA addressing requirement to QBMan
soc: fsl: qbman: replace CPU 0 with any online CPU in hotplug handlers
soc: fsl: qbman: Check if CPU is offline when initializing portals
soc: fsl: qman_portals: defer probe after qman's probe
soc: fsl: qbman: add APIs to retrieve the probing status
soc: fsl: qe: Fix copy/paste bug in ucc_get_tdm_sync_shift()
soc: fsl: qbman: qman: avoid allocating from non existing gen_pool
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Add the APIs required to control the QMan portal interrupt coalescing
settings.
Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
A crash in bman portal probing could not be triggered (as is the case
with qman portals) but it does make calls [1] into the bman driver so
lets make sure the bman portal probing happens after bman's.
[1] bman_p_irqsource_add() (in bman) called by:
init_pcfg() called by:
bman_portal_probe()
Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
Use the last valid response when determining what valid bit
to use next for management commands. This is needed in the
case that the portal was previously used by other software
like a bootloader or if the kernel is restarted without a
hardware reset.
Signed-off-by: Roy Pledge <roy.pledge@nxp.com>
Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
The QBMan block is memory mapped on SoCs above a 32 bit (4 Gigabyte)
boundary so enabling 64 bit DMA addressing is needed for QBMan to
be usuable.
Signed-off-by: Roy Pledge <roy.pledge@nxp.com>
Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
The existing code sets portal IRQ affinity to CPU 0 in the
offline hotplug handler. If CPU 0 is offline this is invalid.
Use a different online CPU instead.
Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
If the CPU to affine the portal interrupt is offline at boot time
affine the portal interrupt to another online CPU. If the CPU is later
brought online the hotplug handler will correctly adjust the affinity.
Moved common code in a function.
Signed-off-by: Roy Pledge <roy.pledge@nxp.com>
Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
- Fix crash of qman_portal by deferring its probe if qman is not probed
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEhb3UXAyxp6UQ0v6khtxQDvusFVQFAluypMcACgkQhtxQDvus
FVQvKA/+Kc4IDHyidEgcbdNwjZNkp4eHXKSwtCdMstrEquQ7tOqmxCaEnC9izTBy
wW6XF91ez4DJkQDgxrN1fJN512yTN0v6D7Jq+VclrrGfcT2f1xnNRf33r6957csc
9hOp7S1hkeHZfCRtMZrjwIRgzWtlfH+XcRne/USE/enQ0GmTKThhv2rngH2hnAxP
cqW+ult+jyL+m5i+hpzIZUjSMio4w8Z+K/QEwhlfy63nh2oYc8Zpvql5EYq1oFgd
c0JWA1/DM/dbBiWRZVfjvjw1ZDnkJpYIJDmJYfNz3k4IJJlUYPWM4RrSRn1+yYl9
wg/zZ3a0NlCskn32KlIwE0m1zLLVEjFam+3a7EiIFh98gBGQ5eeIpZ8UAqyc6zLi
4etMYtt6+kUt7x2nsZ1GQrQXembt4TUBf70HMBLz85TaCg6z98PRsYyGRq1vKnj4
sAk8aiCHOsnlqHpKt403U8wUABRAr8m+xGI2D8MSTdzbQnDftf8eqKrLS2qtnlSi
4R3jkBiaszV8O6FdRC8+3VmtaOx/PCGh8Odo3GitDLQBdB1AkFdmIxJBJDcST/Cp
CWAmxJsPIS4PUGJupeIALsJF8rFHiwn5uVxsNRKxpL1xpDD6mwxLSn+LOHQT8fD3
PGhhngQD8ky9nKqL+gckpu/QfjiBrJNeUD6pvhRJc1cI+7ue/nM=
=qVf2
-----END PGP SIGNATURE-----
Merge tag 'soc-fsl-fix-v4.19-2' into HEAD
NXP/FSL SoC driver fixes for v4.19 round 2
- Fix crash of qman_portal by deferring its probe if qman is not probed
In preparation to remove the node name pointer from struct device_node,
convert printf users to use the %pOFn format specifier.
Cc: Li Yang <leoyang.li@nxp.com>
Cc: David Brown <david.brown@linaro.org>
Cc: Jonathan Hunter <jonathanh@nvidia.com>
Cc: Santosh Shilimkar <ssantosh@kernel.org>
Cc: linuxppc-dev@lists.ozlabs.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-soc@vger.kernel.org
Acked-by: Thierry Reding <treding@nvidia.com>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Qiang Zhao <qiang.zhao@nxp.com>
Acked-by: Andy Gross <andy.gross@linaro.org>
Signed-off-by: Rob Herring <robh@kernel.org>
- A couple of patches from Anson to update variable and macro naming
in GPCv2 driver, as a preparation of reusing the driver on i.MX8.
- Switch GPC/GPCv2 drivers to use SPDX identifier for licence claiming.
- Clean up the unnecessary DT node name NULL pointer checking from
imx-weim driver, since it can never be NULL at all.
- A couple of improvements on GPC driver from Sven Schmitt to correct
PDN register and use GPC_PGC_DOMAIN_* indexes for consistency.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJbsbJqAAoJEFBXWFqHsHzO+ugIAK+TvzV8E39pm6nmAsGusBB9
mxDG1030mIgAvL/d6iZNozqiib93sTwyhEsmvvEWPXrS1WjgYqWRXnILvWqNlf+O
xyBHvfonXNnTLg5mAvppEwQJnLKGstP8ZHlbloQs2imQQp1iw+ZY+9P/UX7zE888
rEkS3NYIEFSwMH9wACOMSDyyCt+gzahTFfDhRseFGaJ1mMsw3+sZnZQKS4R7PSXJ
jw0eXcsGXcL70tUVHpdyvJB2GtiZ0hv3Sl3AeVR/ifW+vsn2zdSK/wTe7YFwmX4i
4nq/xV8sCp+s2wPjXqy0UDpcfWxhRa8eDoqU0O4Sk0W9h4JZVSjhiP4wc+Zqm78=
=+9WB
-----END PGP SIGNATURE-----
Merge tag 'imx-drivers-4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/drivers
i.MX drivers update for 4.20:
- A couple of patches from Anson to update variable and macro naming
in GPCv2 driver, as a preparation of reusing the driver on i.MX8.
- Switch GPC/GPCv2 drivers to use SPDX identifier for licence claiming.
- Clean up the unnecessary DT node name NULL pointer checking from
imx-weim driver, since it can never be NULL at all.
- A couple of improvements on GPC driver from Sven Schmitt to correct
PDN register and use GPC_PGC_DOMAIN_* indexes for consistency.
* tag 'imx-drivers-4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
soc: imx: gpcv2: Switch to SPDX identifier
soc: imx: gpc: Switch to SPDX identifier
bus: imx-weim: drop unnecessary DT node name NULL check
soc: imx: gpcv2: make pgc driver more generic for other i.MX platforms
soc: imx: gpcv2: use A_CORE instread of A7 for more i.MX platforms
soc: imx: gpc: use GPC_PGC_DOMAIN_* indexes
soc: imx: gpc: fix PDN delay
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* Refactor of SCM compatibles and clock requirements
* SMEM cleanup
* Add LLCC EDAC driver
* Fixes for GENI clocks and macros
* Fix includes for llcc-slice and smem
* String overflow fixes for APR and wcnss_ctrl
* Fixup for COMPILE_TEST of qcom driver Kconfigs
* Cleanup of Kconfig depends of rpmh, smd_rpm, smsm, and smp2p
* Add SCM dependencies to SPM and rmtfs-mem
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJbsQupAAoJEFKiBbHx2RXVQBYQAKWr3RsQlWJ09M0vm8qGeCCA
8FXxX9wqcU34KvYR16IIXzQ/25L4h1uLjvjBfQurn7zOFIrCoqn2PGOchGOyJEA0
hPw+RomT17BV1hRSJkl8lIXMqGCAvoc44VrAQyipCTpEJO82emh6qJ1ki5XpIvfI
EOad6S2IGNXU39F0B6rtl4+LL/Vfh+MOJcz0E23SVujtDT0pvxuP5aVGM+Faqif/
rQ4dKcYZokRHmuTlfg2azo4OmkLyrwsMjirna3NN3MX14wK5Ox53ESplGZXndt3V
Gy48IbXdTTjbmHT07aqPVSkFgulkaE9Z3MTw+vyn/r10ww6R55XtoSJIbS/v4+Y0
mzjTYTSHmxzpGHR4Rs+E1q9/7y8tbxO0uzFMHlmD8fNNbkK3FlXymGfVJFjSJGSN
hTN97zEYUKco4M6RXAly8XUrOetSglZwul1+gQnHYYCx7Y8BhgpyZtyjVeKzg1Mw
wqgAi+1+cOLG2JjI+h0Xo0xqvuWwl3e2jrmBZNs9BWoXaaWA2L7oqPL3bxq2TeWs
kF56I7YH5eD5sUGvShjrJ9WfKeN4hWpYSif/qg58kqz/zbCSjmmfiqQ7HmjJUetm
JnAZaik38YhsDvR8K1gECQiN2myjojjdyg3ONBk2y0Yho+ClVSMPo/qCceRy21/q
LVTRThQ0tZExH8zEJrJt
=rx3Z
-----END PGP SIGNATURE-----
Merge tag 'qcom-drivers-for-4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux into next/drivers
Qualcomm ARM Based Driver Updates for v4.20
* Refactor of SCM compatibles and clock requirements
* SMEM cleanup
* Add LLCC EDAC driver
* Fixes for GENI clocks and macros
* Fix includes for llcc-slice and smem
* String overflow fixes for APR and wcnss_ctrl
* Fixup for COMPILE_TEST of qcom driver Kconfigs
* Cleanup of Kconfig depends of rpmh, smd_rpm, smsm, and smp2p
* Add SCM dependencies to SPM and rmtfs-mem
* tag 'qcom-drivers-for-4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux: (38 commits)
soc: qcom: geni: geni_se_clk_freq_match() should always accept multiples
soc: qcom: geni: Don't ignore clk_round_rate() errors in geni_se_clk_tbl_get()
soc: qcom: geni: Make version macros simpler
dt-bindings: firmware: scm: Add MSM8998 and SDM845
firmware: qcom: scm: Refactor clock handling
dt-bindings: firmware: scm: Refactor compatibles and clocks
soc: qcom: smem: a few last cleanups
soc: qcom: smem: verify partition host ids match
soc: qcom: smem: small change in global entry loop
soc: qcom: smem: verify partition offset_free_uncached
soc: qcom: smem: verify partition header size
soc: qcom: smem: introduce qcom_smem_partition_header()
soc: qcom: smem: require order of host ids to match
soc: qcom: smem: verify both host ids in partition header
soc: qcom: smem: small refactor in qcom_smem_enumerate_partitions()
soc: qcom: smem: always ignore partitions with 0 offset or size
soc: qcom: smem: initialize region struct only when successful
soc: qcom: smem: rename variable in qcom_smem_get_global()
drivers: qcom: rpmh-rsc: clear wait_for_compl after use
soc: qcom: rmtfs-mem: Validate that scm is available
...
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The SPS power domain driver is extended for S900 SoC.
This required merging a topic branch for the new bindings header.
-----BEGIN PGP SIGNATURE-----
iQJFBAABCAAvFiEEF08DRxvMIhphdW+W+i7RLT5+AT8FAluxDmkRHGFmYWVyYmVy
QHN1c2UuZGUACgkQ+i7RLT5+AT+ryxAAk6dVEaVoyoY1CSR3oAZXQ5EF75zp9GY9
4YYLg95WzUd/JX+9dzWlOy4L95Rx+E1nLoOQQQiI9Z7AIkgsm75n5qWB9PRFzHQN
oH37uyRReet25eLijK7rzt5mRf82XFKnA10J2Efdot/STVrrfnb7kJ0Moyp5eQre
MeuifSRP0to7NKhpCnvuxmKkwQeYY+SexPFOH/yJj3q2lKWbqH8bJWRxk6h79yv3
cc2u+JfQ/7VhMFsHTfEnJeeQKIJJ/qYmXsGeSkWnl1NMonKAcsP4WeI3ebKhV1bl
gJtNVEEFQnVUGiWVdcHPE22nj9M2fhrF2WIU+EOlsIjaRspaRdi8Saa2Qxgiq5D3
bFRFgAl6waCe+iuJBmMuTus14qt2WkBP5I4aS8JBli/JnftfiSUcV2yySMA4nNlj
e7RDX71aF/qMZWxITbNHwV/Kj9DJESjbb54tegdL4qYbLtwCUYmvPqlmsYNXLRpp
0KPyWeqgSTY6aDsJm4ksdvzLXAWcae7Bqtz5Od+CZ77l24N2yuoSDymbs2LoHIVa
nQgCMCog3B2rO3WTR1TLxGKFrCa6Itv8HsU6qxj+0m2ff/KGEZokgOU2hK3t6xxW
YoI/+bLpuiaSzRDy0EGjyC4XN9Hz8AzN39bUIO2PxQM2UuG5aE6uqTlk/ahi6zpO
0fHImgLwewc=
=W/nr
-----END PGP SIGNATURE-----
Merge tag 'actions-drivers+s900-sps-for-4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/afaerber/linux-actions into next/drivers
Actions Semi SoC drivers for v4.20 #2
The SPS power domain driver is extended for S900 SoC.
This required merging a topic branch for the new bindings header.
* tag 'actions-drivers+s900-sps-for-4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/afaerber/linux-actions:
soc: actions: sps: Add S900 power domains
dt-bindings: power: Add Actions Semi S900 SPS
soc: actions: Update SPS help text for S700
soc: actions: Convert to SPDX license identifiers
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The H6 is now supported in our SRAM driver bindings, and we have a small
Makefile change for the SRAM driver to build it without building the
ARCH_SUNXI architecture, especially relevant for the COMPILE_TEST case.
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEE0VqZU19dR2zEVaqr0rTAlCFNr3QFAluviWMACgkQ0rTAlCFN
r3Sx6A//dRNFEnHEfeB6KUFo4pPJUKAZcXq8SpYw9Zx4zoCr2gAYEiuKMSqxLR3x
t2rIBIztoomqxbS2UTfLRKGrrZmi0TNUb9WCkbSsg4/Tbn5fC7kG0g78oEwNwrP9
9bsSL00jFpdQrSalKejf5x1EOqNBfkaBbB7jfPgSpCwZbSH3wwZ7cOr0V2fiVmdC
cD8mdNzgCHnjQti2Vx9lO4BqF1WpdJjmWiuMKaRDqaxnDQDVJYCFwe6NHAkUAfDp
mXoBjDF8end+KoWrjlfos/R2Uh9w3uuFQlHZwwT2f7s8+jbHQ+QpnKhkhgJXTM0i
qhMpGExv10Zs2WhmDhpkIpKETZRTzVL36t8eU3MrBNq5MKWCh1xiv1jK05YM6Myq
pgQfH0/3ljL/fjhvI1NvkmX/0W/ytOMGNHeiv0aNrzm4dtUwzhVl61bLSebMJ9FC
f3VXhpzWDQ325V8Vh/j8guGqnSSJrYMOruaVRPsd7DHy8yOOAqlWRqj4sauExlI5
nJmfhvBo7IVxtpb8DJNALviFCnuJuAAtB2q0jvWxq+XlKCOymwSnR/Q2eIQeLcgM
AzkwCW/9Oa/YpYc5/aaUb9PoEfKBGS/kczM1BQf5dqoNyXnkwa0BnOKqCKK1k8W1
I7T/Q71JkPll5PlIPyclMurv118cXuRyXAKXQvbXNFgytVdQsRk=
=Ar/W
-----END PGP SIGNATURE-----
Merge tag 'sunxi-drivers-for-4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into next/drivers
Allwinner drivers changes for 4.20
The H6 is now supported in our SRAM driver bindings, and we have a small
Makefile change for the SRAM driver to build it without building the
ARCH_SUNXI architecture, especially relevant for the COMPILE_TEST case.
* tag 'sunxi-drivers-for-4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
dt-bindings: sunxi-sram: add binding for Allwinner H6 SRAM C
drivers: soc: Allow building the sunxi driver without ARCH_SUNXI
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
i.MX8MQ and i.MX8MM share same gpc module with i.MX7D, they
can reuse gpcv2 pgc driver for power domain control, this
patch renames all functions and structure definitions started
with "imx7" to "imx", and use .data in imx_gpcv2_dt_ids[] to
pass platform specific power domain data for power domain
driver, thus make gpcv2 pgc driver more generic for i.MX
platforms.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Acked-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
gpcv2 driver is NOT just used on i.MX7D which has Cortex-A7
cores, but also on i.MX8MQ/i.MX8MM platforms which use Cortex-A53
cores, so let's use A_CORE instread of A7 to avoid confusion.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Acked-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This contains a pinctrl implementation for the pad configuration that
can be controlled from the PMC.
-----BEGIN PGP SIGNATURE-----
iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAlutQ20THHRyZWRpbmdA
bnZpZGlhLmNvbQAKCRDdI6zXfz6zoeXsD/9JoF6LjsoHB6BiFYiqMXQewXyC367Q
4Xom3uPH1vkqCatYuwkp3YXOTShKsOOHgLohTyOMYNxfTILJXsLKj4PFYrvxCYLh
VQpWIpYRjVYRMzoC0bJ8dpOBLlE9dghfMOvjSMZ/3LuUqtBf+uov09b0HEj3+5Ep
GvwTd01bTjJsDpEHD7hzQmU25LuGdjgxpDAL3iPtx0v1qTmishFlA2ZYMiB97Xu1
n1vMCygvLh8SjLKqtPeofHw6Ls+btn1UkQ91osifu8T24siLXm/sEDWz2gG/kNBy
X5ku5zDE7APMIEYdK6U88psgINy6FS2/mG6yelrXVkKa3Fo7VsvNxXg/OVla+Kja
rSsJLcGbYmJhGPbzIU0CjrusoS063OD/02NfzcWAiVuNsX0q1E5WfJ3Q2BH2nBeY
7ha84SszIOni5ia2/mf1w7AVrSxbXUvWgT+pf2FcBQnkFEv99nmfLXkhvaQZXcgP
4L3ECbThlI0c/6jVUu2m70nbB5UPY9K4bg8HcoKd6hsDWHeVaECflcsT6XqRSiX+
KnOztYgYhDJ0wJrR43QFyCGAL+orM1jQ50YVLzg7lpH7YHUuKJyIzQwchJLOOqLL
mLA2959Gkrbmt8VPObcHTobwkWZIk20LvIAmMOKC71jtf4QRhk7T1aWg/UaucA0y
/lLyu0hduXjVTQ==
=iZ7v
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-4.20-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/drivers
soc/tegra: Changes for v4.20-rc1
This contains a pinctrl implementation for the pad configuration that
can be controlled from the PMC.
* tag 'tegra-for-4.20-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
soc/tegra: pmc: Implement pad configuration via pinctrl
soc/tegra: pmc: Remove public pad voltage APIs
soc/tegra: pmc: Use X macro to generate IO pad tables
soc/tegra: pmc: Implement tegra_io_pad_is_powered()
soc/tegra: pmc: Factor out DPD register bit calculation
soc/tegra: pmc: Fix pad voltage configuration for Tegra186
soc/tegra: pmc: Fix child-node lookup
dt-bindings: Add Tegra PMC pad configuration bindings
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Add a couple of new APIs to check the probing status of qman and bman:
'int bman_is_probed()' and 'int qman_is_probed()'.
They return the following values.
* 1 if qman/bman were probed correctly
* 0 if qman/bman were not yet probed
* -1 if probing of qman/bman failed
Drivers that use qman/bman driver services are required to use these
APIs before calling any functions exported by qman or bman drivers
or otherwise they will crash the kernel.
The APIs will be used in the following couple of qbman portal patches
and later in the series in the dpaa1 ethernet driver.
Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
There is a copy and paste bug so we accidentally use the RX_ shift when
we're in TX_ mode.
Fixes: bb8b2062af ("fsl/qe: setup clock source for TDM mode")
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
(cherry picked from commit 3cb31b634052ed458922e0c8e2b4b093d7fb60b9)
Signed-off-by: Olof Johansson <olof@lixom.net>
If the qman driver didn't probe, calling qman_alloc_fqid_range,
qman_alloc_pool_range or qman_alloc_cgrid_range (as done in dpaa_eth) will
pass a NULL pointer to gen_pool_alloc, leading to a NULL pointer
dereference.
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Reviewed-by: Roy Pledge <roy.pledge@nxp.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
(cherry picked from commit f72487a2788aa70c3aee1d0ebd5470de9bac953a)
Signed-off-by: Olof Johansson <olof@lixom.net>
MT6357 is a new power management IC and it is used for mt6765 SoCs.
To define mt6357_regs for pmic register mapping and pmic_mt6357
for accessing register.
Signed-off-by: Argus Lin <argus.lin@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
mt6765 is a highly integrated SoCs, it uses mt6357 for power management.
This patch adds pwrap driver to access mt6357. Pwrap of mt6765 support
dynamic priority meichanism, sequence monitor and starvation mechanism
to make transaction more reliable.
Signed-off-by: Argus Lin <argus.lin@mediatek.com>
[mb: change has_bridge to capabilities]
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Return statements in functions returning bool should use true or false
instead of an integer value.
This issue was detected with the help of Coccinelle.
Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com>
Acked-by: Sean Wang <sean.wang@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
MT6358 is a new power management IC and it is used for
mt8183 SoCs. To define mt6358_regs for pmic register
mapping and pmic_mt6358 for accessing register.
Adding one more interrupt and wdt source.
Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Use group of bits for pwrap capability instead of
elements of structure.
This patch is preparing for adding mt8183 pwrap support.
Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Order SoC and PMIC numbers ascending to make the code more
readable.
Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Trivial fix to spelling mistake in dev_err messages and comments
Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
The geni_se_clk_freq_match() has some strange semantics. Specifically
it is defined with two modes:
1. It can find a clock that's an exact multiple of the requested rate
2. It can find a non-exact match but it can't handle multiples then
...but callers should always be able to handle a clock that is a
multiple of the requested clock so mode #2 doesn't really make sense.
Let's change the semantics so that the non-exact match can also accept
multiples and then change the code to handle that.
The only caller of this code is the unlanded SPI driver [1] which
currently passes "exact = True", thus it should be safe to change the
semantics in this way. ...and, in fact, the SPI driver should likely
be modified to pass "exact = False" (with the new semantics) since
that will allow it to work with SPI devices that request a clock rate
that doesn't exactly match a rate we can make.
[1] https://lkml.kernel.org/r/1535107336-2214-1-git-send-email-dkota@codeaurora.org
Fixes: eddac5af06 ("soc: qcom: Add GENI based QUP Wrapper driver")
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
The function clk_round_rate() is defined to return a "long", not an
"unsigned long". That's because it might return a negative error
code. Change the call in geni_se_clk_tbl_get() to check for errors.
While we're at it, get rid of a useless init of "freq".
NOTE: overall the idea that we should iterate over clk_round_rate() to
try to reconstruct a table already present in the clock driver is
questionable. Specifically:
- This method relies on "clk_round_rate()" rounding up.
- This method only works if the table is sorted and has no duplicates.
...this patch doesn't try to fix those problems, it just makes the
error handling more correct.
Fixes: eddac5af06 ("soc: qcom: Add GENI based QUP Wrapper driver")
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Commit 3ad85b08f7 (soc: actions: sps: Add S700)
added S700 support to the SPS driver but forget to update Kconfig help.
Add missing S700 mention, in preparation for further SoCs.
Fixes: 3ad85b08f7 ("soc: actions: sps: Add S700")
Reported-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Replace textual license notices with SPDX-License-Identifier lines.
Add an SPDX-License-Identifier for the Makefile.
Signed-off-by: Andreas Färber <afaerber@suse.de>
This commit adds back functions removed in
commit a211c8170b ("staging: fsl-mc/dpio: remove couple of unused functions")
since dpseci object will make use of them.
Acked-by: Li Yang <leoyang.li@nxp.com>
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Add support for RZ/G1N (R8A7744) SoC power areas to the R-Car SYSC driver.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add support for the RZ/G2E (R8A774C0) SoC power areas to the
R-Car SYSC driver.
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Biju Das <biju.das@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This patch contains several small cleanups:
- In qcom_smem_enumerate_partitions(), change the "local_host"
argument to have 16 bit unsigned type
- Also in qcom_smem_enumerate_partitions(), change the type of
the "host0" and "host1" local variables to be u16
- Fix error messages reporting host ids to use the right format
specifier
- Shorten the error messages as well, to fit on one line
- Add a compile-time check to ensure the local host value passed
to qcom_smem_enumerate_partitions() is in range
Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Add verification in qcom_smem_partition_header() that the host ids
found in a partition's header structure match those in its partition
table entry.
Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Change the logic in the loop that finds that global host entry in
the partition table not require the host0 and host1 local variables.
The next patch will remove them.
Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Add verification in qcom_smem_partition_header() that the
offset_free_uncached field in a partition's header structure does
not exceed the partition's size.
Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Add verification in qcom_smem_partition_header() that the size in a
partition's header structure matches the size in its partition table
entry.
Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Create a new function qcom_smem_partition_header() to encapsulate
validating locating a partition header and validating information
found within it. This will be built up over a few commits to make
it more obvious how the common function is replacing duplicated code
elsewhere. Initially it just verifies the header has the right
magic number.
Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
In qcom_smem_enumerate_partitions(), we find all partitions that
have a given local host id in either its host0 or its host1 field
in the partition table entry. We then verify that the header
structure at the start of each partition also contains the same two
host ids as is found in the table of contents.
There is no requirement that the order of the two host ids be the
same in the table of contents and in the partition header.
This patch changes that, requiring host0 to in the partition table
entry to equal host0 in the partition header structure (and similar
for the host1 values).
Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
The global partition is indicated by having both host values in its
table of contents entry equal SMEM_GLOBAL_HOST=0xfffe.
In qcom_smem_set_global_partition(), we check whether the header
structure at the beginning of the partition contains that host
value, but the check only verifies *one* of them. Change the check
so the partition header must have SMEM_GLOBAL_HOST for *both* its
host fields.
Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Combine the code that checks whether a partition table entry is
associated with the local host with the assignment of the remote
host id value.
Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
In qcom_smem_enumerate_partitions(), any partition table entry
having a zero offset or size field is ignored. Move those checks
earlier in the loop, because there's no sense in examining the
host fields for those entries.
Add the same checks in qcom_smem_set_global_partition(), so the
scan for the global partition skips over these invalid entries.
This allows a later check for zero size or offset once the global
entry is found to be eliminated.
Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Hold off initializing anything for the array entry representing a
memory region in qcom_smem_map_memory() until we know we've
successfully mapped it.
Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Rename the variable "area" to be "region" in qcom_smem_get_global(),
so its name better matches its type.
Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
The wait_for_compl register ensures the request sequence is maintained
when sending requests from the TCS. Clear the register after sending
active request and during invalidate of the sleep and wake TCS.
Reported-by: Raju P.L.S.S.S.N <rplsssn@codeaurora.org>
Signed-off-by: Lina Iyer <ilina@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
The scm device must be present in order for the rmtfs driver to
configure memory permissions for the rmtfs memory region, so check that
it is probed before continuing.
Cc: stable@vger.kernel.org
Fixes: fa65f80451 ("soc: qcom: rmtfs-mem: Add support for assigning memory to remote")
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Check for SCM availability before attempting to use SPM. SPM probe will
fail otherwise.
Signed-off-by: Felix Fietkau <nbd@nbd.name>
Signed-off-by: John Crispin <john@phrozen.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Since commit cab673583d ("soc: Unconditionally include qcom Makefile"),
we unconditionally include the soc/qcom/Makefile.
This opens up the possibility to compile test the code even when building
for other architectures.
Allow COMPILE_TEST for all qcom SoC Kconfigs, except for two Kconfigs
that depend on QCOM_SCM, since that triggers lots of build errors in
qcom_scm.
Signed-off-by: Niklas Cassel <niklas.cassel@linaro.org>
Reviewed-by: Vivek Gautam <vivek.gautam@codeaurora.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
'adev->name' is used as a NUL-terminated string, but using strncpy() with the
length equal to the buffer size may result in lack of the termination:
In function 'apr_add_device',
inlined from 'of_register_apr_devices' at drivers//soc/qcom/apr.c:264:7,
inlined from 'apr_probe' at drivers//soc/qcom/apr.c:290:2:
drivers//soc/qcom/apr.c:222:3: warning: 'strncpy' specified bound 32 equals destination size [-Wstringop-truncation]
strncpy(adev->name, np->name, APR_NAME_SIZE);
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
This changes it to use the safer strscpy() instead.
Signed-off-by: Niklas Cassel <niklas.cassel@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
'chinfo.name' is used as a NUL-terminated string, but using strncpy() with
the length equal to the buffer size may result in lack of the termination:
drivers//soc/qcom/wcnss_ctrl.c: In function 'qcom_wcnss_open_channel':
drivers//soc/qcom/wcnss_ctrl.c:284:2: warning: 'strncpy' specified bound 32 equals destination size [-Wstringop-truncation]
strncpy(chinfo.name, name, sizeof(chinfo.name));
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
This changes it to use the safer strscpy() instead.
Signed-off-by: Niklas Cassel <niklas.cassel@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
QCOM_RPHM already selects ARM64, which always selects OF.
Additionally, the rpmh driver only uses linux/of.h, which has dummy
definitions for all functions, in order for code to to be able to
build without CONFIG_OF set.
Remove the superfluous depends on OF.
Signed-off-by: Niklas Cassel <niklas.cassel@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Since we are using irq_domain_add_linear(), add a select on IRQ_DOMAIN.
This is needed in order to be able to remove the depends on ARCH_QCOM.
drivers/soc/qcom/smsm.c: In function ‘smsm_inbound_entry’:
drivers/soc/qcom/smsm.c:411:18: error: implicit declaration of function
‘irq_domain_add_linear’
entry->domain = irq_domain_add_linear(node, 32, &smsm_irq_ops, entry);
^~~~~~~~~~~~~~~~~~~~~
Signed-off-by: Niklas Cassel <niklas.cassel@linaro.org>
Reviewed-by: Vivek Gautam <vivek.gautam@codeaurora.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Since we are using irq_domain_add_linear(), add a select on IRQ_DOMAIN.
This is needed in order to be able to remove the depends on ARCH_QCOM.
drivers/soc/qcom/smp2p.c: In function ‘qcom_smp2p_inbound_entry’:
drivers/soc/qcom/smp2p.c:317:18: error: implicit declaration of function
‘irq_domain_add_linear’
entry->domain = irq_domain_add_linear(node, 32, &smp2p_irq_ops, entry);
^~~~~~~~~~~~~~~~~~~~~
Signed-off-by: Niklas Cassel <niklas.cassel@linaro.org>
Reviewed-by: Vivek Gautam <vivek.gautam@codeaurora.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Trivial fix to spelling mistake in dev_err message text
Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
The geni_se_clk_freq_match() has some strange semantics. Specifically
it is defined with two modes:
1. It can find a clock that's an exact multiple of the requested rate
2. It can find a non-exact match but it can't handle multiples then
...but callers should always be able to handle a clock that is a
multiple of the requested clock so mode #2 doesn't really make sense.
Let's change the semantics so that the non-exact match can also accept
multiples and then change the code to handle that.
The only caller of this code is the unlanded SPI driver [1] which
currently passes "exact = True", thus it should be safe to change the
semantics in this way. ...and, in fact, the SPI driver should likely
be modified to pass "exact = False" (with the new semantics) since
that will allow it to work with SPI devices that request a clock rate
that doesn't exactly match a rate we can make.
[1] https://lkml.kernel.org/r/1535107336-2214-1-git-send-email-dkota@codeaurora.org
Fixes: eddac5af06 ("soc: qcom: Add GENI based QUP Wrapper driver")
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
The function clk_round_rate() is defined to return a "long", not an
"unsigned long". That's because it might return a negative error
code. Change the call in geni_se_clk_tbl_get() to check for errors.
While we're at it, get rid of a useless init of "freq".
NOTE: overall the idea that we should iterate over clk_round_rate() to
try to reconstruct a table already present in the clock driver is
questionable. Specifically:
- This method relies on "clk_round_rate()" rounding up.
- This method only works if the table is sorted and has no duplicates.
...this patch doesn't try to fix those problems, it just makes the
error handling more correct.
Fixes: eddac5af06 ("soc: qcom: Add GENI based QUP Wrapper driver")
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Cache error reporting controller detects and reports single and
double bit errors on Last Level Cache Controller (LLCC) cache.
Add required support to register LLCC EDAC driver as platform driver,
from LLCC driver.
Signed-off-by: Venkata Narendra Kumar Gutta <vnkgutta@codeaurora.org>
Reviewed-by: Evan Green <evgreen@chromium.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Currently, broadcast base is set to end of the LLCC banks, which may
not be correct always. As the number of banks may vary for each chipset
and the broadcast base could be at a different address as well. This info
depends on the chipset, so get the broadcast base info from the device
tree (DT). Add broadcast base in LLCC driver and use this for broadcast
writes.
Signed-off-by: Venkata Narendra Kumar Gutta <vnkgutta@codeaurora.org>
Reviewed-by: Evan Green <evgreen@chromium.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Amlogic SoCs have a repository of 256 canvas which they use to
describe pixel buffers.
They contain metadata like width, height, block mode, endianness [..]
Many IPs within those SoCs like vdec/vpu rely on those canvas to read/write
pixels.
Reviewed-by: Jerome Brunet <jbrunet@baylibre.com>
Tested-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Maxime Jourdan <mjourdan@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
This makes it possible to build the sunxi SRAM driver without building
for the sunxi architecture. This allows selecting the driver when
building the kernel in testing environments.
In particular, this is necessary for testing of the Cedrus driver, that
selects the sunxi SRAM driver.
Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Add support for identifying the RZ/G2E (r8a774c0) SoC.
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This patch updates license to use SPDX-License-Identifier
instead of verbose license text.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add support for RZ/G2M (R8A774A1) SoC power areas to the R-Car SYSC
driver.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Chris Paterson <chris.paterson2@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
imx6_pm_domain_power_off() reads iso and iso2sw from GPC_PGC_PUPSCR_OFFS
which stores the power up delays.
So use GPC_PGC_PDNSCR_OFFS for the correct delays.
Signed-off-by: Sven Schmitt <sven.schmitt@mixed-mode.de>
Reviewed-by: Leonard Crestez <leonard.crestez@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Pointer 'priv' is being assigned but is never used hence it is
redundant and can be removed.
Cleans up clang warning:
variable 'priv' set but not used [-Wunused-but-set-variable]
Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
Keerthy