Commit Graph

14 Commits

Author SHA1 Message Date
Max Filippov fbb871e220 xtensa: clean up word alignment macros in assembly code
Remove duplicate definitions of ALIGN/src_b/__src_b and SSA8/ssa8/__ssa8
from assembly sources and put single definition into asm/asmmacro.h

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2017-12-10 14:48:53 -08:00
Max Filippov f8f02ca73c xtensa: build kernel with text-section-literals
vmlinux.lds.S doesn't do anything special with literals, so instead of
keeping them separate put them into the corresponding text sections.
Drop explicit .literal sections from the vmlinux.lds.S, use standard
section macros. Mark literal pool locations in the assembly sources.
Unfortunately assembler doesn't put literals into .init sections and
external libgcc may still have .literal sections, so sed transformation
to the linker script is still needed.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2017-12-10 14:48:51 -08:00
Max Filippov a83b02e9bd xtensa: allow single-stepping through unaligned load/store
Update icount when icountlevel is non-zero but not greater than EXCM level
when load/store instruction is successfully emulated. This allows
single-stepping over such instruction in userspace debugger.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2014-08-14 11:59:30 +04:00
Max Filippov 21570465a3 xtensa: move invalid unaligned instruction handler closer to its users
With this change a threaded jump from .Linvalid_instruction_load to
.Linvalid_instruction can be removed and more code may be added to
common load/store exit path.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2014-08-14 11:59:29 +04:00
Max Filippov e9500dd852 xtensa: make fast_unaligned store restartable
fast_unaligned may encounter DTLB miss or SEGFAULT during the store
emulation. Don't update epc1 and lcount until after the store emulation
is complete, so that the faulting store instruction could be replayed.
Remove duplicate code handling zero overhead loops and calculate new
epc1 and lcount in one place.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2014-08-14 11:59:28 +04:00
Max Filippov c3ef1f4d37 xtensa: add double exception fixup handler for fast_unaligned
fast_unaligned_fixup restores user registers and runs normal exception
handler in the current stack frame. Unaligned load/store is retried
after that.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2014-08-14 11:59:27 +04:00
Max Filippov a450dc69dc xtensa: fix kernel/user jump out of fast_unaligned
Use correct register (a0, just read from the PS) to check user mode bit.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2014-08-14 11:59:26 +04:00
Max Filippov 99d5040ebc xtensa: keep a3 and excsave1 on entry to exception handlers
Based on the SMP patch by Joe Taylor and subsequent fixes.
Preserve exception table pointer (normally stored in excsave1 SR) as it
cannot be easily restored in SMP environment.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Chris Zankel <chris@zankel.net>
2013-09-06 09:47:41 -07:00
Chris Zankel c4c4594b00 xtensa: clean up files to make them code-style compliant
Remove heading and trailing spaces, trim trailing lines, and wrap lines
that are longer than 80 characters.

Signed-off-by: Chris Zankel <chris@zankel.net>
2012-12-18 21:10:25 -08:00
Chris Zankel d1538c4675 xtensa: provide proper assembler function boundaries with ENDPROC()
Use ENDPROC() to mark the end of assembler functions.

Signed-off-by: Chris Zankel <chris@zankel.net>
2012-12-18 21:10:20 -08:00
Max Filippov bc5378fcba xtensa: reorganize SR referencing
- reference SRs by names where possible, not by numbers;
- get rid of __stringify around SR names where possible;
- remove unneeded SR names from asm/regs.h;
- add SREG_ prefix to remaining SR names;

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Chris Zankel <chris@zankel.net>
2012-10-15 21:48:08 -07:00
Chris Zankel 173d668138 [PATCH] xtensa: remove extra header files
The Xtensa port contained many header files that were never needed.  This
rather lengthy patch removes all those files.  Unfortunately, there were
many dependencies that needed to be updated, so this patch touches quite a
few source files.

Signed-off-by: Chris Zankel <chris@zankel.net>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-12-10 09:55:39 -08:00
Sam Ravnborg 0013a85454 kbuild: m68k,parisc,ppc,ppc64,s390,xtensa use generic asm-offsets.h support
Delete obsoleted parts form arch makefiles and rename to asm-offsets.h

Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
2005-09-09 20:57:26 +02:00
Chris Zankel 5a0015d626 [PATCH] xtensa: Architecture support for Tensilica Xtensa Part 3
The attached patches provides part 3 of an architecture implementation for the
Tensilica Xtensa CPU series.

Signed-off-by: Chris Zankel <chris@zankel.net>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-06-24 00:05:21 -07:00