2 Commits

Author	SHA1	Message	Date
Tomer Maimon	d893c4de01	arm: npcm: enable L2 cache in NPCM7xx architecture ... This patch Enable ARM L2 cache module in Nuvoton NPCM7xx BMC by adding L2 cache parameters into NPCM7xx DT machine start structure. At patch V7 arm: npcm: add basic support for Nuvoton BMCs we got comments regarding the flags use in L2 cache module. - https://www.spinics.net/lists/arm-kernel/msg613212.html After checking again the L2 cache use in the NPCM7xx, the only L2 cache flag we need to set is L2C_AUX_CTRL_SHARED_OVERRIDE and it is done in the device tree: https://patchwork.kernel.org/patch/10063497/ L2 cache flag mask allowed all the flag option. Signed-off-by: Tomer Maimon <tmaimon77@gmail.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>	2018-04-10 16:40:03 +02:00
Brendan Higgins	7bffa14c9a	arm: npcm: add basic support for Nuvoton BMCs ... Adds basic support for the Nuvoton NPCM750 BMC. Signed-off-by: Brendan Higgins <brendanhiggins@google.com> Reviewed-by: Tomer Maimon <tmaimon77@gmail.com> Reviewed-by: Avi Fishman <avifishman70@gmail.com> Tested-by: Tomer Maimon <tmaimon77@gmail.com> Tested-by: Avi Fishman <avifishman70@gmail.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>	2018-03-06 17:54:23 +01:00