Commit Graph

188 Commits

Author SHA1 Message Date
Arnd Bergmann 9e38081e5d Renesas ARM SoC updates for v5.4
- Low-level debugging support for RZ/A2M.
 -----BEGIN PGP SIGNATURE-----
 
 iHUEABYIAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCXV/PyQAKCRCKwlD9ZEnx
 cPvMAQCJ+/oDXHyg48BknWJd2HRMpGAkv4/YS+TM7GWkeVc5YQEA4vF2sQV8Q1zf
 NmMRB9sAHnROZb7GiLHkynHDDpjYYQk=
 =r42g
 -----END PGP SIGNATURE-----

Merge tag 'renesas-arm-soc-for-v5.4-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/soc

Renesas ARM SoC updates for v5.4

  - Low-level debugging support for RZ/A2M.

* tag 'renesas-arm-soc-for-v5.4-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
  ARM: debug-ll: Add support for r7s9210

Link: https://lore.kernel.org/r/20190823123643.18799-3-geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-09-03 23:12:58 +02:00
Geert Uytterhoeven e9670ccb39 ARM: debug-ll: Add support for r7s9210
Enable low-level debugging support for RZ/A2M (r7s9210).

The RZA2MEVB board uses either SCIF2 (SDRAM enabled) or SCIF4 (HyperRAM
only) for the serial console.

Note that "SCIFA" serial ports on RZ/A2 SoCs use a compressed register
layout, hence add support for that to renesas-scif.S.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
2019-08-21 11:15:26 +02:00
Arnd Bergmann a3950da161 Merge tag 'ux500-v5.4-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into arm/soc
This is a slew of Ux500 updates for the v5.4 kernel cycle:

- Stop populating the PRCMU devices from the core CPU
  file, it works just fine at device_initcall() level.

- Add a missing of_node_put() in the core file.

- Simplify the debug UART code.

- Add myself to MAINTAINERS

* tag 'ux500-v5.4-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson:
  MAINTAINERS: add soc/ux500
  ARM: ux500: simplify and move debug UART
  ARM: ux500: add missing of_node_put()
  ARM: ux500: Stop populating the PRCMU devices early

Link: https://lore.kernel.org/r/CACRpkdbH-h5fRwuidcpeOp8mtRoKUW65SAk8a4A==BCDzn3QMA@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-08-14 15:37:17 +02:00
Arnd Bergmann c68b26697d ARM: remove ks8695 platform
ks8695 is an older SoC originally made by Kendin, which was later acquired
by Micrel, and subsequently by Microchip.

The platform port was originally contributed by Andrew Victor and Ben
Dooks, and later maintained by Greg Ungerer.

When I recently submitted cleanups, but Greg noted that the platform no
longer boots and nobody is using it any more, we decided to remove it.

Link: https://lore.kernel.org/r/20190809202749.742267-2-arnd@arndb.de
Cc: Andrew Victor <linux@maxim.org.za>
Acked-by: Ben Dooks <ben-linux@fluff.org>
Link: https://wikidevi.com/wiki/Micrel
Link: https://lore.kernel.org/linux-arm-kernel/2bc41895-d4f9-896c-0726-0b2862fcbf25@kernel.org/
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Greg Ungerer <gerg@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-08-14 15:03:52 +02:00
Linus Walleij 428b504e84 ARM: ux500: simplify and move debug UART
The debug UART code defined three different virtual addresses
while only one is ever used. Get rid of this, and move the
UART remapping to 0xfffe8000 where DTCM reside on some platforms
but not on Ux500, so it can be reused moving the UART out of the
vmalloc area.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-07-23 10:44:14 +02:00
Linus Torvalds 24e44913aa ARM: SoC platform updates
SoC platform changes. Main theme this merge window:
 
  - The Netx platform (Netx 100/500) platform is removed by Linus Walleij--
    the SoC doesn't have active maintainers with hardware, and in
    discussions with the vendor the agreement was that it's OK to remove.
 
  - Russell King has a series of patches that cleans up and refactors
    SA1101 and RiscPC support.
 -----BEGIN PGP SIGNATURE-----
 
 iQJDBAABCAAtFiEElf+HevZ4QCAJmMQ+jBrnPN6EHHcFAl0yKOgPHG9sb2ZAbGl4
 b20ubmV0AAoJEIwa5zzehBx3SNEP/iJsMeeunX0P7Ym3zNFjykhspkkUmo7sEKuz
 NBcexnQpkm+OLgjfwT7j3kXvOs4mzMzH56J6h7dEDSHbQP1MDIgpMw6OEzMMsQTV
 XL1AWz1IO7Sq/mG17daPs9c75o6NYQ7pSEd/ncbjKuJQOpGsi4DyrVrhk9WdzYl2
 hcs4XOzOMZgDTsXHVdWkfpHazpWxEXPCD7v5bt6ueU0YnT3csUbzOTTvw+55JxRV
 fYz0lg4wTMRYMQMOejpx1HXwdmbVOHLUYkCxcLUaVqMnm88q/IddJVklBbPGWAU5
 Z4gFpL+FxcFhEZtu28CoubPYzf/mHDk8Ry2UWwBiRwiGoKfblomI1fpnbyrX53aE
 lpO5p7MfOVVV2WNxpbUND+ilbgKOREfRHd314GLPUjwudp2sTuDRZ1GAbt3JwsIM
 L1HesyjCtb6itCSwGsmmGsX2Wvu+WT7slpsYwHs2qklE/X1zQq0R4Jf2xUNpwqPb
 FqGZAtc6CCQtyF/Mcpp6OQd+cV0tgQVIw7teKol/xR1dSzN/+1zO1J9UHk9/dWUU
 sb5lGa/AtBrIbWxS1qLuA5bgyDqxXYDZi0y/Bu1qMHYebRW37z9kvomtzBiMNX2o
 SAxvr9iGPlTxTjGjRCyBVFmsbCMYLabNoL9tuuXvo+DnjFoOilTef+qePOv7ZYZX
 kwUyS2eu
 =FX6e
 -----END PGP SIGNATURE-----

Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC platform updates from Olof Johansson:
 "SoC platform changes. Main theme this merge window:

   - The Netx platform (Netx 100/500) platform is removed by Linus
     Walleij-- the SoC doesn't have active maintainers with hardware,
     and in discussions with the vendor the agreement was that it's OK
     to remove.

   - Russell King has a series of patches that cleans up and refactors
     SA1101 and RiscPC support"

* tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (47 commits)
  ARM: stm32: use "depends on" instead of "if" after prompt
  ARM: sa1100: convert to common clock framework
  ARM: exynos: Cleanup cppcheck shifting warning
  ARM: pxa/lubbock: remove lubbock_set_misc_wr() from global view
  ARM: exynos: Only build MCPM support if used
  arm: add missing include platform-data/atmel.h
  ARM: davinci: Use GPIO lookup table for DA850 LEDs
  ARM: OMAP2: drop explicit assembler architecture
  ARM: use arch_extension directive instead of arch argument
  ARM: imx: Switch imx7d to imx-cpufreq-dt for speed-grading
  ARM: bcm: Enable PINCTRL for ARCH_BRCMSTB
  ARM: bcm: Enable ARCH_HAS_RESET_CONTROLLER for ARCH_BRCMSTB
  ARM: riscpc: enable chained scatterlist support
  ARM: riscpc: reduce IRQ handling code
  ARM: riscpc: move RiscPC assembly files from arch/arm/lib to mach-rpc
  ARM: riscpc: parse video information from tagged list
  ARM: riscpc: add ecard quirk for Atomwide 3port serial card
  MAINTAINERS: mvebu: Add git entry
  soc: ti: pm33xx: Add a print while entering RTC only mode with DDR in self-refresh
  ARM: OMAP2+: Make some variables static
  ...
2019-07-19 17:05:08 -07:00
Thomas Gleixner d2912cb15b treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500
Based on 2 normalized pattern(s):

  this program is free software you can redistribute it and or modify
  it under the terms of the gnu general public license version 2 as
  published by the free software foundation

  this program is free software you can redistribute it and or modify
  it under the terms of the gnu general public license version 2 as
  published by the free software foundation #

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-only

has been chosen to replace the boilerplate/reference in 4122 file(s).

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Enrico Weigelt <info@metux.net>
Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Reviewed-by: Allison Randal <allison@lohutok.net>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190604081206.933168790@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-06-19 17:09:55 +02:00
Olof Johansson 6ad135992e This deletes the NetX 100/500 machine support.
-----BEGIN PGP SIGNATURE-----
 
 iQIcBAABAgAGBQJc7RjjAAoJEEEQszewGV1zRuQQAJZ6pM/2jOppdpftIjjdgXjy
 QNE4ss7gWqpKL+C1PFUOGau8J/A5+ypoKT1c4NUvPBSh6z3o5J6mLO3ATvYAdiqC
 ImjuxR3yz08fQ6trtZqAM9198ttfU1R5cx8r4e6Aa+/pejDod2MPbTvkSaXT7fks
 vBLPJp/OSGRM3jm+HUU2T7vb5vfXLEZwPR5l5yluZB5TbrwGikJnpFMZ8tHYB3LG
 wwuZa3fkVjtl2wEgKJRRhmlW7REACPFlZIxDf8nF+KLdpO/E+zj9z4E2NgrYvmEj
 hfyXc9p49oGsjx+U/eoRmgwy8wssYDfhk2kMWjeNOLsTKeinmYpSo/znpzQt+t6C
 SyoBazDkMRxO4/RrunzJO61jfrzzBnwE8psgcVxo10jyz8K5VTJ/xeQLuU8y877b
 9iBBYnwXMPU+34Fo0rOCzMq8cxpLTOpX2crMHT9idKl+X/7LCMN/R7nk/3UmnQDL
 Myzz618DkI4vPbfb831erlAAWcBn+u1ToNt8qaQW8C+FbOSmJkDncXGKRQEdVFRO
 aNuLvLfI+NC1r7Yzm4hGkRoxtdDz7HUtDSFpFkgc60A5LZ/EAKVHy5jhs2z6ch73
 0fcOBQyaaCnNW1OP7AWeltnY+tfXrO7xnurpytEUU4lpWT2OyNxdY6fq1gY6nefC
 ku4M0pYR7EoeVW86WKw/
 =MxUr
 -----END PGP SIGNATURE-----

Merge tag 'armsoc-drop-netx-v5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator into arm/soc

This deletes the NetX 100/500 machine support.

After discussing with the subarch maintainers and Hilscher,
we concluded that the netx subarchitecture (Netx 100/500)
is no longer maintained or tested, and noone will miss it
if we delete it. So delete it.

There is a newer Netx 4000 architecture which we may see
included at some point, but this will be supported using
the standard multiplatform and devicetree mechanisms and is
easier to develop from scratch.

* tag 'armsoc-drop-netx-v5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator:
  ARM: delete netx machine

Signed-off-by: Olof Johansson <olof@lixom.net>
2019-06-17 05:09:55 -07:00
Thomas Gleixner 9c92ab6191 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 282
Based on 1 normalized pattern(s):

  this software is licensed under the terms of the gnu general public
  license version 2 as published by the free software foundation and
  may be copied distributed and modified under those terms this
  program is distributed in the hope that it will be useful but
  without any warranty without even the implied warranty of
  merchantability or fitness for a particular purpose see the gnu
  general public license for more details

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-only

has been chosen to replace the boilerplate/reference in 285 file(s).

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Alexios Zavras <alexios.zavras@intel.com>
Reviewed-by: Allison Randal <allison@lohutok.net>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190529141900.642774971@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-06-05 17:36:37 +02:00
Thomas Gleixner 2874c5fd28 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152
Based on 1 normalized pattern(s):

  this program is free software you can redistribute it and or modify
  it under the terms of the gnu general public license as published by
  the free software foundation either version 2 of the license or at
  your option any later version

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-or-later

has been chosen to replace the boilerplate/reference in 3029 file(s).

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Allison Randal <allison@lohutok.net>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190527070032.746973796@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-05-30 11:26:32 -07:00
Linus Walleij ceb02dcf67 ARM: delete netx machine
After discussing with the subarch maintainers and Hilscher,
we concluded that the netx subarchitecture (Netx 100/500)
is no longer maintained or tested, and noone will miss it
if we delete it. So delete it.

There is a newer Netx 4000 architecture which we may see
included at some point, but this will be supported using
the standard multiplatform and devicetree mechanisms and is
easier to develop from scratch.

Cc: Michael Trensch <MTrensch@hilscher.com>
Acked-By: Robert Schwebel <r.schwebel@pengutronix.de>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-05-22 13:55:50 +02:00
Thomas Gleixner a636cd6c42 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 4
Based on 1 normalized pattern(s):

  licensed under gplv2 or later

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-or-later

has been chosen to replace the boilerplate/reference in 118 file(s).

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Jilayne Lovejoy <opensource@jilayne.com>
Reviewed-by: Steve Winslow <swinslow@gmail.com>
Reviewed-by: Allison Randal <allison@lohutok.net>
Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190519154040.961286471@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-05-21 11:28:40 +02:00
Stefan Agner e44fc38818 ARM: 8844/1: use unified assembler in assembly files
Use unified assembler syntax (UAL) in assembly files. Divided
syntax is considered deprecated. This will also allow to build
the kernel using LLVM's integrated assembler.

Signed-off-by: Stefan Agner <stefan@agner.ch>
Acked-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2019-02-26 11:26:07 +00:00
Olof Johansson ac21e9af5a This pull request contains Broadcom ARM-based SoCs machine files updates
for 4.21, please pull the following:
 
 - Stefan switches relevant BCM283x files under arch/arm/mach-bcm to the
   SPDX license identifiers
 
 - Justin adds an entry in the Broadcom STB debug LL stub for 7255
 
 - Florian enables reset controller support for BCM63xx SoCs
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEm+Rq3+YGJdiR9yuFh9CWnEQHBwQFAlwC0vMACgkQh9CWnEQH
 BwRjrQ//ZWip8GnZBcZNoov5M1KxSEkcpMvfM6VhplP3ZCftkxZ0FaTq82DvOG3v
 hiCE9iF9x77bsk/l0U1qU9SIJ7cVTtdNoZVeY7rtw2PaSRF1ZiiNY36fH8gM/ebY
 HftefXkVnnOmXmTK6C3Rt2AH1QPdCh1SrG/wp11n79FSC8ySSz0JXnvPa8hxJcyt
 Y9Wm5gwKYDl06VB5CVkjmyUcf4nIG5cqwYkVAGSM76/zIBB4nV4KhOHJo9M5RQvV
 IFxzYrTLCRZjutV8bKnl5V1IIwB1zPpr9hqxpdP8rwai2jEDG3LlJY+BPqT0vwM3
 RPUOOvpjQbICTpJ22353P2dQm2lKc304MzIljvYriCoY/hItELC57qxrHbKLn/yX
 k+/Ni+FdJfyjdxK2Ljl83+IgwrVc/QRDUVx55PP3QgaxMAKFmcj0xcIRWdlprKfI
 Q85rBTLiMhRESgICpZmMdZ3ZKgioPxC/n+/atPHPkQNlMofH/2R8mz6YBjCnuQ29
 MuNpgEEgv2Pvqh2OxUzZ77fsZxpA6Anwu7+jfu9v7rdI+3YZI5jZSdthwbphdd1D
 qJJVs3cU/U/b7nFq5aRI7x49ToYB5eszORDbmlK3lkkMsK7aQq2MlTW1cwpfckay
 LM/YhCGd02XyU+YZlIJChtV/YSoMvPlVNBPfPieTGkccKUu4mbY=
 =zL87
 -----END PGP SIGNATURE-----

Merge tag 'arm-soc/for-4.21/soc' of https://github.com/Broadcom/stblinux into next/soc

This pull request contains Broadcom ARM-based SoCs machine files updates
for 4.21, please pull the following:

- Stefan switches relevant BCM283x files under arch/arm/mach-bcm to the
  SPDX license identifiers

- Justin adds an entry in the Broadcom STB debug LL stub for 7255

- Florian enables reset controller support for BCM63xx SoCs

* tag 'arm-soc/for-4.21/soc' of https://github.com/Broadcom/stblinux:
  ARM: mach-bcm: Switch bcm2835 and platsmp to SPDX identifier
  ARM: BCM63XX: Enable reset controller support
  ARM: brcmstb: Add entry for 7255

Signed-off-by: Olof Johansson <olof@lixom.net>
2018-12-03 13:09:38 -08:00
Gerald Baeza d88bb418b7 ARM: stm32: debug: add low-level debug support
This adds low-level debug support on USART1 for STM32F4
and STM32F7.
Compiled via 'CONFIG_DEBUG_LL' and 'CONFIG_EARLY_PRINTK'.
Enabled via 'earlyprintk' in bootargs.

Signed-off-by: Gerald Baeza <gerald.baeza@st.com>
Signed-off-by: Bich Hemon <bich.hemon@st.com>
Acked-by: Alexandre TORGUE <alexandre.torgue@st.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2018-11-12 10:20:41 -08:00
Justin Chen 8f34fe4a89 ARM: brcmstb: Add entry for 7255
Add in BCM7255 entry and reorder entries to keep ascending order. Also
moved 7278 cause it was out of order.

Signed-off-by: Justin Chen <justinpopo6@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2018-11-06 16:40:59 -08:00
Wolfram Sang c44e182e53 ARM: shmobile: convert to SPDX identifier
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Acked-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-06-18 12:00:29 +02:00
Doug Berger 56e4446df9 ARM: brcmstb: Add support for the V7 memory map
The 7278 device is the first device that includes support for the V7
memory map developed for use in 64-bit architecture brcmstb devices.
This map relocates the register physical offset from 0xF0000000 to
0x0000000008000000.

Since the ARM PERIPHBASE value is also relocated in the V7 memory map
we can use its value to determine whether this device uses the new
V7 memory map and therefore where to look for the SUN_TOP_CTRL
register used to identify the chip family.

Signed-off-by: Doug Berger <opendmb@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2018-05-09 12:14:42 -07:00
Krzysztof Kozlowski f947153f92 ARM: EXYNOS: Add SPDX license identifiers
Replace GPL license statements with SPDX GPL-2.0 and GPL-2.0+ license
identifiers.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2018-02-12 19:55:21 +01:00
Linus Torvalds 8c60969856 ARM: SoC platform updates for 4.15
Most of the commits are for defconfig changes, to enable newly added
 drivers or features that people have started using. For the changed
 lines lines, we have mostly cleanups, the affected platforms are
 OMAP, Versatile, EP93xx, Samsung, Broadcom, i.MX, and Actions.
 
 The largest single change is the introduction of the TI "sysc" bus
 driver, with the intention of cleaning up more legacy code.
 
 Two new SoC platforms get added this time:
 - Allwinner R40 is a modernized version of the A20 chip, now
   with a Quad-Core ARM Cortex-A7. According to the manufacturer,
   it is intended for "Smart Hardware"
 - Broadcom Hurricane 2 (Aka Strataconnect BCM5334X) is a family
   of chips meant for managed gigabit ethernet switches, based
   around a Cortex-A9 CPU.
 
 Finally, we gain SMP support for two platforms: Renesas R-Car E2
 and Amlogic Meson8/8b, which were previously added but only supported
 uniprocessor operation.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJaDgf/AAoJEGCrR//JCVIntcMQAKI2q0Dr2giWtKSoH9GDh5co
 137MamTj1YExIcmtbDVO22jV4WSKhIduo+rRBYmQ/uvrkUe9tf7I172JeAIzMzGf
 HGYJ6fxpaEMUAbUlNcjuXJc7jQXNKLBK2X9CMuwXX3X3HddxKkL38D1d/Mxv5RGu
 G1pEe0j734Qio9LpACnb0xnluwyUBJOYNwo7Agj5RWzOrXZ+TdwkiIW0JdQiG7Z5
 wabzDa7OW1maB+hVYMAM3wHcqO7DKEvGvjYLRoT12cnOLXq7BNbXqXFufuMUNmNE
 ABhWA1h9SYrXT3n5pQLwoonvvTsI7KXCefrZ0wuxbjrdD4yGW1gmgpRee9RfoggD
 A6/62wpmSS61X5QWC6BLEa5v/o5NKewndyWhnjLllgJX8sRUbnPQa/xKv7ngdlN5
 7YL5HWoNpMQv7fEweSc6j5l/F3yRBndn9TpeKiqCiUiNDrIGlZYhYKIcr9rGESFk
 pu2KgK+e9+1k7F4s7LotsA65Q5bZIMveyyVtx0XHXz1G4O8NksoQCLJ3wcqQ2pzI
 WpyOO5R1CNltPhKGC7EP3OZcIMlCtCnsNcedb/AGHgPS+ert2UxBnlSeSMBQlLZY
 4fDwEAlA1qx9PuG9N3xrK/gAFiFLafK2sNxtVc7NSmXkkdm3xgJ95Y9sa72Y2qNO
 rU2LL8SM7cOwhXHrlEFB
 =jlJ2
 -----END PGP SIGNATURE-----

Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC platform updates from Arnd Bergmann:
 "Most of the commits are for defconfig changes, to enable newly added
  drivers or features that people have started using. For the changed
  lines lines, we have mostly cleanups, the affected platforms are OMAP,
  Versatile, EP93xx, Samsung, Broadcom, i.MX, and Actions.

  The largest single change is the introduction of the TI "sysc" bus
  driver, with the intention of cleaning up more legacy code.

  Two new SoC platforms get added this time:

   - Allwinner R40 is a modernized version of the A20 chip, now with a
     Quad-Core ARM Cortex-A7. According to the manufacturer, it is
     intended for "Smart Hardware"

   - Broadcom Hurricane 2 (Aka Strataconnect BCM5334X) is a family of
     chips meant for managed gigabit ethernet switches, based around a
     Cortex-A9 CPU.

  Finally, we gain SMP support for two platforms: Renesas R-Car E2 and
  Amlogic Meson8/8b, which were previously added but only supported
  uniprocessor operation"

* tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (118 commits)
  ARM: multi_v7_defconfig: Select RPMSG_VIRTIO as module
  ARM: multi_v7_defconfig: enable CONFIG_GPIO_UNIPHIER
  arm64: defconfig: enable CONFIG_GPIO_UNIPHIER
  ARM: meson: enable MESON_IRQ_GPIO in Kconfig for meson8b
  ARM: meson: Add SMP bringup code for Meson8 and Meson8b
  ARM: smp_scu: allow the platform code to read the SCU CPU status
  ARM: smp_scu: add a helper for powering on a specific CPU
  dt-bindings: Amlogic: Add Meson8 and Meson8b SMP related documentation
  ARM: OMAP3: Delete an unnecessary variable initialisation in omap3xxx_hwmod_init()
  ARM: OMAP3: Use common error handling code in omap3xxx_hwmod_init()
  ARM: defconfig: select the right SX150X driver
  arm64: defconfig: Enable QCOM_IOMMU
  arm64: Add ThunderX drivers to defconfig
  arm64: defconfig: Enable Tegra PCI controller
  cpufreq: imx6q: Move speed grading check to cpufreq driver
  arm64: defconfig: re-enable Qualcomm DB410c USB
  ARM: configs: stm32: Add MDMA support in STM32 defconfig
  ARM: imx: Enable cpuidle for i.MX6DL starting at 1.1
  bus: ti-sysc: Fix unbalanced pm_runtime_enable by adding remove
  bus: ti-sysc: mark PM functions as __maybe_unused
  ...
2017-11-16 14:05:12 -08:00
Greg Kroah-Hartman b24413180f License cleanup: add SPDX GPL-2.0 license identifier to files with no license
Many source files in the tree are missing licensing information, which
makes it harder for compliance tools to determine the correct license.

By default all files without license information are under the default
license of the kernel, which is GPL version 2.

Update the files which contain no license information with the 'GPL-2.0'
SPDX license identifier.  The SPDX identifier is a legally binding
shorthand, which can be used instead of the full boiler plate text.

This patch is based on work done by Thomas Gleixner and Kate Stewart and
Philippe Ombredanne.

How this work was done:

Patches were generated and checked against linux-4.14-rc6 for a subset of
the use cases:
 - file had no licensing information it it.
 - file was a */uapi/* one with no licensing information in it,
 - file was a */uapi/* one with existing licensing information,

Further patches will be generated in subsequent months to fix up cases
where non-standard license headers were used, and references to license
had to be inferred by heuristics based on keywords.

The analysis to determine which SPDX License Identifier to be applied to
a file was done in a spreadsheet of side by side results from of the
output of two independent scanners (ScanCode & Windriver) producing SPDX
tag:value files created by Philippe Ombredanne.  Philippe prepared the
base worksheet, and did an initial spot review of a few 1000 files.

The 4.13 kernel was the starting point of the analysis with 60,537 files
assessed.  Kate Stewart did a file by file comparison of the scanner
results in the spreadsheet to determine which SPDX license identifier(s)
to be applied to the file. She confirmed any determination that was not
immediately clear with lawyers working with the Linux Foundation.

Criteria used to select files for SPDX license identifier tagging was:
 - Files considered eligible had to be source code files.
 - Make and config files were included as candidates if they contained >5
   lines of source
 - File already had some variant of a license header in it (even if <5
   lines).

All documentation files were explicitly excluded.

The following heuristics were used to determine which SPDX license
identifiers to apply.

 - when both scanners couldn't find any license traces, file was
   considered to have no license information in it, and the top level
   COPYING file license applied.

   For non */uapi/* files that summary was:

   SPDX license identifier                            # files
   ---------------------------------------------------|-------
   GPL-2.0                                              11139

   and resulted in the first patch in this series.

   If that file was a */uapi/* path one, it was "GPL-2.0 WITH
   Linux-syscall-note" otherwise it was "GPL-2.0".  Results of that was:

   SPDX license identifier                            # files
   ---------------------------------------------------|-------
   GPL-2.0 WITH Linux-syscall-note                        930

   and resulted in the second patch in this series.

 - if a file had some form of licensing information in it, and was one
   of the */uapi/* ones, it was denoted with the Linux-syscall-note if
   any GPL family license was found in the file or had no licensing in
   it (per prior point).  Results summary:

   SPDX license identifier                            # files
   ---------------------------------------------------|------
   GPL-2.0 WITH Linux-syscall-note                       270
   GPL-2.0+ WITH Linux-syscall-note                      169
   ((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause)    21
   ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause)    17
   LGPL-2.1+ WITH Linux-syscall-note                      15
   GPL-1.0+ WITH Linux-syscall-note                       14
   ((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause)    5
   LGPL-2.0+ WITH Linux-syscall-note                       4
   LGPL-2.1 WITH Linux-syscall-note                        3
   ((GPL-2.0 WITH Linux-syscall-note) OR MIT)              3
   ((GPL-2.0 WITH Linux-syscall-note) AND MIT)             1

   and that resulted in the third patch in this series.

 - when the two scanners agreed on the detected license(s), that became
   the concluded license(s).

 - when there was disagreement between the two scanners (one detected a
   license but the other didn't, or they both detected different
   licenses) a manual inspection of the file occurred.

 - In most cases a manual inspection of the information in the file
   resulted in a clear resolution of the license that should apply (and
   which scanner probably needed to revisit its heuristics).

 - When it was not immediately clear, the license identifier was
   confirmed with lawyers working with the Linux Foundation.

 - If there was any question as to the appropriate license identifier,
   the file was flagged for further research and to be revisited later
   in time.

In total, over 70 hours of logged manual review was done on the
spreadsheet to determine the SPDX license identifiers to apply to the
source files by Kate, Philippe, Thomas and, in some cases, confirmation
by lawyers working with the Linux Foundation.

Kate also obtained a third independent scan of the 4.13 code base from
FOSSology, and compared selected files where the other two scanners
disagreed against that SPDX file, to see if there was new insights.  The
Windriver scanner is based on an older version of FOSSology in part, so
they are related.

Thomas did random spot checks in about 500 files from the spreadsheets
for the uapi headers and agreed with SPDX license identifier in the
files he inspected. For the non-uapi files Thomas did random spot checks
in about 15000 files.

In initial set of patches against 4.14-rc6, 3 files were found to have
copy/paste license identifier errors, and have been fixed to reflect the
correct identifier.

Additionally Philippe spent 10 hours this week doing a detailed manual
inspection and review of the 12,461 patched files from the initial patch
version early this week with:
 - a full scancode scan run, collecting the matched texts, detected
   license ids and scores
 - reviewing anything where there was a license detected (about 500+
   files) to ensure that the applied SPDX license was correct
 - reviewing anything where there was no detection but the patch license
   was not GPL-2.0 WITH Linux-syscall-note to ensure that the applied
   SPDX license was correct

This produced a worksheet with 20 files needing minor correction.  This
worksheet was then exported into 3 different .csv files for the
different types of files to be modified.

These .csv files were then reviewed by Greg.  Thomas wrote a script to
parse the csv files and add the proper SPDX tag to the file, in the
format that the file expected.  This script was further refined by Greg
based on the output to detect more types of files automatically and to
distinguish between header and source .c files (which need different
comment types.)  Finally Greg ran the script using the .csv files to
generate the patches.

Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Reviewed-by: Philippe Ombredanne <pombredanne@nexb.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-11-02 11:10:55 +01:00
Florian Fainelli c149635215 ARM: brcmstb: Add appropriate ARM_BE8() macros for swapping
Building a big-endian kernel for ARCH_BRCMSTB revealed that we would not
be correctly polling for the right bit in the busyuart macro, turns out
there are a few transformations needed to work with big-endian kernels.
First we need to swap the value we read from SUN_TOP_CTRL to properly
compare it against our local tables. Then, just like 8250.S we need to
swap the value before storing it, and conversely swap it after a load.

Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2017-09-25 11:56:04 -07:00
Linus Torvalds 8fac2f96ab Merge branch 'for-linus' of git://git.armlinux.org.uk/~rmk/linux-arm
Pull ARM updates from Russell King:
 "Low priority fixes and updates for ARM:

   - add some missing includes

   - efficiency improvements in system call entry code when tracing is
     enabled

   - ensure ARMv6+ is always built as EABI

   - export save_stack_trace_tsk()

   - fix fatal signal handling during mm fault

   - build translation table base address register from scratch

   - appropriately align the .data section to a word boundary where we
     rely on that data being word aligned"

* 'for-linus' of git://git.armlinux.org.uk/~rmk/linux-arm:
  ARM: 8691/1: Export save_stack_trace_tsk()
  ARM: 8692/1: mm: abort uaccess retries upon fatal signal
  ARM: 8690/1: lpae: build TTB control register value from scratch in v7_ttb_setup
  ARM: align .data section
  ARM: always enable AEABI for ARMv6+
  ARM: avoid saving and restoring registers unnecessarily
  ARM: move PC value into r9
  ARM: obtain thread info structure later
  ARM: use aliases for registers in entry-common
  ARM: 8689/1: scu: add missing errno include
  ARM: 8688/1: pm: add missing types include
2017-09-12 06:10:44 -07:00
Russell King 1abd350237 ARM: align .data section
Robert Jarzmik reports that his PXA25x system fails to boot with 4.12,
failing at __flush_whole_cache in arch/arm/mm/proc-xscale.S:215:

   0xc0019e20 <+0>:     ldr     r1, [pc, #788]
   0xc0019e24 <+4>:     ldr     r0, [r1]	<== here

with r1 containing 0xc06f82cd, which is the address of "clean_addr".
Examination of the System.map shows:

c06f22c8 D user_pmd_table
c06f22cc d __warned.19178
c06f22cd d clean_addr

indicating that a .data.unlikely section has appeared just before the
.data section from proc-xscale.S.  According to objdump -h, it appears
that our assembly files default their .data alignment to 2**0, which
is bad news if the preceding .data section size is not power-of-2
aligned at link time.

Add the appropriate .align directives to all assembly files in arch/arm
that are missing them where we require an appropriate alignment.

Reported-by: Robert Jarzmik <robert.jarzmik@free.fr>
Tested-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2017-08-14 16:22:55 +01:00
Tony Lindgren 51ef70037e ARM: debug: Use generic 8250 debug_ll for am3517 and am335x
We want to use generic 8250 debug_ll code to get DEBUG_UNCOMPRESS
working and to simplify the code. The old debug_ll code is no longer
needed and the machine ID based detection is no longer used.

Note that for most part there's no need to keep DEBUG_LL enabled.
We now have CONFIG_SERIAL_EARLYCON working very early as long as
the kernel cmdline has "earlycon" in it and the board specific dts
file has chosen configured with with the port using stdout-path.

Cc: Hoeun Ryu <hoeun.ryu@gmail.com>
Cc: Russell King <linux@armlinux.org.uk>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-07-17 00:53:42 -07:00
Tony Lindgren 2d1f7d2e24 ARM: debug: Use generic 8250 debug_ll for ti81xx
We want to use generic 8250 debug_ll code to get DEBUG_UNCOMPRESS
working and to simplify the code. The old debug_ll code is no longer
needed and the machine ID based detection is no longer used.

Note that for most part there's no need to keep DEBUG_LL enabled.
We now have CONFIG_SERIAL_EARLYCON working very early as long as
the kernel cmdline has "earlycon" in it and the board specific dts
file has chosen configured with with the port using stdout-path.

Cc: Hoeun Ryu <hoeun.ryu@gmail.com>
Cc: Russell King <linux@armlinux.org.uk>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-07-17 00:51:46 -07:00
Tony Lindgren fc23beb8a5 ARM: debug: Use generic 8250 debug_ll for omap3/4/5
We want to use generic 8250 debug_ll code to get DEBUG_UNCOMPRESS
working and to simplify the code. The old debug_ll code is no longer
needed and the machine ID based detection is no longer used.

Note that for most part there's no need to keep DEBUG_LL enabled.
We now have CONFIG_SERIAL_EARLYCON working very early as long as
the kernel cmdline has "earlycon" in it and the board specific dts
file has chosen configured with with the port using stdout-path.

Cc: Hoeun Ryu <hoeun.ryu@gmail.com>
Cc: Russell King <linux@armlinux.org.uk>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-07-17 00:49:08 -07:00
Tony Lindgren d2b310b023 ARM: debug: Use generic 8250 debug_ll for omap2 and omap3/4/5 common uarts
We want to use generic 8250 debug_ll code to get DEBUG_UNCOMPRESS
working and to simplify the code. The old debug_ll code is no longer
needed and the machine ID based detection is no longer used.

Note that for most part there's no need to keep DEBUG_LL enabled.
We now have CONFIG_SERIAL_EARLYCON working very early as long as
the kernel cmdline has "earlycon" in it and the board specific dts
file has chosen configured with with the port using stdout-path.

Cc: Hoeun Ryu <hoeun.ryu@gmail.com>
Cc: Russell King <linux@armlinux.org.uk>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-07-17 00:35:39 -07:00
Florian Fainelli d47b51ad31 ARM: brcmstb: Add entry for 7260
BCM7260 has the same UART base address as 7268, order the entries by
ascending chip number and alias the 7268 definition to the 7260
definition.

Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2017-03-15 14:57:50 -07:00
Florian Fainelli d0cf9d8a3c ARM: brcmstb: Add earlyprintk support using run-time checks
The SUN_TOP_CTRL_FAMILY_ID register  is at a fixed absolute address for
all of our supported chips, so utilize its value to determine what the
UARTA base address should be based on the value we read.

Since the code is called both during decompressor when the MMU is off,
and after the MMU has been turned on in the kernel, and we want to do
the lookup only once, we use the same technique as tegra.S and have a
shared storage location between the decompressor and the kernel.

Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2016-08-08 11:14:09 -07:00
Alexander Shiyan 32981ea5b9 ARM: clps711x: Reduce static map size
Last CLPS711X CPU register is PLLR has 0xa5a8 address, so we can reduce
the map to 48k and align the end of the static at VMALLOC_START.

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2016-07-06 17:38:52 +02:00
Olof Johansson 553228d073 Samsung mach/soc update for v4.8, part 2:
1. Endian-friendly fixes.
 2. Maintainers update.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJXdL7uAAoJEME3ZuaGi4PX9E0P/2XqWeRT2Ln1hrySGefz1zN+
 xIW7bsYaHWiFp0/ol4uWdDcyKTyN+Y8ROcsJmdnPjXrPRb/7Vicg9bMj4KziQGtG
 uQBJ7vu1sInf6ocMv0JaXagGiN9UbegXrJ/+HrS41NeQ4le75i//QleKppgY5cJ9
 1ymXfeKLPYAtuL7jVXh7+kvMEtrTpbH6JiIwSHk3pLUsxhTkiMI2nIcoe/NTGxkL
 Dr1yvtcXwOcWT8Bkn4cyb+hOculqwnc2jTvfUeWhqDEtGqAn8YJDFhMfJNxGd7bt
 EafSWVbdhG0KEOIvTSrHk7qek6exLXl9Kx5P0yRyE4D3/+CyO9Ya2rRi5WlGrGHI
 w9TSOoPzqHYt3aZ1XAY66yYhgfsaIk6TxbGaPtPjt1nZ6E86KqnK0821CF1HZiRL
 ySp2lO7PlGPtqNT9cVwZDSVBgeoYDhkiQUIQnJwAKauCZirmS6TRordnbBKU39SW
 bLUKzSFKHnPBa/u4NOJhflWIy4fg4ARJYDycCH7m/P01JvxNb4OJ6ycz/XeO90oS
 k1HKXOFjFNbklloC/sjyLRP71+ZkJuogH6uzYwuhShwRKyCXdfoI4yLS024mGejM
 u5r6MGVVKI9ZxZ9ImK8gfhgQ705AfxkhKFHu9BjHCLIsLg/F+PgdiNObI9FoA7Ym
 6sgq5xOhnhjjGaENvHFD
 =/T5k
 -----END PGP SIGNATURE-----

Merge tag 'samsung-soc-4.8-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/soc

Samsung mach/soc update for v4.8, part 2:
1. Endian-friendly fixes.
2. Maintainers update.

* tag 'samsung-soc-4.8-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
  MAINTAINERS: Extend Samsung SoC entry with S3C/S5P drivers
  ARM: SAMSUNG: Fix missing s5p_init_cpu() declaration
  ARM: EXYNOS: Fix UART address selection for DEBUG_LL
  ARM: EXYNOS: Fixup for __raw operations in suspend.c
  ARM: SAMSUNG: Fixup usage of __raw IO in PM
  ARM: EXYNOS: Fixup endian in pm/pmu
  ARM: EXYNOS: Fixups for big-endian operation
  ARM: SAMSUNG: Fixup endian issues in CPU detection
  ARM: EXYNOS: Fixup debug macros for big-endian
  ARM: s3c24xx: Sort cpufreq tables
  ARM: SAMSUNG: Fix typos

Signed-off-by: Olof Johansson <olof@lixom.net>
2016-07-05 22:41:01 -07:00
Joonyoung Shim 2f3428b5cf ARM: EXYNOS: Fix UART address selection for DEBUG_LL
The Exynos542x SoCs using A15+A7 can boot to A15 or A7. If it boots using
A7 (like on Odroid XU family boards), it can't choose right UART
physical address only the part number of CP15. Fix the detection logic
by checking the Cluster ID additionally.

Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
[k.kozlowski: Extend commit message]
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
2016-06-22 08:20:43 +02:00
Ben Dooks 4fdfa8623d ARM: EXYNOS: Fixup debug macros for big-endian
The exynos low-level debug macros need to be fixed if the system is being
built big endian. Add the necessary endian swaps for accessing the registers
to get output working again

Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
2016-06-21 13:08:09 +02:00
Alexandre Belloni 0b37e9e8dc ARM: at91: debug: use DEBUG_UART_VIRT
AT91 still uses an offset (0x0100 0000) from the physical address to map
the debug UART. This is unfortunate as for some platforms (sama5d3 and
earlier), it ends up in the PCI zone and PCI is enabled in multi_v7.
Switch to DEBUG_UART_VIRT to solve that.

Tested on sama5d3 and 9g20.

Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
2016-06-10 17:08:56 +02:00
Arnd Bergmann f3a186fbfd The i.MX SoC update for 4.6:
- Enable big endian mode support for i.MX platform
 - Add support for i.MX6QP SoC which is the latest i.MX6 family addition
 - Add basic suspend/resume support for i.MX25
 - A couple of i.MX7D support updates
 - A few random code cleanups
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQEcBAABAgAGBQJW1Z/XAAoJEFBXWFqHsHzOfUEH/1oiBDMBJEKH8/vmipV5cPmw
 TAcK4W/1mS0SZo8xSYyi0iGcs5loA7fiypBZv6tKxI2IZS1w3sbJ0eHeeUUkURsG
 okMpHCMeuEdjnWH/nTdABKGIlK1nAtwuDuD0BJqlk1VDLY/pIUY5kkoWsrXMlzwO
 VkS2ic90HjsijmLH5y38kgo6RvkDDBxMzl8lzTxwfMNO8P5zCn9Wiqeerlbt/+Nw
 +n8aDzow4XKuOaHaoh6/C9RSKkobCAs/RVwoYUhv4QCk1zC6rJ1Oq6yuYGJgiIOX
 +gtdAIxTVv4RDJfEWEMT+N9SFM4qcFDAGtGPoXZyRKeedC5/xXuD2yNn2RUzShc=
 =RoB/
 -----END PGP SIGNATURE-----

Merge tag 'imx-soc-4.6' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/soc

Merge "i.MX SoC update for 4.6" from Shawn Guo:

- Enable big endian mode support for i.MX platform
- Add support for i.MX6QP SoC which is the latest i.MX6 family addition
- Add basic suspend/resume support for i.MX25
- A couple of i.MX7D support updates
- A few random code cleanups

* tag 'imx-soc-4.6' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  ARM: imx: Make reset_control_ops const
  ARM: imx: Do L2 errata only if the L2 cache isn't enabled
  ARM: imx: select ARM_CPU_SUSPEND only for imx6
  ARM: mx25: Add basic suspend/resume support
  ARM: imx: Add msl code support for imx6qp
  ARM: imx: enable big endian mode
  ARM: imx: use endian-safe readl/readw/writel/writew
  ARM: imx7d: correct chip version information
  ARM: imx: select HAVE_ARM_ARCH_TIMER if selected i.MX7D
  ARM: imx6: fix cleanup path in imx6q_suspend_init()
2016-03-02 23:30:17 +01:00
Arnd Bergmann e91fb3bd75 ARM: at91: avoid defining CONFIG_* symbols in source code
In an invalid randconfig build (fixed by another patch),
I ran across this warning:

arch/arm/include/debug/at91.S:18:0: error: "CONFIG_DEBUG_UART_VIRT" redefined [-Werror]
 #define CONFIG_DEBUG_UART_VIRT AT91_IO_P2V(CONFIG_DEBUG_UART_PHYS)

As Russell pointed out, we should never #define a macro starting
with CONFIG_ in a source file, as that is rather confusing.

This renames the macro to avoid the symbol clash.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Suggested-by: Russell King <linux@arm.linux.org.uk>
Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2016-03-02 17:31:08 +01:00
Arnd Bergmann e7ada8dfd5 arm: Xilinx Zynq patches for v4.6
- SLCR early init
 - Fix L2 cache data corruption
 - Fix early printk uart setting
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iEYEABECAAYFAlbO/kIACgkQykllyylKDCE55wCdEI40Q6+gUEa4ZEH2Pkl2LqK7
 e/oAn23veiR4MaMZb3jKVLp1Lzt83x1B
 =qI6y
 -----END PGP SIGNATURE-----

Merge tag 'zynq-soc-for-4.6' of https://github.com/Xilinx/linux-xlnx into next/soc

Merge "ARM: Xilinx Zynq patches for v4.6" from Michal Simek:

- SLCR early init
- Fix L2 cache data corruption
- Fix early printk uart setting

* tag 'zynq-soc-for-4.6' of https://github.com/Xilinx/linux-xlnx:
  ARM: zynq: Move early printk virtual address to vmalloc area
  ARM: zynq: address L2 cache data corruption
  ARM: zynq: initialize slcr mapping earlier
2016-02-26 22:54:53 +01:00
Michal Simek 8fff2f752f ARM: zynq: Move early printk virtual address to vmalloc area
The patch
"ARM: 8432/1: move VMALLOC_END from 0xff000000 to 0xff800000"
(sha1: 6ff0966052)
has moved also start of VMALLOC area because size didn't change.
That's why origin location of vmalloc was
   vmalloc : 0xf0000000 - 0xff000000   ( 240 MB)
and now is
   vmalloc : 0xf0800000 - 0xff800000   ( 240 MB)

That's why uart virtual addresses need to be changed to reflect this new
memory setup. Starting address should be vmalloc start address.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
2016-02-25 14:06:03 +01:00
Mans Rullgard 0c5325466d ARM: debug: add support for Palmchip BK-310x UART
Some SoCs use a Palmchip BK-310x UART which is mostly 16550 compatible
but with a different register layout. While this UART has previously
only been supported in MIPS based chips (Alchemy, Ralink), the ARM based
SMP87xx series from Sigma Designs also uses it.

This patch allows the debug console to work with this type of UART.

Signed-off-by: Mans Rullgard <mans@mansr.com>
Signed-off-by: Marc Gonzalez <marc_gonzalez@sigmadesigns.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2016-02-08 13:52:34 -08:00
Johannes Berg 26e30c6489 ARM: imx: enable big endian mode
Enable ARM big-endian mode on mach-imx. This requires adding some
byte swapping in the debug functions (which otherwise hang forever)
and of course the secondary core bringup.

Tested (on top of 4.4) on i.MX6 HummingBoard quad-core (IMX6Q).

The patch is pretty much as suggested by Arnd Bergmann, thanks!

Signed-off-by: Johannes Berg <johannes@sipsolutions.net>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2016-02-02 13:31:19 +08:00
Arnd Bergmann 0045c0dd2f ARM: debug-ll: rework footbridge handling
Footbridge has two debug ports that are handled a bit differently:

The 8250 port uses the normal debug/8250.S implementation that is shared
with a lot of other platforms, but it relies on the DEBUG_UART_8250
option to be turned on automatically instead of being selected by
DEBUG_FOOTBRIDGE_COM1 as we do for most other platforms. I'm changing
this to use a 'select' and change the dependency to the debug symbol
rather than the platform symbol for consistency.

The DC21285 UART has a separate top-level option, and relies on
the traditional include/mach/debug-macro.S method. With the s3c64xx
multiplatform series queued up for 4.5, it is now the last one that does
this, so by moving this file to include/debug/dc21285.S, we can get
all platforms to do things the same way.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2015-12-15 23:43:29 +01:00
Alexandre Belloni 6f112a08c1 ARM: at91: debug: use DEBUG_UART_PHYS
Instead of having to add a new configuration option each time support for
new SoC is added, use CONFIG_DEBUG_UART_PHYS. For now,
CONFIG_DEBUG_UART_VIRT is automatically computed.

Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2015-09-21 16:31:15 +02:00
Olof Johansson 207b504a63 The i.MX SoC changes for 4.3:
- Add i.MX6 Ultralite SoC support, which is the newest addition to
    i.MX6 family.  It integrates a single Cortex-A7 core and a power
    management module that reduces the complexity of external power
    supply and simplifies power sequencing.
  - Change SNVS RTC driver to use syscon interface for register access,
    and add SNVS power key driver support.
  - Add a second clock for mxc rtc driver, and support device tree probe
    for the driver.
  - Add FEC MAC reference clock and phy fixup initialization for i.MX6UL
    platform.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQEcBAABAgAGBQJVyg8nAAoJEFBXWFqHsHzOQC8H/iY+cdNfAWIxYmt2CeF607su
 fLaycUSUPqPAERUTcHpjKyiKkRg2NWV7vFVWCkKaQ3RZ+IW6xNntkqMxzocS1sh2
 +70Ckp+B0orGuo96PkEXua9fNPf8/yaGiDhuJpK966VRRSSXRD15uOuqHAJ2Jz/v
 HEnEm3KANSSYS1heEJRqiiCsqhADRWl2RzgfV327aXtScP9zXlbJGlEc/jUVAY65
 wbqjsXdySeS3rECNMAYXnPU7IlK4NkRqrOi1JmTJCBlXqV2b6dBfjgIu9jOa91UG
 yRj7IEBJemqT4Ap1ee2NR3H1lDngt2JKg9XqRDL3j9alYvhAWGvhSY2UH2iPrFg=
 =emep
 -----END PGP SIGNATURE-----

Merge tag 'imx-soc-4.3' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/soc

The i.MX SoC changes for 4.3:
 - Add i.MX6 Ultralite SoC support, which is the newest addition to
   i.MX6 family.  It integrates a single Cortex-A7 core and a power
   management module that reduces the complexity of external power
   supply and simplifies power sequencing.
 - Change SNVS RTC driver to use syscon interface for register access,
   and add SNVS power key driver support.
 - Add a second clock for mxc rtc driver, and support device tree probe
   for the driver.
 - Add FEC MAC reference clock and phy fixup initialization for i.MX6UL
   platform.

* tag 'imx-soc-4.3' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  rtc: snvs: select option REGMAP_MMIO
  ARM: imx6ul: add fec MAC refrence clock and phy fixup init
  ARM: imx6ul: add fec bits to GPR syscon definition
  rtc: mxc: add support of device tree
  dt-binding: document the binding for mxc rtc
  rtc: mxc: use a second rtc clock
  input: snvs_pwrkey: use "wakeup-source" as deivce tree property name
  Document: devicetree: input: imx: i.mx snvs power device tree bindings
  input: keyboard: imx: add snvs power key driver
  Document: dt: fsl: snvs: change support syscon
  rtc: snvs: use syscon to access register
  ARM: imx: add low-level debug support for i.mx6ul
  ARM: imx: add i.mx6ul msl support

Signed-off-by: Olof Johansson <olof@lixom.net>
2015-08-18 13:10:05 -07:00
Olof Johansson b69354dfe2 arm: Xilinx Zynq SoC patches for v4.2
- Fix earlyprintk, jump trampoline for SMP
 - Update git tree location
 - Setup PL310 aux (bit 22)
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.10 (GNU/Linux)
 
 iEYEABECAAYFAlW7MWAACgkQykllyylKDCHkTACfT3Kzs+Cl7jc9A4kQ6dkbUqtC
 E1MAn0g3yHcqGHgUtfyHu6lXtptJFbDn
 =DuTZ
 -----END PGP SIGNATURE-----

Merge tag 'zynq-soc-for-4.3' of https://github.com/Xilinx/linux-xlnx into next/soc

arm: Xilinx Zynq SoC patches for v4.2

- Fix earlyprintk, jump trampoline for SMP
- Update git tree location
- Setup PL310 aux (bit 22)

* tag 'zynq-soc-for-4.3' of https://github.com/Xilinx/linux-xlnx:
  ARM: zynq: reserve space for jump target in secondary trampoline
  clk: zynq: remove redundant $(CONFIG_ARCH_ZYNQ) in Makefile
  MAINTAINERS: Update Zynq git tree location
  ARM: zynq: Set bit 22 in PL310 AuxCtrl register (6395/1)
  ARM: zynq: Fix earlyprintk in big endian mode

Signed-off-by: Olof Johansson <olof@lixom.net>
2015-08-05 10:53:52 +02:00
Nicolas Ferre c268a74310 ARM: at91/soc: add basic support for new sama5d2 SoC
Add Kconfig entries, header file changes and addition to the documentation.
The early debug infrastructure is also added for easy development.

Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2015-08-05 10:40:21 +02:00
Arun Chandran 974a2aba99 ARM: zynq: Fix earlyprintk in big endian mode
earlyprintk messages are not appearing on the terminal
emulator during a big endian kernel boot. In BE mode
sending full words to UART will result in unprintable
characters as they are byte swapped versions of printable
ones. So send only bytes.

Signed-off-by: Arun Chandran <achandran@mvista.com>
Tested-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-07-22 09:37:58 +02:00
Anson Huang 20c305f660 ARM: imx: add low-level debug support for i.mx6ul
Enable low-level debug support for i.MX6UL by adding the
debug port definitions for the SoC.

Singed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Fugang Duan <B38611@freescale.com>
Signed-off-by: Frank Li <Frank.Li@freescale.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2015-07-14 15:06:19 +08:00
Kevin Hilman 3e0d0b81ea The i.MX SoC updates for 4.2:
- Add new SoC i.MX7D support, which integrates two Cortex-A7 and one
    Cortex-M4 cores.
  - Support suspend from IRAM on i.MX53, so that DDR pins can be set to
    high impedance for more power saving during suspend.
  - Move i.MX clock drivers from arch/arm/mach-imx to drivers/clk/imx.
  - Move i.MX GPT timer driver from arch/arm/mach-imx into
    drivers/clocksource.
  - A couple of clock driver update for VF610 and i.MX6Q.
  - A few random code correction and improvement.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQEcBAABAgAGBQJVb7grAAoJEFBXWFqHsHzOWS0H/RXV1UjvsJTfK8+KR2SGY5QO
 3hU4YQYpnkukG2OtxAaWKXzIh+xeINqJ02cws/zyEfVZFsZp/i5Z7EM5811qQeNC
 f9uCtFCNynTnWjUP9YXELgAX3/DPHMr+Em5QGOWwh+311YypJyP7CttsJvmjJIUN
 qGYXdpy2xhqKgSGrnI+dhpxTdhtm/jmsggoM8qqi2aYB3c3rnWCc6QSBMR8oxFKB
 Tmxd/cc/6Pvbp7W+AztTb/z8UD21UJkn96FhUb9563HKjf7kvbP4ydJTwhBxfyQu
 YxE4kkejrnVNaUl1Tkqmf7rTgLKaU92nrLCuBDI/91OET+GQtq2R5fE8iMPs29k=
 =c254
 -----END PGP SIGNATURE-----

Merge tag 'imx-soc-4.2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/soc

The i.MX SoC updates for 4.2:
 - Add new SoC i.MX7D support, which integrates two Cortex-A7 and one
   Cortex-M4 cores.
 - Support suspend from IRAM on i.MX53, so that DDR pins can be set to
   high impedance for more power saving during suspend.
 - Move i.MX clock drivers from arch/arm/mach-imx to drivers/clk/imx.
 - Move i.MX GPT timer driver from arch/arm/mach-imx into
   drivers/clocksource.
 - A couple of clock driver update for VF610 and i.MX6Q.
 - A few random code correction and improvement.

* tag 'imx-soc-4.2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (44 commits)
  ARM: imx: imx7d requires anatop
  clocksource: timer-imx-gpt: remove include of <asm/mach/time.h>
  ARM: imx: move timer driver into drivers/clocksource
  ARM: imx: remove platform headers from timer driver
  ARM: imx: provide gpt device specific irq functions
  ARM: imx: get rid of variable timer_base
  ARM: imx: define gpt register offset per device type
  ARM: imx: move clock event variables into imx_timer
  ARM: imx: set up .set_next_event hook via imx_gpt_data
  ARM: imx: setup tctl register in device specific function
  ARM: imx: initialize gpt device type for DT boot
  ARM: imx: define an enum for gpt timer device type
  ARM: imx: move timer resources into a structure
  ARM: imx: use relaxed IO accessor in timer driver
  ARM: imx: make imx51/3 suspend optional
  ARM: clk-imx6q: refine sata's parent
  ARM: imx: clk-v610: Add clock for I2C2 and I2C3
  ARM: mach-imx: iomux-imx31: Use DECLARE_BITMAP
  ARM: imx: add imx7d clk tree support
  ARM: clk: imx: update pllv3 to support imx7
  ...

 Conflicts:
	arch/arm/mach-imx/Kconfig
2015-06-10 16:58:05 -07:00
Anson Huang 52d7aec2b8 ARM: imx7d: add low level debug uart support
Add low level uart debug support for imx7d

Signed-off-by: Frank Li <Frank.Li@freescale.com>
Signed-off-by: Bai Ping <b51503@freescale.com>
Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2015-06-03 14:49:35 +08:00