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arm64: dts: qcom: sm8550: Separate out X3 idle state 

[ Upstream commit 28b735232d5e16a34f98dbac1e7b5401c1c16d89 ]

The X3 core has different entry/exit/residency time requirements than
the big cluster. Denote them to stop confusing the scheduler.

Fixes: ffc50b2d38 ("arm64: dts: qcom: Add base SM8550 dtsi")
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20231218-topic-8550_fixes-v1-11-ce1272d77540@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
This commit is contained in:
Konrad Dybcio 2023-12-18 17:02:12 +01:00 committed by Greg Kroah-Hartman
parent 55c87e64a3
commit ff8434b61c
1 changed files with 11 additions and 1 deletions
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12
arch/arm64/boot/dts/qcom/sm8550.dtsi
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@ -298,6 +298,16 @@
min-residency-us = <4791>;
local-timer-stop;
};
PRIME_CPU_SLEEP_0: cpu-sleep-2-0 {
compatible = "arm,idle-state";
idle-state-name = "goldplus-rail-power-collapse";
arm,psci-suspend-param = <0x40000004>;
entry-latency-us = <500>;
exit-latency-us = <1350>;
min-residency-us = <7480>;
local-timer-stop;
};
};
domain-idle-states {
@ -398,7 +408,7 @@
CPU_PD7: power-domain-cpu7 {
#power-domain-cells = <0>;
power-domains = <&CLUSTER_PD>;
domain-idle-states = <&BIG_CPU_SLEEP_0>;
domain-idle-states = <&PRIME_CPU_SLEEP_0>;
};
CLUSTER_PD: power-domain-cluster {