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spi: Fixes for v3.15 

A few driver specific fixes here:
 
  - SH HSPI was dealing with its clocks incorrectly which meant it didn't
    work on some SoCs, fixing this also requires a small fix to one of
    the SoC clock trees to avoid breaking existing users.
  - The SiRF driver appears to have had several quality problems, it's
    fairly new and not widely used so this isn't too worrying.
  - A brute force fix for excessive locking in the Atmel driver, it needs
    further investigation but this deals with the immediate issue.
  - A build fix for the Blackfin driver.
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Merge tag 'spi-v3.15-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi

Pull spi fixes from Mark Brown:
 "A few driver specific fixes here:

   - SH HSPI was dealing with its clocks incorrectly which meant it
     didn't work on some SoCs, fixing this also requires a small fix to
     one of the SoC clock trees to avoid breaking existing users.
   - The SiRF driver appears to have had several quality problems, it's
     fairly new and not widely used so this isn't too worrying.
   - A brute force fix for excessive locking in the Atmel driver, it
     needs further investigation but this deals with the immediate
     issue.
   - A build fix for the Blackfin driver"

* tag 'spi-v3.15-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi:
  spi: atmel: Fix scheduling while atomic bug
  spi: sh-hspi: Do not specifically request shyway_clk clock
  ARM: shmobile: r8a7778: Use clks as MSTP007 parent
  spi: sirf: make GPIO chipselect function work well
  spi: sirf: set SPI controller in RISC IO chipselect mode
  spi: sirf: correct TXFIFO empty interrupt status bit
  spi: bfin5xx: fix build error
This commit is contained in:
Linus Torvalds 2014-04-24 12:01:05 -07:00
parent 92891ed6b1 201f9e4dd5
commit ff1e5b447e
5 changed files with 24 additions and 6 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
arch/arm/mach-shmobile/clock-r8a7778.c
View File

@ -170,7 +170,7 @@ static struct clk mstp_clks[MSTP_NR] = {
[MSTP010] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 10, 0), /* SSI2 */
[MSTP009] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 9, 0), /* SSI3 */
[MSTP008] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 8, 0), /* SRU */
[MSTP007] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 7, 0), /* HSPI */
[MSTP007] = SH_CLK_MSTP32(&s_clk, MSTPCR0, 7, 0), /* HSPI */
};
static struct clk_lookup lookups[] = {

3
drivers/spi/spi-atmel.c
View File

@ -1115,8 +1115,11 @@ static int atmel_spi_one_transfer(struct spi_master *master,
atmel_spi_next_xfer_pio(master, xfer);
}
/* interrupts are disabled, so free the lock for schedule */
atmel_spi_unlock(as);
ret = wait_for_completion_timeout(&as->xfer_completion,
SPI_DMA_TIMEOUT);
atmel_spi_lock(as);
if (WARN_ON(ret == 0)) {
dev_err(&spi->dev,
"spi trasfer timeout, err %d\n", ret);

1
drivers/spi/spi-bfin5xx.c
View File

@ -12,6 +12,7 @@
#include <linux/module.h>
#include <linux/delay.h>
#include <linux/device.h>
#include <linux/gpio.h>
#include <linux/slab.h>
#include <linux/io.h>
#include <linux/ioport.h>

4
drivers/spi/spi-sh-hspi.c
View File

@ -244,9 +244,9 @@ static int hspi_probe(struct platform_device *pdev)
return -ENOMEM;
}
clk = clk_get(NULL, "shyway_clk");
clk = clk_get(&pdev->dev, NULL);
if (IS_ERR(clk)) {
dev_err(&pdev->dev, "shyway_clk is required\n");
dev_err(&pdev->dev, "couldn't get clock\n");
ret = -EINVAL;
goto error0;
}

20
drivers/spi/spi-sirf.c
View File

@ -287,8 +287,8 @@ static irqreturn_t spi_sirfsoc_irq(int irq, void *dev_id)
sspi->left_rx_word)
sspi->rx_word(sspi);
if (spi_stat & (SIRFSOC_SPI_FIFO_EMPTY
| SIRFSOC_SPI_TXFIFO_THD_REACH))
if (spi_stat & (SIRFSOC_SPI_TXFIFO_EMPTY |
SIRFSOC_SPI_TXFIFO_THD_REACH))
while (!((readl(sspi->base + SIRFSOC_SPI_TXFIFO_STATUS)
& SIRFSOC_SPI_FIFO_FULL)) &&
sspi->left_tx_word)
@ -470,7 +470,16 @@ static void spi_sirfsoc_chipselect(struct spi_device *spi, int value)
writel(regval, sspi->base + SIRFSOC_SPI_CTRL);
} else {
int gpio = sspi->chipselect[spi->chip_select];
gpio_direction_output(gpio, spi->mode & SPI_CS_HIGH ? 0 : 1);
switch (value) {
case BITBANG_CS_ACTIVE:
gpio_direction_output(gpio,
spi->mode & SPI_CS_HIGH ? 1 : 0);
break;
case BITBANG_CS_INACTIVE:
gpio_direction_output(gpio,
spi->mode & SPI_CS_HIGH ? 0 : 1);
break;
}
}
}
@ -559,6 +568,11 @@ spi_sirfsoc_setup_transfer(struct spi_device *spi, struct spi_transfer *t)
regval &= ~SIRFSOC_SPI_CMD_MODE;
sspi->tx_by_cmd = false;
}
/*
* set spi controller in RISC chipselect mode, we are controlling CS by
* software BITBANG_CS_ACTIVE and BITBANG_CS_INACTIVE.
*/
regval |= SIRFSOC_SPI_CS_IO_MODE;
writel(regval, sspi->base + SIRFSOC_SPI_CTRL);
if (IS_DMA_VALID(t)) {