regmap: Updates for v5.13
A couple of fixes in this release, plus a couple of new features for regmap-irq - we now support sub-irq blocks at arbatrary addresses and can remap configuration bitfields for interrupts split over multiple registers to the Linux configurations. -----BEGIN PGP SIGNATURE----- iQEzBAABCgAdFiEEreZoqmdXGLWf4p/qJNaLcl1Uh9AFAmB9cK8ACgkQJNaLcl1U h9CAxwf+OaLM8JgVOrTyW4R3LP3e8s9fJfThUJoypuZvAck7aUpt+anz2R7Q9pxi qUd0fPH6O+heCWJRQww7uAz/CVQF0NTDphMuq89Y7JP9HxzNFKHXL/5ifX84uKIe F26CaBo419qUuf5NeXACHSST0hSk5tP8LFofc2PXJwZbJm7Evi+dWj09LJa8vruH zx7zZHtJkwdMtGDIlYdy7S5hxXOsapnwgD8hucDZkjpLwcGYwAdhhxf6DhDk9p2h gkVXMS8ffIVNXtk38rbbAqMg8jQMvMWZDoqwYIcIUbWn4et1wv4pa5TPH5tY1ULY //+Wa2QXdX41UPylBZd5HEdv0A9HOQ== =L2qJ -----END PGP SIGNATURE----- Merge tag 'regmap-v5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regmap Pull regmap updates from Mark Brown: "A couple of fixes in this release, plus a couple of new features for regmap-irq - we now support sub-irq blocks at arbatrary addresses and can remap configuration bitfields for interrupts split over multiple registers to the Linux configurations" * tag 'regmap-v5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regmap: regmap-irq: Fix dereference of a potentially null d->virt_buf regmap-irq: Add driver callback to configure virtual regs regmap-irq: Introduce virtual regs to handle more config regs regmap-irq: Extend sub-irq to support non-fixed reg strides regmap: set debugfs_name to NULL after it is freed
This commit is contained in:
commit
fed584c408
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@ -660,6 +660,7 @@ void regmap_debugfs_exit(struct regmap *map)
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regmap_debugfs_free_dump_cache(map);
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regmap_debugfs_free_dump_cache(map);
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mutex_unlock(&map->cache_lock);
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mutex_unlock(&map->cache_lock);
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kfree(map->debugfs_name);
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kfree(map->debugfs_name);
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map->debugfs_name = NULL;
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} else {
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} else {
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struct regmap_debugfs_node *node, *tmp;
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struct regmap_debugfs_node *node, *tmp;
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@ -38,6 +38,7 @@ struct regmap_irq_chip_data {
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unsigned int *wake_buf;
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unsigned int *wake_buf;
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unsigned int *type_buf;
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unsigned int *type_buf;
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unsigned int *type_buf_def;
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unsigned int *type_buf_def;
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unsigned int **virt_buf;
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unsigned int irq_reg_stride;
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unsigned int irq_reg_stride;
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unsigned int type_reg_stride;
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unsigned int type_reg_stride;
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@ -45,6 +46,27 @@ struct regmap_irq_chip_data {
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bool clear_status:1;
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bool clear_status:1;
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};
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};
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static int sub_irq_reg(struct regmap_irq_chip_data *data,
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unsigned int base_reg, int i)
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{
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const struct regmap_irq_chip *chip = data->chip;
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struct regmap *map = data->map;
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struct regmap_irq_sub_irq_map *subreg;
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unsigned int offset;
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int reg = 0;
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if (!chip->sub_reg_offsets || !chip->not_fixed_stride) {
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/* Assume linear mapping */
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reg = base_reg + (i * map->reg_stride * data->irq_reg_stride);
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} else {
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subreg = &chip->sub_reg_offsets[i];
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offset = subreg->offset[0];
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reg = base_reg + offset;
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}
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return reg;
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}
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static inline const
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static inline const
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struct regmap_irq *irq_to_regmap_irq(struct regmap_irq_chip_data *data,
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struct regmap_irq *irq_to_regmap_irq(struct regmap_irq_chip_data *data,
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int irq)
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int irq)
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@ -73,7 +95,7 @@ static void regmap_irq_sync_unlock(struct irq_data *data)
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{
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{
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struct regmap_irq_chip_data *d = irq_data_get_irq_chip_data(data);
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struct regmap_irq_chip_data *d = irq_data_get_irq_chip_data(data);
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struct regmap *map = d->map;
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struct regmap *map = d->map;
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int i, ret;
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int i, j, ret;
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u32 reg;
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u32 reg;
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u32 unmask_offset;
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u32 unmask_offset;
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u32 val;
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u32 val;
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@ -87,8 +109,7 @@ static void regmap_irq_sync_unlock(struct irq_data *data)
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if (d->clear_status) {
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if (d->clear_status) {
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for (i = 0; i < d->chip->num_regs; i++) {
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for (i = 0; i < d->chip->num_regs; i++) {
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reg = d->chip->status_base +
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reg = sub_irq_reg(d, d->chip->status_base, i);
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(i * map->reg_stride * d->irq_reg_stride);
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ret = regmap_read(map, reg, &val);
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ret = regmap_read(map, reg, &val);
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if (ret)
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if (ret)
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@ -108,8 +129,7 @@ static void regmap_irq_sync_unlock(struct irq_data *data)
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if (!d->chip->mask_base)
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if (!d->chip->mask_base)
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continue;
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continue;
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reg = d->chip->mask_base +
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reg = sub_irq_reg(d, d->chip->mask_base, i);
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(i * map->reg_stride * d->irq_reg_stride);
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if (d->chip->mask_invert) {
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if (d->chip->mask_invert) {
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ret = regmap_irq_update_bits(d, reg,
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ret = regmap_irq_update_bits(d, reg,
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d->mask_buf_def[i], ~d->mask_buf[i]);
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d->mask_buf_def[i], ~d->mask_buf[i]);
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@ -136,8 +156,7 @@ static void regmap_irq_sync_unlock(struct irq_data *data)
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dev_err(d->map->dev, "Failed to sync masks in %x\n",
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dev_err(d->map->dev, "Failed to sync masks in %x\n",
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reg);
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reg);
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reg = d->chip->wake_base +
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reg = sub_irq_reg(d, d->chip->wake_base, i);
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(i * map->reg_stride * d->irq_reg_stride);
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if (d->wake_buf) {
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if (d->wake_buf) {
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if (d->chip->wake_invert)
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if (d->chip->wake_invert)
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ret = regmap_irq_update_bits(d, reg,
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ret = regmap_irq_update_bits(d, reg,
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@ -161,8 +180,8 @@ static void regmap_irq_sync_unlock(struct irq_data *data)
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* it'll be ignored in irq handler, then may introduce irq storm
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* it'll be ignored in irq handler, then may introduce irq storm
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*/
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*/
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if (d->mask_buf[i] && (d->chip->ack_base || d->chip->use_ack)) {
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if (d->mask_buf[i] && (d->chip->ack_base || d->chip->use_ack)) {
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reg = d->chip->ack_base +
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reg = sub_irq_reg(d, d->chip->ack_base, i);
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(i * map->reg_stride * d->irq_reg_stride);
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/* some chips ack by write 0 */
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/* some chips ack by write 0 */
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if (d->chip->ack_invert)
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if (d->chip->ack_invert)
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ret = regmap_write(map, reg, ~d->mask_buf[i]);
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ret = regmap_write(map, reg, ~d->mask_buf[i]);
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@ -187,8 +206,7 @@ static void regmap_irq_sync_unlock(struct irq_data *data)
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for (i = 0; i < d->chip->num_type_reg; i++) {
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for (i = 0; i < d->chip->num_type_reg; i++) {
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if (!d->type_buf_def[i])
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if (!d->type_buf_def[i])
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continue;
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continue;
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reg = d->chip->type_base +
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reg = sub_irq_reg(d, d->chip->type_base, i);
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(i * map->reg_stride * d->type_reg_stride);
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if (d->chip->type_invert)
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if (d->chip->type_invert)
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ret = regmap_irq_update_bits(d, reg,
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ret = regmap_irq_update_bits(d, reg,
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d->type_buf_def[i], ~d->type_buf[i]);
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d->type_buf_def[i], ~d->type_buf[i]);
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@ -201,6 +219,20 @@ static void regmap_irq_sync_unlock(struct irq_data *data)
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}
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}
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}
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}
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if (d->chip->num_virt_regs) {
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for (i = 0; i < d->chip->num_virt_regs; i++) {
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for (j = 0; j < d->chip->num_regs; j++) {
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reg = sub_irq_reg(d, d->chip->virt_reg_base[i],
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j);
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ret = regmap_write(map, reg, d->virt_buf[i][j]);
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if (ret != 0)
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dev_err(d->map->dev,
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"Failed to write virt 0x%x: %d\n",
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reg, ret);
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}
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}
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}
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if (d->chip->runtime_pm)
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if (d->chip->runtime_pm)
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pm_runtime_put(map->dev);
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pm_runtime_put(map->dev);
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@ -301,6 +333,11 @@ static int regmap_irq_set_type(struct irq_data *data, unsigned int type)
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default:
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default:
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return -EINVAL;
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return -EINVAL;
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}
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}
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if (d->chip->set_type_virt)
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return d->chip->set_type_virt(d->virt_buf, type, data->hwirq,
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reg);
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return 0;
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return 0;
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}
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}
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@ -352,8 +389,15 @@ static inline int read_sub_irq_data(struct regmap_irq_chip_data *data,
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for (i = 0; i < subreg->num_regs; i++) {
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for (i = 0; i < subreg->num_regs; i++) {
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unsigned int offset = subreg->offset[i];
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unsigned int offset = subreg->offset[i];
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ret = regmap_read(map, chip->status_base + offset,
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if (chip->not_fixed_stride)
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&data->status_buf[offset]);
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ret = regmap_read(map,
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chip->status_base + offset,
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&data->status_buf[b]);
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else
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ret = regmap_read(map,
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chip->status_base + offset,
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&data->status_buf[offset]);
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if (ret)
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if (ret)
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break;
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break;
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}
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}
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@ -474,10 +518,9 @@ static irqreturn_t regmap_irq_thread(int irq, void *d)
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} else {
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} else {
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for (i = 0; i < data->chip->num_regs; i++) {
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for (i = 0; i < data->chip->num_regs; i++) {
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ret = regmap_read(map, chip->status_base +
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unsigned int reg = sub_irq_reg(data,
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(i * map->reg_stride
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data->chip->status_base, i);
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* data->irq_reg_stride),
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ret = regmap_read(map, reg, &data->status_buf[i]);
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&data->status_buf[i]);
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if (ret != 0) {
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if (ret != 0) {
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dev_err(map->dev,
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dev_err(map->dev,
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@ -499,8 +542,8 @@ static irqreturn_t regmap_irq_thread(int irq, void *d)
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data->status_buf[i] &= ~data->mask_buf[i];
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data->status_buf[i] &= ~data->mask_buf[i];
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if (data->status_buf[i] && (chip->ack_base || chip->use_ack)) {
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if (data->status_buf[i] && (chip->ack_base || chip->use_ack)) {
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reg = chip->ack_base +
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reg = sub_irq_reg(data, data->chip->ack_base, i);
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(i * map->reg_stride * data->irq_reg_stride);
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if (chip->ack_invert)
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if (chip->ack_invert)
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ret = regmap_write(map, reg,
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ret = regmap_write(map, reg,
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~data->status_buf[i]);
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~data->status_buf[i]);
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@ -605,6 +648,12 @@ int regmap_add_irq_chip_fwnode(struct fwnode_handle *fwnode,
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return -EINVAL;
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return -EINVAL;
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}
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}
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if (chip->not_fixed_stride) {
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for (i = 0; i < chip->num_regs; i++)
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|
if (chip->sub_reg_offsets[i].num_regs != 1)
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return -EINVAL;
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}
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if (irq_base) {
|
if (irq_base) {
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irq_base = irq_alloc_descs(irq_base, 0, chip->num_irqs, 0);
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irq_base = irq_alloc_descs(irq_base, 0, chip->num_irqs, 0);
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if (irq_base < 0) {
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if (irq_base < 0) {
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@ -662,6 +711,24 @@ int regmap_add_irq_chip_fwnode(struct fwnode_handle *fwnode,
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goto err_alloc;
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goto err_alloc;
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}
|
}
|
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|
|
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|
if (chip->num_virt_regs) {
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|
/*
|
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|
* Create virt_buf[chip->num_extra_config_regs][chip->num_regs]
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|
*/
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d->virt_buf = kcalloc(chip->num_virt_regs, sizeof(*d->virt_buf),
|
||||||
|
GFP_KERNEL);
|
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|
if (!d->virt_buf)
|
||||||
|
goto err_alloc;
|
||||||
|
|
||||||
|
for (i = 0; i < chip->num_virt_regs; i++) {
|
||||||
|
d->virt_buf[i] = kcalloc(chip->num_regs,
|
||||||
|
sizeof(unsigned int),
|
||||||
|
GFP_KERNEL);
|
||||||
|
if (!d->virt_buf[i])
|
||||||
|
goto err_alloc;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
d->irq_chip = regmap_irq_chip;
|
d->irq_chip = regmap_irq_chip;
|
||||||
d->irq_chip.name = chip->name;
|
d->irq_chip.name = chip->name;
|
||||||
d->irq = irq;
|
d->irq = irq;
|
||||||
|
@ -700,8 +767,8 @@ int regmap_add_irq_chip_fwnode(struct fwnode_handle *fwnode,
|
||||||
if (!chip->mask_base)
|
if (!chip->mask_base)
|
||||||
continue;
|
continue;
|
||||||
|
|
||||||
reg = chip->mask_base +
|
reg = sub_irq_reg(d, d->chip->mask_base, i);
|
||||||
(i * map->reg_stride * d->irq_reg_stride);
|
|
||||||
if (chip->mask_invert)
|
if (chip->mask_invert)
|
||||||
ret = regmap_irq_update_bits(d, reg,
|
ret = regmap_irq_update_bits(d, reg,
|
||||||
d->mask_buf[i], ~d->mask_buf[i]);
|
d->mask_buf[i], ~d->mask_buf[i]);
|
||||||
|
@ -725,8 +792,7 @@ int regmap_add_irq_chip_fwnode(struct fwnode_handle *fwnode,
|
||||||
continue;
|
continue;
|
||||||
|
|
||||||
/* Ack masked but set interrupts */
|
/* Ack masked but set interrupts */
|
||||||
reg = chip->status_base +
|
reg = sub_irq_reg(d, d->chip->status_base, i);
|
||||||
(i * map->reg_stride * d->irq_reg_stride);
|
|
||||||
ret = regmap_read(map, reg, &d->status_buf[i]);
|
ret = regmap_read(map, reg, &d->status_buf[i]);
|
||||||
if (ret != 0) {
|
if (ret != 0) {
|
||||||
dev_err(map->dev, "Failed to read IRQ status: %d\n",
|
dev_err(map->dev, "Failed to read IRQ status: %d\n",
|
||||||
|
@ -735,8 +801,7 @@ int regmap_add_irq_chip_fwnode(struct fwnode_handle *fwnode,
|
||||||
}
|
}
|
||||||
|
|
||||||
if (d->status_buf[i] && (chip->ack_base || chip->use_ack)) {
|
if (d->status_buf[i] && (chip->ack_base || chip->use_ack)) {
|
||||||
reg = chip->ack_base +
|
reg = sub_irq_reg(d, d->chip->ack_base, i);
|
||||||
(i * map->reg_stride * d->irq_reg_stride);
|
|
||||||
if (chip->ack_invert)
|
if (chip->ack_invert)
|
||||||
ret = regmap_write(map, reg,
|
ret = regmap_write(map, reg,
|
||||||
~(d->status_buf[i] & d->mask_buf[i]));
|
~(d->status_buf[i] & d->mask_buf[i]));
|
||||||
|
@ -765,8 +830,7 @@ int regmap_add_irq_chip_fwnode(struct fwnode_handle *fwnode,
|
||||||
if (d->wake_buf) {
|
if (d->wake_buf) {
|
||||||
for (i = 0; i < chip->num_regs; i++) {
|
for (i = 0; i < chip->num_regs; i++) {
|
||||||
d->wake_buf[i] = d->mask_buf_def[i];
|
d->wake_buf[i] = d->mask_buf_def[i];
|
||||||
reg = chip->wake_base +
|
reg = sub_irq_reg(d, d->chip->wake_base, i);
|
||||||
(i * map->reg_stride * d->irq_reg_stride);
|
|
||||||
|
|
||||||
if (chip->wake_invert)
|
if (chip->wake_invert)
|
||||||
ret = regmap_irq_update_bits(d, reg,
|
ret = regmap_irq_update_bits(d, reg,
|
||||||
|
@ -786,8 +850,7 @@ int regmap_add_irq_chip_fwnode(struct fwnode_handle *fwnode,
|
||||||
|
|
||||||
if (chip->num_type_reg && !chip->type_in_mask) {
|
if (chip->num_type_reg && !chip->type_in_mask) {
|
||||||
for (i = 0; i < chip->num_type_reg; ++i) {
|
for (i = 0; i < chip->num_type_reg; ++i) {
|
||||||
reg = chip->type_base +
|
reg = sub_irq_reg(d, d->chip->type_base, i);
|
||||||
(i * map->reg_stride * d->type_reg_stride);
|
|
||||||
|
|
||||||
ret = regmap_read(map, reg, &d->type_buf_def[i]);
|
ret = regmap_read(map, reg, &d->type_buf_def[i]);
|
||||||
|
|
||||||
|
@ -838,6 +901,11 @@ err_alloc:
|
||||||
kfree(d->mask_buf);
|
kfree(d->mask_buf);
|
||||||
kfree(d->status_buf);
|
kfree(d->status_buf);
|
||||||
kfree(d->status_reg_buf);
|
kfree(d->status_reg_buf);
|
||||||
|
if (d->virt_buf) {
|
||||||
|
for (i = 0; i < chip->num_virt_regs; i++)
|
||||||
|
kfree(d->virt_buf[i]);
|
||||||
|
kfree(d->virt_buf);
|
||||||
|
}
|
||||||
kfree(d);
|
kfree(d);
|
||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
|
|
|
@ -1378,6 +1378,9 @@ struct regmap_irq_sub_irq_map {
|
||||||
* status_base. Should contain num_regs arrays.
|
* status_base. Should contain num_regs arrays.
|
||||||
* Can be provided for chips with more complex mapping than
|
* Can be provided for chips with more complex mapping than
|
||||||
* 1.st bit to 1.st sub-reg, 2.nd bit to 2.nd sub-reg, ...
|
* 1.st bit to 1.st sub-reg, 2.nd bit to 2.nd sub-reg, ...
|
||||||
|
* When used with not_fixed_stride, each one-element array
|
||||||
|
* member contains offset calculated as address from each
|
||||||
|
* peripheral to first peripheral.
|
||||||
* @num_main_regs: Number of 'main status' irq registers for chips which have
|
* @num_main_regs: Number of 'main status' irq registers for chips which have
|
||||||
* main_status set.
|
* main_status set.
|
||||||
*
|
*
|
||||||
|
@ -1390,6 +1393,7 @@ struct regmap_irq_sub_irq_map {
|
||||||
* Using zero value is possible with @use_ack bit.
|
* Using zero value is possible with @use_ack bit.
|
||||||
* @wake_base: Base address for wake enables. If zero unsupported.
|
* @wake_base: Base address for wake enables. If zero unsupported.
|
||||||
* @type_base: Base address for irq type. If zero unsupported.
|
* @type_base: Base address for irq type. If zero unsupported.
|
||||||
|
* @virt_reg_base: Base addresses for extra config regs.
|
||||||
* @irq_reg_stride: Stride to use for chips where registers are not contiguous.
|
* @irq_reg_stride: Stride to use for chips where registers are not contiguous.
|
||||||
* @init_ack_masked: Ack all masked interrupts once during initalization.
|
* @init_ack_masked: Ack all masked interrupts once during initalization.
|
||||||
* @mask_invert: Inverted mask register: cleared bits are masked out.
|
* @mask_invert: Inverted mask register: cleared bits are masked out.
|
||||||
|
@ -1404,6 +1408,9 @@ struct regmap_irq_sub_irq_map {
|
||||||
* @clear_on_unmask: For chips with interrupts cleared on read: read the status
|
* @clear_on_unmask: For chips with interrupts cleared on read: read the status
|
||||||
* registers before unmasking interrupts to clear any bits
|
* registers before unmasking interrupts to clear any bits
|
||||||
* set when they were masked.
|
* set when they were masked.
|
||||||
|
* @not_fixed_stride: Used when chip peripherals are not laid out with fixed
|
||||||
|
* stride. Must be used with sub_reg_offsets containing the
|
||||||
|
* offsets to each peripheral.
|
||||||
* @runtime_pm: Hold a runtime PM lock on the device when accessing it.
|
* @runtime_pm: Hold a runtime PM lock on the device when accessing it.
|
||||||
*
|
*
|
||||||
* @num_regs: Number of registers in each control bank.
|
* @num_regs: Number of registers in each control bank.
|
||||||
|
@ -1411,12 +1418,16 @@ struct regmap_irq_sub_irq_map {
|
||||||
* assigned based on the index in the array of the interrupt.
|
* assigned based on the index in the array of the interrupt.
|
||||||
* @num_irqs: Number of descriptors.
|
* @num_irqs: Number of descriptors.
|
||||||
* @num_type_reg: Number of type registers.
|
* @num_type_reg: Number of type registers.
|
||||||
|
* @num_virt_regs: Number of non-standard irq configuration registers.
|
||||||
|
* If zero unsupported.
|
||||||
* @type_reg_stride: Stride to use for chips where type registers are not
|
* @type_reg_stride: Stride to use for chips where type registers are not
|
||||||
* contiguous.
|
* contiguous.
|
||||||
* @handle_pre_irq: Driver specific callback to handle interrupt from device
|
* @handle_pre_irq: Driver specific callback to handle interrupt from device
|
||||||
* before regmap_irq_handler process the interrupts.
|
* before regmap_irq_handler process the interrupts.
|
||||||
* @handle_post_irq: Driver specific callback to handle interrupt from device
|
* @handle_post_irq: Driver specific callback to handle interrupt from device
|
||||||
* after handling the interrupts in regmap_irq_handler().
|
* after handling the interrupts in regmap_irq_handler().
|
||||||
|
* @set_type_virt: Driver specific callback to extend regmap_irq_set_type()
|
||||||
|
* and configure virt regs.
|
||||||
* @irq_drv_data: Driver specific IRQ data which is passed as parameter when
|
* @irq_drv_data: Driver specific IRQ data which is passed as parameter when
|
||||||
* driver specific pre/post interrupt handler is called.
|
* driver specific pre/post interrupt handler is called.
|
||||||
*
|
*
|
||||||
|
@ -1438,6 +1449,7 @@ struct regmap_irq_chip {
|
||||||
unsigned int ack_base;
|
unsigned int ack_base;
|
||||||
unsigned int wake_base;
|
unsigned int wake_base;
|
||||||
unsigned int type_base;
|
unsigned int type_base;
|
||||||
|
unsigned int *virt_reg_base;
|
||||||
unsigned int irq_reg_stride;
|
unsigned int irq_reg_stride;
|
||||||
bool mask_writeonly:1;
|
bool mask_writeonly:1;
|
||||||
bool init_ack_masked:1;
|
bool init_ack_masked:1;
|
||||||
|
@ -1450,6 +1462,7 @@ struct regmap_irq_chip {
|
||||||
bool type_invert:1;
|
bool type_invert:1;
|
||||||
bool type_in_mask:1;
|
bool type_in_mask:1;
|
||||||
bool clear_on_unmask:1;
|
bool clear_on_unmask:1;
|
||||||
|
bool not_fixed_stride:1;
|
||||||
|
|
||||||
int num_regs;
|
int num_regs;
|
||||||
|
|
||||||
|
@ -1457,10 +1470,13 @@ struct regmap_irq_chip {
|
||||||
int num_irqs;
|
int num_irqs;
|
||||||
|
|
||||||
int num_type_reg;
|
int num_type_reg;
|
||||||
|
int num_virt_regs;
|
||||||
unsigned int type_reg_stride;
|
unsigned int type_reg_stride;
|
||||||
|
|
||||||
int (*handle_pre_irq)(void *irq_drv_data);
|
int (*handle_pre_irq)(void *irq_drv_data);
|
||||||
int (*handle_post_irq)(void *irq_drv_data);
|
int (*handle_post_irq)(void *irq_drv_data);
|
||||||
|
int (*set_type_virt)(unsigned int **buf, unsigned int type,
|
||||||
|
unsigned long hwirq, int reg);
|
||||||
void *irq_drv_data;
|
void *irq_drv_data;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
Loading…
Reference in New Issue