drm/nv50-/mc: also pass PMGR interrupts onto I2C subdev
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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20a8007485
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@ -34,7 +34,8 @@ nv50_mc_intr[] = {
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{ 0x00008000, NVDEV_ENGINE_BSP }, /* NV84- */
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{ 0x00008000, NVDEV_ENGINE_BSP }, /* NV84- */
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{ 0x00020000, NVDEV_ENGINE_VP }, /* NV84- */
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{ 0x00020000, NVDEV_ENGINE_VP }, /* NV84- */
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{ 0x00100000, NVDEV_SUBDEV_TIMER },
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{ 0x00100000, NVDEV_SUBDEV_TIMER },
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{ 0x00200000, NVDEV_SUBDEV_GPIO },
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{ 0x00200000, NVDEV_SUBDEV_GPIO }, /* PMGR->GPIO */
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{ 0x00200000, NVDEV_SUBDEV_I2C }, /* PMGR->I2C/AUX */
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{ 0x10000000, NVDEV_SUBDEV_BUS },
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{ 0x10000000, NVDEV_SUBDEV_BUS },
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{ 0x80000000, NVDEV_ENGINE_SW },
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{ 0x80000000, NVDEV_ENGINE_SW },
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{ 0x0002d101, NVDEV_SUBDEV_FB },
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{ 0x0002d101, NVDEV_SUBDEV_FB },
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@ -36,7 +36,8 @@ nv98_mc_intr[] = {
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{ 0x00040000, NVDEV_SUBDEV_PWR }, /* NVA3:NVC0 */
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{ 0x00040000, NVDEV_SUBDEV_PWR }, /* NVA3:NVC0 */
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{ 0x00080000, NVDEV_SUBDEV_THERM }, /* NVA3:NVC0 */
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{ 0x00080000, NVDEV_SUBDEV_THERM }, /* NVA3:NVC0 */
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{ 0x00100000, NVDEV_SUBDEV_TIMER },
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{ 0x00100000, NVDEV_SUBDEV_TIMER },
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{ 0x00200000, NVDEV_SUBDEV_GPIO },
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{ 0x00200000, NVDEV_SUBDEV_GPIO }, /* PMGR->GPIO */
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{ 0x00200000, NVDEV_SUBDEV_I2C }, /* PMGR->I2C/AUX */
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{ 0x00400000, NVDEV_ENGINE_COPY0 }, /* NVA3- */
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{ 0x00400000, NVDEV_ENGINE_COPY0 }, /* NVA3- */
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{ 0x10000000, NVDEV_SUBDEV_BUS },
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{ 0x10000000, NVDEV_SUBDEV_BUS },
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{ 0x80000000, NVDEV_ENGINE_SW },
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{ 0x80000000, NVDEV_ENGINE_SW },
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@ -38,7 +38,8 @@ nvc0_mc_intr[] = {
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{ 0x00040000, NVDEV_SUBDEV_THERM },
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{ 0x00040000, NVDEV_SUBDEV_THERM },
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{ 0x00020000, NVDEV_ENGINE_VP },
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{ 0x00020000, NVDEV_ENGINE_VP },
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{ 0x00100000, NVDEV_SUBDEV_TIMER },
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{ 0x00100000, NVDEV_SUBDEV_TIMER },
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{ 0x00200000, NVDEV_SUBDEV_GPIO },
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{ 0x00200000, NVDEV_SUBDEV_GPIO }, /* PMGR->GPIO */
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{ 0x00200000, NVDEV_SUBDEV_I2C }, /* PMGR->I2C/AUX */
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{ 0x01000000, NVDEV_SUBDEV_PWR },
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{ 0x01000000, NVDEV_SUBDEV_PWR },
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{ 0x02000000, NVDEV_SUBDEV_LTCG },
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{ 0x02000000, NVDEV_SUBDEV_LTCG },
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{ 0x08000000, NVDEV_SUBDEV_FB },
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{ 0x08000000, NVDEV_SUBDEV_FB },
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