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Merge master.kernel.org:/home/rmk/linux-2.6-arm 

* master.kernel.org:/home/rmk/linux-2.6-arm:
  [ARM] 4561/1: i.MX/MX1 GPIO parenthes omission and input setup fix
  [ARM] 4557/1: Fix PXA irq gpio initialization
  [ARM] 4551/1: s3c24xx: fix wrong virtual address offsets
  [ARM] 4552/1: i.MX/MX1 GPIO output setup fix
  [ARM] 4553/1: ARM at91: define FIQ_START
  [ARM] 4554/1: replace consistent_sync() with flush_ioremap_region()
  ARM: OMAP: Enable serial idling and wakeup features
  ARM: OMAP2: Force APLLs always active
  ARM: OMAP: H3 workqueue fixes
  ARM: OMAP: OSK led fixes
  ARM: OMAP: fix OMAP1 dmtimer build warning
  ARM: OMAP: Fix 32k timer unsupported one-shot mode
This commit is contained in:
Linus Torvalds 2007-08-30 21:54:57 -07:00
parent 62e6f1e8bb a98b38b83d
commit feabb06bd7
17 changed files with 49 additions and 62 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

7
arch/arm/Kconfig
View File

@ -721,7 +721,8 @@ config LEDS
config LEDS_TIMER
bool "Timer LED" if (!ARCH_CDB89712 && !ARCH_OMAP) || \
MACH_OMAP_H2 || MACH_OMAP_PERSEUS2
OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
|| MACH_OMAP_PERSEUS2
depends on LEDS
depends on !GENERIC_CLOCKEVENTS
default y if ARCH_EBSA110
@ -738,7 +739,9 @@ config LEDS_TIMER
config LEDS_CPU
bool "CPU usage LED" if (!ARCH_CDB89712 && !ARCH_EBSA110 && \
!ARCH_OMAP) || MACH_OMAP_H2 || MACH_OMAP_PERSEUS2
!ARCH_OMAP) \
|| OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
|| MACH_OMAP_PERSEUS2
depends on LEDS
help
If you say Y here, the red LED will be used to give a good real

7
arch/arm/mach-imx/generic.c
View File

@ -101,10 +101,11 @@ EXPORT_SYMBOL(imx_gpio_mode);
int imx_gpio_request(unsigned gpio, const char *label)
{
if(gpio >= (GPIO_PORT_MAX + 1) * 32)
if(gpio >= (GPIO_PORT_MAX + 1) * 32) {
printk(KERN_ERR "imx_gpio: Attempt to request nonexistent GPIO %d for \"%s\"\n",
gpio, label ? label : "?");
return -EINVAL;
}
if(test_and_set_bit(gpio, imx_gpio_alloc_map)) {
printk(KERN_ERR "imx_gpio: GPIO %d already used. Allocation for \"%s\" failed\n",
@ -129,7 +130,7 @@ EXPORT_SYMBOL(imx_gpio_free);
int imx_gpio_direction_input(unsigned gpio)
{
imx_gpio_mode(gpio| GPIO_IN);
imx_gpio_mode(gpio | GPIO_IN | GPIO_GIUS | GPIO_DR);
return 0;
}
@ -138,7 +139,7 @@ EXPORT_SYMBOL(imx_gpio_direction_input);
int imx_gpio_direction_output(unsigned gpio, int value)
{
imx_gpio_set_value(gpio, value);
imx_gpio_mode(gpio| GPIO_OUT);
imx_gpio_mode(gpio | GPIO_OUT | GPIO_GIUS | GPIO_DR);
return 0;
}

12
arch/arm/mach-omap1/board-h3.c
View File

@ -294,9 +294,11 @@ static int h3_select_irda(struct device *dev, int state)
return err;
}
static void set_trans_mode(void *data)
static void set_trans_mode(struct work_struct *work)
{
int *mode = data;
struct omap_irda_config *irda_config =
container_of(work, struct omap_irda_config, gpio_expa.work);
int mode = irda_config->mode;
unsigned char expa;
int err = 0;
@ -306,7 +308,7 @@ static void set_trans_mode(void *data)
expa &= ~0x03;
if (*mode & IR_SIRMODE) {
if (mode & IR_SIRMODE) {
expa |= 0x01;
} else { /* MIR/FIR */
expa |= 0x03;
@ -321,9 +323,9 @@ static int h3_transceiver_mode(struct device *dev, int mode)
{
struct omap_irda_config *irda_config = dev->platform_data;
irda_config->mode = mode;
cancel_delayed_work(&irda_config->gpio_expa);
PREPARE_WORK(&irda_config->gpio_expa, set_trans_mode, &mode);
#error this is not permitted - mode is an argument variable
PREPARE_DELAYED_WORK(&irda_config->gpio_expa, set_trans_mode);
schedule_delayed_work(&irda_config->gpio_expa, 0);
return 0;

6
arch/arm/mach-omap1/leds-osk.c
View File

@ -133,13 +133,13 @@ void osk_leds_event(led_event_t evt)
mistral_setled();
break;
case led_idle_start:
hw_led_state |= IDLE_LED;
case led_idle_start: /* idle == off */
hw_led_state &= ~IDLE_LED;
mistral_setled();
break;
case led_idle_end:
hw_led_state &= ~IDLE_LED;
hw_led_state |= IDLE_LED;
mistral_setled();
break;

11
arch/arm/mach-omap1/pm.c
View File

@ -57,7 +57,6 @@
#include <asm/arch/tc.h>
#include <asm/arch/pm.h>
#include <asm/arch/mux.h>
#include <asm/arch/tps65010.h>
#include <asm/arch/dma.h>
#include <asm/arch/dsp_common.h>
#include <asm/arch/dmtimer.h>
@ -250,11 +249,6 @@ void omap_pm_suspend(void)
omap_serial_wake_trigger(1);
if (machine_is_omap_osk()) {
/* Stop LED1 (D9) blink */
tps65010_set_led(LED1, OFF);
}
if (!cpu_is_omap15xx())
omap_writew(0xffff, ULPD_SOFT_DISABLE_REQ_REG);
@ -447,11 +441,6 @@ void omap_pm_suspend(void)
omap_serial_wake_trigger(0);
printk("PM: OMAP%x is re-starting from deep sleep...\n", system_rev);
if (machine_is_omap_osk()) {
/* Let LED1 (D9) blink again */
tps65010_set_led(LED1, BLINK);
}
}
#if defined(DEBUG) && defined(CONFIG_PROC_FS)

13
arch/arm/mach-omap2/clock.c
View File

@ -1160,8 +1160,8 @@ int __init omap2_clk_init(void)
clk_enable(&sync_32k_ick);
clk_enable(&omapctrl_ick);
/* Force the APLLs active during bootup to avoid disabling and
* enabling them unnecessarily. */
/* Force the APLLs always active. The clocks are idled
* automatically by hardware. */
clk_enable(&apll96_ck);
clk_enable(&apll54_ck);
@ -1174,12 +1174,3 @@ int __init omap2_clk_init(void)
return 0;
}
static int __init omap2_disable_aplls(void)
{
clk_disable(&apll96_ck);
clk_disable(&apll54_ck);
return 0;
}
late_initcall(omap2_disable_aplls);

2
arch/arm/mach-omap2/serial.c
View File

@ -84,7 +84,7 @@ static inline void __init omap_serial_reset(struct plat_serial8250_port *p)
serial_write_reg(p, UART_OMAP_MDR1, 0x07);
serial_write_reg(p, UART_OMAP_SCR, 0x08);
serial_write_reg(p, UART_OMAP_MDR1, 0x00);
serial_write_reg(p, UART_OMAP_SYSC, 0x01);
serial_write_reg(p, UART_OMAP_SYSC, (0x02 << 3) | (1 << 2) | (1 << 0));
}
void __init omap_serial_init()

2
arch/arm/mach-pxa/irq.c
View File

@ -365,7 +365,7 @@ void __init pxa_init_irq_gpio(int gpio_nr)
set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
}
for (irq = IRQ_GPIO(2); irq <= IRQ_GPIO(gpio_nr); irq++) {
for (irq = IRQ_GPIO(2); irq < IRQ_GPIO(gpio_nr); irq++) {
set_irq_chip(irq, &pxa_muxed_gpio_chip);
set_irq_handler(irq, handle_edge_irq);
set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);

2
arch/arm/plat-omap/common.c
View File

@ -172,7 +172,7 @@ console_initcall(omap_add_serial_console);
#if defined(CONFIG_ARCH_OMAP16XX)
#define TIMER_32K_SYNCHRONIZED 0xfffbc410
#elif defined(CONFIG_ARCH_OMAP24XX)
#define TIMER_32K_SYNCHRONIZED 0x48004010
#define TIMER_32K_SYNCHRONIZED (OMAP24XX_32KSYNCT_BASE + 0x10)
#endif
#ifdef TIMER_32K_SYNCHRONIZED

5
arch/arm/plat-omap/dmtimer.c
View File

@ -271,11 +271,6 @@ int omap_dm_timer_get_irq(struct omap_dm_timer *timer)
#if defined(CONFIG_ARCH_OMAP1)
struct clk *omap_dm_timer_get_fclk(struct omap_dm_timer *timer)
{
BUG();
}
/**
* omap_dm_timer_modify_idlect_mask - Check if any running timers use ARMXOR
* @inputmask: current value of idlect mask

10
arch/arm/plat-omap/timer32k.c
View File

@ -71,7 +71,7 @@ struct sys_timer omap_timer;
#if defined(CONFIG_ARCH_OMAP16XX)
#define TIMER_32K_SYNCHRONIZED 0xfffbc410
#elif defined(CONFIG_ARCH_OMAP24XX)
#define TIMER_32K_SYNCHRONIZED 0x48004010
#define TIMER_32K_SYNCHRONIZED (OMAP24XX_32KSYNCT_BASE + 0x10)
#else
#error OMAP 32KHz timer does not currently work on 15XX!
#endif
@ -147,14 +147,15 @@ static inline void omap_32k_timer_ack_irq(void)
static void omap_32k_timer_set_mode(enum clock_event_mode mode,
struct clock_event_device *evt)
{
omap_32k_timer_stop();
switch (mode) {
case CLOCK_EVT_MODE_ONESHOT:
case CLOCK_EVT_MODE_PERIODIC:
omap_32k_timer_start(OMAP_32K_TIMER_TICK_PERIOD);
break;
case CLOCK_EVT_MODE_ONESHOT:
case CLOCK_EVT_MODE_UNUSED:
case CLOCK_EVT_MODE_SHUTDOWN:
omap_32k_timer_stop();
break;
case CLOCK_EVT_MODE_RESUME:
break;
@ -194,8 +195,6 @@ omap_32k_ticks_to_nsecs(unsigned long ticks_32k)
return (unsigned long long) ticks_32k * 1000 * 5*5*5*5*5*5 >> 9;
}
static unsigned long omap_32k_last_tick = 0;
/*
* Returns current time from boot in nsecs. It's OK for this to wrap
* around for now, as it's just a relative time stamp.
@ -225,7 +224,6 @@ static __init void omap_init_32k_timer(void)
{
if (cpu_class_is_omap1())
setup_irq(INT_OS_TIMER, &omap_32k_timer_irq);
omap_32k_last_tick = omap_32k_sync_timer_read();
#ifdef CONFIG_ARCH_OMAP2
/* REVISIT: Check 24xx TIOCP_CFG settings after idle works */

6
drivers/mtd/maps/lubbock-flash.c
View File

@ -15,9 +15,7 @@
#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/dma-mapping.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/map.h>
#include <linux/mtd/partitions.h>
@ -26,7 +24,7 @@
#include <asm/hardware.h>
#include <asm/arch/pxa-regs.h>
#include <asm/arch/lubbock.h>
#include <asm/cacheflush.h>
#define ROM_ADDR 0x00000000
#define FLASH_ADDR 0x04000000
@ -35,7 +33,7 @@
static void lubbock_map_inval_cache(struct map_info *map, unsigned long from, ssize_t len)
{
consistent_sync((char *)map->cached + from, len, DMA_FROM_DEVICE);
flush_ioremap_region(map->phys, map->cached, from, len);
}
static struct map_info lubbock_maps[2] = { {

5
drivers/mtd/maps/mainstone-flash.c
View File

@ -15,8 +15,6 @@
#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/dma-mapping.h>
#include <linux/slab.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/map.h>
@ -26,6 +24,7 @@
#include <asm/hardware.h>
#include <asm/arch/pxa-regs.h>
#include <asm/arch/mainstone.h>
#include <asm/cacheflush.h>
#define ROM_ADDR 0x00000000
@ -36,7 +35,7 @@
static void mainstone_map_inval_cache(struct map_info *map, unsigned long from,
ssize_t len)
{
consistent_sync((char *)map->cached + from, len, DMA_FROM_DEVICE);
flush_ioremap_region(map->phys, map->cached, from, len);
}
static struct map_info mainstone_maps[2] = { {

3
include/asm-arm/arch-at91/irqs.h
View File

@ -42,4 +42,7 @@
*/
#define NR_IRQS (NR_AIC_IRQS + (5 * 32))
/* FIQ is AIC source 0. */
#define FIQ_START AT91_ID_FIQ
#endif

1
include/asm-arm/arch-omap/irda.h
View File

@ -31,6 +31,7 @@ struct omap_irda_config {
unsigned long src_start;
int tx_trigger;
int rx_trigger;
int mode;
};
#endif

7
include/asm-arm/cacheflush.h
View File

@ -426,6 +426,13 @@ static inline void flush_anon_page(struct vm_area_struct *vma,
*/
#define flush_icache_page(vma,page) do { } while (0)
static inline void flush_ioremap_region(unsigned long phys, void __iomem *virt,
unsigned offset, size_t size)
{
const void *start = (void __force *)virt + offset;
dmac_inv_range(start, start + size);
}
#define __cacheid_present(val) (val != read_cpuid(CPUID_ID))
#define __cacheid_type_v7(val) ((val & (7 << 29)) == (4 << 29))

12
include/asm-arm/plat-s3c/map.h
View File

@ -30,11 +30,11 @@
#define S3C_ADDR(x) (S3C_ADDR_BASE + (x))
#endif
#define S3C_VA_IRQ S3C_ADDR(0x000000000) /* irq controller(s) */
#define S3C_VA_SYS S3C_ADDR(0x001000000) /* system control */
#define S3C_VA_MEM S3C_ADDR(0x002000000) /* system control */
#define S3C_VA_TIMER S3C_ADDR(0x003000000) /* timer block */
#define S3C_VA_WATCHDOG S3C_ADDR(0x004000000) /* watchdog */
#define S3C_VA_UART S3C_ADDR(0x010000000) /* UART */
#define S3C_VA_IRQ S3C_ADDR(0x00000000) /* irq controller(s) */
#define S3C_VA_SYS S3C_ADDR(0x00100000) /* system control */
#define S3C_VA_MEM S3C_ADDR(0x00200000) /* system control */
#define S3C_VA_TIMER S3C_ADDR(0x00300000) /* timer block */
#define S3C_VA_WATCHDOG S3C_ADDR(0x00400000) /* watchdog */
#define S3C_VA_UART S3C_ADDR(0x01000000) /* UART */
#endif /* __ASM_PLAT_MAP_H */