msm:disp:dpu1: Fix core clk rate in display driver
Fix max core clk rate during dt parsing in display driver. Signed-off-by: Shubhashree Dhar <dhar@codeaurora.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
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@ -175,6 +175,7 @@ int msm_dss_parse_clock(struct platform_device *pdev,
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continue;
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mp->clk_config[i].rate = rate;
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mp->clk_config[i].type = DSS_CLK_PCLK;
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mp->clk_config[i].max_rate = rate;
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}
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mp->num_clk = num_clk;
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