Thermal control updates for 5.17-rc1
- Add new TSU driver and DT bindings for the Renesas RZ/G2L platform (Biju Das). - Fix missing check when calling reset_control_deassert() in the rz2gl thermal driver (Biju Das). - In preparation for FORTIFY_SOURCE performing compile-time and run-time field bounds checking for memcpy(), avoid intentionally writing across neighboring fields in the int340x thermal control driver (Kees Cook). - Fix RFIM mailbox write commands handling in the int340x thermal control driver (Sumeet Pawnikar). - Fix PM issue occurring in the iMX thermal control driver during suspend/resume by implementing PM runtime support in it (Oleksij Rempel). - Add 'const' annotation to thermal_cooling_ops in the Intel powerclamp driver (Rikard Falkeborn). - Fix missing ADC bit set in the iMX8MP thermal driver to enable the sensor (Paul Gerber). - Drop unused local variable definition from tmon (ran jianping). -----BEGIN PGP SIGNATURE----- iQJGBAABCAAwFiEE4fcc61cGeeHD/fCwgsRv/nhiVHEFAmHcgsISHHJqd0Byand5 c29ja2kubmV0AAoJEILEb/54YlRxGJ4P/1S6lW2SUA98YfEVt0V6HnnXRCFXRE+5 OANgcjKqrDy57ltHM56sFqym8KQb9If5vki9yKq9/crmUVg9YMFsaN4RCfuUIRE5 B+v/NHg+s8VTrcDgF1fINXbBtYVgUoXhbjTH6gdCLSiEDhTgFkEQFasrcrTQN7IX uqaC33ZxoSk7e89Wb/roJushHfjylqpqxlFX8ME3aQyRxIkMVN2p3qddg33XwzMS lQjtTLpL4fOtOZET+KwKxOG97VBDuGcH6bHdzNWHlcKWjI6cZYMS9OrxyMGNggUi JF9N4Y4xxwQWLQ32YQPXv+xUS92A2fsGTGqw1g50PmZHh2hvRsODJEPopjO8jTd0 0QtmIT+GzfNaEcBbbS31eb0ePYc/DobbBlpJ8kMoe/WskWANl4I6TrFMTDceZj9X iuzMzGvpr/3/L7tRDIY7qM0iKX1WNeMuOXNIDuD7cmM6of82hzjwOBvhAOf338nP InZB6o0fRdM38Wypw0E17CHBAJTgXh2vCAgRvfOuDCqavZM21h1BBwNpKHfxa+5z LsO8WRifkDHHNctSBsh5UoRUO/L6RnCB9SVaQUb8k19HfIY8ZoNjM+CPMAojCAxs KOEqHYxF7hG7eEkDAIF624INJlxkntPEuQDI9TSj6wi2wc5cISG1tMi1p8M01yND XVisUkJoZKVy =Crok -----END PGP SIGNATURE----- Merge tag 'thermal-5.17-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm Pull thermal control updates from Rafael Wysocki: "These add a new driver for Renesas RZ/G2L TSU, update a few existing thermal control drivers and clean up the tmon utility. Specifics: - Add new TSU driver and DT bindings for the Renesas RZ/G2L platform (Biju Das). - Fix missing check when calling reset_control_deassert() in the rz2gl thermal driver (Biju Das). - In preparation for FORTIFY_SOURCE performing compile-time and run-time field bounds checking for memcpy(), avoid intentionally writing across neighboring fields in the int340x thermal control driver (Kees Cook). - Fix RFIM mailbox write commands handling in the int340x thermal control driver (Sumeet Pawnikar). - Fix PM issue occurring in the iMX thermal control driver during suspend/resume by implementing PM runtime support in it (Oleksij Rempel). - Add 'const' annotation to thermal_cooling_ops in the Intel powerclamp driver (Rikard Falkeborn). - Fix missing ADC bit set in the iMX8MP thermal driver to enable the sensor (Paul Gerber). - Drop unused local variable definition from tmon (ran jianping)" * tag 'thermal-5.17-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm: thermal/drivers/int340x: Fix RFIM mailbox write commands thermal/drivers/rz2gl: Add error check for reset_control_deassert() thermal/drivers/imx8mm: Enable ADC when enabling monitor thermal/drivers: Add TSU driver for RZ/G2L dt-bindings: thermal: Document Renesas RZ/G2L TSU thermal/drivers/intel_powerclamp: Constify static thermal_cooling_device_ops thermal/drivers/imx: Implement runtime PM support thermal: tools: tmon: remove unneeded local variable thermal: int340x: Use struct_group() for memcpy() region
This commit is contained in:
commit
fe2437ccbd
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@ -0,0 +1,76 @@
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/thermal/rzg2l-thermal.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Renesas RZ/G2L Thermal Sensor Unit
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description:
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On RZ/G2L SoCs, the thermal sensor unit (TSU) measures the
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temperature(Tj) inside the LSI.
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maintainers:
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- Biju Das <biju.das.jz@bp.renesas.com>
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properties:
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compatible:
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items:
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- enum:
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- renesas,r9a07g044-tsu # RZ/G2{L,LC}
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- const: renesas,rzg2l-tsu
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reg:
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maxItems: 1
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clocks:
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maxItems: 1
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power-domains:
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maxItems: 1
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resets:
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maxItems: 1
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"#thermal-sensor-cells":
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const: 1
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required:
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- compatible
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- reg
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- clocks
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- power-domains
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- resets
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- "#thermal-sensor-cells"
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/clock/r9a07g044-cpg.h>
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tsu: thermal@10059400 {
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compatible = "renesas,r9a07g044-tsu",
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"renesas,rzg2l-tsu";
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reg = <0x10059400 0x400>;
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clocks = <&cpg CPG_MOD R9A07G044_TSU_PCLK>;
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resets = <&cpg R9A07G044_TSU_PRESETN>;
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power-domains = <&cpg>;
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#thermal-sensor-cells = <1>;
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};
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thermal-zones {
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cpu-thermal {
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polling-delay-passive = <250>;
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polling-delay = <1000>;
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thermal-sensors = <&tsu 0>;
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trips {
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sensor_crit: sensor-crit {
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temperature = <125000>;
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hysteresis = <1000>;
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type = "critical";
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};
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};
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};
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};
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@ -354,6 +354,15 @@ config RCAR_GEN3_THERMAL
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Enable this to plug the R-Car Gen3 or RZ/G2 thermal sensor driver into
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Enable this to plug the R-Car Gen3 or RZ/G2 thermal sensor driver into
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the Linux thermal framework.
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the Linux thermal framework.
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config RZG2L_THERMAL
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tristate "Renesas RZ/G2L thermal driver"
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depends on ARCH_RENESAS || COMPILE_TEST
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depends on HAS_IOMEM
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depends on OF
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help
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Enable this to plug the RZ/G2L thermal sensor driver into the Linux
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thermal framework.
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config KIRKWOOD_THERMAL
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config KIRKWOOD_THERMAL
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tristate "Temperature sensor on Marvell Kirkwood SoCs"
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tristate "Temperature sensor on Marvell Kirkwood SoCs"
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depends on MACH_KIRKWOOD || COMPILE_TEST
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depends on MACH_KIRKWOOD || COMPILE_TEST
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|
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@ -37,6 +37,7 @@ obj-$(CONFIG_SUN8I_THERMAL) += sun8i_thermal.o
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obj-$(CONFIG_ROCKCHIP_THERMAL) += rockchip_thermal.o
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obj-$(CONFIG_ROCKCHIP_THERMAL) += rockchip_thermal.o
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obj-$(CONFIG_RCAR_THERMAL) += rcar_thermal.o
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obj-$(CONFIG_RCAR_THERMAL) += rcar_thermal.o
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obj-$(CONFIG_RCAR_GEN3_THERMAL) += rcar_gen3_thermal.o
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obj-$(CONFIG_RCAR_GEN3_THERMAL) += rcar_gen3_thermal.o
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obj-$(CONFIG_RZG2L_THERMAL) += rzg2l_thermal.o
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obj-$(CONFIG_KIRKWOOD_THERMAL) += kirkwood_thermal.o
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obj-$(CONFIG_KIRKWOOD_THERMAL) += kirkwood_thermal.o
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obj-y += samsung/
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obj-y += samsung/
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obj-$(CONFIG_DOVE_THERMAL) += dove_thermal.o
|
obj-$(CONFIG_DOVE_THERMAL) += dove_thermal.o
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|
|
|
@ -21,6 +21,7 @@
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#define TPS 0x4
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#define TPS 0x4
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#define TRITSR 0x20 /* TMU immediate temp */
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#define TRITSR 0x20 /* TMU immediate temp */
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|
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#define TER_ADC_PD BIT(30)
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#define TER_EN BIT(31)
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#define TER_EN BIT(31)
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#define TRITSR_TEMP0_VAL_MASK 0xff
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#define TRITSR_TEMP0_VAL_MASK 0xff
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#define TRITSR_TEMP1_VAL_MASK 0xff0000
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#define TRITSR_TEMP1_VAL_MASK 0xff0000
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|
@ -113,6 +114,8 @@ static void imx8mm_tmu_enable(struct imx8mm_tmu *tmu, bool enable)
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val = readl_relaxed(tmu->base + TER);
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val = readl_relaxed(tmu->base + TER);
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val = enable ? (val | TER_EN) : (val & ~TER_EN);
|
val = enable ? (val | TER_EN) : (val & ~TER_EN);
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|
if (tmu->socdata->version == TMU_VER2)
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|
val = enable ? (val & ~TER_ADC_PD) : (val | TER_ADC_PD);
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writel_relaxed(val, tmu->base + TER);
|
writel_relaxed(val, tmu->base + TER);
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}
|
}
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|
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|
|
|
@ -15,6 +15,7 @@
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#include <linux/regmap.h>
|
#include <linux/regmap.h>
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#include <linux/thermal.h>
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#include <linux/thermal.h>
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#include <linux/nvmem-consumer.h>
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#include <linux/nvmem-consumer.h>
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|
#include <linux/pm_runtime.h>
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|
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#define REG_SET 0x4
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#define REG_SET 0x4
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#define REG_CLR 0x8
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#define REG_CLR 0x8
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|
@ -194,6 +195,7 @@ static struct thermal_soc_data thermal_imx7d_data = {
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};
|
};
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struct imx_thermal_data {
|
struct imx_thermal_data {
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|
struct device *dev;
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struct cpufreq_policy *policy;
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struct cpufreq_policy *policy;
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struct thermal_zone_device *tz;
|
struct thermal_zone_device *tz;
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struct thermal_cooling_device *cdev;
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struct thermal_cooling_device *cdev;
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|
@ -252,44 +254,15 @@ static int imx_get_temp(struct thermal_zone_device *tz, int *temp)
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const struct thermal_soc_data *soc_data = data->socdata;
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const struct thermal_soc_data *soc_data = data->socdata;
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struct regmap *map = data->tempmon;
|
struct regmap *map = data->tempmon;
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unsigned int n_meas;
|
unsigned int n_meas;
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bool wait, run_measurement;
|
|
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u32 val;
|
u32 val;
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|
int ret;
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|
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run_measurement = !data->irq_enabled;
|
ret = pm_runtime_resume_and_get(data->dev);
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if (!run_measurement) {
|
if (ret < 0)
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/* Check if a measurement is currently in progress */
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return ret;
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regmap_read(map, soc_data->temp_data, &val);
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wait = !(val & soc_data->temp_valid_mask);
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} else {
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/*
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* Every time we measure the temperature, we will power on the
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* temperature sensor, enable measurements, take a reading,
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* disable measurements, power off the temperature sensor.
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*/
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regmap_write(map, soc_data->sensor_ctrl + REG_CLR,
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soc_data->power_down_mask);
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regmap_write(map, soc_data->sensor_ctrl + REG_SET,
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soc_data->measure_temp_mask);
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wait = true;
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}
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/*
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* According to the temp sensor designers, it may require up to ~17us
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* to complete a measurement.
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*/
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if (wait)
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usleep_range(20, 50);
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regmap_read(map, soc_data->temp_data, &val);
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regmap_read(map, soc_data->temp_data, &val);
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if (run_measurement) {
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regmap_write(map, soc_data->sensor_ctrl + REG_CLR,
|
|
||||||
soc_data->measure_temp_mask);
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regmap_write(map, soc_data->sensor_ctrl + REG_SET,
|
|
||||||
soc_data->power_down_mask);
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|
||||||
}
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|
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if ((val & soc_data->temp_valid_mask) == 0) {
|
if ((val & soc_data->temp_valid_mask) == 0) {
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dev_dbg(&tz->device, "temp measurement never finished\n");
|
dev_dbg(&tz->device, "temp measurement never finished\n");
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return -EAGAIN;
|
return -EAGAIN;
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|
@ -328,6 +301,8 @@ static int imx_get_temp(struct thermal_zone_device *tz, int *temp)
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enable_irq(data->irq);
|
enable_irq(data->irq);
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}
|
}
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|
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|
pm_runtime_put(data->dev);
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|
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return 0;
|
return 0;
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}
|
}
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|
|
||||||
|
@ -335,24 +310,16 @@ static int imx_change_mode(struct thermal_zone_device *tz,
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enum thermal_device_mode mode)
|
enum thermal_device_mode mode)
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{
|
{
|
||||||
struct imx_thermal_data *data = tz->devdata;
|
struct imx_thermal_data *data = tz->devdata;
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struct regmap *map = data->tempmon;
|
|
||||||
const struct thermal_soc_data *soc_data = data->socdata;
|
|
||||||
|
|
||||||
if (mode == THERMAL_DEVICE_ENABLED) {
|
if (mode == THERMAL_DEVICE_ENABLED) {
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||||||
regmap_write(map, soc_data->sensor_ctrl + REG_CLR,
|
pm_runtime_get(data->dev);
|
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soc_data->power_down_mask);
|
|
||||||
regmap_write(map, soc_data->sensor_ctrl + REG_SET,
|
|
||||||
soc_data->measure_temp_mask);
|
|
||||||
|
|
||||||
if (!data->irq_enabled) {
|
if (!data->irq_enabled) {
|
||||||
data->irq_enabled = true;
|
data->irq_enabled = true;
|
||||||
enable_irq(data->irq);
|
enable_irq(data->irq);
|
||||||
}
|
}
|
||||||
} else {
|
} else {
|
||||||
regmap_write(map, soc_data->sensor_ctrl + REG_CLR,
|
pm_runtime_put(data->dev);
|
||||||
soc_data->measure_temp_mask);
|
|
||||||
regmap_write(map, soc_data->sensor_ctrl + REG_SET,
|
|
||||||
soc_data->power_down_mask);
|
|
||||||
|
|
||||||
if (data->irq_enabled) {
|
if (data->irq_enabled) {
|
||||||
disable_irq(data->irq);
|
disable_irq(data->irq);
|
||||||
|
@ -393,6 +360,11 @@ static int imx_set_trip_temp(struct thermal_zone_device *tz, int trip,
|
||||||
int temp)
|
int temp)
|
||||||
{
|
{
|
||||||
struct imx_thermal_data *data = tz->devdata;
|
struct imx_thermal_data *data = tz->devdata;
|
||||||
|
int ret;
|
||||||
|
|
||||||
|
ret = pm_runtime_resume_and_get(data->dev);
|
||||||
|
if (ret < 0)
|
||||||
|
return ret;
|
||||||
|
|
||||||
/* do not allow changing critical threshold */
|
/* do not allow changing critical threshold */
|
||||||
if (trip == IMX_TRIP_CRITICAL)
|
if (trip == IMX_TRIP_CRITICAL)
|
||||||
|
@ -406,6 +378,8 @@ static int imx_set_trip_temp(struct thermal_zone_device *tz, int trip,
|
||||||
|
|
||||||
imx_set_alarm_temp(data, temp);
|
imx_set_alarm_temp(data, temp);
|
||||||
|
|
||||||
|
pm_runtime_put(data->dev);
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -681,6 +655,8 @@ static int imx_thermal_probe(struct platform_device *pdev)
|
||||||
if (!data)
|
if (!data)
|
||||||
return -ENOMEM;
|
return -ENOMEM;
|
||||||
|
|
||||||
|
data->dev = &pdev->dev;
|
||||||
|
|
||||||
map = syscon_regmap_lookup_by_phandle(pdev->dev.of_node, "fsl,tempmon");
|
map = syscon_regmap_lookup_by_phandle(pdev->dev.of_node, "fsl,tempmon");
|
||||||
if (IS_ERR(map)) {
|
if (IS_ERR(map)) {
|
||||||
ret = PTR_ERR(map);
|
ret = PTR_ERR(map);
|
||||||
|
@ -800,6 +776,16 @@ static int imx_thermal_probe(struct platform_device *pdev)
|
||||||
data->socdata->power_down_mask);
|
data->socdata->power_down_mask);
|
||||||
regmap_write(map, data->socdata->sensor_ctrl + REG_SET,
|
regmap_write(map, data->socdata->sensor_ctrl + REG_SET,
|
||||||
data->socdata->measure_temp_mask);
|
data->socdata->measure_temp_mask);
|
||||||
|
/* After power up, we need a delay before first access can be done. */
|
||||||
|
usleep_range(20, 50);
|
||||||
|
|
||||||
|
/* the core was configured and enabled just before */
|
||||||
|
pm_runtime_set_active(&pdev->dev);
|
||||||
|
pm_runtime_enable(data->dev);
|
||||||
|
|
||||||
|
ret = pm_runtime_resume_and_get(data->dev);
|
||||||
|
if (ret < 0)
|
||||||
|
goto disable_runtime_pm;
|
||||||
|
|
||||||
data->irq_enabled = true;
|
data->irq_enabled = true;
|
||||||
ret = thermal_zone_device_enable(data->tz);
|
ret = thermal_zone_device_enable(data->tz);
|
||||||
|
@ -814,10 +800,15 @@ static int imx_thermal_probe(struct platform_device *pdev)
|
||||||
goto thermal_zone_unregister;
|
goto thermal_zone_unregister;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
pm_runtime_put(data->dev);
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
|
|
||||||
thermal_zone_unregister:
|
thermal_zone_unregister:
|
||||||
thermal_zone_device_unregister(data->tz);
|
thermal_zone_device_unregister(data->tz);
|
||||||
|
disable_runtime_pm:
|
||||||
|
pm_runtime_put_noidle(data->dev);
|
||||||
|
pm_runtime_disable(data->dev);
|
||||||
clk_disable:
|
clk_disable:
|
||||||
clk_disable_unprepare(data->thermal_clk);
|
clk_disable_unprepare(data->thermal_clk);
|
||||||
legacy_cleanup:
|
legacy_cleanup:
|
||||||
|
@ -829,13 +820,9 @@ legacy_cleanup:
|
||||||
static int imx_thermal_remove(struct platform_device *pdev)
|
static int imx_thermal_remove(struct platform_device *pdev)
|
||||||
{
|
{
|
||||||
struct imx_thermal_data *data = platform_get_drvdata(pdev);
|
struct imx_thermal_data *data = platform_get_drvdata(pdev);
|
||||||
struct regmap *map = data->tempmon;
|
|
||||||
|
|
||||||
/* Disable measurements */
|
pm_runtime_put_noidle(data->dev);
|
||||||
regmap_write(map, data->socdata->sensor_ctrl + REG_SET,
|
pm_runtime_disable(data->dev);
|
||||||
data->socdata->power_down_mask);
|
|
||||||
if (!IS_ERR(data->thermal_clk))
|
|
||||||
clk_disable_unprepare(data->thermal_clk);
|
|
||||||
|
|
||||||
thermal_zone_device_unregister(data->tz);
|
thermal_zone_device_unregister(data->tz);
|
||||||
imx_thermal_unregister_legacy_cooling(data);
|
imx_thermal_unregister_legacy_cooling(data);
|
||||||
|
@ -858,9 +845,8 @@ static int __maybe_unused imx_thermal_suspend(struct device *dev)
|
||||||
ret = thermal_zone_device_disable(data->tz);
|
ret = thermal_zone_device_disable(data->tz);
|
||||||
if (ret)
|
if (ret)
|
||||||
return ret;
|
return ret;
|
||||||
clk_disable_unprepare(data->thermal_clk);
|
|
||||||
|
|
||||||
return 0;
|
return pm_runtime_force_suspend(data->dev);
|
||||||
}
|
}
|
||||||
|
|
||||||
static int __maybe_unused imx_thermal_resume(struct device *dev)
|
static int __maybe_unused imx_thermal_resume(struct device *dev)
|
||||||
|
@ -868,19 +854,70 @@ static int __maybe_unused imx_thermal_resume(struct device *dev)
|
||||||
struct imx_thermal_data *data = dev_get_drvdata(dev);
|
struct imx_thermal_data *data = dev_get_drvdata(dev);
|
||||||
int ret;
|
int ret;
|
||||||
|
|
||||||
ret = clk_prepare_enable(data->thermal_clk);
|
ret = pm_runtime_force_resume(data->dev);
|
||||||
if (ret)
|
if (ret)
|
||||||
return ret;
|
return ret;
|
||||||
/* Enabled thermal sensor after resume */
|
/* Enabled thermal sensor after resume */
|
||||||
ret = thermal_zone_device_enable(data->tz);
|
return thermal_zone_device_enable(data->tz);
|
||||||
|
}
|
||||||
|
|
||||||
|
static int __maybe_unused imx_thermal_runtime_suspend(struct device *dev)
|
||||||
|
{
|
||||||
|
struct imx_thermal_data *data = dev_get_drvdata(dev);
|
||||||
|
const struct thermal_soc_data *socdata = data->socdata;
|
||||||
|
struct regmap *map = data->tempmon;
|
||||||
|
int ret;
|
||||||
|
|
||||||
|
ret = regmap_write(map, socdata->sensor_ctrl + REG_CLR,
|
||||||
|
socdata->measure_temp_mask);
|
||||||
if (ret)
|
if (ret)
|
||||||
return ret;
|
return ret;
|
||||||
|
|
||||||
|
ret = regmap_write(map, socdata->sensor_ctrl + REG_SET,
|
||||||
|
socdata->power_down_mask);
|
||||||
|
if (ret)
|
||||||
|
return ret;
|
||||||
|
|
||||||
|
clk_disable_unprepare(data->thermal_clk);
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
static SIMPLE_DEV_PM_OPS(imx_thermal_pm_ops,
|
static int __maybe_unused imx_thermal_runtime_resume(struct device *dev)
|
||||||
imx_thermal_suspend, imx_thermal_resume);
|
{
|
||||||
|
struct imx_thermal_data *data = dev_get_drvdata(dev);
|
||||||
|
const struct thermal_soc_data *socdata = data->socdata;
|
||||||
|
struct regmap *map = data->tempmon;
|
||||||
|
int ret;
|
||||||
|
|
||||||
|
ret = clk_prepare_enable(data->thermal_clk);
|
||||||
|
if (ret)
|
||||||
|
return ret;
|
||||||
|
|
||||||
|
ret = regmap_write(map, socdata->sensor_ctrl + REG_CLR,
|
||||||
|
socdata->power_down_mask);
|
||||||
|
if (ret)
|
||||||
|
return ret;
|
||||||
|
|
||||||
|
ret = regmap_write(map, socdata->sensor_ctrl + REG_SET,
|
||||||
|
socdata->measure_temp_mask);
|
||||||
|
if (ret)
|
||||||
|
return ret;
|
||||||
|
|
||||||
|
/*
|
||||||
|
* According to the temp sensor designers, it may require up to ~17us
|
||||||
|
* to complete a measurement.
|
||||||
|
*/
|
||||||
|
usleep_range(20, 50);
|
||||||
|
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
static const struct dev_pm_ops imx_thermal_pm_ops = {
|
||||||
|
SET_SYSTEM_SLEEP_PM_OPS(imx_thermal_suspend, imx_thermal_resume)
|
||||||
|
SET_RUNTIME_PM_OPS(imx_thermal_runtime_suspend,
|
||||||
|
imx_thermal_runtime_resume, NULL)
|
||||||
|
};
|
||||||
|
|
||||||
static struct platform_driver imx_thermal = {
|
static struct platform_driver imx_thermal = {
|
||||||
.driver = {
|
.driver = {
|
||||||
|
|
|
@ -250,8 +250,9 @@ static int fill_art(char __user *ubuf)
|
||||||
get_single_name(arts[i].source, art_user[i].source_device);
|
get_single_name(arts[i].source, art_user[i].source_device);
|
||||||
get_single_name(arts[i].target, art_user[i].target_device);
|
get_single_name(arts[i].target, art_user[i].target_device);
|
||||||
/* copy the rest int data in addition to source and target */
|
/* copy the rest int data in addition to source and target */
|
||||||
memcpy(&art_user[i].weight, &arts[i].weight,
|
BUILD_BUG_ON(sizeof(art_user[i].data) !=
|
||||||
sizeof(u64) * (ACPI_NR_ART_ELEMENTS - 2));
|
sizeof(u64) * (ACPI_NR_ART_ELEMENTS - 2));
|
||||||
|
memcpy(&art_user[i].data, &arts[i].data, sizeof(art_user[i].data));
|
||||||
}
|
}
|
||||||
|
|
||||||
if (copy_to_user(ubuf, art_user, art_len))
|
if (copy_to_user(ubuf, art_user, art_len))
|
||||||
|
|
|
@ -17,17 +17,19 @@
|
||||||
struct art {
|
struct art {
|
||||||
acpi_handle source;
|
acpi_handle source;
|
||||||
acpi_handle target;
|
acpi_handle target;
|
||||||
u64 weight;
|
struct_group(data,
|
||||||
u64 ac0_max;
|
u64 weight;
|
||||||
u64 ac1_max;
|
u64 ac0_max;
|
||||||
u64 ac2_max;
|
u64 ac1_max;
|
||||||
u64 ac3_max;
|
u64 ac2_max;
|
||||||
u64 ac4_max;
|
u64 ac3_max;
|
||||||
u64 ac5_max;
|
u64 ac4_max;
|
||||||
u64 ac6_max;
|
u64 ac5_max;
|
||||||
u64 ac7_max;
|
u64 ac6_max;
|
||||||
u64 ac8_max;
|
u64 ac7_max;
|
||||||
u64 ac9_max;
|
u64 ac8_max;
|
||||||
|
u64 ac9_max;
|
||||||
|
);
|
||||||
} __packed;
|
} __packed;
|
||||||
|
|
||||||
struct trt {
|
struct trt {
|
||||||
|
@ -47,17 +49,19 @@ union art_object {
|
||||||
struct {
|
struct {
|
||||||
char source_device[8]; /* ACPI single name */
|
char source_device[8]; /* ACPI single name */
|
||||||
char target_device[8]; /* ACPI single name */
|
char target_device[8]; /* ACPI single name */
|
||||||
u64 weight;
|
struct_group(data,
|
||||||
u64 ac0_max_level;
|
u64 weight;
|
||||||
u64 ac1_max_level;
|
u64 ac0_max_level;
|
||||||
u64 ac2_max_level;
|
u64 ac1_max_level;
|
||||||
u64 ac3_max_level;
|
u64 ac2_max_level;
|
||||||
u64 ac4_max_level;
|
u64 ac3_max_level;
|
||||||
u64 ac5_max_level;
|
u64 ac4_max_level;
|
||||||
u64 ac6_max_level;
|
u64 ac5_max_level;
|
||||||
u64 ac7_max_level;
|
u64 ac6_max_level;
|
||||||
u64 ac8_max_level;
|
u64 ac7_max_level;
|
||||||
u64 ac9_max_level;
|
u64 ac8_max_level;
|
||||||
|
u64 ac9_max_level;
|
||||||
|
);
|
||||||
};
|
};
|
||||||
u64 __data[ACPI_NR_ART_ELEMENTS];
|
u64 __data[ACPI_NR_ART_ELEMENTS];
|
||||||
};
|
};
|
||||||
|
|
|
@ -80,7 +80,8 @@ void proc_thermal_rfim_remove(struct pci_dev *pdev);
|
||||||
int proc_thermal_mbox_add(struct pci_dev *pdev, struct proc_thermal_device *proc_priv);
|
int proc_thermal_mbox_add(struct pci_dev *pdev, struct proc_thermal_device *proc_priv);
|
||||||
void proc_thermal_mbox_remove(struct pci_dev *pdev);
|
void proc_thermal_mbox_remove(struct pci_dev *pdev);
|
||||||
|
|
||||||
int processor_thermal_send_mbox_cmd(struct pci_dev *pdev, u16 cmd_id, u32 cmd_data, u64 *cmd_resp);
|
int processor_thermal_send_mbox_read_cmd(struct pci_dev *pdev, u16 id, u64 *resp);
|
||||||
|
int processor_thermal_send_mbox_write_cmd(struct pci_dev *pdev, u16 id, u32 data);
|
||||||
int proc_thermal_add(struct device *dev, struct proc_thermal_device *priv);
|
int proc_thermal_add(struct device *dev, struct proc_thermal_device *priv);
|
||||||
void proc_thermal_remove(struct proc_thermal_device *proc_priv);
|
void proc_thermal_remove(struct proc_thermal_device *proc_priv);
|
||||||
int proc_thermal_suspend(struct device *dev);
|
int proc_thermal_suspend(struct device *dev);
|
||||||
|
|
|
@ -24,19 +24,15 @@
|
||||||
|
|
||||||
static DEFINE_MUTEX(mbox_lock);
|
static DEFINE_MUTEX(mbox_lock);
|
||||||
|
|
||||||
static int send_mbox_cmd(struct pci_dev *pdev, u16 cmd_id, u32 cmd_data, u64 *cmd_resp)
|
static int wait_for_mbox_ready(struct proc_thermal_device *proc_priv)
|
||||||
{
|
{
|
||||||
struct proc_thermal_device *proc_priv;
|
|
||||||
u32 retries, data;
|
u32 retries, data;
|
||||||
int ret;
|
int ret;
|
||||||
|
|
||||||
mutex_lock(&mbox_lock);
|
|
||||||
proc_priv = pci_get_drvdata(pdev);
|
|
||||||
|
|
||||||
/* Poll for rb bit == 0 */
|
/* Poll for rb bit == 0 */
|
||||||
retries = MBOX_RETRY_COUNT;
|
retries = MBOX_RETRY_COUNT;
|
||||||
do {
|
do {
|
||||||
data = readl((void __iomem *) (proc_priv->mmio_base + MBOX_OFFSET_INTERFACE));
|
data = readl(proc_priv->mmio_base + MBOX_OFFSET_INTERFACE);
|
||||||
if (data & BIT_ULL(MBOX_BUSY_BIT)) {
|
if (data & BIT_ULL(MBOX_BUSY_BIT)) {
|
||||||
ret = -EBUSY;
|
ret = -EBUSY;
|
||||||
continue;
|
continue;
|
||||||
|
@ -45,53 +41,78 @@ static int send_mbox_cmd(struct pci_dev *pdev, u16 cmd_id, u32 cmd_data, u64 *cm
|
||||||
break;
|
break;
|
||||||
} while (--retries);
|
} while (--retries);
|
||||||
|
|
||||||
|
return ret;
|
||||||
|
}
|
||||||
|
|
||||||
|
static int send_mbox_write_cmd(struct pci_dev *pdev, u16 id, u32 data)
|
||||||
|
{
|
||||||
|
struct proc_thermal_device *proc_priv;
|
||||||
|
u32 reg_data;
|
||||||
|
int ret;
|
||||||
|
|
||||||
|
proc_priv = pci_get_drvdata(pdev);
|
||||||
|
|
||||||
|
mutex_lock(&mbox_lock);
|
||||||
|
|
||||||
|
ret = wait_for_mbox_ready(proc_priv);
|
||||||
if (ret)
|
if (ret)
|
||||||
goto unlock_mbox;
|
goto unlock_mbox;
|
||||||
|
|
||||||
if (cmd_id == MBOX_CMD_WORKLOAD_TYPE_WRITE)
|
writel(data, (proc_priv->mmio_base + MBOX_OFFSET_DATA));
|
||||||
writel(cmd_data, (void __iomem *) ((proc_priv->mmio_base + MBOX_OFFSET_DATA)));
|
|
||||||
|
|
||||||
/* Write command register */
|
/* Write command register */
|
||||||
data = BIT_ULL(MBOX_BUSY_BIT) | cmd_id;
|
reg_data = BIT_ULL(MBOX_BUSY_BIT) | id;
|
||||||
writel(data, (void __iomem *) ((proc_priv->mmio_base + MBOX_OFFSET_INTERFACE)));
|
writel(reg_data, (proc_priv->mmio_base + MBOX_OFFSET_INTERFACE));
|
||||||
|
|
||||||
/* Poll for rb bit == 0 */
|
ret = wait_for_mbox_ready(proc_priv);
|
||||||
retries = MBOX_RETRY_COUNT;
|
|
||||||
do {
|
|
||||||
data = readl((void __iomem *) (proc_priv->mmio_base + MBOX_OFFSET_INTERFACE));
|
|
||||||
if (data & BIT_ULL(MBOX_BUSY_BIT)) {
|
|
||||||
ret = -EBUSY;
|
|
||||||
continue;
|
|
||||||
}
|
|
||||||
|
|
||||||
if (data) {
|
|
||||||
ret = -ENXIO;
|
|
||||||
goto unlock_mbox;
|
|
||||||
}
|
|
||||||
|
|
||||||
ret = 0;
|
|
||||||
|
|
||||||
if (!cmd_resp)
|
|
||||||
break;
|
|
||||||
|
|
||||||
if (cmd_id == MBOX_CMD_WORKLOAD_TYPE_READ)
|
|
||||||
*cmd_resp = readl((void __iomem *) (proc_priv->mmio_base + MBOX_OFFSET_DATA));
|
|
||||||
else
|
|
||||||
*cmd_resp = readq((void __iomem *) (proc_priv->mmio_base + MBOX_OFFSET_DATA));
|
|
||||||
|
|
||||||
break;
|
|
||||||
} while (--retries);
|
|
||||||
|
|
||||||
unlock_mbox:
|
unlock_mbox:
|
||||||
mutex_unlock(&mbox_lock);
|
mutex_unlock(&mbox_lock);
|
||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
|
|
||||||
int processor_thermal_send_mbox_cmd(struct pci_dev *pdev, u16 cmd_id, u32 cmd_data, u64 *cmd_resp)
|
static int send_mbox_read_cmd(struct pci_dev *pdev, u16 id, u64 *resp)
|
||||||
{
|
{
|
||||||
return send_mbox_cmd(pdev, cmd_id, cmd_data, cmd_resp);
|
struct proc_thermal_device *proc_priv;
|
||||||
|
u32 reg_data;
|
||||||
|
int ret;
|
||||||
|
|
||||||
|
proc_priv = pci_get_drvdata(pdev);
|
||||||
|
|
||||||
|
mutex_lock(&mbox_lock);
|
||||||
|
|
||||||
|
ret = wait_for_mbox_ready(proc_priv);
|
||||||
|
if (ret)
|
||||||
|
goto unlock_mbox;
|
||||||
|
|
||||||
|
/* Write command register */
|
||||||
|
reg_data = BIT_ULL(MBOX_BUSY_BIT) | id;
|
||||||
|
writel(reg_data, (proc_priv->mmio_base + MBOX_OFFSET_INTERFACE));
|
||||||
|
|
||||||
|
ret = wait_for_mbox_ready(proc_priv);
|
||||||
|
if (ret)
|
||||||
|
goto unlock_mbox;
|
||||||
|
|
||||||
|
if (id == MBOX_CMD_WORKLOAD_TYPE_READ)
|
||||||
|
*resp = readl(proc_priv->mmio_base + MBOX_OFFSET_DATA);
|
||||||
|
else
|
||||||
|
*resp = readq(proc_priv->mmio_base + MBOX_OFFSET_DATA);
|
||||||
|
|
||||||
|
unlock_mbox:
|
||||||
|
mutex_unlock(&mbox_lock);
|
||||||
|
return ret;
|
||||||
}
|
}
|
||||||
EXPORT_SYMBOL_GPL(processor_thermal_send_mbox_cmd);
|
|
||||||
|
int processor_thermal_send_mbox_read_cmd(struct pci_dev *pdev, u16 id, u64 *resp)
|
||||||
|
{
|
||||||
|
return send_mbox_read_cmd(pdev, id, resp);
|
||||||
|
}
|
||||||
|
EXPORT_SYMBOL_NS_GPL(processor_thermal_send_mbox_read_cmd, INT340X_THERMAL);
|
||||||
|
|
||||||
|
int processor_thermal_send_mbox_write_cmd(struct pci_dev *pdev, u16 id, u32 data)
|
||||||
|
{
|
||||||
|
return send_mbox_write_cmd(pdev, id, data);
|
||||||
|
}
|
||||||
|
EXPORT_SYMBOL_NS_GPL(processor_thermal_send_mbox_write_cmd, INT340X_THERMAL);
|
||||||
|
|
||||||
/* List of workload types */
|
/* List of workload types */
|
||||||
static const char * const workload_types[] = {
|
static const char * const workload_types[] = {
|
||||||
|
@ -104,7 +125,6 @@ static const char * const workload_types[] = {
|
||||||
NULL
|
NULL
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
||||||
static ssize_t workload_available_types_show(struct device *dev,
|
static ssize_t workload_available_types_show(struct device *dev,
|
||||||
struct device_attribute *attr,
|
struct device_attribute *attr,
|
||||||
char *buf)
|
char *buf)
|
||||||
|
@ -146,7 +166,7 @@ static ssize_t workload_type_store(struct device *dev,
|
||||||
|
|
||||||
data |= ret;
|
data |= ret;
|
||||||
|
|
||||||
ret = send_mbox_cmd(pdev, MBOX_CMD_WORKLOAD_TYPE_WRITE, data, NULL);
|
ret = send_mbox_write_cmd(pdev, MBOX_CMD_WORKLOAD_TYPE_WRITE, data);
|
||||||
if (ret)
|
if (ret)
|
||||||
return false;
|
return false;
|
||||||
|
|
||||||
|
@ -161,7 +181,7 @@ static ssize_t workload_type_show(struct device *dev,
|
||||||
u64 cmd_resp;
|
u64 cmd_resp;
|
||||||
int ret;
|
int ret;
|
||||||
|
|
||||||
ret = send_mbox_cmd(pdev, MBOX_CMD_WORKLOAD_TYPE_READ, 0, &cmd_resp);
|
ret = send_mbox_read_cmd(pdev, MBOX_CMD_WORKLOAD_TYPE_READ, &cmd_resp);
|
||||||
if (ret)
|
if (ret)
|
||||||
return false;
|
return false;
|
||||||
|
|
||||||
|
@ -186,8 +206,6 @@ static const struct attribute_group workload_req_attribute_group = {
|
||||||
.name = "workload_request"
|
.name = "workload_request"
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
static bool workload_req_created;
|
static bool workload_req_created;
|
||||||
|
|
||||||
int proc_thermal_mbox_add(struct pci_dev *pdev, struct proc_thermal_device *proc_priv)
|
int proc_thermal_mbox_add(struct pci_dev *pdev, struct proc_thermal_device *proc_priv)
|
||||||
|
@ -196,7 +214,7 @@ int proc_thermal_mbox_add(struct pci_dev *pdev, struct proc_thermal_device *proc
|
||||||
int ret;
|
int ret;
|
||||||
|
|
||||||
/* Check if there is a mailbox support, if fails return success */
|
/* Check if there is a mailbox support, if fails return success */
|
||||||
ret = send_mbox_cmd(pdev, MBOX_CMD_WORKLOAD_TYPE_READ, 0, &cmd_resp);
|
ret = send_mbox_read_cmd(pdev, MBOX_CMD_WORKLOAD_TYPE_READ, &cmd_resp);
|
||||||
if (ret)
|
if (ret)
|
||||||
return 0;
|
return 0;
|
||||||
|
|
||||||
|
|
|
@ -9,6 +9,8 @@
|
||||||
#include <linux/pci.h>
|
#include <linux/pci.h>
|
||||||
#include "processor_thermal_device.h"
|
#include "processor_thermal_device.h"
|
||||||
|
|
||||||
|
MODULE_IMPORT_NS(INT340X_THERMAL);
|
||||||
|
|
||||||
struct mmio_reg {
|
struct mmio_reg {
|
||||||
int read_only;
|
int read_only;
|
||||||
u32 offset;
|
u32 offset;
|
||||||
|
@ -194,8 +196,7 @@ static ssize_t rfi_restriction_store(struct device *dev,
|
||||||
struct device_attribute *attr,
|
struct device_attribute *attr,
|
||||||
const char *buf, size_t count)
|
const char *buf, size_t count)
|
||||||
{
|
{
|
||||||
u16 cmd_id = 0x0008;
|
u16 id = 0x0008;
|
||||||
u64 cmd_resp;
|
|
||||||
u32 input;
|
u32 input;
|
||||||
int ret;
|
int ret;
|
||||||
|
|
||||||
|
@ -203,7 +204,7 @@ static ssize_t rfi_restriction_store(struct device *dev,
|
||||||
if (ret)
|
if (ret)
|
||||||
return ret;
|
return ret;
|
||||||
|
|
||||||
ret = processor_thermal_send_mbox_cmd(to_pci_dev(dev), cmd_id, input, &cmd_resp);
|
ret = processor_thermal_send_mbox_write_cmd(to_pci_dev(dev), id, input);
|
||||||
if (ret)
|
if (ret)
|
||||||
return ret;
|
return ret;
|
||||||
|
|
||||||
|
@ -214,30 +215,30 @@ static ssize_t rfi_restriction_show(struct device *dev,
|
||||||
struct device_attribute *attr,
|
struct device_attribute *attr,
|
||||||
char *buf)
|
char *buf)
|
||||||
{
|
{
|
||||||
u16 cmd_id = 0x0007;
|
u16 id = 0x0007;
|
||||||
u64 cmd_resp;
|
u64 resp;
|
||||||
int ret;
|
int ret;
|
||||||
|
|
||||||
ret = processor_thermal_send_mbox_cmd(to_pci_dev(dev), cmd_id, 0, &cmd_resp);
|
ret = processor_thermal_send_mbox_read_cmd(to_pci_dev(dev), id, &resp);
|
||||||
if (ret)
|
if (ret)
|
||||||
return ret;
|
return ret;
|
||||||
|
|
||||||
return sprintf(buf, "%llu\n", cmd_resp);
|
return sprintf(buf, "%llu\n", resp);
|
||||||
}
|
}
|
||||||
|
|
||||||
static ssize_t ddr_data_rate_show(struct device *dev,
|
static ssize_t ddr_data_rate_show(struct device *dev,
|
||||||
struct device_attribute *attr,
|
struct device_attribute *attr,
|
||||||
char *buf)
|
char *buf)
|
||||||
{
|
{
|
||||||
u16 cmd_id = 0x0107;
|
u16 id = 0x0107;
|
||||||
u64 cmd_resp;
|
u64 resp;
|
||||||
int ret;
|
int ret;
|
||||||
|
|
||||||
ret = processor_thermal_send_mbox_cmd(to_pci_dev(dev), cmd_id, 0, &cmd_resp);
|
ret = processor_thermal_send_mbox_read_cmd(to_pci_dev(dev), id, &resp);
|
||||||
if (ret)
|
if (ret)
|
||||||
return ret;
|
return ret;
|
||||||
|
|
||||||
return sprintf(buf, "%llu\n", cmd_resp);
|
return sprintf(buf, "%llu\n", resp);
|
||||||
}
|
}
|
||||||
|
|
||||||
static DEVICE_ATTR_RW(rfi_restriction);
|
static DEVICE_ATTR_RW(rfi_restriction);
|
||||||
|
|
|
@ -641,7 +641,7 @@ exit_set:
|
||||||
}
|
}
|
||||||
|
|
||||||
/* bind to generic thermal layer as cooling device*/
|
/* bind to generic thermal layer as cooling device*/
|
||||||
static struct thermal_cooling_device_ops powerclamp_cooling_ops = {
|
static const struct thermal_cooling_device_ops powerclamp_cooling_ops = {
|
||||||
.get_max_state = powerclamp_get_max_state,
|
.get_max_state = powerclamp_get_max_state,
|
||||||
.get_cur_state = powerclamp_get_cur_state,
|
.get_cur_state = powerclamp_get_cur_state,
|
||||||
.set_cur_state = powerclamp_set_cur_state,
|
.set_cur_state = powerclamp_set_cur_state,
|
||||||
|
|
|
@ -0,0 +1,242 @@
|
||||||
|
// SPDX-License-Identifier: GPL-2.0
|
||||||
|
/*
|
||||||
|
* Renesas RZ/G2L TSU Thermal Sensor Driver
|
||||||
|
*
|
||||||
|
* Copyright (C) 2021 Renesas Electronics Corporation
|
||||||
|
*/
|
||||||
|
#include <linux/delay.h>
|
||||||
|
#include <linux/err.h>
|
||||||
|
#include <linux/io.h>
|
||||||
|
#include <linux/iopoll.h>
|
||||||
|
#include <linux/math.h>
|
||||||
|
#include <linux/module.h>
|
||||||
|
#include <linux/of_device.h>
|
||||||
|
#include <linux/platform_device.h>
|
||||||
|
#include <linux/pm_runtime.h>
|
||||||
|
#include <linux/reset.h>
|
||||||
|
#include <linux/thermal.h>
|
||||||
|
#include <linux/units.h>
|
||||||
|
|
||||||
|
#include "thermal_hwmon.h"
|
||||||
|
|
||||||
|
#define CTEMP_MASK 0xFFF
|
||||||
|
|
||||||
|
/* default calibration values, if FUSE values are missing */
|
||||||
|
#define SW_CALIB0_VAL 3148
|
||||||
|
#define SW_CALIB1_VAL 503
|
||||||
|
|
||||||
|
/* Register offsets */
|
||||||
|
#define TSU_SM 0x00
|
||||||
|
#define TSU_ST 0x04
|
||||||
|
#define TSU_SAD 0x0C
|
||||||
|
#define TSU_SS 0x10
|
||||||
|
|
||||||
|
#define OTPTSUTRIM_REG(n) (0x18 + ((n) * 0x4))
|
||||||
|
|
||||||
|
/* Sensor Mode Register(TSU_SM) */
|
||||||
|
#define TSU_SM_EN_TS BIT(0)
|
||||||
|
#define TSU_SM_ADC_EN_TS BIT(1)
|
||||||
|
#define TSU_SM_NORMAL_MODE (TSU_SM_EN_TS | TSU_SM_ADC_EN_TS)
|
||||||
|
|
||||||
|
/* TSU_ST bits */
|
||||||
|
#define TSU_ST_START BIT(0)
|
||||||
|
|
||||||
|
#define TSU_SS_CONV_RUNNING BIT(0)
|
||||||
|
|
||||||
|
#define TS_CODE_AVE_SCALE(x) ((x) * 1000000)
|
||||||
|
#define MCELSIUS(temp) ((temp) * MILLIDEGREE_PER_DEGREE)
|
||||||
|
#define TS_CODE_CAP_TIMES 8 /* Capture times */
|
||||||
|
|
||||||
|
#define RZG2L_THERMAL_GRAN 500 /* milli Celsius */
|
||||||
|
#define RZG2L_TSU_SS_TIMEOUT_US 1000
|
||||||
|
|
||||||
|
#define CURVATURE_CORRECTION_CONST 13
|
||||||
|
|
||||||
|
struct rzg2l_thermal_priv {
|
||||||
|
struct device *dev;
|
||||||
|
void __iomem *base;
|
||||||
|
struct thermal_zone_device *zone;
|
||||||
|
struct reset_control *rstc;
|
||||||
|
u32 calib0, calib1;
|
||||||
|
};
|
||||||
|
|
||||||
|
static inline u32 rzg2l_thermal_read(struct rzg2l_thermal_priv *priv, u32 reg)
|
||||||
|
{
|
||||||
|
return ioread32(priv->base + reg);
|
||||||
|
}
|
||||||
|
|
||||||
|
static inline void rzg2l_thermal_write(struct rzg2l_thermal_priv *priv, u32 reg,
|
||||||
|
u32 data)
|
||||||
|
{
|
||||||
|
iowrite32(data, priv->base + reg);
|
||||||
|
}
|
||||||
|
|
||||||
|
static int rzg2l_thermal_get_temp(void *devdata, int *temp)
|
||||||
|
{
|
||||||
|
struct rzg2l_thermal_priv *priv = devdata;
|
||||||
|
u32 result = 0, dsensor, ts_code_ave;
|
||||||
|
int val, i;
|
||||||
|
|
||||||
|
for (i = 0; i < TS_CODE_CAP_TIMES ; i++) {
|
||||||
|
/* TSU repeats measurement at 20 microseconds intervals and
|
||||||
|
* automatically updates the results of measurement. As per
|
||||||
|
* the HW manual for measuring temperature we need to read 8
|
||||||
|
* values consecutively and then take the average.
|
||||||
|
* ts_code_ave = (ts_code[0] + ⋯ + ts_code[7]) / 8
|
||||||
|
*/
|
||||||
|
result += rzg2l_thermal_read(priv, TSU_SAD) & CTEMP_MASK;
|
||||||
|
usleep_range(20, 30);
|
||||||
|
}
|
||||||
|
|
||||||
|
ts_code_ave = result / TS_CODE_CAP_TIMES;
|
||||||
|
|
||||||
|
/* Calculate actual sensor value by applying curvature correction formula
|
||||||
|
* dsensor = ts_code_ave / (1 + ts_code_ave * 0.000013). Here we are doing
|
||||||
|
* integer calculation by scaling all the values by 1000000.
|
||||||
|
*/
|
||||||
|
dsensor = TS_CODE_AVE_SCALE(ts_code_ave) /
|
||||||
|
(TS_CODE_AVE_SCALE(1) + (ts_code_ave * CURVATURE_CORRECTION_CONST));
|
||||||
|
|
||||||
|
/* The temperature Tj is calculated by the formula
|
||||||
|
* Tj = (dsensor − calib1) * 165/ (calib0 − calib1) − 40
|
||||||
|
* where calib0 and calib1 are the caliberation values.
|
||||||
|
*/
|
||||||
|
val = ((dsensor - priv->calib1) * (MCELSIUS(165) /
|
||||||
|
(priv->calib0 - priv->calib1))) - MCELSIUS(40);
|
||||||
|
|
||||||
|
*temp = roundup(val, RZG2L_THERMAL_GRAN);
|
||||||
|
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
static const struct thermal_zone_of_device_ops rzg2l_tz_of_ops = {
|
||||||
|
.get_temp = rzg2l_thermal_get_temp,
|
||||||
|
};
|
||||||
|
|
||||||
|
static int rzg2l_thermal_init(struct rzg2l_thermal_priv *priv)
|
||||||
|
{
|
||||||
|
u32 reg_val;
|
||||||
|
|
||||||
|
rzg2l_thermal_write(priv, TSU_SM, TSU_SM_NORMAL_MODE);
|
||||||
|
rzg2l_thermal_write(priv, TSU_ST, 0);
|
||||||
|
|
||||||
|
/* Before setting the START bit, TSU should be in normal operating
|
||||||
|
* mode. As per the HW manual, it will take 60 µs to place the TSU
|
||||||
|
* into normal operating mode.
|
||||||
|
*/
|
||||||
|
usleep_range(60, 80);
|
||||||
|
|
||||||
|
reg_val = rzg2l_thermal_read(priv, TSU_ST);
|
||||||
|
reg_val |= TSU_ST_START;
|
||||||
|
rzg2l_thermal_write(priv, TSU_ST, reg_val);
|
||||||
|
|
||||||
|
return readl_poll_timeout(priv->base + TSU_SS, reg_val,
|
||||||
|
reg_val == TSU_SS_CONV_RUNNING, 50,
|
||||||
|
RZG2L_TSU_SS_TIMEOUT_US);
|
||||||
|
}
|
||||||
|
|
||||||
|
static void rzg2l_thermal_reset_assert_pm_disable_put(struct platform_device *pdev)
|
||||||
|
{
|
||||||
|
struct rzg2l_thermal_priv *priv = dev_get_drvdata(&pdev->dev);
|
||||||
|
|
||||||
|
pm_runtime_put(&pdev->dev);
|
||||||
|
pm_runtime_disable(&pdev->dev);
|
||||||
|
reset_control_assert(priv->rstc);
|
||||||
|
}
|
||||||
|
|
||||||
|
static int rzg2l_thermal_remove(struct platform_device *pdev)
|
||||||
|
{
|
||||||
|
struct rzg2l_thermal_priv *priv = dev_get_drvdata(&pdev->dev);
|
||||||
|
|
||||||
|
thermal_remove_hwmon_sysfs(priv->zone);
|
||||||
|
rzg2l_thermal_reset_assert_pm_disable_put(pdev);
|
||||||
|
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
static int rzg2l_thermal_probe(struct platform_device *pdev)
|
||||||
|
{
|
||||||
|
struct thermal_zone_device *zone;
|
||||||
|
struct rzg2l_thermal_priv *priv;
|
||||||
|
struct device *dev = &pdev->dev;
|
||||||
|
int ret;
|
||||||
|
|
||||||
|
priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
|
||||||
|
if (!priv)
|
||||||
|
return -ENOMEM;
|
||||||
|
|
||||||
|
priv->base = devm_platform_ioremap_resource(pdev, 0);
|
||||||
|
if (IS_ERR(priv->base))
|
||||||
|
return PTR_ERR(priv->base);
|
||||||
|
|
||||||
|
priv->dev = dev;
|
||||||
|
priv->rstc = devm_reset_control_get_exclusive(dev, NULL);
|
||||||
|
if (IS_ERR(priv->rstc))
|
||||||
|
return dev_err_probe(dev, PTR_ERR(priv->rstc),
|
||||||
|
"failed to get cpg reset");
|
||||||
|
|
||||||
|
ret = reset_control_deassert(priv->rstc);
|
||||||
|
if (ret)
|
||||||
|
return dev_err_probe(dev, ret, "failed to deassert");
|
||||||
|
|
||||||
|
pm_runtime_enable(dev);
|
||||||
|
pm_runtime_get_sync(dev);
|
||||||
|
|
||||||
|
priv->calib0 = rzg2l_thermal_read(priv, OTPTSUTRIM_REG(0));
|
||||||
|
if (!priv->calib0)
|
||||||
|
priv->calib0 = SW_CALIB0_VAL;
|
||||||
|
|
||||||
|
priv->calib1 = rzg2l_thermal_read(priv, OTPTSUTRIM_REG(1));
|
||||||
|
if (!priv->calib1)
|
||||||
|
priv->calib1 = SW_CALIB1_VAL;
|
||||||
|
|
||||||
|
platform_set_drvdata(pdev, priv);
|
||||||
|
ret = rzg2l_thermal_init(priv);
|
||||||
|
if (ret) {
|
||||||
|
dev_err(dev, "Failed to start TSU");
|
||||||
|
goto err;
|
||||||
|
}
|
||||||
|
|
||||||
|
zone = devm_thermal_zone_of_sensor_register(dev, 0, priv,
|
||||||
|
&rzg2l_tz_of_ops);
|
||||||
|
if (IS_ERR(zone)) {
|
||||||
|
dev_err(dev, "Can't register thermal zone");
|
||||||
|
ret = PTR_ERR(zone);
|
||||||
|
goto err;
|
||||||
|
}
|
||||||
|
|
||||||
|
priv->zone = zone;
|
||||||
|
priv->zone->tzp->no_hwmon = false;
|
||||||
|
ret = thermal_add_hwmon_sysfs(priv->zone);
|
||||||
|
if (ret)
|
||||||
|
goto err;
|
||||||
|
|
||||||
|
dev_dbg(dev, "TSU probed with %s caliberation values",
|
||||||
|
rzg2l_thermal_read(priv, OTPTSUTRIM_REG(0)) ? "hw" : "sw");
|
||||||
|
|
||||||
|
return 0;
|
||||||
|
|
||||||
|
err:
|
||||||
|
rzg2l_thermal_reset_assert_pm_disable_put(pdev);
|
||||||
|
return ret;
|
||||||
|
}
|
||||||
|
|
||||||
|
static const struct of_device_id rzg2l_thermal_dt_ids[] = {
|
||||||
|
{ .compatible = "renesas,rzg2l-tsu", },
|
||||||
|
{ /* sentinel */ }
|
||||||
|
};
|
||||||
|
MODULE_DEVICE_TABLE(of, rzg2l_thermal_dt_ids);
|
||||||
|
|
||||||
|
static struct platform_driver rzg2l_thermal_driver = {
|
||||||
|
.driver = {
|
||||||
|
.name = "rzg2l_thermal",
|
||||||
|
.of_match_table = rzg2l_thermal_dt_ids,
|
||||||
|
},
|
||||||
|
.probe = rzg2l_thermal_probe,
|
||||||
|
.remove = rzg2l_thermal_remove,
|
||||||
|
};
|
||||||
|
module_platform_driver(rzg2l_thermal_driver);
|
||||||
|
|
||||||
|
MODULE_DESCRIPTION("Renesas RZ/G2L TSU Thermal Sensor Driver");
|
||||||
|
MODULE_AUTHOR("Biju Das <biju.das.jz@bp.renesas.com>");
|
||||||
|
MODULE_LICENSE("GPL v2");
|
|
@ -54,7 +54,6 @@ static double xk_1, xk_2; /* input temperature x[k-#] */
|
||||||
*/
|
*/
|
||||||
int init_thermal_controller(void)
|
int init_thermal_controller(void)
|
||||||
{
|
{
|
||||||
int ret = 0;
|
|
||||||
|
|
||||||
/* init pid params */
|
/* init pid params */
|
||||||
p_param.ts = ticktime;
|
p_param.ts = ticktime;
|
||||||
|
@ -65,7 +64,7 @@ int init_thermal_controller(void)
|
||||||
|
|
||||||
p_param.t_target = target_temp_user;
|
p_param.t_target = target_temp_user;
|
||||||
|
|
||||||
return ret;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
void controller_reset(void)
|
void controller_reset(void)
|
||||||
|
|
Loading…
Reference in New Issue