net: dsa: bcm_sf2: Use correct I/O accessors
The Starfigther 2 driver currently uses __raw_{read,write}l which means native I/O endian. This works correctly for an ARM LE kernel (default) but fails miserably on an ARM BE (BE8) kernel where registers are kept little endian, so replace uses with {read,write}l_relaxed here which is what we want because this is all performance sensitive code. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -130,12 +130,12 @@ static inline u32 bcm_sf2_mangle_addr(struct bcm_sf2_priv *priv, u32 off)
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#define SF2_IO_MACRO(name) \
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static inline u32 name##_readl(struct bcm_sf2_priv *priv, u32 off) \
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{ \
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return __raw_readl(priv->name + off); \
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return readl_relaxed(priv->name + off); \
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} \
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static inline void name##_writel(struct bcm_sf2_priv *priv, \
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u32 val, u32 off) \
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{ \
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__raw_writel(val, priv->name + off); \
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writel_relaxed(val, priv->name + off); \
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} \
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/* Accesses to 64-bits register requires us to latch the hi/lo pairs
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@ -179,23 +179,23 @@ static inline void intrl2_##which##_mask_set(struct bcm_sf2_priv *priv, \
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static inline u32 core_readl(struct bcm_sf2_priv *priv, u32 off)
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{
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u32 tmp = bcm_sf2_mangle_addr(priv, off);
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return __raw_readl(priv->core + tmp);
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return readl_relaxed(priv->core + tmp);
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}
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static inline void core_writel(struct bcm_sf2_priv *priv, u32 val, u32 off)
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{
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u32 tmp = bcm_sf2_mangle_addr(priv, off);
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__raw_writel(val, priv->core + tmp);
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writel_relaxed(val, priv->core + tmp);
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}
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static inline u32 reg_readl(struct bcm_sf2_priv *priv, u16 off)
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{
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return __raw_readl(priv->reg + priv->reg_offsets[off]);
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return readl_relaxed(priv->reg + priv->reg_offsets[off]);
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}
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static inline void reg_writel(struct bcm_sf2_priv *priv, u32 val, u16 off)
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{
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__raw_writel(val, priv->reg + priv->reg_offsets[off]);
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writel_relaxed(val, priv->reg + priv->reg_offsets[off]);
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}
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SF2_IO64_MACRO(core);
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