ARM: ux500: move AB8500 YCBCR settings to device tree
This moves the pin control settings for the YCBCR connector on the AB8500 over to the device tree as a hog. Cc: Patrice Chotard <patrice.chotard@st.com> Cc: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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8320062928
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fd385b3376
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@ -31,7 +31,8 @@
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<&gpio39_default_mode>,
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<&gpio39_default_mode>,
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<&gpio42_default_mode>,
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<&gpio42_default_mode>,
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<&gpio26_default_mode>,
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<&gpio26_default_mode>,
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<&gpio35_default_mode>;
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<&gpio35_default_mode>,
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<&ycbcr_default_mode>;
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/*
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/*
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* Pins 2, 4, 10, 11, 12, 13, 16, 24, 25, 36, 37, 38, 39 and 42
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* Pins 2, 4, 10, 11, 12, 13, 16, 24, 25, 36, 37, 38, 39 and 42
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@ -246,6 +247,26 @@
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};
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};
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};
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};
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};
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};
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/*
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* This sets up the YCBCR connector pins, i.e. analog video out.
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* Set as input with no bias.
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*/
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ycbcr {
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ycbcr_default_mode: ycbcr_default {
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default_mux {
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ste,function = "ycbcr";
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ste,pins = "ycbcr0123_d_1";
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};
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default_cfg {
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ste,pins = "GPIO6_Y18",
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"GPIO7_AA20",
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"GPIO8_W18",
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"GPIO9_AA19";
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input-enable;
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bias-disable;
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};
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};
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};
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};
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};
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};
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};
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};
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};
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@ -56,16 +56,6 @@ static struct pinctrl_map __initdata ab8500_pinmap[] = {
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AB8500_MUX_STATE("gpio3_a_1", "gpio", "regulator.36", PINCTRL_STATE_SLEEP),
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AB8500_MUX_STATE("gpio3_a_1", "gpio", "regulator.36", PINCTRL_STATE_SLEEP),
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AB8500_PIN_STATE("GPIO3_U9", in_pd, "regulator.36", PINCTRL_STATE_SLEEP),
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AB8500_PIN_STATE("GPIO3_U9", in_pd, "regulator.36", PINCTRL_STATE_SLEEP),
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/*
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* pins 6,7,8 and 9 are muxed in YCBCR0123
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* configured in INPUT PULL UP
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*/
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AB8500_MUX_HOG("ycbcr0123_d_1", "ycbcr"),
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AB8500_PIN_HOG("GPIO6_Y18", in_nopull),
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AB8500_PIN_HOG("GPIO7_AA20", in_nopull),
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AB8500_PIN_HOG("GPIO8_W18", in_nopull),
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AB8500_PIN_HOG("GPIO9_AA19", in_nopull),
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/*
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/*
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* pins 14,15 are muxed in PWM1 and PWM2
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* pins 14,15 are muxed in PWM1 and PWM2
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* configured in INPUT PULL DOWN
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* configured in INPUT PULL DOWN
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