ARC: Entry Handler tweaks: Optimize away redundant IRQ_DISABLE_SAVE
In the exception return path, for both U/K cases, intr are already disabled (for various existing reasons). So when we drop down to @restore_regs, we need not redo that. There was subtle issue - when intr were NOT being disabled for ret-to-kernel-but-no-preemption case - now fixed by moving the IRQ_DISABLE further up in @resume_kernel_mode. So what do we gain: * Shaves off a few insn in return path. * Eliminates the need for IRQ_DISABLE_SAVE assembler macro for ARCv2 hence allows for entry code sharing. Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
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@ -157,13 +157,6 @@ static inline void arch_unmask_irq(unsigned int irq)
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flag \scratch
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.endm
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.macro IRQ_DISABLE_SAVE scratch, save
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lr \scratch, [status32]
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mov \save, \scratch /* Make a copy */
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bic \scratch, \scratch, (STATUS_E1_MASK | STATUS_E2_MASK)
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flag \scratch
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.endm
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.macro IRQ_ENABLE scratch
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lr \scratch, [status32]
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or \scratch, \scratch, (STATUS_E1_MASK | STATUS_E2_MASK)
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@ -612,6 +612,9 @@ resume_kernel_mode:
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#ifdef CONFIG_PREEMPT
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; This is a must for preempt_schedule_irq()
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IRQ_DISABLE r9
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; Can't preempt if preemption disabled
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GET_CURR_THR_INFO_FROM_SP r10
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ld r8, [r10, THREAD_INFO_PREEMPT_COUNT]
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@ -621,8 +624,6 @@ resume_kernel_mode:
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ld r9, [r10, THREAD_INFO_FLAGS]
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bbit0 r9, TIF_NEED_RESCHED, restore_regs
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IRQ_DISABLE r9
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; Invoke PREEMPTION
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bl preempt_schedule_irq
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@ -635,12 +636,11 @@ resume_kernel_mode:
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;
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; Restore the saved sys context (common exit-path for EXCPN/IRQ/Trap)
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; IRQ shd definitely not happen between now and rtie
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; All 2 entry points to here already disable interrupts
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restore_regs :
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; Disable Interrupts while restoring reg-file back
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; XXX can this be optimised out
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IRQ_DISABLE_SAVE r9, r10 ;@r10 has prisitine (pre-disable) copy
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lr r10, [status32]
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; Restore REG File. In case multiple Events outstanding,
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; use the same priorty as rtie: EXCPN, L2 IRQ, L1 IRQ, None
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