x86/quirks: Disable HPET on Intel Coffe Lake platforms
Some Coffee Lake platforms have a skewed HPET timer once the SoCs entered PC10, which in consequence marks TSC as unstable because HPET is used as watchdog clocksource for TSC. Harry Pan tried to work around it in the clocksource watchdog code [1] thereby creating a circular dependency between HPET and TSC. This also ignores the fact, that HPET is not only unsuitable as watchdog clocksource on these systems, it becomes unusable in general. Disable HPET on affected platforms. Suggested-by: Feng Tang <feng.tang@intel.com> Signed-off-by: Kai-Heng Feng <kai.heng.feng@canonical.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: stable@vger.kernel.org Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=203183 Link: https://lore.kernel.org/lkml/20190516090651.1396-1-harry.pan@intel.com/ [1] Link: https://lkml.kernel.org/r/20191016103816.30650-1-kai.heng.feng@canonical.com
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@ -710,6 +710,8 @@ static struct chipset early_qrk[] __initdata = {
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*/
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{ PCI_VENDOR_ID_INTEL, 0x0f00,
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PCI_CLASS_BRIDGE_HOST, PCI_ANY_ID, 0, force_disable_hpet},
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{ PCI_VENDOR_ID_INTEL, 0x3ec4,
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PCI_CLASS_BRIDGE_HOST, PCI_ANY_ID, 0, force_disable_hpet},
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{ PCI_VENDOR_ID_BROADCOM, 0x4331,
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PCI_CLASS_NETWORK_OTHER, PCI_ANY_ID, 0, apple_airport_reset},
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{}
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