iwlwifi: renaming last_used and first_empty
This patch renames queue pointers to write_ptr and read_ptr instead of first_empty and last_used. This is closer to technical terminology we everyday use Signed-off-by: Tomas Winkler <tomas.winkler@intel.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
Tomas Winkler
David S. Miller
parent
91e1747384
commit
fc4b6853fb
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@ -526,14 +526,14 @@ int iwl_hw_txq_attach_buf_to_tfd(struct iwl_priv *priv, void *ptr,
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}
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/**
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* iwl_hw_txq_free_tfd - Free one TFD, those at index [txq->q.last_used]
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* iwl_hw_txq_free_tfd - Free one TFD, those at index [txq->q.read_ptr]
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*
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* Does NOT advance any indexes
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*/
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int iwl_hw_txq_free_tfd(struct iwl_priv *priv, struct iwl_tx_queue *txq)
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{
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struct iwl_tfd_frame *bd_tmp = (struct iwl_tfd_frame *)&txq->bd[0];
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struct iwl_tfd_frame *bd = &bd_tmp[txq->q.last_used];
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struct iwl_tfd_frame *bd = &bd_tmp[txq->q.read_ptr];
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struct pci_dev *dev = priv->pci_dev;
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int i;
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int counter;
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@ -556,12 +556,12 @@ int iwl_hw_txq_free_tfd(struct iwl_priv *priv, struct iwl_tx_queue *txq)
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for (i = 1; i < counter; i++) {
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pci_unmap_single(dev, le32_to_cpu(bd->pa[i].addr),
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le32_to_cpu(bd->pa[i].len), PCI_DMA_TODEVICE);
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if (txq->txb[txq->q.last_used].skb[0]) {
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struct sk_buff *skb = txq->txb[txq->q.last_used].skb[0];
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if (txq->txb[txq->q.last_used].skb[0]) {
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if (txq->txb[txq->q.read_ptr].skb[0]) {
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struct sk_buff *skb = txq->txb[txq->q.read_ptr].skb[0];
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if (txq->txb[txq->q.read_ptr].skb[0]) {
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/* Can be called from interrupt context */
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dev_kfree_skb_any(skb);
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txq->txb[txq->q.last_used].skb[0] = NULL;
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txq->txb[txq->q.read_ptr].skb[0] = NULL;
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}
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}
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}
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@ -1749,14 +1749,14 @@ void iwl_hw_txq_ctx_free(struct iwl_priv *priv)
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}
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/**
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* iwl_hw_txq_free_tfd - Free one TFD, those at index [txq->q.last_used]
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* iwl_hw_txq_free_tfd - Free one TFD, those at index [txq->q.read_ptr]
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*
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* Does NOT advance any indexes
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*/
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int iwl_hw_txq_free_tfd(struct iwl_priv *priv, struct iwl_tx_queue *txq)
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{
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struct iwl_tfd_frame *bd_tmp = (struct iwl_tfd_frame *)&txq->bd[0];
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struct iwl_tfd_frame *bd = &bd_tmp[txq->q.last_used];
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struct iwl_tfd_frame *bd = &bd_tmp[txq->q.read_ptr];
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struct pci_dev *dev = priv->pci_dev;
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int i;
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int counter = 0;
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@ -1796,11 +1796,11 @@ int iwl_hw_txq_free_tfd(struct iwl_priv *priv, struct iwl_tx_queue *txq)
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IWL_GET_BITS(bd->pa[index], tb1_len),
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PCI_DMA_TODEVICE);
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if (txq->txb[txq->q.last_used].skb[i]) {
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struct sk_buff *skb = txq->txb[txq->q.last_used].skb[i];
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if (txq->txb[txq->q.read_ptr].skb[i]) {
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struct sk_buff *skb = txq->txb[txq->q.read_ptr].skb[i];
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dev_kfree_skb(skb);
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txq->txb[txq->q.last_used].skb[i] = NULL;
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txq->txb[txq->q.read_ptr].skb[i] = NULL;
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}
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}
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return 0;
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@ -2776,11 +2776,11 @@ int iwl4965_tx_queue_update_wr_ptr(struct iwl_priv *priv,
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len = byte_cnt + IWL_TX_CRC_SIZE + IWL_TX_DELIMITER_SIZE;
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IWL_SET_BITS16(shared_data->queues_byte_cnt_tbls[txq_id].
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tfd_offset[txq->q.first_empty], byte_cnt, len);
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tfd_offset[txq->q.write_ptr], byte_cnt, len);
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if (txq->q.first_empty < IWL4965_MAX_WIN_SIZE)
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if (txq->q.write_ptr < IWL4965_MAX_WIN_SIZE)
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IWL_SET_BITS16(shared_data->queues_byte_cnt_tbls[txq_id].
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tfd_offset[IWL4965_QUEUE_SIZE + txq->q.first_empty],
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tfd_offset[IWL4965_QUEUE_SIZE + txq->q.write_ptr],
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byte_cnt, len);
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return 0;
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@ -4134,7 +4134,7 @@ static void iwl4965_rx_reply_compressed_ba(struct iwl_priv *priv,
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*/
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iwl4965_tx_status_reply_compressed_ba(priv, agg, ba_resp);
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/* releases all the TFDs until the SSN */
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if (txq->q.last_used != (ba_resp_scd_ssn & 0xff))
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if (txq->q.read_ptr != (ba_resp_scd_ssn & 0xff))
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iwl_tx_queue_reclaim(priv, ba_resp_scd_flow, index);
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}
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@ -4205,8 +4205,8 @@ static int iwl4965_tx_queue_agg_enable(struct iwl_priv *priv, int txq_id,
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iwl_set_bits_restricted_reg(priv, SCD_QUEUECHAIN_SEL, (1<<txq_id));
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priv->txq[txq_id].q.last_used = (ssn_idx & 0xff);
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priv->txq[txq_id].q.first_empty = (ssn_idx & 0xff);
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priv->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
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priv->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
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/* supposes that ssn_idx is valid (!= 0xFFF) */
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iwl4965_set_wr_ptrs(priv, txq_id, ssn_idx);
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@ -4257,8 +4257,8 @@ static int iwl4965_tx_queue_agg_disable(struct iwl_priv *priv, u16 txq_id,
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iwl_clear_bits_restricted_reg(priv, SCD_QUEUECHAIN_SEL, (1 << txq_id));
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priv->txq[txq_id].q.last_used = (ssn_idx & 0xff);
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priv->txq[txq_id].q.first_empty = (ssn_idx & 0xff);
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priv->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
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priv->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
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/* supposes that ssn_idx is valid (!= 0xFFF) */
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iwl4965_set_wr_ptrs(priv, txq_id, ssn_idx);
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@ -209,9 +209,9 @@ static void iwl_print_hex_dump(int level, void *p, u32 len)
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static int iwl_queue_space(const struct iwl_queue *q)
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{
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int s = q->last_used - q->first_empty;
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int s = q->read_ptr - q->write_ptr;
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if (q->last_used > q->first_empty)
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if (q->read_ptr > q->write_ptr)
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s -= q->n_bd;
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if (s <= 0)
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@ -237,9 +237,9 @@ static inline int iwl_queue_dec_wrap(int index, int n_bd)
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static inline int x2_queue_used(const struct iwl_queue *q, int i)
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{
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return q->first_empty > q->last_used ?
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(i >= q->last_used && i < q->first_empty) :
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!(i < q->last_used && i >= q->first_empty);
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return q->write_ptr > q->read_ptr ?
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(i >= q->read_ptr && i < q->write_ptr) :
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!(i < q->read_ptr && i >= q->write_ptr);
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}
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static inline u8 get_cmd_index(struct iwl_queue *q, u32 index, int is_huge)
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@ -273,7 +273,7 @@ static int iwl_queue_init(struct iwl_priv *priv, struct iwl_queue *q,
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if (q->high_mark < 2)
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q->high_mark = 2;
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q->first_empty = q->last_used = 0;
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q->write_ptr = q->read_ptr = 0;
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return 0;
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}
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@ -369,8 +369,8 @@ void iwl_tx_queue_free(struct iwl_priv *priv, struct iwl_tx_queue *txq)
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return;
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/* first, empty all BD's */
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for (; q->first_empty != q->last_used;
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q->last_used = iwl_queue_inc_wrap(q->last_used, q->n_bd))
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for (; q->write_ptr != q->read_ptr;
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q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd))
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iwl_hw_txq_free_tfd(priv, txq);
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len = sizeof(struct iwl_cmd) * q->n_window;
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@ -649,12 +649,12 @@ static int iwl_enqueue_hcmd(struct iwl_priv *priv, struct iwl_host_cmd *cmd)
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spin_lock_irqsave(&priv->hcmd_lock, flags);
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tfd = &txq->bd[q->first_empty];
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tfd = &txq->bd[q->write_ptr];
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memset(tfd, 0, sizeof(*tfd));
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control_flags = (u32 *) tfd;
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idx = get_cmd_index(q, q->first_empty, cmd->meta.flags & CMD_SIZE_HUGE);
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idx = get_cmd_index(q, q->write_ptr, cmd->meta.flags & CMD_SIZE_HUGE);
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out_cmd = &txq->cmd[idx];
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out_cmd->hdr.cmd = cmd->id;
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@ -666,7 +666,7 @@ static int iwl_enqueue_hcmd(struct iwl_priv *priv, struct iwl_host_cmd *cmd)
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out_cmd->hdr.flags = 0;
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out_cmd->hdr.sequence = cpu_to_le16(QUEUE_TO_SEQ(IWL_CMD_QUEUE_NUM) |
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INDEX_TO_SEQ(q->first_empty));
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INDEX_TO_SEQ(q->write_ptr));
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if (out_cmd->meta.flags & CMD_SIZE_HUGE)
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out_cmd->hdr.sequence |= cpu_to_le16(SEQ_HUGE_FRAME);
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@ -682,10 +682,10 @@ static int iwl_enqueue_hcmd(struct iwl_priv *priv, struct iwl_host_cmd *cmd)
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"%d bytes at %d[%d]:%d\n",
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get_cmd_string(out_cmd->hdr.cmd),
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out_cmd->hdr.cmd, le16_to_cpu(out_cmd->hdr.sequence),
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fix_size, q->first_empty, idx, IWL_CMD_QUEUE_NUM);
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fix_size, q->write_ptr, idx, IWL_CMD_QUEUE_NUM);
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txq->need_update = 1;
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q->first_empty = iwl_queue_inc_wrap(q->first_empty, q->n_bd);
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q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
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ret = iwl_tx_queue_update_write_ptr(priv, txq);
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spin_unlock_irqrestore(&priv->hcmd_lock, flags);
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@ -2799,21 +2799,21 @@ static int iwl_tx_skb(struct iwl_priv *priv,
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spin_lock_irqsave(&priv->lock, flags);
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tfd = &txq->bd[q->first_empty];
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tfd = &txq->bd[q->write_ptr];
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memset(tfd, 0, sizeof(*tfd));
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control_flags = (u32 *) tfd;
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idx = get_cmd_index(q, q->first_empty, 0);
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idx = get_cmd_index(q, q->write_ptr, 0);
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memset(&(txq->txb[q->first_empty]), 0, sizeof(struct iwl_tx_info));
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txq->txb[q->first_empty].skb[0] = skb;
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memcpy(&(txq->txb[q->first_empty].status.control),
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memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl_tx_info));
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txq->txb[q->write_ptr].skb[0] = skb;
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memcpy(&(txq->txb[q->write_ptr].status.control),
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ctl, sizeof(struct ieee80211_tx_control));
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out_cmd = &txq->cmd[idx];
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memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
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memset(&out_cmd->cmd.tx, 0, sizeof(out_cmd->cmd.tx));
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out_cmd->hdr.cmd = REPLY_TX;
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out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
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INDEX_TO_SEQ(q->first_empty)));
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INDEX_TO_SEQ(q->write_ptr)));
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/* copy frags header */
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memcpy(out_cmd->cmd.tx.hdr, hdr, hdr_len);
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@ -2881,7 +2881,7 @@ static int iwl_tx_skb(struct iwl_priv *priv,
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iwl_print_hex_dump(IWL_DL_TX, (u8 *)out_cmd->cmd.tx.hdr,
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ieee80211_get_hdrlen(fc));
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q->first_empty = iwl_queue_inc_wrap(q->first_empty, q->n_bd);
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q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
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rc = iwl_tx_queue_update_write_ptr(priv, txq);
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spin_unlock_irqrestore(&priv->lock, flags);
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@ -3375,20 +3375,20 @@ int iwl_tx_queue_reclaim(struct iwl_priv *priv, int txq_id, int index)
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if ((index >= q->n_bd) || (x2_queue_used(q, index) == 0)) {
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IWL_ERROR("Read index for DMA queue txq id (%d), index %d, "
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"is out of range [0-%d] %d %d.\n", txq_id,
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index, q->n_bd, q->first_empty, q->last_used);
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index, q->n_bd, q->write_ptr, q->read_ptr);
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return 0;
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}
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for (index = iwl_queue_inc_wrap(index, q->n_bd);
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q->last_used != index;
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q->last_used = iwl_queue_inc_wrap(q->last_used, q->n_bd)) {
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q->read_ptr != index;
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q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) {
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if (txq_id != IWL_CMD_QUEUE_NUM) {
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iwl_txstatus_to_ieee(priv,
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&(txq->txb[txq->q.last_used]));
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&(txq->txb[txq->q.read_ptr]));
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iwl_hw_txq_free_tfd(priv, txq);
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} else if (nfreed > 1) {
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IWL_ERROR("HCMD skipped: index (%d) %d %d\n", index,
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q->first_empty, q->last_used);
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q->write_ptr, q->read_ptr);
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queue_work(priv->workqueue, &priv->restart);
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}
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nfreed++;
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@ -3428,12 +3428,12 @@ static void iwl_rx_reply_tx(struct iwl_priv *priv,
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if ((index >= txq->q.n_bd) || (x2_queue_used(&txq->q, index) == 0)) {
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IWL_ERROR("Read index for DMA queue txq_id (%d) index %d "
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"is out of range [0-%d] %d %d\n", txq_id,
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index, txq->q.n_bd, txq->q.first_empty,
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txq->q.last_used);
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index, txq->q.n_bd, txq->q.write_ptr,
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txq->q.read_ptr);
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return;
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}
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tx_status = &(txq->txb[txq->q.last_used].status);
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tx_status = &(txq->txb[txq->q.read_ptr].status);
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tx_status->retry_count = tx_resp->failure_frame;
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tx_status->queue_number = status;
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@ -4368,14 +4368,14 @@ int iwl_tx_queue_update_write_ptr(struct iwl_priv *priv,
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if (rc)
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return rc;
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iwl_write_restricted(priv, HBUS_TARG_WRPTR,
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txq->q.first_empty | (txq_id << 8));
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txq->q.write_ptr | (txq_id << 8));
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iwl_release_restricted_access(priv);
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/* else not in power-save mode, uCode will never sleep when we're
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* trying to tx (during RFKILL, we're not trying to tx). */
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} else
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iwl_write32(priv, HBUS_TARG_WRPTR,
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txq->q.first_empty | (txq_id << 8));
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txq->q.write_ptr | (txq_id << 8));
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txq->need_update = 0;
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@ -208,9 +208,9 @@ static void iwl_print_hex_dump(int level, void *p, u32 len)
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static int iwl_queue_space(const struct iwl_queue *q)
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{
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int s = q->last_used - q->first_empty;
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int s = q->read_ptr - q->write_ptr;
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if (q->last_used > q->first_empty)
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if (q->read_ptr > q->write_ptr)
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s -= q->n_bd;
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if (s <= 0)
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@ -236,9 +236,9 @@ static inline int iwl_queue_dec_wrap(int index, int n_bd)
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static inline int x2_queue_used(const struct iwl_queue *q, int i)
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{
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return q->first_empty > q->last_used ?
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(i >= q->last_used && i < q->first_empty) :
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!(i < q->last_used && i >= q->first_empty);
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return q->write_ptr > q->read_ptr ?
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(i >= q->read_ptr && i < q->write_ptr) :
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!(i < q->read_ptr && i >= q->write_ptr);
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}
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static inline u8 get_cmd_index(struct iwl_queue *q, u32 index, int is_huge)
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@ -272,7 +272,7 @@ static int iwl_queue_init(struct iwl_priv *priv, struct iwl_queue *q,
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if (q->high_mark < 2)
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q->high_mark = 2;
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q->first_empty = q->last_used = 0;
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q->write_ptr = q->read_ptr = 0;
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return 0;
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}
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@ -368,8 +368,8 @@ void iwl_tx_queue_free(struct iwl_priv *priv, struct iwl_tx_queue *txq)
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return;
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/* first, empty all BD's */
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for (; q->first_empty != q->last_used;
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q->last_used = iwl_queue_inc_wrap(q->last_used, q->n_bd))
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for (; q->write_ptr != q->read_ptr;
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q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd))
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iwl_hw_txq_free_tfd(priv, txq);
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len = sizeof(struct iwl_cmd) * q->n_window;
|
||||
|
|
@ -652,12 +652,12 @@ static int iwl_enqueue_hcmd(struct iwl_priv *priv, struct iwl_host_cmd *cmd)
|
|||
|
||||
spin_lock_irqsave(&priv->hcmd_lock, flags);
|
||||
|
||||
tfd = &txq->bd[q->first_empty];
|
||||
tfd = &txq->bd[q->write_ptr];
|
||||
memset(tfd, 0, sizeof(*tfd));
|
||||
|
||||
control_flags = (u32 *) tfd;
|
||||
|
||||
idx = get_cmd_index(q, q->first_empty, cmd->meta.flags & CMD_SIZE_HUGE);
|
||||
idx = get_cmd_index(q, q->write_ptr, cmd->meta.flags & CMD_SIZE_HUGE);
|
||||
out_cmd = &txq->cmd[idx];
|
||||
|
||||
out_cmd->hdr.cmd = cmd->id;
|
||||
|
|
@ -669,7 +669,7 @@ static int iwl_enqueue_hcmd(struct iwl_priv *priv, struct iwl_host_cmd *cmd)
|
|||
|
||||
out_cmd->hdr.flags = 0;
|
||||
out_cmd->hdr.sequence = cpu_to_le16(QUEUE_TO_SEQ(IWL_CMD_QUEUE_NUM) |
|
||||
INDEX_TO_SEQ(q->first_empty));
|
||||
INDEX_TO_SEQ(q->write_ptr));
|
||||
if (out_cmd->meta.flags & CMD_SIZE_HUGE)
|
||||
out_cmd->hdr.sequence |= cpu_to_le16(SEQ_HUGE_FRAME);
|
||||
|
||||
|
|
@ -681,11 +681,11 @@ static int iwl_enqueue_hcmd(struct iwl_priv *priv, struct iwl_host_cmd *cmd)
|
|||
"%d bytes at %d[%d]:%d\n",
|
||||
get_cmd_string(out_cmd->hdr.cmd),
|
||||
out_cmd->hdr.cmd, le16_to_cpu(out_cmd->hdr.sequence),
|
||||
fix_size, q->first_empty, idx, IWL_CMD_QUEUE_NUM);
|
||||
fix_size, q->write_ptr, idx, IWL_CMD_QUEUE_NUM);
|
||||
|
||||
txq->need_update = 1;
|
||||
ret = iwl4965_tx_queue_update_wr_ptr(priv, txq, 0);
|
||||
q->first_empty = iwl_queue_inc_wrap(q->first_empty, q->n_bd);
|
||||
q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
|
||||
iwl_tx_queue_update_write_ptr(priv, txq);
|
||||
|
||||
spin_unlock_irqrestore(&priv->hcmd_lock, flags);
|
||||
|
|
@ -2889,21 +2889,21 @@ static int iwl_tx_skb(struct iwl_priv *priv,
|
|||
|
||||
spin_lock_irqsave(&priv->lock, flags);
|
||||
|
||||
tfd = &txq->bd[q->first_empty];
|
||||
tfd = &txq->bd[q->write_ptr];
|
||||
memset(tfd, 0, sizeof(*tfd));
|
||||
control_flags = (u32 *) tfd;
|
||||
idx = get_cmd_index(q, q->first_empty, 0);
|
||||
idx = get_cmd_index(q, q->write_ptr, 0);
|
||||
|
||||
memset(&(txq->txb[q->first_empty]), 0, sizeof(struct iwl_tx_info));
|
||||
txq->txb[q->first_empty].skb[0] = skb;
|
||||
memcpy(&(txq->txb[q->first_empty].status.control),
|
||||
memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl_tx_info));
|
||||
txq->txb[q->write_ptr].skb[0] = skb;
|
||||
memcpy(&(txq->txb[q->write_ptr].status.control),
|
||||
ctl, sizeof(struct ieee80211_tx_control));
|
||||
out_cmd = &txq->cmd[idx];
|
||||
memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
|
||||
memset(&out_cmd->cmd.tx, 0, sizeof(out_cmd->cmd.tx));
|
||||
out_cmd->hdr.cmd = REPLY_TX;
|
||||
out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
|
||||
INDEX_TO_SEQ(q->first_empty)));
|
||||
INDEX_TO_SEQ(q->write_ptr)));
|
||||
/* copy frags header */
|
||||
memcpy(out_cmd->cmd.tx.hdr, hdr, hdr_len);
|
||||
|
||||
|
|
@ -2969,7 +2969,7 @@ static int iwl_tx_skb(struct iwl_priv *priv,
|
|||
|
||||
iwl4965_tx_queue_update_wr_ptr(priv, txq, len);
|
||||
|
||||
q->first_empty = iwl_queue_inc_wrap(q->first_empty, q->n_bd);
|
||||
q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
|
||||
rc = iwl_tx_queue_update_write_ptr(priv, txq);
|
||||
spin_unlock_irqrestore(&priv->lock, flags);
|
||||
|
||||
|
|
@ -3463,20 +3463,20 @@ int iwl_tx_queue_reclaim(struct iwl_priv *priv, int txq_id, int index)
|
|||
if ((index >= q->n_bd) || (x2_queue_used(q, index) == 0)) {
|
||||
IWL_ERROR("Read index for DMA queue txq id (%d), index %d, "
|
||||
"is out of range [0-%d] %d %d.\n", txq_id,
|
||||
index, q->n_bd, q->first_empty, q->last_used);
|
||||
index, q->n_bd, q->write_ptr, q->read_ptr);
|
||||
return 0;
|
||||
}
|
||||
|
||||
for (index = iwl_queue_inc_wrap(index, q->n_bd);
|
||||
q->last_used != index;
|
||||
q->last_used = iwl_queue_inc_wrap(q->last_used, q->n_bd)) {
|
||||
q->read_ptr != index;
|
||||
q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) {
|
||||
if (txq_id != IWL_CMD_QUEUE_NUM) {
|
||||
iwl_txstatus_to_ieee(priv,
|
||||
&(txq->txb[txq->q.last_used]));
|
||||
&(txq->txb[txq->q.read_ptr]));
|
||||
iwl_hw_txq_free_tfd(priv, txq);
|
||||
} else if (nfreed > 1) {
|
||||
IWL_ERROR("HCMD skipped: index (%d) %d %d\n", index,
|
||||
q->first_empty, q->last_used);
|
||||
q->write_ptr, q->read_ptr);
|
||||
queue_work(priv->workqueue, &priv->restart);
|
||||
}
|
||||
nfreed++;
|
||||
|
|
@ -3564,7 +3564,7 @@ static int iwl4965_tx_status_reply_tx(struct iwl_priv *priv,
|
|||
IWL_DEBUG_TX_REPLY("FrameCnt = %d, StartIdx=%d \n",
|
||||
agg->frame_count, agg->start_idx);
|
||||
|
||||
tx_status = &(priv->txq[txq_id].txb[txq->q.last_used].status);
|
||||
tx_status = &(priv->txq[txq_id].txb[txq->q.read_ptr].status);
|
||||
tx_status->retry_count = tx_resp->failure_frame;
|
||||
tx_status->queue_number = status & 0xff;
|
||||
tx_status->queue_length = tx_resp->bt_kill_count;
|
||||
|
|
@ -3669,8 +3669,8 @@ static void iwl_rx_reply_tx(struct iwl_priv *priv,
|
|||
if ((index >= txq->q.n_bd) || (x2_queue_used(&txq->q, index) == 0)) {
|
||||
IWL_ERROR("Read index for DMA queue txq_id (%d) index %d "
|
||||
"is out of range [0-%d] %d %d\n", txq_id,
|
||||
index, txq->q.n_bd, txq->q.first_empty,
|
||||
txq->q.last_used);
|
||||
index, txq->q.n_bd, txq->q.write_ptr,
|
||||
txq->q.read_ptr);
|
||||
return;
|
||||
}
|
||||
|
||||
|
|
@ -3705,7 +3705,7 @@ static void iwl_rx_reply_tx(struct iwl_priv *priv,
|
|||
/* TODO: send BAR */
|
||||
}
|
||||
|
||||
if ((txq->q.last_used != (scd_ssn & 0xff))) {
|
||||
if ((txq->q.read_ptr != (scd_ssn & 0xff))) {
|
||||
index = iwl_queue_dec_wrap(scd_ssn & 0xff, txq->q.n_bd);
|
||||
IWL_DEBUG_TX_REPLY("Retry scheduler reclaim scd_ssn "
|
||||
"%d index %d\n", scd_ssn , index);
|
||||
|
|
@ -3714,7 +3714,7 @@ static void iwl_rx_reply_tx(struct iwl_priv *priv,
|
|||
} else {
|
||||
#endif /* CONFIG_IWLWIFI_HT_AGG */
|
||||
#endif /* CONFIG_IWLWIFI_HT */
|
||||
tx_status = &(txq->txb[txq->q.last_used].status);
|
||||
tx_status = &(txq->txb[txq->q.read_ptr].status);
|
||||
|
||||
tx_status->retry_count = tx_resp->failure_frame;
|
||||
tx_status->queue_number = status;
|
||||
|
|
@ -4692,14 +4692,14 @@ int iwl_tx_queue_update_write_ptr(struct iwl_priv *priv,
|
|||
if (rc)
|
||||
return rc;
|
||||
iwl_write_restricted(priv, HBUS_TARG_WRPTR,
|
||||
txq->q.first_empty | (txq_id << 8));
|
||||
txq->q.write_ptr | (txq_id << 8));
|
||||
iwl_release_restricted_access(priv);
|
||||
|
||||
/* else not in power-save mode, uCode will never sleep when we're
|
||||
* trying to tx (during RFKILL, we're not trying to tx). */
|
||||
} else
|
||||
iwl_write32(priv, HBUS_TARG_WRPTR,
|
||||
txq->q.first_empty | (txq_id << 8));
|
||||
txq->q.write_ptr | (txq_id << 8));
|
||||
|
||||
txq->need_update = 0;
|
||||
|
||||
|
|
|
|||
|
|
@ -144,8 +144,8 @@ struct iwl_rt_tx_hdr {
|
|||
*/
|
||||
struct iwl_queue {
|
||||
int n_bd; /* number of BDs in this queue */
|
||||
int first_empty; /* 1-st empty entry (index) host_w*/
|
||||
int last_used; /* last used entry (index) host_r*/
|
||||
int write_ptr; /* 1-st empty entry (index) host_w*/
|
||||
int read_ptr; /* last used entry (index) host_r*/
|
||||
dma_addr_t dma_addr; /* physical addr for BD's */
|
||||
int n_window; /* safe queue window */
|
||||
u32 id;
|
||||
|
|
|
|||
Loading…
Reference in New Issue