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ocxl: Assign a register set to a Logical Partition 

Platform specific function to assign a register set to a Logical Partition.
The "ibm,mmio-atsd" property, provided by the firmware, contains the 16
base ATSD physical addresses (ATSD0 through ATSD15) of the set of MMIO
registers (XTS MMIO ATSDx LPARID/AVA/launch/status register).

For the time being, the ATSD0 set of registers is used by default.

Signed-off-by: Christophe Lombard <clombard@linux.vnet.ibm.com>
Acked-by: Frederic Barrat <fbarrat@linux.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20201125155013.39955-2-clombard@linux.vnet.ibm.com
This commit is contained in:
Christophe Lombard 2020-11-25 16:50:09 +01:00 committed by Michael Ellerman
parent 91668ab7db
commit fc1347b5fe
2 changed files with 48 additions and 0 deletions
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3
arch/powerpc/include/asm/pnv-ocxl.h
View File

@ -28,4 +28,7 @@ int pnv_ocxl_spa_setup(struct pci_dev *dev, void *spa_mem, int PE_mask, void **p
void pnv_ocxl_spa_release(void *platform_data);
int pnv_ocxl_spa_remove_pe_from_cache(void *platform_data, int pe_handle);
int pnv_ocxl_map_lpar(struct pci_dev *dev, uint64_t lparid,
uint64_t lpcr, void __iomem **arva);
void pnv_ocxl_unmap_lpar(void __iomem *arva);
#endif /* _ASM_PNV_OCXL_H */

45
arch/powerpc/platforms/powernv/ocxl.c
View File

@ -483,3 +483,48 @@ int pnv_ocxl_spa_remove_pe_from_cache(void *platform_data, int pe_handle)
return rc;
}
EXPORT_SYMBOL_GPL(pnv_ocxl_spa_remove_pe_from_cache);
int pnv_ocxl_map_lpar(struct pci_dev *dev, uint64_t lparid,
uint64_t lpcr, void __iomem **arva)
{
struct pci_controller *hose = pci_bus_to_host(dev->bus);
struct pnv_phb *phb = hose->private_data;
u64 mmio_atsd;
int rc;
/* ATSD physical address.
* ATSD LAUNCH register: write access initiates a shoot down to
* initiate the TLB Invalidate command.
*/
rc = of_property_read_u64_index(hose->dn, "ibm,mmio-atsd",
0, &mmio_atsd);
if (rc) {
dev_info(&dev->dev, "No available ATSD found\n");
return rc;
}
/* Assign a register set to a Logical Partition and MMIO ATSD
* LPARID register to the required value.
*/
rc = opal_npu_map_lpar(phb->opal_id, pci_dev_id(dev),
lparid, lpcr);
if (rc) {
dev_err(&dev->dev, "Error mapping device to LPAR: %d\n", rc);
return rc;
}
*arva = ioremap(mmio_atsd, 24);
if (!(*arva)) {
dev_warn(&dev->dev, "ioremap failed - mmio_atsd: %#llx\n", mmio_atsd);
rc = -ENOMEM;
}
return rc;
}
EXPORT_SYMBOL_GPL(pnv_ocxl_map_lpar);
void pnv_ocxl_unmap_lpar(void __iomem *arva)
{
iounmap(arva);
}
EXPORT_SYMBOL_GPL(pnv_ocxl_unmap_lpar);