ARM: dts: Move omap4 mmio-sram out of l3 interconnect

We need mmio-sram early for omap4_sram_init() for IO barrier init, and
will be moving l3 interconnect to probe with simple-pm-bus that probes
at module_init() time. So let's move mmio-sram out of l3 to prepare for
that.

Otherwise we will get the following after probing the interconnects with
simple-pm-bus:

omap4_sram_init:Unable to get sram pool needed to handle errata I688

Signed-off-by: Tony Lindgren <tony@atomide.com>
This commit is contained in:
Tony Lindgren 2021-03-10 14:04:31 +02:00
parent e55cc3f040
commit fbe8285d65
1 changed files with 9 additions and 5 deletions

View File

@ -58,6 +58,15 @@
}; };
}; };
/*
* Needed early by omap4_sram_init() for barrier, do not move to l3
* interconnect as simple-pm-bus probes at module_init() time.
*/
ocmcram: sram@40304000 {
compatible = "mmio-sram";
reg = <0x40304000 0xa000>; /* 40k */
};
gic: interrupt-controller@48241000 { gic: interrupt-controller@48241000 {
compatible = "arm,cortex-a9-gic"; compatible = "arm,cortex-a9-gic";
interrupt-controller; interrupt-controller;
@ -136,11 +145,6 @@
l4_abe: interconnect@40100000 { l4_abe: interconnect@40100000 {
}; };
ocmcram: sram@40304000 {
compatible = "mmio-sram";
reg = <0x40304000 0xa000>; /* 40k */
};
target-module@50000000 { target-module@50000000 {
compatible = "ti,sysc-omap2", "ti,sysc"; compatible = "ti,sysc-omap2", "ti,sysc";
reg = <0x50000000 4>, reg = <0x50000000 4>,