Pin control fixes for the v5.0 series:
- Meson8B fixup for the sdc pins - Fix SDC tile position for Qualcomm QCS404 -----BEGIN PGP SIGNATURE----- iQIcBAABAgAGBQJcbQoyAAoJEEEQszewGV1zM4cP+QG1rp5aJ6z74vc5fSaRZPFT deIZRr9BqC8/J4tIQUx1nuu/Y3OTAwp4alUY0PFhZrNyYBVfYNtwUt6cXye0sZLT WyFrh7CAJ/jlOHNfd7mTrsitNlmqt4YqcRH70csRGdw9nMg45LeQaaLdyhKpxzF6 iHlMnXADAgOhnCB4XDIkKSdvz6lOt8gN21THRfOF71E46tFAXtQ/vbiQ/EVfyySz Gxr2JA6XDprB3RwJZyU+85byYv0c3/f+lQUuG4Rgoym8N8ZV1fxzq0t5D/hOImtW vy7HNwEFP1DZ+gsj/J/ePcYzX2svBxqTcF9oY9ZUTQGrMUJePqovZB0zF4Gk6ByF P/jZsFGHB/Jjc9Yp2Xi46xLONKPUSKuLg9zJum2KuHqYvPfYuQHSTkP8ISHuruTe 0dyw81wqsDCDznHQbd8wqGit5ttlaS98RbtZ7/2YQhGe+2zjb4H5u4EKSl3UdU/r hqGk1vpBccObaIMT+/tYzUhkzJ52N12f1lzssWyQm1bImVg0WR7zfVd9fL+Y0Sg5 x1e1p3etTMnmLHmQEbCHfOPUvmdmHsuFLWHUjE0PxwX1bKwL6VzhhAPvlMfLv+LN gX20rKzQdUHMN3bFwc+V2MiLoWhCDfyDWpbbpljhs6r2tGNmmiA9DJDj1Y0I43x4 druTgDHm5vqT6Cf0Uv8N =OC91 -----END PGP SIGNATURE----- Merge tag 'pinctrl-v5.0-3' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull pin control fixes from Linus Walleij: "Some final pin control fixes (I hope) to round off the v5.0 pin control development cycle. Only driver fixes, one for stable: - Meson8B fixup for the sdc pins - Fix SDC tile position for Qualcomm QCS404" * tag 'pinctrl-v5.0-3' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: pinctrl: meson: meson8b: fix the sdxc_a data 1..3 pins pinctrl: qcom: qcs404: Correct SDC tile
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fb83f15ef9
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@ -693,7 +693,7 @@ static const char * const sd_a_groups[] = {
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static const char * const sdxc_a_groups[] = {
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static const char * const sdxc_a_groups[] = {
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"sdxc_d0_0_a", "sdxc_d13_0_a", "sdxc_d47_a", "sdxc_clk_a",
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"sdxc_d0_0_a", "sdxc_d13_0_a", "sdxc_d47_a", "sdxc_clk_a",
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"sdxc_cmd_a", "sdxc_d0_1_a", "sdxc_d0_13_1_a"
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"sdxc_cmd_a", "sdxc_d0_1_a", "sdxc_d13_1_a"
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};
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};
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static const char * const pcm_a_groups[] = {
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static const char * const pcm_a_groups[] = {
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@ -79,7 +79,7 @@ enum {
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.intr_cfg_reg = 0, \
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.intr_cfg_reg = 0, \
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.intr_status_reg = 0, \
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.intr_status_reg = 0, \
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.intr_target_reg = 0, \
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.intr_target_reg = 0, \
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.tile = NORTH, \
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.tile = SOUTH, \
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.mux_bit = -1, \
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.mux_bit = -1, \
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.pull_bit = pull, \
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.pull_bit = pull, \
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.drv_bit = drv, \
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.drv_bit = drv, \
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