UbiquitousOS
/
OpenCloudOS-Kernel
mirror of https://gitee.com/OpenCloudOS/OpenCloudOS-Kernel.git
11
0
Fork 0
Code Issues Projects Releases Wiki Activity

arm64: tegra: Device tree changes for v5.9-rc1 

This contains a slew of fixes in preparation for validating device trees
 against json-schema bindings. In addition, this enables the CPU complex
 (for CPU frequency scaling) and GPU on Tegra194.
 -----BEGIN PGP SIGNATURE-----
 
 iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAl8RzUcTHHRyZWRpbmdA
 bnZpZGlhLmNvbQAKCRDdI6zXfz6zoWzJD/9dL3IPdQhlxf0hqI5C2OppMoEzahSl
 pqjzD/gIe4dksOq6TMGo0HEHPIb9Qgu0aVRBSk1yavfuKO5P1DC9N1tVKKbsg0pa
 W+AtlePGqlbeTIFiKjCnteMQh0XcFTbfRdCWlAXtJm0A2xmU+Hev1rBcdl7BY/Tu
 z+lbPIRq/6C+0PSUckPOl4zfKaADt/K7V+ipSWUtgoP+K8/hxYtIxKdqpW9ETieF
 555hxsdDmJ9X7vk2nUAoRoslxUcAbmneljkzNXCz/XMvSD6AjjxAY+PWmNmTd6uV
 HSUtNkp3I7hJEFqkXfd6jYUwbsu/1JOfKQO3z+AvVECNGJJDU9sK4YHGOFwsQbTY
 9hV/c7PAaJqoN3eTITtdyfXCegKdeco9088hHCxdYoYupKa4RpY2GGuUBaL7O1ro
 6vTflsispzSazN8vHTwy7ubnMeFRKeIGMQCsQttt1mah34QRLh9K5vU2lkfXCa1F
 AlHKI7czKJ2wFHw75NG2VHAv2wGLNJvGvxRT3XgJAfVIR3gXhhqYgRKl8LQcUGen
 jlmn1zWziz9ObnL13My3q4H0JU2f34VpkPLF/PDwiyfY175FvipsPEZH13ZBgTIU
 GiaD8R4HjyNYgg/yKEB/G+W3vof9L8dJVMY0FfrV53tKhn1+3/be9QS4BYVpjHSn
 m81jF+KEHxRIlQ==
 =iRoV
 -----END PGP SIGNATURE-----

Merge tag 'tegra-for-5.9-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt

arm64: tegra: Device tree changes for v5.9-rc1

This contains a slew of fixes in preparation for validating device trees
against json-schema bindings. In addition, this enables the CPU complex
(for CPU frequency scaling) and GPU on Tegra194.

* tag 'tegra-for-5.9-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: (56 commits)
  arm64: tegra: Add the GPU on Tegra194
  arm64: tegra: Add compatible string for Tegra194 CPU complex
  arm64: tegra: Add HDMI supplies on Norrin
  arm64: tegra: Add #{address,size}-cells for VI I2C on Tegra210
  arm64: tegra: Add missing clocks and power-domains to Tegra210 VI I2C
  arm64: tegra: Add clocks and resets for ISP on Tegra210
  arm64: tegra: Fix compatible string for DPAUX on Tegra210
  arm64: tegra: Add i2c-bus subnode for DPAUX controllers
  arm64: tegra: Sort aliases alphabetically
  arm64: tegra: Remove spurious tabs
  arm64: tegra: Populate VBUS for USB3 on Jetson TX2
  arm64: tegra: Enable DFLL support on Jetson Nano
  arm64: tegra: Add support for Jetson Xavier NX
  arm64: tegra: Re-order PCIe aperture mappings
  arm64: tegra: Enable Tegra VI CSI support for Jetson Nano
  arm64: tegra: jetson-tx1: Add camera supplies
  arm64: tegra: Fix order of XUSB controller clocks
  arm64: tegra: Rename cbb@0 to bus@0 on Tegra194
  arm64: tegra: Sort nodes by unit-address on Jetson Nano
  arm64: tegra: Various fixes for PMICs
  ...

Link: https://lore.kernel.org/r/20200717161300.1661002-7-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2020-07-17 20:24:39 +02:00
parent 3502e079c6 0f134e39ae
commit fb31429fa9
19 changed files with 2105 additions and 1188 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
arch/arm64/boot/dts/nvidia/Makefile
View File

@ -8,3 +8,4 @@ dtb-$(CONFIG_ARCH_TEGRA_210_SOC) += tegra210-smaug.dtb
dtb-$(CONFIG_ARCH_TEGRA_210_SOC) += tegra210-p2894-0050-a08.dtb
dtb-$(CONFIG_ARCH_TEGRA_186_SOC) += tegra186-p2771-0000.dtb
dtb-$(CONFIG_ARCH_TEGRA_194_SOC) += tegra194-p2972-0000.dtb
dtb-$(CONFIG_ARCH_TEGRA_194_SOC) += tegra194-p3509-0000+p3668-0000.dtb

399
arch/arm64/boot/dts/nvidia/tegra132-norrin.dts
View File

@ -18,7 +18,7 @@
stdout-path = "serial0:115200n8";
};
memory {
memory@80000000 {
device_type = "memory";
reg = <0x0 0x80000000 0x0 0x80000000>;
};
@ -39,6 +39,9 @@
sor@54540000 {
status = "okay";
avdd-io-hdmi-dp-supply = <&vdd_3v3_hdmi>;
vdd-hdmi-dp-pll-supply = <&vdd_hdmi_pll>;
nvidia,dpaux = <&dpaux>;
nvidia,panel = <&panel>;
};
@ -671,7 +674,7 @@
regulator-boot-on;
};
ldo0 {
avdd_1v05_run: ldo0 {
regulator-name = "+1.05_RUN_AVDD";
regulator-min-microvolt = <1050000>;
regulator-max-microvolt = <1050000>;
@ -781,7 +784,6 @@
battery: smart-battery {
compatible = "sbs,sbs-battery";
reg = <0xb>;
battery-name = "battery";
sbs,i2c-retry-count = <2>;
sbs,poll-retry-count = <10>;
/* power-supplies = <&charger>; */
@ -893,13 +895,108 @@
nvidia,reset-gpio = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
};
usb@70090000 {
phys = <&{/padctl@7009f000/pads/usb2/lanes/usb2-0}>, /* 1st USB A */
<&{/padctl@7009f000/pads/usb2/lanes/usb2-1}>, /* Internal USB */
<&{/padctl@7009f000/pads/usb2/lanes/usb2-2}>, /* 2nd USB A */
<&{/padctl@7009f000/pads/pcie/lanes/pcie-0}>, /* 1st USB A */
<&{/padctl@7009f000/pads/pcie/lanes/pcie-1}>; /* 2nd USB A */
phy-names = "usb2-0", "usb2-1", "usb2-2", "usb3-0", "usb3-1";
avddio-pex-supply = <&vdd_1v05_run>;
dvddio-pex-supply = <&vdd_1v05_run>;
avdd-usb-supply = <&vdd_3v3_lp0>;
hvdd-usb-ss-supply = <&vdd_3v3_lp0>;
status = "okay";
};
padctl@7009f000 {
avdd-pll-utmip-supply = <&vddio_1v8>;
avdd-pll-erefe-supply = <&avdd_1v05_run>;
avdd-pex-pll-supply = <&vdd_1v05_run>;
hvdd-pex-pll-e-supply = <&vdd_3v3_lp0>;
pads {
usb2 {
status = "okay";
lanes {
usb2-0 {
nvidia,function = "xusb";
status = "okay";
};
usb2-1 {
nvidia,function = "xusb";
status = "okay";
};
usb2-2 {
nvidia,function = "xusb";
status = "okay";
};
};
};
pcie {
status = "okay";
lanes {
pcie-0 {
nvidia,function = "usb3-ss";
status = "okay";
};
pcie-1 {
nvidia,function = "usb3-ss";
status = "okay";
};
};
};
};
ports {
usb2-0 {
status = "okay";
mode = "otg";
vbus-supply = <&vdd_usb1_vbus>;
};
usb2-1 {
status = "okay";
mode = "host";
vbus-supply = <&vdd_run_cam>;
};
usb2-2 {
status = "okay";
mode = "host";
vbus-supply = <&vdd_usb3_vbus>;
};
usb3-0 {
nvidia,usb2-companion = <0>;
status = "okay";
};
usb3-1 {
nvidia,usb2-companion = <2>;
status = "okay";
};
};
};
/* WIFI/BT module */
sdhci@700b0000 {
mmc@700b0000 {
status = "disabled";
};
/* external SD/MMC */
sdhci@700b0400 {
mmc@700b0400 {
cd-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>;
power-gpios = <&gpio TEGRA_GPIO(R, 0) GPIO_ACTIVE_HIGH>;
wp-gpios = <&gpio TEGRA_GPIO(Q, 4) GPIO_ACTIVE_HIGH>;
@ -909,39 +1006,12 @@
};
/* EMMC 4.51 */
sdhci@700b0600 {
mmc@700b0600 {
status = "okay";
bus-width = <8>;
non-removable;
};
usb@7d000000 {
status = "okay";
};
usb-phy@7d000000 {
status = "okay";
vbus-supply = <&vdd_usb1_vbus>;
};
usb@7d004000 {
status = "okay";
};
usb-phy@7d004000 {
status = "okay";
vbus-supply = <&vdd_run_cam>;
};
usb@7d008000 {
status = "okay";
};
usb-phy@7d008000 {
status = "okay";
vbus-supply = <&vdd_usb3_vbus>;
};
backlight: backlight {
compatible = "pwm-backlight";
@ -955,17 +1025,10 @@
backlight-boot-off;
};
clocks {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
clk32k_in: clock@0 {
compatible = "fixed-clock";
reg=<0>;
#clock-cells = <0>;
clock-frequency = <32768>;
};
clk32k_in: clock@0 {
compatible = "fixed-clock";
clock-frequency = <32768>;
#clock-cells = <0>;
};
gpio-keys {
@ -991,146 +1054,144 @@
panel: panel {
compatible = "innolux,n116bge";
power-supply = <&vdd_3v3_panel>;
backlight = <&backlight>;
ddc-i2c-bus = <&dpaux>;
};
regulators {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
vdd_mux: regulator@0 {
compatible = "regulator-fixed";
regulator-name = "+VDD_MUX";
regulator-min-microvolt = <19000000>;
regulator-max-microvolt = <19000000>;
regulator-always-on;
regulator-boot-on;
};
vdd_mux: regulator@0 {
compatible = "regulator-fixed";
reg = <0>;
regulator-name = "+VDD_MUX";
regulator-min-microvolt = <19000000>;
regulator-max-microvolt = <19000000>;
regulator-always-on;
regulator-boot-on;
};
vdd_5v0_sys: regulator@1 {
compatible = "regulator-fixed";
regulator-name = "+5V_SYS";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
regulator-boot-on;
vin-supply = <&vdd_mux>;
};
vdd_5v0_sys: regulator@1 {
compatible = "regulator-fixed";
reg = <1>;
regulator-name = "+5V_SYS";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
regulator-boot-on;
vin-supply = <&vdd_mux>;
};
vdd_3v3_sys: regulator@2 {
compatible = "regulator-fixed";
regulator-name = "+3.3V_SYS";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
regulator-boot-on;
vin-supply = <&vdd_mux>;
};
vdd_3v3_sys: regulator@2 {
compatible = "regulator-fixed";
reg = <2>;
regulator-name = "+3.3V_SYS";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
regulator-boot-on;
vin-supply = <&vdd_mux>;
};
vdd_3v3_run: regulator@3 {
compatible = "regulator-fixed";
regulator-name = "+3.3V_RUN";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
regulator-boot-on;
gpio = <&as3722 1 GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&vdd_3v3_sys>;
};
vdd_3v3_run: regulator@3 {
compatible = "regulator-fixed";
reg = <3>;
regulator-name = "+3.3V_RUN";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
regulator-boot-on;
gpio = <&as3722 1 GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&vdd_3v3_sys>;
};
vdd_3v3_hdmi: regulator@4 {
compatible = "regulator-fixed";
regulator-name = "+3.3V_AVDD_HDMI_AP_GATED";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&vdd_3v3_run>;
};
vdd_3v3_hdmi: regulator@4 {
compatible = "regulator-fixed";
reg = <4>;
regulator-name = "+3.3V_AVDD_HDMI_AP_GATED";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&vdd_3v3_run>;
};
vdd_led: regulator@5 {
compatible = "regulator-fixed";
regulator-name = "+VDD_LED";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpio TEGRA_GPIO(P, 2) GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&vdd_mux>;
};
vdd_led: regulator@5 {
compatible = "regulator-fixed";
reg = <5>;
regulator-name = "+VDD_LED";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpio TEGRA_GPIO(P, 2) GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&vdd_mux>;
};
vdd_usb1_vbus: regulator@6 {
compatible = "regulator-fixed";
regulator-name = "+5V_USB_HS";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio TEGRA_GPIO(N, 4) GPIO_ACTIVE_HIGH>;
enable-active-high;
gpio-open-drain;
vin-supply = <&vdd_5v0_sys>;
};
vdd_usb1_vbus: regulator@6 {
compatible = "regulator-fixed";
reg = <6>;
regulator-name = "+5V_USB_HS";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio TEGRA_GPIO(N, 4) GPIO_ACTIVE_HIGH>;
enable-active-high;
gpio-open-drain;
vin-supply = <&vdd_5v0_sys>;
};
vdd_usb3_vbus: regulator@7 {
compatible = "regulator-fixed";
regulator-name = "+5V_USB_SS";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio TEGRA_GPIO(N, 5) GPIO_ACTIVE_HIGH>;
enable-active-high;
gpio-open-drain;
vin-supply = <&vdd_5v0_sys>;
};
vdd_usb3_vbus: regulator@7 {
compatible = "regulator-fixed";
reg = <7>;
regulator-name = "+5V_USB_SS";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio TEGRA_GPIO(N, 5) GPIO_ACTIVE_HIGH>;
enable-active-high;
gpio-open-drain;
vin-supply = <&vdd_5v0_sys>;
};
vdd_3v3_panel: regulator@8 {
compatible = "regulator-fixed";
regulator-name = "+3.3V_PANEL";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&as3722 4 GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&vdd_3v3_sys>;
};
vdd_3v3_panel: regulator@8 {
compatible = "regulator-fixed";
reg = <8>;
regulator-name = "+3.3V_PANEL";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&as3722 4 GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&vdd_3v3_sys>;
};
vdd_hdmi_pll: regulator@9 {
compatible = "regulator-fixed";
regulator-name = "+1.05V_RUN_AVDD_HDMI_PLL_AP_GATE";
regulator-min-microvolt = <1050000>;
regulator-max-microvolt = <1050000>;
gpio = <&gpio TEGRA_GPIO(H, 7) GPIO_ACTIVE_LOW>;
vin-supply = <&vdd_1v05_run>;
};
vdd_hdmi_pll: regulator@9 {
compatible = "regulator-fixed";
reg = <9>;
regulator-name = "+1.05V_RUN_AVDD_HDMI_PLL_AP_GATE";
regulator-min-microvolt = <1050000>;
regulator-max-microvolt = <1050000>;
gpio = <&gpio TEGRA_GPIO(H, 7) GPIO_ACTIVE_LOW>;
vin-supply = <&vdd_1v05_run>;
};
vdd_5v0_hdmi: regulator@10 {
compatible = "regulator-fixed";
regulator-name = "+5V_HDMI_CON";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&vdd_5v0_sys>;
};
vdd_5v0_hdmi: regulator@10 {
compatible = "regulator-fixed";
reg = <10>;
regulator-name = "+5V_HDMI_CON";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&vdd_5v0_sys>;
};
vdd_5v0_ts: regulator@11 {
compatible = "regulator-fixed";
regulator-name = "+5V_VDD_TS";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
regulator-boot-on;
gpio = <&gpio TEGRA_GPIO(K, 1) GPIO_ACTIVE_HIGH>;
enable-active-high;
};
vdd_5v0_ts: regulator@11 {
compatible = "regulator-fixed";
reg = <11>;
regulator-name = "+5V_VDD_TS";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
regulator-boot-on;
gpio = <&gpio TEGRA_GPIO(K, 1) GPIO_ACTIVE_HIGH>;
enable-active-high;
};
vdd_3v3_lp0: regulator@12 {
compatible = "regulator-fixed";
regulator-name = "+3.3V_LP0";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
/*
* TODO: find a way to wire this up with the USB EHCI
* controllers so that it can be enabled on demand.
*/
regulator-always-on;
gpio = <&as3722 2 GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&vdd_3v3_sys>;
};
};

219
arch/arm64/boot/dts/nvidia/tegra132.dtsi
View File

@ -17,9 +17,9 @@
pcie@1003000 {
compatible = "nvidia,tegra124-pcie";
device_type = "pci";
reg = <0x0 0x01003000 0x0 0x00000800 /* PADS registers */
0x0 0x01003800 0x0 0x00000800 /* AFI registers */
0x0 0x02000000 0x0 0x10000000>; /* configuration space */
reg = <0x0 0x01003000 0x0 0x00000800>, /* PADS registers */
<0x0 0x01003800 0x0 0x00000800>, /* AFI registers */
<0x0 0x02000000 0x0 0x10000000>; /* configuration space */
reg-names = "pads", "afi", "cs";
interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>, /* controller interrupt */
<GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>; /* MSI interrupt */
@ -33,11 +33,11 @@
#address-cells = <3>;
#size-cells = <2>;
ranges = <0x82000000 0 0x01000000 0x0 0x01000000 0 0x00001000 /* port 0 configuration space */
0x82000000 0 0x01001000 0x0 0x01001000 0 0x00001000 /* port 1 configuration space */
0x81000000 0 0x0 0x0 0x12000000 0 0x00010000 /* downstream I/O (64 KiB) */
0x82000000 0 0x13000000 0x0 0x13000000 0 0x0d000000 /* non-prefetchable memory (208 MiB) */
0xc2000000 0 0x20000000 0x0 0x20000000 0 0x20000000>; /* prefetchable memory (512 MiB) */
ranges = <0x02000000 0 0x01000000 0x0 0x01000000 0 0x00001000>, /* port 0 configuration space */
<0x02000000 0 0x01001000 0x0 0x01001000 0 0x00001000>, /* port 1 configuration space */
<0x01000000 0 0x0 0x0 0x12000000 0 0x00010000>, /* downstream I/O (64 KiB) */
<0x02000000 0 0x13000000 0x0 0x13000000 0 0x0d000000>, /* non-prefetchable memory (208 MiB) */
<0x42000000 0 0x20000000 0x0 0x20000000 0 0x20000000>; /* prefetchable memory (512 MiB) */
clocks = <&tegra_car TEGRA124_CLK_PCIE>,
<&tegra_car TEGRA124_CLK_AFI>,
@ -50,9 +50,6 @@
reset-names = "pex", "afi", "pcie_x";
status = "disabled";
phys = <&padctl TEGRA_XUSB_PADCTL_PCIE>;
phy-names = "pcie";
pci@1,0 {
device_type = "pci";
assigned-addresses = <0x82000800 0 0x01000000 0 0x1000>;
@ -83,10 +80,12 @@
};
host1x@50000000 {
compatible = "nvidia,tegra124-host1x", "simple-bus";
compatible = "nvidia,tegra132-host1x",
"nvidia,tegra124-host1x";
reg = <0x0 0x50000000 0x0 0x00034000>;
interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>, /* syncpt */
<GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; /* general */
interrupt-names = "syncpt", "host1x";
clocks = <&tegra_car TEGRA124_CLK_HOST1X>;
clock-names = "host1x";
resets = <&tegra_car 28>;
@ -101,9 +100,8 @@
compatible = "nvidia,tegra124-dc";
reg = <0x0 0x54200000 0x0 0x00040000>;
interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA124_CLK_DISP1>,
<&tegra_car TEGRA124_CLK_PLL_P>;
clock-names = "dc", "parent";
clocks = <&tegra_car TEGRA124_CLK_DISP1>;
clock-names = "dc";
resets = <&tegra_car 27>;
reset-names = "dc";
@ -116,9 +114,8 @@
compatible = "nvidia,tegra124-dc";
reg = <0x0 0x54240000 0x0 0x00040000>;
interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA124_CLK_DISP2>,
<&tegra_car TEGRA124_CLK_PLL_P>;
clock-names = "dc", "parent";
clocks = <&tegra_car TEGRA124_CLK_DISP2>;
clock-names = "dc";
resets = <&tegra_car 26>;
reset-names = "dc";
@ -144,10 +141,11 @@
reg = <0x0 0x54540000 0x0 0x00040000>;
interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA124_CLK_SOR0>,
<&tegra_car TEGRA124_CLK_SOR0_OUT>,
<&tegra_car TEGRA124_CLK_PLL_D_OUT0>,
<&tegra_car TEGRA124_CLK_PLL_DP>,
<&tegra_car TEGRA124_CLK_CLK_M>;
clock-names = "sor", "parent", "dp", "safe";
clock-names = "sor", "out", "parent", "dp", "safe";
resets = <&tegra_car 182>;
reset-names = "sor";
status = "disabled";
@ -163,6 +161,11 @@
resets = <&tegra_car 181>;
reset-names = "dpaux";
status = "disabled";
i2c-bus {
#address-cells = <1>;
#size-cells = <0>;
};
};
};
@ -607,7 +610,7 @@
};
emc: external-memory-controller@7001b000 {
compatible = "nvidia,tegra132-emc", "nvidia,tegra124-emc";
compatible = "nvidia,tegra132-emc";
reg = <0x0 0x7001b000 0x0 0x1000>;
clocks = <&tegra_car TEGRA124_CLK_EMC>;
clock-names = "emc";
@ -629,8 +632,6 @@
<&tegra_car 123>,
<&tegra_car 129>;
reset-names = "sata", "sata-oob", "sata-cold";
phys = <&padctl TEGRA_XUSB_PADCTL_SATA>;
phy-names = "sata-phy";
status = "disabled";
};
@ -650,6 +651,41 @@
status = "disabled";
};
usb@70090000 {
compatible = "nvidia,tegra132-xusb", "nvidia,tegra124-xusb";
reg = <0x0 0x70090000 0x0 0x8000>,
<0x0 0x70098000 0x0 0x1000>,
<0x0 0x70099000 0x0 0x1000>;
reg-names = "hcd", "fpci", "ipfs";
interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA124_CLK_XUSB_HOST>,
<&tegra_car TEGRA124_CLK_XUSB_HOST_SRC>,
<&tegra_car TEGRA124_CLK_XUSB_FALCON_SRC>,
<&tegra_car TEGRA124_CLK_XUSB_SS>,
<&tegra_car TEGRA124_CLK_XUSB_SS_SRC>,
<&tegra_car TEGRA124_CLK_XUSB_SS_DIV2>,
<&tegra_car TEGRA124_CLK_XUSB_HS_SRC>,
<&tegra_car TEGRA124_CLK_XUSB_FS_SRC>,
<&tegra_car TEGRA124_CLK_PLL_U_480M>,
<&tegra_car TEGRA124_CLK_CLK_M>,
<&tegra_car TEGRA124_CLK_PLL_E>;
clock-names = "xusb_host", "xusb_host_src",
"xusb_falcon_src", "xusb_ss",
"xusb_ss_src", "xusb_ss_div2",
"xusb_hs_src", "xusb_fs_src",
"pll_u_480m", "clk_m", "pll_e";
resets = <&tegra_car 89>, <&tegra_car 156>,
<&tegra_car 143>;
reset-names = "xusb_host", "xusb_ss", "xusb_src";
nvidia,xusb-padctl = <&padctl>;
status = "disabled";
};
padctl: padctl@7009f000 {
compatible = "nvidia,tegra132-xusb-padctl",
"nvidia,tegra124-xusb-padctl";
@ -657,14 +693,116 @@
resets = <&tegra_car 142>;
reset-names = "padctl";
#phy-cells = <1>;
pads {
usb2 {
status = "disabled";
phys {
pcie-0 {
lanes {
usb2-0 {
status = "disabled";
#phy-cells = <0>;
};
usb2-1 {
status = "disabled";
#phy-cells = <0>;
};
usb2-2 {
status = "disabled";
#phy-cells = <0>;
};
};
};
ulpi {
status = "disabled";
lanes {
ulpi-0 {
status = "disabled";
#phy-cells = <0>;
};
};
};
hsic {
status = "disabled";
lanes {
hsic-0 {
status = "disabled";
#phy-cells = <0>;
};
hsic-1 {
status = "disabled";
#phy-cells = <0>;
};
};
};
pcie {
status = "disabled";
lanes {
pcie-0 {
status = "disabled";
#phy-cells = <0>;
};
pcie-1 {
status = "disabled";
#phy-cells = <0>;
};
pcie-2 {
status = "disabled";
#phy-cells = <0>;
};
pcie-3 {
status = "disabled";
#phy-cells = <0>;
};
pcie-4 {
status = "disabled";
#phy-cells = <0>;
};
};
};
sata {
status = "disabled";
lanes {
sata-0 {
status = "disabled";
#phy-cells = <0>;
};
};
};
};
ports {
usb2-0 {
status = "disabled";
};
sata-0 {
usb2-1 {
status = "disabled";
};
usb2-2 {
status = "disabled";
};
hsic-0 {
status = "disabled";
};
hsic-1 {
status = "disabled";
};
@ -675,22 +813,10 @@
usb3-1 {
status = "disabled";
};
utmi-0 {
status = "disabled";
};
utmi-1 {
status = "disabled";
};
utmi-2 {
status = "disabled";
};
};
};
sdhci@700b0000 {
mmc@700b0000 {
compatible = "nvidia,tegra124-sdhci";
reg = <0x0 0x700b0000 0x0 0x200>;
interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
@ -701,7 +827,7 @@
status = "disabled";
};
sdhci@700b0200 {
mmc@700b0200 {
compatible = "nvidia,tegra124-sdhci";
reg = <0x0 0x700b0200 0x0 0x200>;
interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
@ -712,7 +838,7 @@
status = "disabled";
};
sdhci@700b0400 {
mmc@700b0400 {
compatible = "nvidia,tegra124-sdhci";
reg = <0x0 0x700b0400 0x0 0x200>;
interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
@ -723,7 +849,7 @@
status = "disabled";
};
sdhci@700b0600 {
mmc@700b0600 {
compatible = "nvidia,tegra124-sdhci";
reg = <0x0 0x700b0600 0x0 0x200>;
interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
@ -736,12 +862,12 @@
soctherm: thermal-sensor@700e2000 {
compatible = "nvidia,tegra132-soctherm";
reg = <0x0 0x700e2000 0x0 0x600 /* 0: SOC_THERM reg_base */
0x0 0x70040000 0x0 0x200>; /* 2: CCROC reg_base */
reg = <0x0 0x700e2000 0x0 0x600>, /* 0: SOC_THERM reg_base */
<0x0 0x70040000 0x0 0x200>; /* 2: CCROC reg_base */
reg-names = "soctherm-reg", "ccroc-reg";
interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA124_CLK_TSENSOR>,
<&tegra_car TEGRA124_CLK_SOC_THERM>;
<&tegra_car TEGRA124_CLK_SOC_THERM>;
clock-names = "tsensor", "soctherm";
resets = <&tegra_car 78>;
reset-names = "soctherm";
@ -992,6 +1118,7 @@
clock-names = "reg", "pll_u", "utmi-pads";
resets = <&tegra_car 22>, <&tegra_car 22>;
reset-names = "usb", "utmi-pads";
#phy-cells = <0>;
nvidia,hssync-start-delay = <0>;
nvidia,idle-wait-delay = <17>;
nvidia,elastic-limit = <16>;
@ -1030,6 +1157,7 @@
clock-names = "reg", "pll_u", "utmi-pads";
resets = <&tegra_car 58>, <&tegra_car 22>;
reset-names = "usb", "utmi-pads";
#phy-cells = <0>;
nvidia,hssync-start-delay = <0>;
nvidia,idle-wait-delay = <17>;
nvidia,elastic-limit = <16>;
@ -1067,6 +1195,7 @@
clock-names = "reg", "pll_u", "utmi-pads";
resets = <&tegra_car 59>, <&tegra_car 22>;
reset-names = "usb", "utmi-pads";
#phy-cells = <0>;
nvidia,hssync-start-delay = <0>;
nvidia,idle-wait-delay = <17>;
nvidia,elastic-limit = <16>;

111
arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts
View File

@ -103,7 +103,7 @@
};
/* SDMMC1 (SD/MMC) */
sdhci@3400000 {
mmc@3400000 {
status = "okay";
vmmc-supply = <&vdd_sd>;
@ -119,10 +119,6 @@
avdd-pll-erefeut-supply = <&vdd_1v8_pll>;
avdd-usb-supply = <&vdd_3v3_sys>;
dvdd-pex-supply = <&vdd_pex>;
dvdd-pex-pll-supply = <&vdd_pex>;
hvdd-pex-supply = <&vdd_1v8>;
hvdd-pex-pll-supply = <&vdd_1v8>;
vclamp-usb-supply = <&vdd_1v8>;
vddio-hsic-supply = <&gnd>;
@ -175,19 +171,18 @@
status = "okay";
mode = "otg";
vbus-supply = <&vdd_usb0>;
usb-role-switch;
connector {
compatible = "usb-b-connector",
"gpio-usb-b-connector";
compatible = "gpio-usb-b-connector",
"usb-b-connector";
label = "micro-USB";
type = "micro";
vbus-gpio = <&gpio
TEGRA186_MAIN_GPIO(X, 7)
GPIO_ACTIVE_LOW>;
id-gpio = <&pmic 0 GPIO_ACTIVE_HIGH>;
vbus-gpios = <&gpio
TEGRA186_MAIN_GPIO(X, 7)
GPIO_ACTIVE_LOW>;
id-gpios = <&pmic 0 GPIO_ACTIVE_HIGH>;
};
};
usb2-1 {
@ -199,6 +194,7 @@
usb3-0 {
nvidia,usb2-companion = <1>;
vbus-supply = <&vdd_usb1>;
status = "okay";
};
};
@ -227,8 +223,8 @@
reg = <0x57>;
vcc-supply = <&vdd_1v8>;
address-bits = <8>;
page-size = <8>;
address-width = <8>;
pagesize = <8>;
size = <256>;
read-only;
};
@ -286,8 +282,8 @@
sor@15580000 {
status = "okay";
avdd-io-supply = <&vdd_hdmi_1v05>;
vdd-pll-supply = <&vdd_1v8_ap>;
avdd-io-hdmi-dp-supply = <&vdd_hdmi_1v05>;
vdd-hdmi-dp-pll-supply = <&vdd_1v8_ap>;
hdmi-supply = <&vdd_hdmi>;
nvidia,ddc-i2c-bus = <&ddc>;
@ -333,62 +329,51 @@
};
};
regulators {
vdd_sd: regulator@100 {
compatible = "regulator-fixed";
reg = <100>;
vdd_sd: regulator@100 {
compatible = "regulator-fixed";
regulator-name = "SD_CARD_SW_PWR";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "SD_CARD_SW_PWR";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpio TEGRA186_MAIN_GPIO(P, 6) GPIO_ACTIVE_HIGH>;
enable-active-high;
gpio = <&gpio TEGRA186_MAIN_GPIO(P, 6)
GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&vdd_3v3_sys>;
};
vin-supply = <&vdd_3v3_sys>;
};
vdd_hdmi: regulator@101 {
compatible = "regulator-fixed";
regulator-name = "VDD_HDMI_5V0";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vdd_hdmi: regulator@101 {
compatible = "regulator-fixed";
reg = <101>;
gpio = <&exp1 14 GPIO_ACTIVE_HIGH>;
enable-active-high;
regulator-name = "VDD_HDMI_5V0";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&vdd_5v0_sys>;
};
gpio = <&exp1 14 GPIO_ACTIVE_HIGH>;
enable-active-high;
vdd_usb0: regulator@102 {
compatible = "regulator-fixed";
regulator-name = "VDD_USB0";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&vdd_5v0_sys>;
};
gpio = <&gpio TEGRA186_MAIN_GPIO(L, 4) GPIO_ACTIVE_HIGH>;
enable-active-high;
vdd_usb0: regulator@102 {
compatible = "regulator-fixed";
reg = <102>;
vin-supply = <&vdd_5v0_sys>;
};
regulator-name = "VDD_USB0";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vdd_usb1: regulator@103 {
compatible = "regulator-fixed";
regulator-name = "VDD_USB1";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio TEGRA186_MAIN_GPIO(L, 4) GPIO_ACTIVE_HIGH>;
enable-active-high;
gpio = <&gpio TEGRA186_MAIN_GPIO(L, 5) GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&vdd_5v0_sys>;
};
vdd_usb1: regulator@103 {
compatible = "regulator-fixed";
reg = <103>;
regulator-name = "VDD_USB1";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio TEGRA186_MAIN_GPIO(L, 5) GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&vdd_5v0_sys>;
};
vin-supply = <&vdd_5v0_sys>;
};
};

80
arch/arm64/boot/dts/nvidia/tegra186-p3310.dtsi
View File

@ -9,9 +9,6 @@
aliases {
ethernet0 = "/ethernet@2490000";
sdhci0 = "/sdhci@3460000";
sdhci1 = "/sdhci@3400000";
serial0 = &uarta;
i2c0 = "/bpmp/i2c";
i2c1 = "/i2c@3160000";
i2c2 = "/i2c@c240000";
@ -20,6 +17,9 @@
i2c5 = "/i2c@31c0000";
i2c6 = "/i2c@c250000";
i2c7 = "/i2c@31e0000";
mmc0 = "/mmc@3460000";
mmc1 = "/mmc@3400000";
serial0 = &uarta;
};
chosen {
@ -27,7 +27,7 @@
stdout-path = "serial0:115200n8";
};
memory {
memory@80000000 {
device_type = "memory";
reg = <0x0 0x80000000 0x2 0x00000000>;
};
@ -50,6 +50,8 @@
interrupt-parent = <&gpio>;
interrupts = <TEGRA186_MAIN_GPIO(M, 5)
IRQ_TYPE_LEVEL_LOW>;
#phy-cells = <0>;
};
};
};
@ -133,7 +135,7 @@
};
/* SDMMC1 (SD/MMC) */
sdhci@3400000 {
mmc@3400000 {
cd-gpios = <&gpio TEGRA186_MAIN_GPIO(P, 5) GPIO_ACTIVE_LOW>;
wp-gpios = <&gpio TEGRA186_MAIN_GPIO(P, 4) GPIO_ACTIVE_HIGH>;
@ -141,12 +143,12 @@
};
/* SDMMC3 (SDIO) */
sdhci@3440000 {
mmc@3440000 {
status = "okay";
};
/* SDMMC4 (eMMC) */
sdhci@3460000 {
mmc@3460000 {
status = "okay";
bus-width = <8>;
non-removable;
@ -172,8 +174,8 @@
reg = <0x50>;
vcc-supply = <&vdd_1v8>;
address-bits = <8>;
page-size = <8>;
address-width = <8>;
pagesize = <8>;
size = <256>;
read-only;
};
@ -390,45 +392,33 @@
method = "smc";
};
regulators {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
gnd: regulator@0 {
compatible = "regulator-fixed";
regulator-name = "GND";
regulator-min-microvolt = <0>;
regulator-max-microvolt = <0>;
regulator-always-on;
regulator-boot-on;
};
gnd: regulator@0 {
compatible = "regulator-fixed";
reg = <0>;
vdd_5v0_sys: regulator@1 {
compatible = "regulator-fixed";
regulator-name = "VDD_5V0_SYS";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
regulator-boot-on;
};
regulator-name = "GND";
regulator-min-microvolt = <0>;
regulator-max-microvolt = <0>;
regulator-always-on;
regulator-boot-on;
};
vdd_1v8_ap: regulator@2 {
compatible = "regulator-fixed";
regulator-name = "VDD_1V8_AP";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
vdd_5v0_sys: regulator@1 {
compatible = "regulator-fixed";
reg = <1>;
gpio = <&pmic 1 GPIO_ACTIVE_HIGH>;
enable-active-high;
regulator-name = "VDD_5V0_SYS";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
regulator-boot-on;
};
vdd_1v8_ap: regulator@2 {
compatible = "regulator-fixed";
reg = <2>;
regulator-name = "VDD_1V8_AP";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
gpio = <&pmic 1 GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&vdd_1v8>;
};
vin-supply = <&vdd_1v8>;
};
};

124
arch/arm64/boot/dts/nvidia/tegra186.dtsi
View File

@ -60,6 +60,9 @@
clock-names = "master_bus", "slave_bus", "rx", "tx", "ptp_ref";
resets = <&bpmp TEGRA186_RESET_EQOS>;
reset-names = "eqos";
interconnects = <&mc TEGRA186_MEMORY_CLIENT_EQOSR &emc>,
<&mc TEGRA186_MEMORY_CLIENT_EQOSW &emc>;
interconnect-names = "dma-mem", "write";
iommus = <&smmu TEGRA186_SID_EQOS>;
status = "disabled";
@ -139,12 +142,13 @@
};
};
memory-controller@2c00000 {
mc: memory-controller@2c00000 {
compatible = "nvidia,tegra186-mc";
reg = <0x0 0x02c00000 0x0 0xb0000>;
interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
#interconnect-cells = <1>;
#address-cells = <2>;
#size-cells = <2>;
@ -163,6 +167,8 @@
clocks = <&bpmp TEGRA186_CLK_EMC>;
clock-names = "emc";
#interconnect-cells = <0>;
nvidia,bpmp = <&bpmp>;
};
};
@ -327,7 +333,7 @@
status = "disabled";
};
sdmmc1: sdhci@3400000 {
sdmmc1: mmc@3400000 {
compatible = "nvidia,tegra186-sdhci";
reg = <0x0 0x03400000 0x0 0x10000>;
interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
@ -335,6 +341,9 @@
clock-names = "sdhci";
resets = <&bpmp TEGRA186_RESET_SDMMC1>;
reset-names = "sdhci";
interconnects = <&mc TEGRA186_MEMORY_CLIENT_SDMMCRA &emc>,
<&mc TEGRA186_MEMORY_CLIENT_SDMMCWA &emc>;
interconnect-names = "dma-mem", "write";
iommus = <&smmu TEGRA186_SID_SDMMC1>;
pinctrl-names = "sdmmc-3v3", "sdmmc-1v8";
pinctrl-0 = <&sdmmc1_3v3>;
@ -353,7 +362,7 @@
status = "disabled";
};
sdmmc2: sdhci@3420000 {
sdmmc2: mmc@3420000 {
compatible = "nvidia,tegra186-sdhci";
reg = <0x0 0x03420000 0x0 0x10000>;
interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
@ -361,6 +370,9 @@
clock-names = "sdhci";
resets = <&bpmp TEGRA186_RESET_SDMMC2>;
reset-names = "sdhci";
interconnects = <&mc TEGRA186_MEMORY_CLIENT_SDMMCRAA &emc>,
<&mc TEGRA186_MEMORY_CLIENT_SDMMCWAA &emc>;
interconnect-names = "dma-mem", "write";
iommus = <&smmu TEGRA186_SID_SDMMC2>;
pinctrl-names = "sdmmc-3v3", "sdmmc-1v8";
pinctrl-0 = <&sdmmc2_3v3>;
@ -374,7 +386,7 @@
status = "disabled";
};
sdmmc3: sdhci@3440000 {
sdmmc3: mmc@3440000 {
compatible = "nvidia,tegra186-sdhci";
reg = <0x0 0x03440000 0x0 0x10000>;
interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
@ -382,6 +394,9 @@
clock-names = "sdhci";
resets = <&bpmp TEGRA186_RESET_SDMMC3>;
reset-names = "sdhci";
interconnects = <&mc TEGRA186_MEMORY_CLIENT_SDMMCR &emc>,
<&mc TEGRA186_MEMORY_CLIENT_SDMMCW &emc>;
interconnect-names = "dma-mem", "write";
iommus = <&smmu TEGRA186_SID_SDMMC3>;
pinctrl-names = "sdmmc-3v3", "sdmmc-1v8";
pinctrl-0 = <&sdmmc3_3v3>;
@ -397,7 +412,7 @@
status = "disabled";
};
sdmmc4: sdhci@3460000 {
sdmmc4: mmc@3460000 {
compatible = "nvidia,tegra186-sdhci";
reg = <0x0 0x03460000 0x0 0x10000>;
interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
@ -408,6 +423,9 @@
assigned-clock-parents = <&bpmp TEGRA186_CLK_PLLC4_VCO>;
resets = <&bpmp TEGRA186_RESET_SDMMC4>;
reset-names = "sdhci";
interconnects = <&mc TEGRA186_MEMORY_CLIENT_SDMMCRAB &emc>,
<&mc TEGRA186_MEMORY_CLIENT_SDMMCWAB &emc>;
interconnect-names = "dma-mem", "write";
iommus = <&smmu TEGRA186_SID_SDMMC4>;
nvidia,pad-autocal-pull-up-offset-hs400 = <0x05>;
nvidia,pad-autocal-pull-down-offset-hs400 = <0x05>;
@ -436,6 +454,9 @@
<&bpmp TEGRA186_RESET_HDA2CODEC_2X>;
reset-names = "hda", "hda2hdmi", "hda2codec_2x";
power-domains = <&bpmp TEGRA186_POWER_DOMAIN_DISP>;
interconnects = <&mc TEGRA186_MEMORY_CLIENT_HDAR &emc>,
<&mc TEGRA186_MEMORY_CLIENT_HDAW &emc>;
interconnect-names = "dma-mem", "write";
iommus = <&smmu TEGRA186_SID_HDA>;
status = "disabled";
};
@ -547,8 +568,7 @@
<0x0 0x03538000 0x0 0x1000>;
reg-names = "hcd", "fpci";
interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
<GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&bpmp TEGRA186_CLK_XUSB_HOST>,
<&bpmp TEGRA186_CLK_XUSB_FALCON>,
<&bpmp TEGRA186_CLK_XUSB_SS>,
@ -564,6 +584,9 @@
power-domains = <&bpmp TEGRA186_POWER_DOMAIN_XUSBC>,
<&bpmp TEGRA186_POWER_DOMAIN_XUSBA>;
power-domain-names = "xusb_host", "xusb_ss";
interconnects = <&mc TEGRA186_MEMORY_CLIENT_XUSB_HOSTR &emc>,
<&mc TEGRA186_MEMORY_CLIENT_XUSB_HOSTW &emc>;
interconnect-names = "dma-mem", "write";
iommus = <&smmu TEGRA186_SID_XUSB_HOST>;
#address-cells = <1>;
#size-cells = <0>;
@ -752,9 +775,9 @@
compatible = "nvidia,tegra186-pcie";
power-domains = <&bpmp TEGRA186_POWER_DOMAIN_PCX>;
device_type = "pci";
reg = <0x0 0x10003000 0x0 0x00000800 /* PADS registers */
0x0 0x10003800 0x0 0x00000800 /* AFI registers */
0x0 0x40000000 0x0 0x10000000>; /* configuration space */
reg = <0x0 0x10003000 0x0 0x00000800>, /* PADS registers */
<0x0 0x10003800 0x0 0x00000800>, /* AFI registers */
<0x0 0x40000000 0x0 0x10000000>; /* configuration space */
reg-names = "pads", "afi", "cs";
interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>, /* controller interrupt */
@ -769,22 +792,26 @@
#address-cells = <3>;
#size-cells = <2>;
ranges = <0x82000000 0 0x10000000 0x0 0x10000000 0 0x00001000 /* port 0 configuration space */
0x82000000 0 0x10001000 0x0 0x10001000 0 0x00001000 /* port 1 configuration space */
0x82000000 0 0x10004000 0x0 0x10004000 0 0x00001000 /* port 2 configuration space */
0x81000000 0 0x0 0x0 0x50000000 0 0x00010000 /* downstream I/O (64 KiB) */
0x82000000 0 0x50100000 0x0 0x50100000 0 0x07F00000 /* non-prefetchable memory (127 MiB) */
0xc2000000 0 0x58000000 0x0 0x58000000 0 0x28000000>; /* prefetchable memory (640 MiB) */
ranges = <0x02000000 0 0x10000000 0x0 0x10000000 0 0x00001000>, /* port 0 configuration space */
<0x02000000 0 0x10001000 0x0 0x10001000 0 0x00001000>,/* port 1 configuration space */
<0x02000000 0 0x10004000 0x0 0x10004000 0 0x00001000>, /* port 2 configuration space */
<0x01000000 0 0x0 0x0 0x50000000 0 0x00010000>, /* downstream I/O (64 KiB) */
<0x02000000 0 0x50100000 0x0 0x50100000 0 0x07f00000>, /* non-prefetchable memory (127 MiB) */
<0x42000000 0 0x58000000 0x0 0x58000000 0 0x28000000>; /* prefetchable memory (640 MiB) */
clocks = <&bpmp TEGRA186_CLK_AFI>,
<&bpmp TEGRA186_CLK_PCIE>,
clocks = <&bpmp TEGRA186_CLK_PCIE>,
<&bpmp TEGRA186_CLK_AFI>,
<&bpmp TEGRA186_CLK_PLLE>;
clock-names = "afi", "pex", "pll_e";
clock-names = "pex", "afi", "pll_e";
resets = <&bpmp TEGRA186_RESET_AFI>,
<&bpmp TEGRA186_RESET_PCIE>,
resets = <&bpmp TEGRA186_RESET_PCIE>,
<&bpmp TEGRA186_RESET_AFI>,
<&bpmp TEGRA186_RESET_PCIEXCLK>;
reset-names = "afi", "pex", "pcie_x";
reset-names = "pex", "afi", "pcie_x";
interconnects = <&mc TEGRA186_MEMORY_CLIENT_AFIR &emc>,
<&mc TEGRA186_MEMORY_CLIENT_AFIW &emc>;
interconnect-names = "dma-mem", "write";
iommus = <&smmu TEGRA186_SID_AFI>;
iommu-map = <0x0 &smmu TEGRA186_SID_AFI 0x1000>;
@ -906,12 +933,13 @@
};
host1x@13e00000 {
compatible = "nvidia,tegra186-host1x", "simple-bus";
compatible = "nvidia,tegra186-host1x";
reg = <0x0 0x13e00000 0x0 0x10000>,
<0x0 0x13e10000 0x0 0x10000>;
reg-names = "hypervisor", "vm";
interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "syncpt", "host1x";
clocks = <&bpmp TEGRA186_CLK_HOST1X>;
clock-names = "host1x";
resets = <&bpmp TEGRA186_RESET_HOST1X>;
@ -921,6 +949,10 @@
#size-cells = <1>;
ranges = <0x15000000 0x0 0x15000000 0x01000000>;
interconnects = <&mc TEGRA186_MEMORY_CLIENT_HOST1XDMAR &emc>;
interconnect-names = "dma-mem";
iommus = <&smmu TEGRA186_SID_HOST1X>;
dpaux1: dpaux@15040000 {
@ -958,7 +990,7 @@
};
display-hub@15200000 {
compatible = "nvidia,tegra186-display", "simple-bus";
compatible = "nvidia,tegra186-display";
reg = <0x15200000 0x00040000>;
resets = <&bpmp TEGRA186_RESET_NVDISPLAY0_MISC>,
<&bpmp TEGRA186_RESET_NVDISPLAY0_WGRP0>,
@ -992,6 +1024,9 @@
reset-names = "dc";
power-domains = <&bpmp TEGRA186_POWER_DOMAIN_DISP>;
interconnects = <&mc TEGRA186_MEMORY_CLIENT_NVDISPLAYR &emc>,
<&mc TEGRA186_MEMORY_CLIENT_NVDISPLAYR1 &emc>;
interconnect-names = "dma-mem", "read-1";
iommus = <&smmu TEGRA186_SID_NVDISPLAY>;
nvidia,outputs = <&dsia &dsib &sor0 &sor1>;
@ -1008,6 +1043,9 @@
reset-names = "dc";
power-domains = <&bpmp TEGRA186_POWER_DOMAIN_DISPB>;
interconnects = <&mc TEGRA186_MEMORY_CLIENT_NVDISPLAYR &emc>,
<&mc TEGRA186_MEMORY_CLIENT_NVDISPLAYR1 &emc>;
interconnect-names = "dma-mem", "read-1";
iommus = <&smmu TEGRA186_SID_NVDISPLAY>;
nvidia,outputs = <&dsia &dsib &sor0 &sor1>;
@ -1024,6 +1062,9 @@
reset-names = "dc";
power-domains = <&bpmp TEGRA186_POWER_DOMAIN_DISPC>;
interconnects = <&mc TEGRA186_MEMORY_CLIENT_NVDISPLAYR &emc>,
<&mc TEGRA186_MEMORY_CLIENT_NVDISPLAYR1 &emc>;
interconnect-names = "dma-mem", "read-1";
iommus = <&smmu TEGRA186_SID_NVDISPLAY>;
nvidia,outputs = <&sor0 &sor1>;
@ -1056,6 +1097,9 @@
reset-names = "vic";
power-domains = <&bpmp TEGRA186_POWER_DOMAIN_VIC>;
interconnects = <&mc TEGRA186_MEMORY_CLIENT_VICSRD &emc>,
<&mc TEGRA186_MEMORY_CLIENT_VICSWR &emc>;
interconnect-names = "dma-mem", "write";
iommus = <&smmu TEGRA186_SID_VIC>;
};
@ -1199,8 +1243,8 @@
compatible = "nvidia,gp10b";
reg = <0x0 0x17000000 0x0 0x1000000>,
<0x0 0x18000000 0x0 0x1000000>;
interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "stall", "nonstall";
clocks = <&bpmp TEGRA186_CLK_GPCCLK>,
@ -1211,25 +1255,28 @@
status = "disabled";
power-domains = <&bpmp TEGRA186_POWER_DOMAIN_GPU>;
interconnects = <&mc TEGRA186_MEMORY_CLIENT_GPUSRD &emc>,
<&mc TEGRA186_MEMORY_CLIENT_GPUSWR &emc>,
<&mc TEGRA186_MEMORY_CLIENT_GPUSRD2 &emc>,
<&mc TEGRA186_MEMORY_CLIENT_GPUSWR2 &emc>;
interconnect-names = "dma-mem", "write-0", "read-1", "write-1";
};
sysram@30000000 {
sram@30000000 {
compatible = "nvidia,tegra186-sysram", "mmio-sram";
reg = <0x0 0x30000000 0x0 0x50000>;
#address-cells = <2>;
#size-cells = <2>;
ranges = <0 0x0 0x0 0x30000000 0x0 0x50000>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0x0 0x30000000 0x50000>;
cpu_bpmp_tx: shmem@4e000 {
compatible = "nvidia,tegra186-bpmp-shmem";
reg = <0x0 0x4e000 0x0 0x1000>;
cpu_bpmp_tx: sram@4e000 {
reg = <0x4e000 0x1000>;
label = "cpu-bpmp-tx";
pool;
};
cpu_bpmp_rx: shmem@4f000 {
compatible = "nvidia,tegra186-bpmp-shmem";
reg = <0x0 0x4f000 0x0 0x1000>;
cpu_bpmp_rx: sram@4f000 {
reg = <0x4f000 0x1000>;
label = "cpu-bpmp-rx";
pool;
};
@ -1237,6 +1284,11 @@
bpmp: bpmp {
compatible = "nvidia,tegra186-bpmp";
interconnects = <&mc TEGRA186_MEMORY_CLIENT_BPMPR &emc>,
<&mc TEGRA186_MEMORY_CLIENT_BPMPW &emc>,
<&mc TEGRA186_MEMORY_CLIENT_BPMPDMAR &emc>,
<&mc TEGRA186_MEMORY_CLIENT_BPMPDMAW &emc>;
interconnect-names = "read", "write", "dma-mem", "dma-write";
iommus = <&smmu TEGRA186_SID_BPMP>;
mboxes = <&hsp_top0 TEGRA_HSP_MBOX_TYPE_DB
TEGRA_HSP_DB_MASTER_BPMP>;

125
arch/arm64/boot/dts/nvidia/tegra194-p2888.dtsi
View File

@ -8,18 +8,18 @@
compatible = "nvidia,p2888", "nvidia,tegra194";
aliases {
ethernet0 = "/cbb@0/ethernet@2490000";
sdhci0 = "/cbb@0/sdhci@3460000";
sdhci1 = "/cbb@0/sdhci@3400000";
serial0 = &tcu;
ethernet0 = "/bus@0/ethernet@2490000";
i2c0 = "/bpmp/i2c";
i2c1 = "/cbb@0/i2c@3160000";
i2c2 = "/cbb@0/i2c@c240000";
i2c3 = "/cbb@0/i2c@3180000";
i2c4 = "/cbb@0/i2c@3190000";
i2c5 = "/cbb@0/i2c@31c0000";
i2c6 = "/cbb@0/i2c@c250000";
i2c7 = "/cbb@0/i2c@31e0000";
i2c1 = "/bus@0/i2c@3160000";
i2c2 = "/bus@0/i2c@c240000";
i2c3 = "/bus@0/i2c@3180000";
i2c4 = "/bus@0/i2c@3190000";
i2c5 = "/bus@0/i2c@31c0000";
i2c6 = "/bus@0/i2c@c250000";
i2c7 = "/bus@0/i2c@31e0000";
mmc0 = "/bus@0/mmc@3460000";
mmc1 = "/bus@0/mmc@3400000";
serial0 = &tcu;
};
chosen {
@ -27,7 +27,7 @@
stdout-path = "serial0:115200n8";
};
cbb@0 {
bus@0 {
ethernet@2490000 {
status = "okay";
@ -44,6 +44,7 @@
reg = <0x0>;
interrupt-parent = <&gpio>;
interrupts = <TEGRA194_MAIN_GPIO(G, 4) IRQ_TYPE_LEVEL_LOW>;
#phy-cells = <0>;
};
};
};
@ -57,12 +58,12 @@
};
/* SDMMC1 (SD/MMC) */
sdhci@3400000 {
mmc@3400000 {
cd-gpios = <&gpio TEGRA194_MAIN_GPIO(A, 0) GPIO_ACTIVE_LOW>;
};
/* SDMMC4 (eMMC) */
sdhci@3460000 {
mmc@3460000 {
status = "okay";
bus-width = <8>;
non-removable;
@ -292,65 +293,49 @@
};
};
regulators {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
vdd_5v0_sys: regulator@0 {
compatible = "regulator-fixed";
regulator-name = "VIN_SYS_5V0";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
regulator-boot-on;
};
vdd_5v0_sys: regulator@0 {
compatible = "regulator-fixed";
reg = <0>;
vdd_hdmi: regulator@1 {
compatible = "regulator-fixed";
regulator-name = "VDD_5V0_HDMI_CON";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio TEGRA194_MAIN_GPIO(A, 3) GPIO_ACTIVE_HIGH>;
enable-active-high;
};
regulator-name = "VIN_SYS_5V0";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
regulator-boot-on;
};
vdd_3v3_pcie: regulator@2 {
compatible = "regulator-fixed";
regulator-name = "PEX_3V3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpio TEGRA194_MAIN_GPIO(Z, 2) GPIO_ACTIVE_HIGH>;
regulator-boot-on;
enable-active-high;
};
vdd_hdmi: regulator@1 {
compatible = "regulator-fixed";
reg = <1>;
vdd_12v_pcie: regulator@3 {
compatible = "regulator-fixed";
regulator-name = "VDD_12V";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
gpio = <&gpio TEGRA194_MAIN_GPIO(A, 1) GPIO_ACTIVE_HIGH>;
regulator-boot-on;
};
regulator-name = "VDD_5V0_HDMI_CON";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio TEGRA194_MAIN_GPIO(A, 3) GPIO_ACTIVE_HIGH>;
enable-active-high;
};
vdd_3v3_pcie: regulator@2 {
compatible = "regulator-fixed";
reg = <2>;
regulator-name = "PEX_3V3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpio TEGRA194_MAIN_GPIO(Z, 2) GPIO_ACTIVE_HIGH>;
regulator-boot-on;
enable-active-high;
};
vdd_12v_pcie: regulator@3 {
compatible = "regulator-fixed";
reg = <3>;
regulator-name = "VDD_12V";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
gpio = <&gpio TEGRA194_MAIN_GPIO(A, 1) GPIO_ACTIVE_HIGH>;
regulator-boot-on;
};
vdd_5v_sata: regulator@4 {
compatible = "regulator-fixed";
reg = <4>;
regulator-name = "VDD_5V_SATA";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio TEGRA194_MAIN_GPIO(Z, 1) GPIO_ACTIVE_HIGH>;
enable-active-high;
};
vdd_5v_sata: regulator@4 {
compatible = "regulator-fixed";
regulator-name = "VDD_5V_SATA";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio TEGRA194_MAIN_GPIO(Z, 1) GPIO_ACTIVE_HIGH>;
enable-active-high;
};
};

16
arch/arm64/boot/dts/nvidia/tegra194-p2972-0000.dts
View File

@ -10,7 +10,7 @@
model = "NVIDIA Jetson AGX Xavier Developer Kit";
compatible = "nvidia,p2972-0000", "nvidia,tegra194";
cbb@0 {
bus@0 {
aconnect@2900000 {
status = "okay";
@ -28,7 +28,7 @@
};
/* SDMMC1 (SD/MMC) */
sdhci@3400000 {
mmc@3400000 {
status = "okay";
};
@ -93,10 +93,10 @@
usb@3610000 {
status = "okay";
phys = <&{/cbb@0/padctl@3520000/pads/usb2/lanes/usb2-1}>,
<&{/cbb@0/padctl@3520000/pads/usb2/lanes/usb2-3}>,
<&{/cbb@0/padctl@3520000/pads/usb3/lanes/usb3-0}>,
<&{/cbb@0/padctl@3520000/pads/usb3/lanes/usb3-3}>;
phys = <&{/bus@0/padctl@3520000/pads/usb2/lanes/usb2-1}>,
<&{/bus@0/padctl@3520000/pads/usb2/lanes/usb2-3}>,
<&{/bus@0/padctl@3520000/pads/usb3/lanes/usb3-0}>,
<&{/bus@0/padctl@3520000/pads/usb3/lanes/usb3-3}>;
phy-names = "usb2-1", "usb2-3", "usb3-0", "usb3-3";
};
@ -145,8 +145,8 @@
sor@15b80000 {
status = "okay";
avdd-io-supply = <&vdd_1v0>;
vdd-pll-supply = <&vdd_1v8hs>;
avdd-io-hdmi-dp-supply = <&vdd_1v0>;
vdd-hdmi-dp-pll-supply = <&vdd_1v8hs>;
hdmi-supply = <&vdd_hdmi>;
nvidia,ddc-i2c-bus = <&ddc>;

331
arch/arm64/boot/dts/nvidia/tegra194-p3509-0000+p3668-0000.dts Normal file
View File

@ -0,0 +1,331 @@
// SPDX-License-Identifier: GPL-2.0
/dts-v1/;
#include <dt-bindings/input/linux-event-codes.h>
#include <dt-bindings/input/gpio-keys.h>
#include "tegra194-p3668-0000.dtsi"
/ {
model = "NVIDIA Jetson Xavier NX Developer Kit";
compatible = "nvidia,p3509-0000+p3668-0000", "nvidia,tegra194";
bus@0 {
aconnect@2900000 {
status = "okay";
dma-controller@2930000 {
status = "okay";
};
interrupt-controller@2a40000 {
status = "okay";
};
};
ddc: i2c@3190000 {
status = "okay";
};
hda@3510000 {
nvidia,model = "jetson-xavier-nx-hda";
status = "okay";
};
padctl@3520000 {
status = "okay";
pads {
usb2 {
lanes {
usb2-1 {
status = "okay";
};
usb2-2 {
status = "okay";
};
};
};
usb3 {
lanes {
usb3-2 {
status = "okay";
};
};
};
};
ports {
usb2-1 {
mode = "host";
status = "okay";
};
usb2-2 {
mode = "host";
vbus-supply = <&vdd_5v0_sys>;
status = "okay";
};
usb3-2 {
nvidia,usb2-companion = <1>;
vbus-supply = <&vdd_5v0_sys>;
status = "okay";
};
};
};
usb@3610000 {
status = "okay";
phys = <&{/bus@0/padctl@3520000/pads/usb2/lanes/usb2-1}>,
<&{/bus@0/padctl@3520000/pads/usb2/lanes/usb2-2}>,
<&{/bus@0/padctl@3520000/pads/usb3/lanes/usb3-2}>;
phy-names = "usb2-1", "usb2-2", "usb3-2";
};
pwm@32d0000 {
status = "okay";
};
host1x@13e00000 {
display-hub@15200000 {
status = "okay";
};
dpaux@155c0000 {
status = "okay";
};
dpaux@155d0000 {
status = "okay";
};
/* DP0 */
sor@15b00000 {
status = "okay";
avdd-io-hdmi-dp-supply = <&vdd_1v0>;
vdd-hdmi-dp-pll-supply = <&vdd_1v8hs>;
nvidia,dpaux = <&dpaux0>;
};
/* HDMI */
sor@15b40000 {
status = "okay";
avdd-io-hdmi-dp-supply = <&vdd_1v0>;
vdd-hdmi-dp-pll-supply = <&vdd_1v8hs>;
hdmi-supply = <&vdd_hdmi>;
nvidia,ddc-i2c-bus = <&ddc>;
nvidia,hpd-gpio = <&gpio TEGRA194_MAIN_GPIO(M, 1)
GPIO_ACTIVE_LOW>;
};
};
};
pcie@14160000 {
status = "okay";
vddio-pex-ctl-supply = <&vdd_1v8ao>;
phys = <&p2u_hsio_11>;
phy-names = "p2u-0";
};
pcie@141a0000 {
status = "okay";
vddio-pex-ctl-supply = <&vdd_1v8ao>;
phys = <&p2u_nvhs_0>, <&p2u_nvhs_1>, <&p2u_nvhs_2>,
<&p2u_nvhs_3>, <&p2u_nvhs_4>, <&p2u_nvhs_5>,
<&p2u_nvhs_6>, <&p2u_nvhs_7>;
phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3", "p2u-4",
"p2u-5", "p2u-6", "p2u-7";
};
pcie_ep@141a0000 {
status = "disabled";
vddio-pex-ctl-supply = <&vdd_1v8ao>;
reset-gpios = <&gpio TEGRA194_MAIN_GPIO(GG, 1) GPIO_ACTIVE_LOW>;
nvidia,refclk-select-gpios = <&gpio_aon TEGRA194_AON_GPIO(AA, 5)
GPIO_ACTIVE_HIGH>;
phys = <&p2u_nvhs_0>, <&p2u_nvhs_1>, <&p2u_nvhs_2>,
<&p2u_nvhs_3>, <&p2u_nvhs_4>, <&p2u_nvhs_5>,
<&p2u_nvhs_6>, <&p2u_nvhs_7>;
phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3", "p2u-4",
"p2u-5", "p2u-6", "p2u-7";
};
fan: fan {
compatible = "pwm-fan";
pwms = <&pwm6 0 45334>;
cooling-levels = <0 64 128 255>;
#cooling-cells = <2>;
};
gpio-keys {
compatible = "gpio-keys";
force-recovery {
label = "Force Recovery";
gpios = <&gpio TEGRA194_MAIN_GPIO(G, 0)
GPIO_ACTIVE_LOW>;
linux,input-type = <EV_KEY>;
linux,code = <KEY_SLEEP>;
debounce-interval = <10>;
};
power {
label = "Power";
gpios = <&gpio_aon TEGRA194_AON_GPIO(EE, 4)
GPIO_ACTIVE_LOW>;
linux,input-type = <EV_KEY>;
linux,code = <KEY_POWER>;
debounce-interval = <10>;
wakeup-event-action = <EV_ACT_ASSERTED>;
wakeup-source;
};
};
vdd_5v0_sys: regulator@100 {
compatible = "regulator-fixed";
regulator-name = "VDD_5V_SYS";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
regulator-boot-on;
};
vdd_3v3_sys: regulator@101 {
compatible = "regulator-fixed";
regulator-name = "VDD_3V3_SYS";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
regulator-boot-on;
};
vdd_3v3_ao: regulator@102 {
compatible = "regulator-fixed";
regulator-name = "VDD_3V3_AO";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
regulator-boot-on;
};
vdd_1v8: regulator@103 {
compatible = "regulator-fixed";
regulator-name = "VDD_1V8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
regulator-boot-on;
};
vdd_hdmi: regulator@104 {
compatible = "regulator-fixed";
regulator-name = "VDD_5V0_HDMI_CON";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
regulator-boot-on;
};
thermal-zones {
cpu {
polling-delay = <0>;
polling-delay-passive = <500>;
status = "okay";
trips {
cpu_trip_critical: critical {
temperature = <96500>;
hysteresis = <0>;
type = "critical";
};
cpu_trip_hot: hot {
temperature = <70000>;
hysteresis = <2000>;
type = "hot";
};
cpu_trip_active: active {
temperature = <50000>;
hysteresis = <2000>;
type = "active";
};
cpu_trip_passive: passive {
temperature = <30000>;
hysteresis = <2000>;
type = "passive";
};
};
cooling-maps {
cpu-critical {
cooling-device = <&fan 3 3>;
trip = <&cpu_trip_critical>;
};
cpu-hot {
cooling-device = <&fan 2 2>;
trip = <&cpu_trip_hot>;
};
cpu-active {
cooling-device = <&fan 1 1>;
trip = <&cpu_trip_active>;
};
cpu-passive {
cooling-device = <&fan 0 0>;
trip = <&cpu_trip_passive>;
};
};
};
gpu {
polling-delay = <0>;
polling-delay-passive = <500>;
status = "okay";
trips {
gpu_alert0: critical {
temperature = <99000>;
hysteresis = <0>;
type = "critical";
};
};
};
aux {
polling-delay = <0>;
polling-delay-passive = <500>;
status = "okay";
trips {
aux_alert0: critical {
temperature = <90000>;
hysteresis = <0>;
type = "critical";
};
};
};
};
};

290
arch/arm64/boot/dts/nvidia/tegra194-p3668-0000.dtsi Normal file
View File

@ -0,0 +1,290 @@
// SPDX-License-Identifier: GPL-2.0
#include "tegra194.dtsi"
#include <dt-bindings/mfd/max77620.h>
/ {
model = "NVIDIA Jetson Xavier NX";
compatible = "nvidia,p3668-0000", "nvidia,tegra194";
aliases {
ethernet0 = "/bus@0/ethernet@2490000";
i2c0 = "/bpmp/i2c";
i2c1 = "/bus@0/i2c@3160000";
i2c2 = "/bus@0/i2c@c240000";
i2c3 = "/bus@0/i2c@3180000";
i2c4 = "/bus@0/i2c@3190000";
i2c5 = "/bus@0/i2c@31c0000";
i2c6 = "/bus@0/i2c@c250000";
i2c7 = "/bus@0/i2c@31e0000";
mmc0 = "/bus@0/mmc@3460000";
rtc0 = "/bpmp/i2c/pmic@3c";
rtc1 = "/bus@0/rtc@c2a0000";
serial0 = &tcu;
};
chosen {
bootargs = "console=ttyS0,115200n8";
stdout-path = "serial0:115200n8";
};
bus@0 {
ethernet@2490000 {
status = "okay";
phy-reset-gpios = <&gpio TEGRA194_MAIN_GPIO(R, 1) GPIO_ACTIVE_LOW>;
phy-handle = <&phy>;
phy-mode = "rgmii-id";
mdio {
#address-cells = <1>;
#size-cells = <0>;
phy: phy@0 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <0x0>;
interrupt-parent = <&gpio>;
interrupts = <TEGRA194_MAIN_GPIO(G, 4) IRQ_TYPE_LEVEL_LOW>;
#phy-cells = <0>;
};
};
};
memory-controller@2c00000 {
status = "okay";
};
serial@c280000 {
status = "okay";
};
/* SDMMC1 (SD/MMC) */
mmc@3400000 {
status = "okay";
bus-width = <4>;
cd-gpios = <&gpio TEGRA194_MAIN_GPIO(G, 7) GPIO_ACTIVE_LOW>;
disable-wp;
vmmc-supply = <&vdd_3v3_sd>;
};
padctl@3520000 {
avdd-usb-supply = <&vdd_usb_3v3>;
vclamp-usb-supply = <&vdd_1v8ao>;
ports {
usb2-1 {
vbus-supply = <&vdd_5v0_sys>;
};
usb2-3 {
vbus-supply = <&vdd_5v0_sys>;
};
usb3-0 {
vbus-supply = <&vdd_5v0_sys>;
};
usb3-3 {
vbus-supply = <&vdd_5v0_sys>;
};
};
};
rtc@c2a0000 {
status = "okay";
};
pmc@c360000 {
nvidia,invert-interrupt;
};
};
bpmp {
i2c {
status = "okay";
pmic: pmic@3c {
compatible = "maxim,max20024";
reg = <0x3c>;
interrupt-parent = <&pmc>;
interrupts = <24 IRQ_TYPE_LEVEL_LOW>;
#interrupt-cells = <2>;
interrupt-controller;
#gpio-cells = <2>;
gpio-controller;
pinctrl-names = "default";
pinctrl-0 = <&max20024_default>;
max20024_default: pinmux {
gpio0 {
pins = "gpio0";
function = "gpio";
};
gpio1 {
pins = "gpio1";
function = "fps-out";
maxim,active-fps-source = <MAX77620_FPS_SRC_DEF>;
};
gpio2 {
pins = "gpio2";
function = "fps-out";
maxim,active-fps-source = <MAX77620_FPS_SRC_DEF>;
};
gpio3 {
pins = "gpio3";
function = "fps-out";
maxim,active-fps-source = <MAX77620_FPS_SRC_DEF>;
};
gpio4 {
pins = "gpio4";
function = "32k-out1";
drive-push-pull = <1>;
};
gpio6 {
pins = "gpio6";
function = "gpio";
drive-push-pull = <1>;
};
gpio7 {
pins = "gpio7";
function = "gpio";
drive-push-pull = <0>;
};
};
fps {
fps0 {
maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>;
maxim,shutdown-fps-time-period-us = <640>;
};
fps1 {
maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN1>;
maxim,shutdown-fps-time-period-us = <640>;
maxim,device-state-on-disabled-event = <MAX77620_FPS_INACTIVE_STATE_SLEEP>;
};
fps2 {
maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>;
maxim,shutdown-fps-time-period-us = <640>;
};
};
regulators {
in-sd0-supply = <&vdd_5v0_sys>;
in-sd1-supply = <&vdd_5v0_sys>;
in-sd2-supply = <&vdd_5v0_sys>;
in-sd3-supply = <&vdd_5v0_sys>;
in-sd4-supply = <&vdd_5v0_sys>;
in-ldo0-1-supply = <&vdd_5v0_sys>;
in-ldo2-supply = <&vdd_5v0_sys>;
in-ldo3-5-supply = <&vdd_5v0_sys>;
in-ldo4-6-supply = <&vdd_5v0_sys>;
in-ldo7-8-supply = <&vdd_1v8ls>;
vdd_1v0: sd0 {
regulator-name = "VDDIO_SYS_1V0";
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1000000>;
regulator-always-on;
regulator-boot-on;
};
vdd_1v8hs: sd1 {
regulator-name = "VDDIO_SYS_1V8HS";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
regulator-boot-on;
};
vdd_1v8ls: sd2 {
regulator-name = "VDDIO_SYS_1V8LS";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
regulator-boot-on;
};
vdd_1v8ao: sd3 {
regulator-name = "VDDIO_AO_1V8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
regulator-boot-on;
};
sd4 {
regulator-name = "VDD_DDR_1V1";
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1100000>;
regulator-always-on;
regulator-boot-on;
};
ldo0 {
regulator-name = "VDD_RTC";
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <800000>;
regulator-always-on;
regulator-boot-on;
};
ldo2 {
regulator-name = "VDDIO_AO_3V3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
regulator-boot-on;
};
ldo3 {
regulator-name = "VDD_EMMC_3V3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
vdd_usb_3v3: ldo5 {
regulator-name = "VDD_USB_3V3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
regulator-boot-on;
};
ldo6 {
regulator-name = "VDD_SDIO_3V3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
ldo7 {
regulator-name = "AVDD_CSI_1V2";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
};
};
};
};
};
vdd_3v3_sd: regulator@0 {
compatible = "regulator-fixed";
regulator-name = "VDD_3V3_SD";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpio TEGRA194_MAIN_GPIO(G, 2) GPIO_ACTIVE_HIGH>;
regulator-boot-on;
enable-active-high;
};
};

280
arch/arm64/boot/dts/nvidia/tegra194.dtsi
View File

@ -16,7 +16,7 @@
#size-cells = <2>;
/* control backbone */
cbb@0 {
bus@0 {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
@ -59,6 +59,9 @@
clock-names = "master_bus", "slave_bus", "rx", "tx", "ptp_ref";
resets = <&bpmp TEGRA194_RESET_EQOS>;
reset-names = "eqos";
interconnects = <&mc TEGRA194_MEMORY_CLIENT_EQOSR &emc>,
<&mc TEGRA194_MEMORY_CLIENT_EQOSW &emc>;
interconnect-names = "dma-mem", "write";
status = "disabled";
snps,write-requests = <1>;
@ -141,8 +144,8 @@
pinmux: pinmux@2430000 {
compatible = "nvidia,tegra194-pinmux";
reg = <0x2430000 0x17000
0xc300000 0x4000>;
reg = <0x2430000 0x17000>,
<0xc300000 0x4000>;
status = "okay";
@ -176,6 +179,8 @@
reg = <0x02c00000 0x100000>,
<0x02b80000 0x040000>,
<0x01700000 0x100000>;
interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>;
#interconnect-cells = <1>;
status = "disabled";
#address-cells = <2>;
@ -209,6 +214,8 @@
clocks = <&bpmp TEGRA194_CLK_EMC>;
clock-names = "emc";
#interconnect-cells = <0>;
nvidia,bpmp = <&bpmp>;
};
};
@ -449,14 +456,17 @@
#pwm-cells = <2>;
};
sdmmc1: sdhci@3400000 {
compatible = "nvidia,tegra194-sdhci", "nvidia,tegra186-sdhci";
sdmmc1: mmc@3400000 {
compatible = "nvidia,tegra194-sdhci";
reg = <0x03400000 0x10000>;
interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&bpmp TEGRA194_CLK_SDMMC1>;
clock-names = "sdhci";
resets = <&bpmp TEGRA194_RESET_SDMMC1>;
reset-names = "sdhci";
interconnects = <&mc TEGRA194_MEMORY_CLIENT_SDMMCRA &emc>,
<&mc TEGRA194_MEMORY_CLIENT_SDMMCWA &emc>;
interconnect-names = "dma-mem", "write";
nvidia,pad-autocal-pull-up-offset-3v3-timeout =
<0x07>;
nvidia,pad-autocal-pull-down-offset-3v3-timeout =
@ -471,14 +481,17 @@
status = "disabled";
};
sdmmc3: sdhci@3440000 {
compatible = "nvidia,tegra194-sdhci", "nvidia,tegra186-sdhci";
sdmmc3: mmc@3440000 {
compatible = "nvidia,tegra194-sdhci";
reg = <0x03440000 0x10000>;
interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&bpmp TEGRA194_CLK_SDMMC3>;
clock-names = "sdhci";
resets = <&bpmp TEGRA194_RESET_SDMMC3>;
reset-names = "sdhci";
interconnects = <&mc TEGRA194_MEMORY_CLIENT_SDMMCR &emc>,
<&mc TEGRA194_MEMORY_CLIENT_SDMMCW &emc>;
interconnect-names = "dma-mem", "write";
nvidia,pad-autocal-pull-up-offset-1v8 = <0x00>;
nvidia,pad-autocal-pull-down-offset-1v8 = <0x7a>;
nvidia,pad-autocal-pull-up-offset-3v3-timeout = <0x07>;
@ -494,8 +507,8 @@
status = "disabled";
};
sdmmc4: sdhci@3460000 {
compatible = "nvidia,tegra194-sdhci", "nvidia,tegra186-sdhci";
sdmmc4: mmc@3460000 {
compatible = "nvidia,tegra194-sdhci";
reg = <0x03460000 0x10000>;
interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&bpmp TEGRA194_CLK_SDMMC4>;
@ -506,6 +519,9 @@
<&bpmp TEGRA194_CLK_PLLC4>;
resets = <&bpmp TEGRA194_RESET_SDMMC4>;
reset-names = "sdhci";
interconnects = <&mc TEGRA194_MEMORY_CLIENT_SDMMCRAB &emc>,
<&mc TEGRA194_MEMORY_CLIENT_SDMMCWAB &emc>;
interconnect-names = "dma-mem", "write";
nvidia,pad-autocal-pull-up-offset-hs400 = <0x00>;
nvidia,pad-autocal-pull-down-offset-hs400 = <0x00>;
nvidia,pad-autocal-pull-up-offset-1v8-timeout = <0x0a>;
@ -534,6 +550,9 @@
<&bpmp TEGRA194_RESET_HDA2HDMICODEC>;
reset-names = "hda", "hda2codec_2x", "hda2hdmi";
power-domains = <&bpmp TEGRA194_POWER_DOMAIN_DISP>;
interconnects = <&mc TEGRA194_MEMORY_CLIENT_HDAR &emc>,
<&mc TEGRA194_MEMORY_CLIENT_HDAW &emc>;
interconnect-names = "dma-mem", "write";
status = "disabled";
};
@ -669,8 +688,7 @@
reg-names = "hcd", "fpci";
interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
<GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&bpmp TEGRA194_CLK_XUSB_CORE_HOST>,
<&bpmp TEGRA194_CLK_XUSB_FALCON>,
@ -981,10 +999,7 @@
reg-names = "security", "gpio";
reg = <0xc2f0000 0x1000>,
<0xc2f1000 0x1000>;
interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
@ -1017,12 +1032,13 @@
};
host1x@13e00000 {
compatible = "nvidia,tegra194-host1x", "simple-bus";
compatible = "nvidia,tegra194-host1x";
reg = <0x13e00000 0x10000>,
<0x13e10000 0x10000>;
reg-names = "hypervisor", "vm";
interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "syncpt", "host1x";
clocks = <&bpmp TEGRA194_CLK_HOST1X>;
clock-names = "host1x";
resets = <&bpmp TEGRA194_RESET_HOST1X>;
@ -1032,9 +1048,11 @@
#size-cells = <1>;
ranges = <0x15000000 0x15000000 0x01000000>;
interconnects = <&mc TEGRA194_MEMORY_CLIENT_HOST1XDMAR &emc>;
interconnect-names = "dma-mem";
display-hub@15200000 {
compatible = "nvidia,tegra194-display", "simple-bus";
compatible = "nvidia,tegra194-display";
reg = <0x15200000 0x00040000>;
resets = <&bpmp TEGRA194_RESET_NVDISPLAY0_MISC>,
<&bpmp TEGRA194_RESET_NVDISPLAY0_WGRP0>,
@ -1067,6 +1085,9 @@
reset-names = "dc";
power-domains = <&bpmp TEGRA194_POWER_DOMAIN_DISP>;
interconnects = <&mc TEGRA194_MEMORY_CLIENT_NVDISPLAYR &emc>,
<&mc TEGRA194_MEMORY_CLIENT_NVDISPLAYR1 &emc>;
interconnect-names = "dma-mem", "read-1";
nvidia,outputs = <&sor0 &sor1 &sor2 &sor3>;
nvidia,head = <0>;
@ -1082,6 +1103,9 @@
reset-names = "dc";
power-domains = <&bpmp TEGRA194_POWER_DOMAIN_DISPB>;
interconnects = <&mc TEGRA194_MEMORY_CLIENT_NVDISPLAYR &emc>,
<&mc TEGRA194_MEMORY_CLIENT_NVDISPLAYR1 &emc>;
interconnect-names = "dma-mem", "read-1";
nvidia,outputs = <&sor0 &sor1 &sor2 &sor3>;
nvidia,head = <1>;
@ -1097,6 +1121,9 @@
reset-names = "dc";
power-domains = <&bpmp TEGRA194_POWER_DOMAIN_DISPC>;
interconnects = <&mc TEGRA194_MEMORY_CLIENT_NVDISPLAYR &emc>,
<&mc TEGRA194_MEMORY_CLIENT_NVDISPLAYR1 &emc>;
interconnect-names = "dma-mem", "read-1";
nvidia,outputs = <&sor0 &sor1 &sor2 &sor3>;
nvidia,head = <2>;
@ -1112,6 +1139,9 @@
reset-names = "dc";
power-domains = <&bpmp TEGRA194_POWER_DOMAIN_DISPC>;
interconnects = <&mc TEGRA194_MEMORY_CLIENT_NVDISPLAYR &emc>,
<&mc TEGRA194_MEMORY_CLIENT_NVDISPLAYR1 &emc>;
interconnect-names = "dma-mem", "read-1";
nvidia,outputs = <&sor0 &sor1 &sor2 &sor3>;
nvidia,head = <3>;
@ -1128,6 +1158,9 @@
reset-names = "vic";
power-domains = <&bpmp TEGRA194_POWER_DOMAIN_VIC>;
interconnects = <&mc TEGRA194_MEMORY_CLIENT_VICSRD &emc>,
<&mc TEGRA194_MEMORY_CLIENT_VICSWR &emc>;
interconnect-names = "dma-mem", "write";
};
dpaux0: dpaux@155c0000 {
@ -1362,15 +1395,49 @@
nvidia,interface = <3>;
};
};
gpu@17000000 {
compatible = "nvidia,gv11b";
reg = <0x17000000 0x10000000>,
<0x18000000 0x10000000>;
interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "stall", "nonstall";
clocks = <&bpmp TEGRA194_CLK_GPCCLK>,
<&bpmp TEGRA194_CLK_GPU_PWR>,
<&bpmp TEGRA194_CLK_FUSE>;
clock-names = "gpu", "pwr", "fuse";
resets = <&bpmp TEGRA194_RESET_GPU>;
reset-names = "gpu";
dma-coherent;
power-domains = <&bpmp TEGRA194_POWER_DOMAIN_GPU>;
interconnects = <&mc TEGRA194_MEMORY_CLIENT_NVL1R &emc>,
<&mc TEGRA194_MEMORY_CLIENT_NVL1RHP &emc>,
<&mc TEGRA194_MEMORY_CLIENT_NVL1W &emc>,
<&mc TEGRA194_MEMORY_CLIENT_NVL2R &emc>,
<&mc TEGRA194_MEMORY_CLIENT_NVL2RHP &emc>,
<&mc TEGRA194_MEMORY_CLIENT_NVL2W &emc>,
<&mc TEGRA194_MEMORY_CLIENT_NVL3R &emc>,
<&mc TEGRA194_MEMORY_CLIENT_NVL3RHP &emc>,
<&mc TEGRA194_MEMORY_CLIENT_NVL3W &emc>,
<&mc TEGRA194_MEMORY_CLIENT_NVL4R &emc>,
<&mc TEGRA194_MEMORY_CLIENT_NVL4RHP &emc>,
<&mc TEGRA194_MEMORY_CLIENT_NVL4W &emc>;
interconnect-names = "dma-mem", "read-0-hp", "write-0",
"read-1", "read-1-hp", "write-1",
"read-2", "read-2-hp", "write-2",
"read-3", "read-3-hp", "write-3";
};
};
pcie@14100000 {
compatible = "nvidia,tegra194-pcie";
power-domains = <&bpmp TEGRA194_POWER_DOMAIN_PCIEX1A>;
reg = <0x00 0x14100000 0x0 0x00020000 /* appl registers (128K) */
0x00 0x30000000 0x0 0x00040000 /* configuration space (256K) */
0x00 0x30040000 0x0 0x00040000 /* iATU_DMA reg space (256K) */
0x00 0x30080000 0x0 0x00040000>; /* DBI reg space (256K) */
reg = <0x00 0x14100000 0x0 0x00020000>, /* appl registers (128K) */
<0x00 0x30000000 0x0 0x00040000>, /* configuration space (256K) */
<0x00 0x30040000 0x0 0x00040000>, /* iATU_DMA reg space (256K) */
<0x00 0x30080000 0x0 0x00040000>; /* DBI reg space (256K) */
reg-names = "appl", "config", "atu_dma", "dbi";
status = "disabled";
@ -1389,8 +1456,8 @@
<&bpmp TEGRA194_RESET_PEX0_CORE_1>;
reset-names = "apb", "core";
interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, /* controller interrupt */
<GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; /* MSI interrupt */
interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, /* controller interrupt */
<GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; /* MSI interrupt */
interrupt-names = "intr", "msi";
#interrupt-cells = <1>;
@ -1404,18 +1471,23 @@
nvidia,aspm-l0s-entrance-latency-us = <3>;
bus-range = <0x0 0xff>;
ranges = <0x81000000 0x0 0x30100000 0x0 0x30100000 0x0 0x00100000 /* downstream I/O (1MB) */
0xc3000000 0x12 0x00000000 0x12 0x00000000 0x0 0x30000000 /* prefetchable memory (768MB) */
0x82000000 0x0 0x40000000 0x12 0x30000000 0x0 0x10000000>; /* non-prefetchable memory (256MB) */
ranges = <0x43000000 0x12 0x00000000 0x12 0x00000000 0x0 0x30000000>, /* prefetchable memory (768 MiB) */
<0x02000000 0x0 0x40000000 0x12 0x30000000 0x0 0x0fff0000>, /* non-prefetchable memory (256 MiB - 64 KiB) */
<0x01000000 0x0 0x00000000 0x12 0x3fff0000 0x0 0x00010000>; /* downstream I/O (64 KiB) */
interconnects = <&mc TEGRA194_MEMORY_CLIENT_PCIE1R &emc>,
<&mc TEGRA194_MEMORY_CLIENT_PCIE1W &emc>;
interconnect-names = "read", "write";
};
pcie@14120000 {
compatible = "nvidia,tegra194-pcie";
power-domains = <&bpmp TEGRA194_POWER_DOMAIN_PCIEX1A>;
reg = <0x00 0x14120000 0x0 0x00020000 /* appl registers (128K) */
0x00 0x32000000 0x0 0x00040000 /* configuration space (256K) */
0x00 0x32040000 0x0 0x00040000 /* iATU_DMA reg space (256K) */
0x00 0x32080000 0x0 0x00040000>; /* DBI reg space (256K) */
reg = <0x00 0x14120000 0x0 0x00020000>, /* appl registers (128K) */
<0x00 0x32000000 0x0 0x00040000>, /* configuration space (256K) */
<0x00 0x32040000 0x0 0x00040000>, /* iATU_DMA reg space (256K) */
<0x00 0x32080000 0x0 0x00040000>; /* DBI reg space (256K) */
reg-names = "appl", "config", "atu_dma", "dbi";
status = "disabled";
@ -1434,8 +1506,8 @@
<&bpmp TEGRA194_RESET_PEX0_CORE_2>;
reset-names = "apb", "core";
interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, /* controller interrupt */
<GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>; /* MSI interrupt */
interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, /* controller interrupt */
<GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>; /* MSI interrupt */
interrupt-names = "intr", "msi";
#interrupt-cells = <1>;
@ -1449,18 +1521,23 @@
nvidia,aspm-l0s-entrance-latency-us = <3>;
bus-range = <0x0 0xff>;
ranges = <0x81000000 0x0 0x32100000 0x0 0x32100000 0x0 0x00100000 /* downstream I/O (1MB) */
0xc3000000 0x12 0x40000000 0x12 0x40000000 0x0 0x30000000 /* prefetchable memory (768MB) */
0x82000000 0x0 0x40000000 0x12 0x70000000 0x0 0x10000000>; /* non-prefetchable memory (256MB) */
ranges = <0x43000000 0x12 0x40000000 0x12 0x40000000 0x0 0x30000000>, /* prefetchable memory (768 MiB) */
<0x02000000 0x0 0x40000000 0x12 0x70000000 0x0 0x0fff0000>, /* non-prefetchable memory (256 MiB - 64 KiB) */
<0x01000000 0x0 0x00000000 0x12 0x7fff0000 0x0 0x00010000>; /* downstream I/O (64 KiB) */
interconnects = <&mc TEGRA194_MEMORY_CLIENT_PCIE2AR &emc>,
<&mc TEGRA194_MEMORY_CLIENT_PCIE2AW &emc>;
interconnect-names = "read", "write";
};
pcie@14140000 {
compatible = "nvidia,tegra194-pcie";
power-domains = <&bpmp TEGRA194_POWER_DOMAIN_PCIEX1A>;
reg = <0x00 0x14140000 0x0 0x00020000 /* appl registers (128K) */
0x00 0x34000000 0x0 0x00040000 /* configuration space (256K) */
0x00 0x34040000 0x0 0x00040000 /* iATU_DMA reg space (256K) */
0x00 0x34080000 0x0 0x00040000>; /* DBI reg space (256K) */
reg = <0x00 0x14140000 0x0 0x00020000>, /* appl registers (128K) */
<0x00 0x34000000 0x0 0x00040000>, /* configuration space (256K) */
<0x00 0x34040000 0x0 0x00040000>, /* iATU_DMA reg space (256K) */
<0x00 0x34080000 0x0 0x00040000>; /* DBI reg space (256K) */
reg-names = "appl", "config", "atu_dma", "dbi";
status = "disabled";
@ -1479,8 +1556,8 @@
<&bpmp TEGRA194_RESET_PEX0_CORE_3>;
reset-names = "apb", "core";
interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, /* controller interrupt */
<GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>; /* MSI interrupt */
interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, /* controller interrupt */
<GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>; /* MSI interrupt */
interrupt-names = "intr", "msi";
#interrupt-cells = <1>;
@ -1494,18 +1571,23 @@
nvidia,aspm-l0s-entrance-latency-us = <3>;
bus-range = <0x0 0xff>;
ranges = <0x81000000 0x0 0x34100000 0x0 0x34100000 0x0 0x00100000 /* downstream I/O (1MB) */
0xc3000000 0x12 0x80000000 0x12 0x80000000 0x0 0x30000000 /* prefetchable memory (768MB) */
0x82000000 0x0 0x40000000 0x12 0xb0000000 0x0 0x10000000>; /* non-prefetchable memory (256MB) */
ranges = <0x43000000 0x12 0x80000000 0x12 0x80000000 0x0 0x30000000>, /* prefetchable memory (768 MiB) */
<0x02000000 0x0 0x40000000 0x12 0xb0000000 0x0 0x0fff0000>, /* non-prefetchable memory (256 MiB + 64 KiB) */
<0x01000000 0x0 0x00000000 0x12 0xbfff0000 0x0 0x00010000>; /* downstream I/O (64 KiB) */
interconnects = <&mc TEGRA194_MEMORY_CLIENT_PCIE3R &emc>,
<&mc TEGRA194_MEMORY_CLIENT_PCIE3W &emc>;
interconnect-names = "read", "write";
};
pcie@14160000 {
compatible = "nvidia,tegra194-pcie";
power-domains = <&bpmp TEGRA194_POWER_DOMAIN_PCIEX4A>;
reg = <0x00 0x14160000 0x0 0x00020000 /* appl registers (128K) */
0x00 0x36000000 0x0 0x00040000 /* configuration space (256K) */
0x00 0x36040000 0x0 0x00040000 /* iATU_DMA reg space (256K) */
0x00 0x36080000 0x0 0x00040000>; /* DBI reg space (256K) */
reg = <0x00 0x14160000 0x0 0x00020000>, /* appl registers (128K) */
<0x00 0x36000000 0x0 0x00040000>, /* configuration space (256K) */
<0x00 0x36040000 0x0 0x00040000>, /* iATU_DMA reg space (256K) */
<0x00 0x36080000 0x0 0x00040000>; /* DBI reg space (256K) */
reg-names = "appl", "config", "atu_dma", "dbi";
status = "disabled";
@ -1524,8 +1606,8 @@
<&bpmp TEGRA194_RESET_PEX0_CORE_4>;
reset-names = "apb", "core";
interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, /* controller interrupt */
<GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>; /* MSI interrupt */
interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, /* controller interrupt */
<GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>; /* MSI interrupt */
interrupt-names = "intr", "msi";
#interrupt-cells = <1>;
@ -1539,18 +1621,23 @@
nvidia,aspm-l0s-entrance-latency-us = <3>;
bus-range = <0x0 0xff>;
ranges = <0x81000000 0x0 0x36100000 0x0 0x36100000 0x0 0x00100000 /* downstream I/O (1MB) */
0xc3000000 0x14 0x00000000 0x14 0x00000000 0x3 0x40000000 /* prefetchable memory (13GB) */
0x82000000 0x0 0x40000000 0x17 0x40000000 0x0 0xc0000000>; /* non-prefetchable memory (3GB) */
ranges = <0x43000000 0x14 0x00000000 0x14 0x00000000 0x3 0x40000000>, /* prefetchable memory (13 GiB) */
<0x02000000 0x0 0x40000000 0x17 0x40000000 0x0 0xbfff0000>, /* non-prefetchable memory (3 GiB - 64 KiB) */
<0x01000000 0x0 0x00000000 0x17 0xffff0000 0x0 0x00010000>; /* downstream I/O (64 KiB) */
interconnects = <&mc TEGRA194_MEMORY_CLIENT_PCIE4R &emc>,
<&mc TEGRA194_MEMORY_CLIENT_PCIE4W &emc>;
interconnect-names = "read", "write";
};
pcie@14180000 {
compatible = "nvidia,tegra194-pcie";
power-domains = <&bpmp TEGRA194_POWER_DOMAIN_PCIEX8B>;
reg = <0x00 0x14180000 0x0 0x00020000 /* appl registers (128K) */
0x00 0x38000000 0x0 0x00040000 /* configuration space (256K) */
0x00 0x38040000 0x0 0x00040000 /* iATU_DMA reg space (256K) */
0x00 0x38080000 0x0 0x00040000>; /* DBI reg space (256K) */
reg = <0x00 0x14180000 0x0 0x00020000>, /* appl registers (128K) */
<0x00 0x38000000 0x0 0x00040000>, /* configuration space (256K) */
<0x00 0x38040000 0x0 0x00040000>, /* iATU_DMA reg space (256K) */
<0x00 0x38080000 0x0 0x00040000>; /* DBI reg space (256K) */
reg-names = "appl", "config", "atu_dma", "dbi";
status = "disabled";
@ -1569,8 +1656,8 @@
<&bpmp TEGRA194_RESET_PEX0_CORE_0>;
reset-names = "apb", "core";
interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>, /* controller interrupt */
<GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; /* MSI interrupt */
interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>, /* controller interrupt */
<GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; /* MSI interrupt */
interrupt-names = "intr", "msi";
#interrupt-cells = <1>;
@ -1584,18 +1671,23 @@
nvidia,aspm-l0s-entrance-latency-us = <3>;
bus-range = <0x0 0xff>;
ranges = <0x81000000 0x0 0x38100000 0x0 0x38100000 0x0 0x00100000 /* downstream I/O (1MB) */
0xc3000000 0x18 0x00000000 0x18 0x00000000 0x3 0x40000000 /* prefetchable memory (13GB) */
0x82000000 0x0 0x40000000 0x1b 0x40000000 0x0 0xc0000000>; /* non-prefetchable memory (3GB) */
ranges = <0x43000000 0x18 0x00000000 0x18 0x00000000 0x3 0x40000000>, /* prefetchable memory (13 GiB) */
<0x02000000 0x0 0x40000000 0x1b 0x40000000 0x0 0xbfff0000>, /* non-prefetchable memory (3 GiB - 64 KiB) */
<0x01000000 0x0 0x00000000 0x1b 0xffff0000 0x0 0x00010000>; /* downstream I/O (64 KiB) */
interconnects = <&mc TEGRA194_MEMORY_CLIENT_PCIE0R &emc>,
<&mc TEGRA194_MEMORY_CLIENT_PCIE0W &emc>;
interconnect-names = "read", "write";
};
pcie@141a0000 {
compatible = "nvidia,tegra194-pcie";
power-domains = <&bpmp TEGRA194_POWER_DOMAIN_PCIEX8A>;
reg = <0x00 0x141a0000 0x0 0x00020000 /* appl registers (128K) */
0x00 0x3a000000 0x0 0x00040000 /* configuration space (256K) */
0x00 0x3a040000 0x0 0x00040000 /* iATU_DMA reg space (256K) */
0x00 0x3a080000 0x0 0x00040000>; /* DBI reg space (256K) */
reg = <0x00 0x141a0000 0x0 0x00020000>, /* appl registers (128K) */
<0x00 0x3a000000 0x0 0x00040000>, /* configuration space (256K) */
<0x00 0x3a040000 0x0 0x00040000>, /* iATU_DMA reg space (256K) */
<0x00 0x3a080000 0x0 0x00040000>; /* DBI reg space (256K) */
reg-names = "appl", "config", "atu_dma", "dbi";
status = "disabled";
@ -1611,15 +1703,15 @@
pinctrl-0 = <&pex_rst_c5_out_state>, <&clkreq_c5_bi_dir_state>;
clocks = <&bpmp TEGRA194_CLK_PEX1_CORE_5>,
<&bpmp TEGRA194_CLK_PEX1_CORE_5M>;
<&bpmp TEGRA194_CLK_PEX1_CORE_5M>;
clock-names = "core", "core_m";
resets = <&bpmp TEGRA194_RESET_PEX1_CORE_5_APB>,
<&bpmp TEGRA194_RESET_PEX1_CORE_5>;
reset-names = "apb", "core";
interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, /* controller interrupt */
<GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>; /* MSI interrupt */
interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, /* controller interrupt */
<GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>; /* MSI interrupt */
interrupt-names = "intr", "msi";
nvidia,bpmp = <&bpmp 5>;
@ -1633,18 +1725,23 @@
nvidia,aspm-l0s-entrance-latency-us = <3>;
bus-range = <0x0 0xff>;
ranges = <0x81000000 0x0 0x3a100000 0x0 0x3a100000 0x0 0x00100000 /* downstream I/O (1MB) */
0xc3000000 0x1c 0x00000000 0x1c 0x00000000 0x3 0x40000000 /* prefetchable memory (13GB) */
0x82000000 0x0 0x40000000 0x1f 0x40000000 0x0 0xc0000000>; /* non-prefetchable memory (3GB) */
ranges = <0x43000000 0x1c 0x00000000 0x1c 0x00000000 0x3 0x40000000>, /* prefetchable memory (13 GiB) */
<0x02000000 0x0 0x40000000 0x1f 0x40000000 0x0 0xbfff0000>, /* non-prefetchable memory (3 GiB - 64 KiB) */
<0x01000000 0x0 0x00000000 0x1f 0xffff0000 0x0 0x00010000>; /* downstream I/O (64 KiB) */
interconnects = <&mc TEGRA194_MEMORY_CLIENT_PCIE5R &emc>,
<&mc TEGRA194_MEMORY_CLIENT_PCIE5W &emc>;
interconnect-names = "read", "write";
};
pcie_ep@14160000 {
compatible = "nvidia,tegra194-pcie-ep", "snps,dw-pcie-ep";
power-domains = <&bpmp TEGRA194_POWER_DOMAIN_PCIEX4A>;
reg = <0x00 0x14160000 0x0 0x00020000 /* appl registers (128K) */
0x00 0x36040000 0x0 0x00040000 /* iATU_DMA reg space (256K) */
0x00 0x36080000 0x0 0x00040000 /* DBI reg space (256K) */
0x14 0x00000000 0x4 0x00000000>; /* Address Space (16G) */
reg = <0x00 0x14160000 0x0 0x00020000>, /* appl registers (128K) */
<0x00 0x36040000 0x0 0x00040000>, /* iATU_DMA reg space (256K) */
<0x00 0x36080000 0x0 0x00040000>, /* DBI reg space (256K) */
<0x14 0x00000000 0x4 0x00000000>; /* Address Space (16G) */
reg-names = "appl", "atu_dma", "dbi", "addr_space";
status = "disabled";
@ -1673,10 +1770,10 @@
pcie_ep@14180000 {
compatible = "nvidia,tegra194-pcie-ep", "snps,dw-pcie-ep";
power-domains = <&bpmp TEGRA194_POWER_DOMAIN_PCIEX8B>;
reg = <0x00 0x14180000 0x0 0x00020000 /* appl registers (128K) */
0x00 0x38040000 0x0 0x00040000 /* iATU_DMA reg space (256K) */
0x00 0x38080000 0x0 0x00040000 /* DBI reg space (256K) */
0x18 0x00000000 0x4 0x00000000>; /* Address Space (16G) */
reg = <0x00 0x14180000 0x0 0x00020000>, /* appl registers (128K) */
<0x00 0x38040000 0x0 0x00040000>, /* iATU_DMA reg space (256K) */
<0x00 0x38080000 0x0 0x00040000>, /* DBI reg space (256K) */
<0x18 0x00000000 0x4 0x00000000>; /* Address Space (16G) */
reg-names = "appl", "atu_dma", "dbi", "addr_space";
status = "disabled";
@ -1705,10 +1802,10 @@
pcie_ep@141a0000 {
compatible = "nvidia,tegra194-pcie-ep", "snps,dw-pcie-ep";
power-domains = <&bpmp TEGRA194_POWER_DOMAIN_PCIEX8A>;
reg = <0x00 0x141a0000 0x0 0x00020000 /* appl registers (128K) */
0x00 0x3a040000 0x0 0x00040000 /* iATU_DMA reg space (256K) */
0x00 0x3a080000 0x0 0x00040000 /* DBI reg space (256K) */
0x1c 0x00000000 0x4 0x00000000>; /* Address Space (16G) */
reg = <0x00 0x141a0000 0x0 0x00020000>, /* appl registers (128K) */
<0x00 0x3a040000 0x0 0x00040000>, /* iATU_DMA reg space (256K) */
<0x00 0x3a080000 0x0 0x00040000>, /* DBI reg space (256K) */
<0x1c 0x00000000 0x4 0x00000000>; /* Address Space (16G) */
reg-names = "appl", "atu_dma", "dbi", "addr_space";
status = "disabled";
@ -1737,22 +1834,20 @@
nvidia,aspm-l0s-entrance-latency-us = <3>;
};
sysram@40000000 {
sram@40000000 {
compatible = "nvidia,tegra194-sysram", "mmio-sram";
reg = <0x0 0x40000000 0x0 0x50000>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0x0 0x40000000 0x50000>;
cpu_bpmp_tx: shmem@4e000 {
compatible = "nvidia,tegra194-bpmp-shmem";
cpu_bpmp_tx: sram@4e000 {
reg = <0x4e000 0x1000>;
label = "cpu-bpmp-tx";
pool;
};
cpu_bpmp_rx: shmem@4f000 {
compatible = "nvidia,tegra194-bpmp-shmem";
cpu_bpmp_rx: sram@4f000 {
reg = <0x4f000 0x1000>;
label = "cpu-bpmp-rx";
pool;
@ -1767,6 +1862,11 @@
#clock-cells = <1>;
#reset-cells = <1>;
#power-domain-cells = <1>;
interconnects = <&mc TEGRA194_MEMORY_CLIENT_BPMPR &emc>,
<&mc TEGRA194_MEMORY_CLIENT_BPMPW &emc>,
<&mc TEGRA194_MEMORY_CLIENT_BPMPDMAR &emc>,
<&mc TEGRA194_MEMORY_CLIENT_BPMPDMAW &emc>;
interconnect-names = "read", "write", "dma-mem", "dma-write";
bpmp_i2c: i2c {
compatible = "nvidia,tegra186-bpmp-i2c";
@ -1782,6 +1882,8 @@
};
cpus {
compatible = "nvidia,tegra194-ccplex";
nvidia,bpmp = <&bpmp>;
#address-cells = <1>;
#size-cells = <0>;

46
arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi
View File

@ -17,7 +17,7 @@
stdout-path = "serial0:115200n8";
};
memory {
memory@80000000 {
device_type = "memory";
reg = <0x0 0x80000000 0x1 0x0>;
};
@ -274,8 +274,8 @@
reg = <0x50>;
vcc-supply = <&vdd_1v8>;
address-bits = <8>;
page-size = <8>;
address-width = <8>;
pagesize = <8>;
size = <256>;
read-only;
};
@ -293,24 +293,17 @@
};
/* eMMC */
sdhci@700b0600 {
mmc@700b0600 {
status = "okay";
bus-width = <8>;
non-removable;
vqmmc-supply = <&vdd_1v8>;
};
clocks {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
clk32k_in: clock@0 {
compatible = "fixed-clock";
reg = <0>;
#clock-cells = <0>;
clock-frequency = <32768>;
};
clk32k_in: clock@0 {
compatible = "fixed-clock";
clock-frequency = <32768>;
#clock-cells = <0>;
};
cpus {
@ -342,18 +335,15 @@
method = "smc";
};
regulators {
vdd_gpu: regulator@100 {
compatible = "pwm-regulator";
reg = <100>;
pwms = <&pwm 1 4880>;
regulator-name = "VDD_GPU";
regulator-min-microvolt = <710000>;
regulator-max-microvolt = <1320000>;
enable-gpios = <&pmic 6 GPIO_ACTIVE_HIGH>;
regulator-ramp-delay = <80>;
regulator-enable-ramp-delay = <2000>;
regulator-settling-time-us = <160>;
};
vdd_gpu: regulator@100 {
compatible = "pwm-regulator";
pwms = <&pwm 1 4880>;
regulator-name = "VDD_GPU";
regulator-min-microvolt = <710000>;
regulator-max-microvolt = <1320000>;
enable-gpios = <&pmic 6 GPIO_ACTIVE_HIGH>;
regulator-ramp-delay = <80>;
regulator-enable-ramp-delay = <2000>;
regulator-settling-time-us = <160>;
};
};

6
arch/arm64/boot/dts/nvidia/tegra210-p2371-2180.dts
View File

@ -87,8 +87,8 @@
reg = <0x57>;
vcc-supply = <&vdd_1v8>;
address-bits = <8>;
page-size = <8>;
address-width = <8>;
pagesize = <8>;
size = <256>;
read-only;
};
@ -122,7 +122,7 @@
status = "okay";
};
agic@702f9000 {
interrupt-controller@702f9000 {
status = "okay";
};
};

19
arch/arm64/boot/dts/nvidia/tegra210-p2530.dtsi
View File

@ -14,7 +14,7 @@
stdout-path = "serial0:115200n8";
};
memory {
memory@80000000 {
device_type = "memory";
reg = <0x0 0x80000000 0x0 0xc0000000>;
};
@ -34,23 +34,16 @@
};
/* eMMC */
sdhci@700b0600 {
mmc@700b0600 {
status = "okay";
bus-width = <8>;
non-removable;
};
clocks {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
clk32k_in: clock@0 {
compatible = "fixed-clock";
reg = <0>;
#clock-cells = <0>;
clock-frequency = <32768>;
};
clk32k_in: clock@0 {
compatible = "fixed-clock";
clock-frequency = <32768>;
#clock-cells = <0>;
};
cpus {

330
arch/arm64/boot/dts/nvidia/tegra210-p2597.dtsi
View File

@ -27,8 +27,8 @@
sor@54580000 {
status = "okay";
avdd-io-supply = <&avdd_1v05>;
vdd-pll-supply = <&vdd_1v8>;
avdd-io-hdmi-dp-supply = <&avdd_1v05>;
vdd-hdmi-dp-pll-supply = <&vdd_1v8>;
hdmi-supply = <&vdd_hdmi>;
nvidia,ddc-i2c-bus = <&hdmi_ddc>;
@ -1323,6 +1323,14 @@
#gpio-cells = <2>;
gpio-controller;
};
exp2: gpio@77 {
compatible = "ti,tca9539";
reg = <0x77>;
#gpio-cells = <2>;
gpio-controller;
};
};
/* HDMI DDC */
@ -1461,17 +1469,17 @@
usb2-0 {
status = "okay";
vbus-supply = <&vdd_usb_vbus_otg>;
usb-role-switch;
mode = "otg";
usb-role-switch;
connector {
compatible = "usb-b-connector",
"gpio-usb-b-connector";
compatible = "gpio-usb-b-connector",
"usb-b-connector";
label = "micro-USB";
type = "micro";
vbus-gpio = <&gpio TEGRA_GPIO(Z, 0)
GPIO_ACTIVE_LOW>;
id-gpio = <&pmic 0 0>;
vbus-gpios = <&gpio TEGRA_GPIO(Z, 0)
GPIO_ACTIVE_LOW>;
id-gpios = <&pmic 0 GPIO_ACTIVE_HIGH>;
};
};
@ -1505,7 +1513,7 @@
};
/* MMC/SD */
sdhci@700b0000 {
mmc@700b0000 {
status = "okay";
bus-width = <4>;
@ -1523,152 +1531,6 @@
hvdd-usb-supply = <&vdd_1v8>;
};
regulators {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
vdd_sys_mux: regulator@0 {
compatible = "regulator-fixed";
reg = <0>;
regulator-name = "VDD_SYS_MUX";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
regulator-boot-on;
};
vdd_5v0_sys: regulator@1 {
compatible = "regulator-fixed";
reg = <1>;
regulator-name = "VDD_5V0_SYS";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
regulator-boot-on;
gpio = <&pmic 1 GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&vdd_sys_mux>;
};
vdd_3v3_sys: regulator@2 {
compatible = "regulator-fixed";
reg = <2>;
regulator-name = "VDD_3V3_SYS";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
regulator-boot-on;
gpio = <&pmic 3 GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&vdd_sys_mux>;
regulator-enable-ramp-delay = <160>;
regulator-disable-ramp-delay = <10000>;
};
vdd_5v0_io: regulator@3 {
compatible = "regulator-fixed";
reg = <3>;
regulator-name = "VDD_5V0_IO_SYS";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
regulator-boot-on;
};
vdd_3v3_sd: regulator@4 {
compatible = "regulator-fixed";
reg = <4>;
regulator-name = "VDD_3V3_SD";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpio TEGRA_GPIO(Z, 4) GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&vdd_3v3_sys>;
regulator-enable-ramp-delay = <472>;
regulator-disable-ramp-delay = <4880>;
};
vdd_dsi_csi: regulator@5 {
compatible = "regulator-fixed";
reg = <5>;
regulator-name = "AVDD_DSI_CSI_1V2";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
vin-supply = <&vdd_sys_1v2>;
};
vdd_3v3_dis: regulator@6 {
compatible = "regulator-fixed";
reg = <6>;
regulator-name = "VDD_DIS_3V3_LCD";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
gpio = <&exp1 3 GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&vdd_3v3_sys>;
};
vdd_1v8_dis: regulator@7 {
compatible = "regulator-fixed";
reg = <7>;
regulator-name = "VDD_LCD_1V8_DIS";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
gpio = <&exp1 14 GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&vdd_1v8>;
};
vdd_5v0_rtl: regulator@8 {
compatible = "regulator-fixed";
reg = <8>;
regulator-name = "RTL_5V";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio TEGRA_GPIO(H, 1) GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&vdd_5v0_sys>;
};
vdd_usb_vbus: regulator@9 {
compatible = "regulator-fixed";
reg = <9>;
regulator-name = "USB_VBUS_EN1";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio TEGRA_GPIO(CC, 5) GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&vdd_5v0_sys>;
};
vdd_usb_vbus_otg: regulator@11 {
compatible = "regulator-fixed";
reg = <9>;
regulator-name = "USB_VBUS_EN0";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio TEGRA_GPIO(CC, 4) GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&vdd_5v0_sys>;
};
vdd_hdmi: regulator@10 {
compatible = "regulator-fixed";
reg = <10>;
regulator-name = "VDD_HDMI_5V0";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&exp1 12 GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&vdd_5v0_sys>;
};
};
gpio-keys {
compatible = "gpio-keys";
label = "gpio-keys";
@ -1692,4 +1554,162 @@
linux,code = <KEY_VOLUMEUP>;
};
};
vdd_sys_mux: regulator@0 {
compatible = "regulator-fixed";
regulator-name = "VDD_SYS_MUX";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
regulator-boot-on;
};
vdd_5v0_sys: regulator@1 {
compatible = "regulator-fixed";
regulator-name = "VDD_5V0_SYS";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
regulator-boot-on;
gpio = <&pmic 1 GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&vdd_sys_mux>;
};
vdd_3v3_sys: regulator@2 {
compatible = "regulator-fixed";
regulator-name = "VDD_3V3_SYS";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
regulator-boot-on;
gpio = <&pmic 3 GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&vdd_sys_mux>;
regulator-enable-ramp-delay = <160>;
regulator-disable-ramp-delay = <10000>;
};
vdd_5v0_io: regulator@3 {
compatible = "regulator-fixed";
regulator-name = "VDD_5V0_IO_SYS";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
regulator-boot-on;
};
vdd_3v3_sd: regulator@4 {
compatible = "regulator-fixed";
regulator-name = "VDD_3V3_SD";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpio TEGRA_GPIO(Z, 4) GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&vdd_3v3_sys>;
regulator-enable-ramp-delay = <472>;
regulator-disable-ramp-delay = <4880>;
};
vdd_dsi_csi: regulator@5 {
compatible = "regulator-fixed";
regulator-name = "AVDD_DSI_CSI_1V2";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
vin-supply = <&vdd_sys_1v2>;
};
vdd_3v3_dis: regulator@6 {
compatible = "regulator-fixed";
regulator-name = "VDD_DIS_3V3_LCD";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
gpio = <&exp1 3 GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&vdd_3v3_sys>;
};
vdd_1v8_dis: regulator@7 {
compatible = "regulator-fixed";
regulator-name = "VDD_LCD_1V8_DIS";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
gpio = <&exp1 14 GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&vdd_1v8>;
};
vdd_5v0_rtl: regulator@8 {
compatible = "regulator-fixed";
regulator-name = "RTL_5V";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio TEGRA_GPIO(H, 1) GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&vdd_5v0_sys>;
};
vdd_usb_vbus: regulator@9 {
compatible = "regulator-fixed";
regulator-name = "USB_VBUS_EN1";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio TEGRA_GPIO(CC, 5) GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&vdd_5v0_sys>;
};
vdd_usb_vbus_otg: regulator@11 {
compatible = "regulator-fixed";
regulator-name = "USB_VBUS_EN0";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio TEGRA_GPIO(CC, 4) GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&vdd_5v0_sys>;
};
vdd_hdmi: regulator@10 {
compatible = "regulator-fixed";
regulator-name = "VDD_HDMI_5V0";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&exp1 12 GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&vdd_5v0_sys>;
};
vdd_cam_1v2: regulator@11 {
compatible = "regulator-fixed";
regulator-name = "vdd-cam-1v2";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
gpio = <&exp2 10 GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&vdd_3v3_sys>;
};
vdd_cam_2v8: regulator@12 {
compatible = "regulator-fixed";
regulator-name = "vdd-cam-2v8";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
gpio = <&exp1 13 GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&vdd_3v3_sys>;
};
vdd_cam_1v8: regulator@13 {
compatible = "regulator-fixed";
regulator-name = "vdd-cam-1v8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
gpio = <&exp2 9 GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&vdd_3v3_sys>;
};
};

400
arch/arm64/boot/dts/nvidia/tegra210-p2894.dtsi
View File

@ -16,7 +16,7 @@
stdout-path = "serial0:115200n8";
};
memory {
memory@80000000 {
device_type = "memory";
reg = <0x0 0x80000000 0x0 0xc0000000>;
};
@ -1328,7 +1328,7 @@
status = "okay";
clock-frequency = <400000>;
max77620: max77620@3c {
pmic: pmic@3c {
compatible = "maxim,max77620";
reg = <0x3c>;
interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
@ -1343,12 +1343,12 @@
pinctrl-0 = <&max77620_default>;
max77620_default: pinmux@0 {
pin_gpio0 {
gpio0 {
pins = "gpio0";
function = "gpio";
};
pin_gpio1 {
gpio1 {
pins = "gpio1";
function = "fps-out";
drive-push-pull = <1>;
@ -1357,37 +1357,37 @@
maxim,active-fps-power-down-slot = <0>;
};
pin_gpio2_3 {
pins = "gpio2", "gpio3";
gpio2 {
pins = "gpio2";
function = "fps-out";
drive-open-drain = <1>;
maxim,active-fps-source = <MAX77620_FPS_SRC_0>;
};
pin_gpio4 {
gpio3 {
pins = "gpio3";
function = "fps-out";
drive-open-drain = <1>;
maxim,active-fps-source = <MAX77620_FPS_SRC_0>;
};
gpio4 {
pins = "gpio4";
function = "32k-out1";
};
pin_gpio5_6_7 {
gpio5_6_7 {
pins = "gpio5", "gpio6", "gpio7";
function = "gpio";
drive-push-pull = <1>;
};
pin_gpio2 {
maxim,active-fps-source = <MAX77620_FPS_SRC_0>;
};
pin_gpio3 {
maxim,active-fps-source = <MAX77620_FPS_SRC_0>;
};
};
spmic-default-output-high {
gpio@0 {
gpio-hog;
output-high;
gpios = <2 GPIO_ACTIVE_HIGH 7 GPIO_ACTIVE_HIGH>;
gpios = <2 GPIO_ACTIVE_HIGH>,
<7 GPIO_ACTIVE_HIGH>;
};
fps {
@ -1580,23 +1580,16 @@
status = "okay";
};
sdhci@700b0600 {
mmc@700b0600 {
bus-width = <8>;
non-removable;
status = "okay";
};
clocks {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
clk32k_in: clock@0 {
compatible = "fixed-clock";
reg = <0>;
#clock-cells = <0>;
clock-frequency = <32768>;
};
clk32k_in: clock@0 {
compatible = "fixed-clock";
clock-frequency = <32768>;
#clock-cells = <0>;
};
gpio-keys {
@ -1642,223 +1635,198 @@
method = "smc";
};
regulators {
compatible = "simple-bus";
device_type = "fixed-regulators";
#address-cells = <1>;
#size-cells = <0>;
battery_reg: regulator@0 {
compatible = "regulator-fixed";
regulator-name = "vdd-ac-bat";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
};
battery_reg: regulator@0 {
compatible = "regulator-fixed";
reg = <0>;
regulator-name = "vdd-ac-bat";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
};
vdd_3v3: regulator@1 {
compatible = "regulator-fixed";
regulator-name = "vdd-3v3";
regulator-enable-ramp-delay = <160>;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
vdd_3v3: regulator@1 {
compatible = "regulator-fixed";
reg = <1>;
regulator-name = "vdd-3v3";
regulator-enable-ramp-delay = <160>;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
gpio = <&pmic 3 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
gpio = <&max77620 3 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
max77620_gpio7: regulator@2 {
compatible = "regulator-fixed";
regulator-name = "max77620-gpio7";
regulator-enable-ramp-delay = <240>;
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
vin-supply = <&max77620_ldo0>;
regulator-always-on;
regulator-boot-on;
max77620_gpio7: regulator@2 {
compatible = "regulator-fixed";
reg = <2>;
regulator-name = "max77620-gpio7";
regulator-enable-ramp-delay = <240>;
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
vin-supply = <&max77620_ldo0>;
regulator-always-on;
regulator-boot-on;
gpio = <&pmic 7 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
gpio = <&max77620 7 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
lcd_bl_en: regulator@3 {
compatible = "regulator-fixed";
regulator-name = "lcd-bl-en";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-boot-on;
lcd_bl_en: regulator@3 {
compatible = "regulator-fixed";
reg = <3>;
regulator-name = "lcd-bl-en";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-boot-on;
gpio = <&gpio TEGRA_GPIO(V, 1) GPIO_ACTIVE_HIGH>;
enable-active-high;
};
gpio = <&gpio TEGRA_GPIO(V, 1) GPIO_ACTIVE_HIGH>;
enable-active-high;
};
en_vdd_sd: regulator@4 {
compatible = "regulator-fixed";
regulator-name = "en-vdd-sd";
regulator-enable-ramp-delay = <472>;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&vdd_3v3>;
en_vdd_sd: regulator@4 {
compatible = "regulator-fixed";
reg = <4>;
regulator-name = "en-vdd-sd";
regulator-enable-ramp-delay = <472>;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&vdd_3v3>;
gpio = <&gpio TEGRA_GPIO(Z, 4) GPIO_ACTIVE_HIGH>;
enable-active-high;
};
gpio = <&gpio TEGRA_GPIO(Z, 4) GPIO_ACTIVE_HIGH>;
enable-active-high;
};
en_vdd_cam: regulator@5 {
compatible = "regulator-fixed";
regulator-name = "en-vdd-cam";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
en_vdd_cam: regulator@5 {
compatible = "regulator-fixed";
reg = <5>;
regulator-name = "en-vdd-cam";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
gpio = <&gpio TEGRA_GPIO(S, 4) GPIO_ACTIVE_HIGH>;
enable-active-high;
};
gpio = <&gpio TEGRA_GPIO(S, 4) GPIO_ACTIVE_HIGH>;
enable-active-high;
};
vdd_sys_boost: regulator@6 {
compatible = "regulator-fixed";
regulator-name = "vdd-sys-boost";
regulator-enable-ramp-delay = <3090>;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
vdd_sys_boost: regulator@6 {
compatible = "regulator-fixed";
reg = <6>;
regulator-name = "vdd-sys-boost";
regulator-enable-ramp-delay = <3090>;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
gpio = <&pmic 1 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
gpio = <&max77620 1 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
vdd_hdmi: regulator@7 {
compatible = "regulator-fixed";
regulator-name = "vdd-hdmi";
regulator-enable-ramp-delay = <468>;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&vdd_sys_boost>;
regulator-boot-on;
vdd_hdmi: regulator@7 {
compatible = "regulator-fixed";
reg = <7>;
regulator-name = "vdd-hdmi";
regulator-enable-ramp-delay = <468>;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&vdd_sys_boost>;
regulator-boot-on;
gpio = <&gpio TEGRA_GPIO(CC, 7) GPIO_ACTIVE_HIGH>;
enable-active-high;
};
gpio = <&gpio TEGRA_GPIO(CC, 7) GPIO_ACTIVE_HIGH>;
enable-active-high;
};
en_vdd_cpu_fixed: regulator@8 {
compatible = "regulator-fixed";
regulator-name = "vdd-cpu-fixed";
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1000000>;
};
en_vdd_cpu_fixed: regulator@8 {
compatible = "regulator-fixed";
reg = <8>;
regulator-name = "vdd-cpu-fixed";
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1000000>;
};
vdd_aux_3v3: regulator@9 {
compatible = "regulator-fixed";
regulator-name = "aux-3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
vdd_aux_3v3: regulator@9 {
compatible = "regulator-fixed";
reg = <9>;
regulator-name = "aux-3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
vdd_snsr_pm: regulator@10 {
compatible = "regulator-fixed";
regulator-name = "snsr_pm";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vdd_snsr_pm: regulator@10 {
compatible = "regulator-fixed";
reg = <10>;
regulator-name = "snsr_pm";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
enable-active-high;
};
enable-active-high;
};
vdd_usb_5v0: regulator@11 {
compatible = "regulator-fixed";
status = "disabled";
regulator-name = "vdd-usb-5v0";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&vdd_3v3>;
vdd_usb_5v0: regulator@11 {
compatible = "regulator-fixed";
reg = <11>;
status = "disabled";
regulator-name = "vdd-usb-5v0";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&vdd_3v3>;
enable-active-high;
};
enable-active-high;
};
vdd_cdc_1v2_aud: regulator@101 {
compatible = "regulator-fixed";
status = "disabled";
regulator-name = "vdd_cdc_1v2_aud";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
startup-delay-us = <250000>;
vdd_cdc_1v2_aud: regulator@101 {
compatible = "regulator-fixed";
reg = <101>;
status = "disabled";
regulator-name = "vdd_cdc_1v2_aud";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
startup-delay-us = <250000>;
enable-active-high;
};
enable-active-high;
};
vdd_disp_3v0: regulator@12 {
compatible = "regulator-fixed";
regulator-name = "vdd-disp-3v0";
regulator-enable-ramp-delay = <232>;
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
regulator-always-on;
vdd_disp_3v0: regulator@12 {
compatible = "regulator-fixed";
reg = <12>;
regulator-name = "vdd-disp-3v0";
regulator-enable-ramp-delay = <232>;
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
regulator-always-on;
gpio = <&gpio TEGRA_GPIO(I, 3) GPIO_ACTIVE_HIGH>;
enable-active-high;
};
gpio = <&gpio TEGRA_GPIO(I, 3) GPIO_ACTIVE_HIGH>;
enable-active-high;
};
vdd_fan: regulator@13 {
compatible = "regulator-fixed";
regulator-name = "vdd-fan";
regulator-enable-ramp-delay = <284>;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vdd_fan: regulator@13 {
compatible = "regulator-fixed";
reg = <13>;
regulator-name = "vdd-fan";
regulator-enable-ramp-delay = <284>;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio TEGRA_GPIO(E, 4) GPIO_ACTIVE_HIGH>;
enable-active-high;
};
gpio = <&gpio TEGRA_GPIO(E, 4) GPIO_ACTIVE_HIGH>;
enable-active-high;
};
usb_vbus1: regulator@14 {
compatible = "regulator-fixed";
regulator-name = "usb-vbus1";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
usb_vbus1: regulator@14 {
compatible = "regulator-fixed";
reg = <14>;
regulator-name = "usb-vbus1";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio TEGRA_GPIO(CC, 5) GPIO_ACTIVE_HIGH>;
enable-active-high;
gpio-open-drain;
};
gpio = <&gpio TEGRA_GPIO(CC, 5) GPIO_ACTIVE_HIGH>;
enable-active-high;
gpio-open-drain;
};
usb_vbus2: regulator@15 {
compatible = "regulator-fixed";
regulator-name = "usb-vbus2";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
usb_vbus2: regulator@15 {
compatible = "regulator-fixed";
reg = <15>;
regulator-name = "usb-vbus2";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio TEGRA_GPIO(CC, 4) GPIO_ACTIVE_HIGH>;
enable-active-high;
gpio-open-drain;
};
gpio = <&gpio TEGRA_GPIO(CC, 4) GPIO_ACTIVE_HIGH>;
enable-active-high;
gpio-open-drain;
};
vdd_3v3_eth: regulator@16 {
compatible = "regulator-fixed";
regulator-name = "vdd-3v3-eth-a02";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
regulator-boot-on;
vdd_3v3_eth: regulator@16 {
compatible = "regulator-fixed";
reg = <16>;
regulator-name = "vdd-3v3-eth-a02";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
regulator-boot-on;
gpio = <&gpio TEGRA_GPIO(D, 4) GPIO_ACTIVE_HIGH>;
enable-active-high;
gpio-open-drain;
};
gpio = <&gpio TEGRA_GPIO(D, 4) GPIO_ACTIVE_HIGH>;
enable-active-high;
gpio-open-drain;
};
};

273
arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts
View File

@ -22,7 +22,7 @@
stdout-path = "serial0:115200n8";
};
memory {
memory@80000000 {
device_type = "memory";
reg = <0x0 0x80000000 0x1 0x0>;
};
@ -64,6 +64,16 @@
status = "okay";
};
vi@54080000 {
status = "okay";
avdd-dsi-csi-supply = <&vdd_sys_1v2>;
csi@838 {
status = "okay";
};
};
sor@54540000 {
status = "okay";
@ -77,8 +87,8 @@
sor@54580000 {
status = "okay";
avdd-io-supply = <&avdd_1v05>;
vdd-pll-supply = <&vdd_1v8>;
avdd-io-hdmi-dp-supply = <&avdd_1v05>;
vdd-hdmi-dp-pll-supply = <&vdd_1v8>;
hdmi-supply = <&vdd_hdmi>;
nvidia,ddc-i2c-bus = <&hdmi_ddc>;
@ -101,6 +111,22 @@
status = "okay";
};
pinmux@700008d4 {
dvfs_pwm_active_state: dvfs_pwm_active {
dvfs_pwm_pbb1 {
nvidia,pins = "dvfs_pwm_pbb1";
nvidia,tristate = <TEGRA_PIN_DISABLE>;
};
};
dvfs_pwm_inactive_state: dvfs_pwm_inactive {
dvfs_pwm_pbb1 {
nvidia,pins = "dvfs_pwm_pbb1";
nvidia,tristate = <TEGRA_PIN_ENABLE>;
};
};
};
/* debug port */
serial@70006000 {
status = "okay";
@ -119,8 +145,8 @@
reg = <0x50>;
vcc-supply = <&vdd_1v8>;
address-bits = <8>;
page-size = <8>;
address-width = <8>;
pagesize = <8>;
size = <256>;
read-only;
};
@ -130,8 +156,8 @@
reg = <0x57>;
vcc-supply = <&vdd_1v8>;
address-bits = <8>;
page-size = <8>;
address-width = <8>;
pagesize = <8>;
size = <256>;
read-only;
};
@ -513,15 +539,15 @@
usb2-0 {
status = "okay";
mode = "peripheral";
usb-role-switch;
connector {
compatible = "usb-b-connector",
"gpio-usb-b-connector";
compatible = "gpio-usb-b-connector",
"usb-b-connector";
label = "micro-USB";
type = "micro";
vbus-gpio = <&gpio TEGRA_GPIO(CC, 4)
GPIO_ACTIVE_LOW>;
vbus-gpios = <&gpio TEGRA_GPIO(CC, 4)
GPIO_ACTIVE_LOW>;
};
};
@ -543,7 +569,7 @@
};
};
sdhci@700b0000 {
mmc@700b0000 {
status = "okay";
bus-width = <4>;
@ -553,15 +579,7 @@
vmmc-supply = <&vdd_3v3_sd>;
};
usb@700d0000 {
status = "okay";
phys = <&micro_b>;
phy-names = "usb2-0";
avddio-usb-supply = <&vdd_3v3_sys>;
hvdd-usb-supply = <&vdd_1v8>;
};
sdhci@700b0400 {
mmc@700b0400 {
status = "okay";
bus-width = <4>;
@ -574,17 +592,39 @@
wakeup-source;
};
clocks {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
usb@700d0000 {
status = "okay";
phys = <&micro_b>;
phy-names = "usb2-0";
avddio-usb-supply = <&vdd_3v3_sys>;
hvdd-usb-supply = <&vdd_1v8>;
};
clk32k_in: clock@0 {
compatible = "fixed-clock";
reg = <0>;
#clock-cells = <0>;
clock-frequency = <32768>;
};
clock@70110000 {
status = "okay";
nvidia,cf = <6>;
nvidia,ci = <0>;
nvidia,cg = <2>;
nvidia,droop-ctrl = <0x00000f00>;
nvidia,force-mode = <1>;
nvidia,sample-rate = <25000>;
nvidia,pwm-min-microvolts = <708000>;
nvidia,pwm-period-nanoseconds = <2500>; /* 2.5us */
nvidia,pwm-to-pmic;
nvidia,pwm-tristate-microvolts = <1000000>;
nvidia,pwm-voltage-step-microvolts = <19200>;
pinctrl-names = "dvfs_pwm_enable", "dvfs_pwm_disable";
pinctrl-0 = <&dvfs_pwm_active_state>;
pinctrl-1 = <&dvfs_pwm_inactive_state>;
};
clk32k_in: clock@0 {
compatible = "fixed-clock";
clock-frequency = <32768>;
#clock-cells = <0>;
};
cpus {
@ -698,120 +738,109 @@
method = "smc";
};
regulators {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
vdd_5v0_sys: regulator@0 {
compatible = "regulator-fixed";
vdd_5v0_sys: regulator@0 {
compatible = "regulator-fixed";
reg = <0>;
regulator-name = "VDD_5V0_SYS";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
regulator-boot-on;
};
regulator-name = "VDD_5V0_SYS";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
regulator-boot-on;
};
vdd_3v3_sys: regulator@1 {
compatible = "regulator-fixed";
vdd_3v3_sys: regulator@1 {
compatible = "regulator-fixed";
reg = <1>;
regulator-name = "VDD_3V3_SYS";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-enable-ramp-delay = <240>;
regulator-disable-ramp-delay = <11340>;
regulator-always-on;
regulator-boot-on;
regulator-name = "VDD_3V3_SYS";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-enable-ramp-delay = <240>;
regulator-disable-ramp-delay = <11340>;
regulator-always-on;
regulator-boot-on;
gpio = <&pmic 3 GPIO_ACTIVE_HIGH>;
enable-active-high;
gpio = <&pmic 3 GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&vdd_5v0_sys>;
};
vin-supply = <&vdd_5v0_sys>;
};
vdd_3v3_sd: regulator@2 {
compatible = "regulator-fixed";
reg = <2>;
vdd_3v3_sd: regulator@2 {
compatible = "regulator-fixed";
regulator-name = "VDD_3V3_SD";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "VDD_3V3_SD";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpio TEGRA_GPIO(Z, 3) GPIO_ACTIVE_HIGH>;
enable-active-high;
gpio = <&gpio TEGRA_GPIO(Z, 3) GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&vdd_3v3_sys>;
};
vin-supply = <&vdd_3v3_sys>;
};
vdd_hdmi: regulator@3 {
compatible = "regulator-fixed";
reg = <3>;
vdd_hdmi: regulator@3 {
compatible = "regulator-fixed";
regulator-name = "VDD_HDMI_5V0";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-name = "VDD_HDMI_5V0";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&vdd_5v0_sys>;
};
vin-supply = <&vdd_5v0_sys>;
};
vdd_hub_3v3: regulator@4 {
compatible = "regulator-fixed";
reg = <4>;
vdd_hub_3v3: regulator@4 {
compatible = "regulator-fixed";
regulator-name = "VDD_HUB_3V3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "VDD_HUB_3V3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpio TEGRA_GPIO(A, 6) GPIO_ACTIVE_HIGH>;
enable-active-high;
gpio = <&gpio TEGRA_GPIO(A, 6) GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&vdd_5v0_sys>;
};
vin-supply = <&vdd_5v0_sys>;
};
vdd_cpu: regulator@5 {
compatible = "regulator-fixed";
reg = <5>;
vdd_cpu: regulator@5 {
compatible = "regulator-fixed";
regulator-name = "VDD_CPU";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
regulator-boot-on;
regulator-name = "VDD_CPU";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
regulator-boot-on;
gpio = <&pmic 5 GPIO_ACTIVE_HIGH>;
enable-active-high;
gpio = <&pmic 5 GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&vdd_5v0_sys>;
};
vin-supply = <&vdd_5v0_sys>;
};
vdd_gpu: regulator@6 {
compatible = "pwm-regulator";
reg = <6>;
pwms = <&pwm 1 4880>;
regulator-name = "VDD_GPU";
regulator-min-microvolt = <710000>;
regulator-max-microvolt = <1320000>;
regulator-ramp-delay = <80>;
regulator-enable-ramp-delay = <2000>;
regulator-settling-time-us = <160>;
enable-gpios = <&pmic 6 GPIO_ACTIVE_HIGH>;
vin-supply = <&vdd_5v0_sys>;
};
vdd_gpu: regulator@6 {
compatible = "pwm-regulator";
pwms = <&pwm 1 4880>;
avdd_io_edp_1v05: regulator@7 {
compatible = "regulator-fixed";
reg = <7>;
regulator-name = "VDD_GPU";
regulator-min-microvolt = <710000>;
regulator-max-microvolt = <1320000>;
regulator-ramp-delay = <80>;
regulator-enable-ramp-delay = <2000>;
regulator-settling-time-us = <160>;
regulator-name = "AVDD_IO_EDP_1V05";
regulator-min-microvolt = <1050000>;
regulator-max-microvolt = <1050000>;
enable-gpios = <&pmic 6 GPIO_ACTIVE_HIGH>;
vin-supply = <&vdd_5v0_sys>;
};
gpio = <&pmic 7 GPIO_ACTIVE_HIGH>;
enable-active-high;
avdd_io_edp_1v05: regulator@7 {
compatible = "regulator-fixed";
vin-supply = <&avdd_1v05_pll>;
};
regulator-name = "AVDD_IO_EDP_1V05";
regulator-min-microvolt = <1050000>;
regulator-max-microvolt = <1050000>;
gpio = <&pmic 7 GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&avdd_1v05_pll>;
};
};

171
arch/arm64/boot/dts/nvidia/tegra210-smaug.dts
View File

@ -1330,7 +1330,6 @@
battery: bq27742@55 {
compatible = "ti,bq27742";
reg = <0x55>;
battery-name = "battery";
};
};
};
@ -1355,11 +1354,11 @@
maxim,enable-active-discharge;
maxim,enable-bias-control;
maxim,enable-etr;
maxim,enable-gpio = <&max77620 5 0>;
maxim,enable-gpio = <&pmic 5 0>;
maxim,externally-enable;
};
max77620: max77620@3c {
pmic: pmic@3c {
compatible = "maxim,max77620";
reg = <0x3c>;
interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
@ -1373,8 +1372,8 @@
pinctrl-names = "default";
pinctrl-0 = <&max77620_default>;
max77620_default: pinmux@0 {
pin_gpio {
max77620_default: pinmux {
gpio0_1_2_7 {
pins = "gpio0", "gpio1", "gpio2", "gpio7";
function = "gpio";
};
@ -1384,7 +1383,7 @@
* sequence, So it must be sequenced up (automatically
* set by OTP) and down properly.
*/
pin_gpio3 {
gpio3 {
pins = "gpio3";
function = "fps-out";
drive-open-drain = <1>;
@ -1393,13 +1392,13 @@
maxim,active-fps-power-down-slot = <2>;
};
pin_gpio5_6 {
gpio5_6 {
pins = "gpio5", "gpio6";
function = "gpio";
drive-push-pull = <1>;
};
pin_32k {
gpio4 {
pins = "gpio4";
function = "32k-out1";
};
@ -1697,7 +1696,7 @@
};
};
sdhci@700b0600 {
mmc@700b0600 {
bus-width = <8>;
non-removable;
status = "okay";
@ -1722,22 +1721,15 @@
status = "okay";
};
agic@702f9000 {
interrupt-controller@702f9000 {
status = "okay";
};
};
clocks {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
clk32k_in: clock@0 {
compatible = "fixed-clock";
reg = <0>;
#clock-cells = <0>;
clock-frequency = <32768>;
};
clk32k_in: clock@0 {
compatible = "fixed-clock";
clock-frequency = <32768>;
#clock-cells = <0>;
};
cpus {
@ -1815,88 +1807,73 @@
method = "smc";
};
regulators {
compatible = "simple-bus";
device_type = "fixed-regulators";
#address-cells = <1>;
#size-cells = <0>;
ppvar_sys: regulator@0 {
compatible = "regulator-fixed";
regulator-name = "PPVAR_SYS";
regulator-min-microvolt = <4400000>;
regulator-max-microvolt = <4400000>;
regulator-always-on;
};
ppvar_sys: regulator@0 {
compatible = "regulator-fixed";
reg = <0>;
regulator-name = "PPVAR_SYS";
regulator-min-microvolt = <4400000>;
regulator-max-microvolt = <4400000>;
regulator-always-on;
};
pplcd_vdd: regulator@1 {
compatible = "regulator-fixed";
regulator-name = "PPLCD_VDD";
regulator-min-microvolt = <4400000>;
regulator-max-microvolt = <4400000>;
gpio = <&gpio TEGRA_GPIO(V, 4) 0>;
enable-active-high;
regulator-boot-on;
};
pplcd_vdd: regulator@1 {
compatible = "regulator-fixed";
reg = <1>;
regulator-name = "PPLCD_VDD";
regulator-min-microvolt = <4400000>;
regulator-max-microvolt = <4400000>;
gpio = <&gpio TEGRA_GPIO(V, 4) 0>;
enable-active-high;
regulator-boot-on;
};
pp3000_always: regulator@2 {
compatible = "regulator-fixed";
regulator-name = "PP3000_ALWAYS";
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
regulator-always-on;
};
pp3000_always: regulator@2 {
compatible = "regulator-fixed";
reg = <2>;
regulator-name = "PP3000_ALWAYS";
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
regulator-always-on;
};
pp3300: regulator@3 {
compatible = "regulator-fixed";
regulator-name = "PP3300";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
regulator-always-on;
enable-active-high;
};
pp3300: regulator@3 {
compatible = "regulator-fixed";
reg = <3>;
regulator-name = "PP3300";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
regulator-always-on;
enable-active-high;
};
pp5000: regulator@4 {
compatible = "regulator-fixed";
regulator-name = "PP5000";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
};
pp5000: regulator@4 {
compatible = "regulator-fixed";
reg = <4>;
regulator-name = "PP5000";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
};
pp1800_lcdio: regulator@5 {
compatible = "regulator-fixed";
regulator-name = "PP1800_LCDIO";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
gpio = <&gpio TEGRA_GPIO(V, 3) 0>;
enable-active-high;
regulator-boot-on;
};
pp1800_lcdio: regulator@5 {
compatible = "regulator-fixed";
reg = <5>;
regulator-name = "PP1800_LCDIO";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
gpio = <&gpio TEGRA_GPIO(V, 3) 0>;
enable-active-high;
regulator-boot-on;
};
pp1800_cam: regulator@6 {
compatible = "regulator-fixed";
regulator-name = "PP1800_CAM";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
gpio = <&gpio TEGRA_GPIO(K, 3) 0>;
enable-active-high;
};
pp1800_cam: regulator@6 {
compatible = "regulator-fixed";
reg= <6>;
regulator-name = "PP1800_CAM";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
gpio = <&gpio TEGRA_GPIO(K, 3) 0>;
enable-active-high;
};
usbc_vbus: regulator@7 {
compatible = "regulator-fixed";
reg = <7>;
regulator-name = "USBC_VBUS";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
};
usbc_vbus: regulator@7 {
compatible = "regulator-fixed";
regulator-name = "USBC_VBUS";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
};
};

72
arch/arm64/boot/dts/nvidia/tegra210.dtsi
View File

@ -18,9 +18,9 @@
pcie@1003000 {
compatible = "nvidia,tegra210-pcie";
device_type = "pci";
reg = <0x0 0x01003000 0x0 0x00000800 /* PADS registers */
0x0 0x01003800 0x0 0x00000800 /* AFI registers */
0x0 0x02000000 0x0 0x10000000>; /* configuration space */
reg = <0x0 0x01003000 0x0 0x00000800>, /* PADS registers */
<0x0 0x01003800 0x0 0x00000800>, /* AFI registers */
<0x0 0x02000000 0x0 0x10000000>; /* configuration space */
reg-names = "pads", "afi", "cs";
interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>, /* controller interrupt */
<GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>; /* MSI interrupt */
@ -34,11 +34,11 @@
#address-cells = <3>;
#size-cells = <2>;
ranges = <0x82000000 0 0x01000000 0x0 0x01000000 0 0x00001000 /* port 0 configuration space */
0x82000000 0 0x01001000 0x0 0x01001000 0 0x00001000 /* port 1 configuration space */
0x81000000 0 0x0 0x0 0x12000000 0 0x00010000 /* downstream I/O (64 KiB) */
0x82000000 0 0x13000000 0x0 0x13000000 0 0x0d000000 /* non-prefetchable memory (208 MiB) */
0xc2000000 0 0x20000000 0x0 0x20000000 0 0x20000000>; /* prefetchable memory (512 MiB) */
ranges = <0x02000000 0 0x01000000 0x0 0x01000000 0 0x00001000>, /* port 0 configuration space */
<0x02000000 0 0x01001000 0x0 0x01001000 0 0x00001000>, /* port 1 configuration space */
<0x01000000 0 0x0 0x0 0x12000000 0 0x00010000>, /* downstream I/O (64 KiB) */
<0x02000000 0 0x13000000 0x0 0x13000000 0 0x0d000000>, /* non-prefetchable memory (208 MiB) */
<0x42000000 0 0x20000000 0x0 0x20000000 0 0x20000000>; /* prefetchable memory (512 MiB) */
clocks = <&tegra_car TEGRA210_CLK_PCIE>,
<&tegra_car TEGRA210_CLK_AFI>,
@ -86,10 +86,11 @@
};
host1x@50000000 {
compatible = "nvidia,tegra210-host1x", "simple-bus";
compatible = "nvidia,tegra210-host1x";
reg = <0x0 0x50000000 0x0 0x00034000>;
interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>, /* syncpt */
<GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; /* general */
interrupt-names = "syncpt", "host1x";
clocks = <&tegra_car TEGRA210_CLK_HOST1X>;
clock-names = "host1x";
resets = <&tegra_car 28>;
@ -186,9 +187,8 @@
compatible = "nvidia,tegra210-dc";
reg = <0x0 0x54200000 0x0 0x00040000>;
interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA210_CLK_DISP1>,
<&tegra_car TEGRA210_CLK_PLL_P>;
clock-names = "dc", "parent";
clocks = <&tegra_car TEGRA210_CLK_DISP1>;
clock-names = "dc";
resets = <&tegra_car 27>;
reset-names = "dc";
@ -201,9 +201,8 @@
compatible = "nvidia,tegra210-dc";
reg = <0x0 0x54240000 0x0 0x00040000>;
interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA210_CLK_DISP2>,
<&tegra_car TEGRA210_CLK_PLL_P>;
clock-names = "dc", "parent";
clocks = <&tegra_car TEGRA210_CLK_DISP2>;
clock-names = "dc";
resets = <&tegra_car 26>;
reset-names = "dc";
@ -326,7 +325,7 @@
};
dpaux: dpaux@545c0000 {
compatible = "nvidia,tegra124-dpaux";
compatible = "nvidia,tegra210-dpaux";
reg = <0x0 0x545c0000 0x0 0x00040000>;
interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA210_CLK_DPAUX>,
@ -362,6 +361,9 @@
compatible = "nvidia,tegra210-isp";
reg = <0x0 0x54600000 0x0 0x00040000>;
interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA210_CLK_ISPA>;
resets = <&tegra_car 23>;
reset-names = "isp";
status = "disabled";
};
@ -369,6 +371,9 @@
compatible = "nvidia,tegra210-isp";
reg = <0x0 0x54680000 0x0 0x00040000>;
interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA210_CLK_ISPB>;
resets = <&tegra_car 3>;
reset-names = "isp";
status = "disabled";
};
@ -376,7 +381,16 @@
compatible = "nvidia,tegra210-i2c-vi";
reg = <0x0 0x546c0000 0x0 0x00040000>;
interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA210_CLK_VI_I2C>,
<&tegra_car TEGRA210_CLK_I2CSLOW>;
clock-names = "div-clk", "slow";
resets = <&tegra_car 208>;
reset-names = "i2c";
power-domains = <&pd_venc>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
};
@ -998,8 +1012,8 @@
<&tegra_car TEGRA210_CLK_XUSB_HOST_SRC>,
<&tegra_car TEGRA210_CLK_XUSB_FALCON_SRC>,
<&tegra_car TEGRA210_CLK_XUSB_SS>,
<&tegra_car TEGRA210_CLK_XUSB_SS_DIV2>,
<&tegra_car TEGRA210_CLK_XUSB_SS_SRC>,
<&tegra_car TEGRA210_CLK_XUSB_SS_DIV2>,
<&tegra_car TEGRA210_CLK_XUSB_HS_SRC>,
<&tegra_car TEGRA210_CLK_XUSB_FS_SRC>,
<&tegra_car TEGRA210_CLK_PLL_U_480M>,
@ -1007,7 +1021,7 @@
<&tegra_car TEGRA210_CLK_PLL_E>;
clock-names = "xusb_host", "xusb_host_src",
"xusb_falcon_src", "xusb_ss",
"xusb_ss_div2", "xusb_ss_src",
"xusb_ss_src", "xusb_ss_div2",
"xusb_hs_src", "xusb_fs_src",
"pll_u_480m", "clk_m", "pll_e";
resets = <&tegra_car 89>, <&tegra_car 156>,
@ -1176,8 +1190,8 @@
};
};
sdhci@700b0000 {
compatible = "nvidia,tegra210-sdhci", "nvidia,tegra124-sdhci";
mmc@700b0000 {
compatible = "nvidia,tegra210-sdhci";
reg = <0x0 0x700b0000 0x0 0x200>;
interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA210_CLK_SDMMC1>;
@ -1204,8 +1218,8 @@
status = "disabled";
};
sdhci@700b0200 {
compatible = "nvidia,tegra210-sdhci", "nvidia,tegra124-sdhci";
mmc@700b0200 {
compatible = "nvidia,tegra210-sdhci";
reg = <0x0 0x700b0200 0x0 0x200>;
interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA210_CLK_SDMMC2>;
@ -1221,8 +1235,8 @@
status = "disabled";
};
sdhci@700b0400 {
compatible = "nvidia,tegra210-sdhci", "nvidia,tegra124-sdhci";
mmc@700b0400 {
compatible = "nvidia,tegra210-sdhci";
reg = <0x0 0x700b0400 0x0 0x200>;
interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA210_CLK_SDMMC3>;
@ -1244,8 +1258,8 @@
status = "disabled";
};
sdhci@700b0600 {
compatible = "nvidia,tegra210-sdhci", "nvidia,tegra124-sdhci";
mmc@700b0600 {
compatible = "nvidia,tegra210-sdhci";
reg = <0x0 0x700b0600 0x0 0x200>;
interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA210_CLK_SDMMC4>;
@ -1356,7 +1370,7 @@
status = "disabled";
};
agic: agic@702f9000 {
agic: interrupt-controller@702f9000 {
compatible = "nvidia,tegra210-agic";
#interrupt-cells = <3>;
interrupt-controller;
@ -1547,8 +1561,8 @@
soctherm: thermal-sensor@700e2000 {
compatible = "nvidia,tegra210-soctherm";
reg = <0x0 0x700e2000 0x0 0x600 /* SOC_THERM reg_base */
0x0 0x60006000 0x0 0x400>; /* CAR reg_base */
reg = <0x0 0x700e2000 0x0 0x600>, /* SOC_THERM reg_base */
<0x0 0x60006000 0x0 0x400>; /* CAR reg_base */
reg-names = "soctherm-reg", "car-reg";
interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;