dt-bindings: arm: idle-states: Use "e.g." and "i.e." consistently
Replace abbreviations "eg" and "ie" by "e.g." resp. "i.e." for consistency. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Amit Kucheria <amit.kucheria@linaro.org> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Rob Herring <robh@kernel.org>
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@ -28,7 +28,7 @@ PM implementation to put the processor in different idle states (which include
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states listed above; "off" state is not an idle state since it does not have
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wake-up capabilities, hence it is not considered in this document).
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Idle state parameters (eg entry latency) are platform specific and need to be
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Idle state parameters (e.g. entry latency) are platform specific and need to be
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characterized with bindings that provide the required information to OS PM
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code so that it can build the required tables and use them at runtime.
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@ -90,20 +90,20 @@ These timing parameters can be used by an OS in different circumstances.
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An idle CPU requires the expected min-residency time to select the most
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appropriate idle state based on the expected expiry time of the next IRQ
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(ie wake-up) that causes the CPU to return to the EXEC phase.
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(i.e. wake-up) that causes the CPU to return to the EXEC phase.
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An operating system scheduler may need to compute the shortest wake-up delay
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for CPUs in the system by detecting how long will it take to get a CPU out
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of an idle state, eg:
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of an idle state, e.g.:
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wakeup-delay = exit-latency + max(entry-latency - (now - entry-timestamp), 0)
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In other words, the scheduler can make its scheduling decision by selecting
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(eg waking-up) the CPU with the shortest wake-up latency.
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(e.g. waking-up) the CPU with the shortest wake-up latency.
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The wake-up latency must take into account the entry latency if that period
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has not expired. The abortable nature of the PREP period can be ignored
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if it cannot be relied upon (e.g. the PREP deadline may occur much sooner than
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the worst case since it depends on the CPU operating conditions, ie caches
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the worst case since it depends on the CPU operating conditions, i.e. caches
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state).
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An OS has to reliably probe the wakeup-latency since some devices can enforce
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@ -183,15 +183,15 @@ and IDLE2:
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Graph 2: idle states min-residency example
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In graph 2 above, that takes into account idle states entry/exit energy
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costs, it is clear that if the idle state residency time (ie time till next
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costs, it is clear that if the idle state residency time (i.e. time till next
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wake-up IRQ) is less than IDLE2-min-residency, IDLE1 is the better idle state
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choice energywise.
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This is mainly down to the fact that IDLE1 entry/exit energy costs are lower
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than IDLE2.
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However, the lower power consumption (ie shallower energy curve slope) of idle
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state IDLE2 implies that after a suitable time, IDLE2 becomes more energy
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However, the lower power consumption (i.e. shallower energy curve slope) of
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idle state IDLE2 implies that after a suitable time, IDLE2 becomes more energy
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efficient.
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The time at which IDLE2 becomes more energy efficient than IDLE1 (and other
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