drm/amd/powerplay: use smu7_hwmgr to manager tonga.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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fb044ed90c
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@ -4,12 +4,10 @@
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HARDWARE_MGR = hwmgr.o processpptables.o functiontables.o \
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hardwaremanager.o pp_acpi.o cz_hwmgr.o \
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cz_clockpowergating.o tonga_powertune.o\
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cz_clockpowergating.o pppcielanes.o\
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process_pptables_v1_0.o ppatomctrl.o \
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tonga_hwmgr.o pppcielanes.o tonga_thermal.o\
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smu7_hwmgr.o smu7_powertune.o smu7_thermal.o \
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smu7_clockpowergating.o iceland_hwmgr.o \
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tonga_clockpowergating.o \
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iceland_clockpowergating.o iceland_thermal.o \
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iceland_powertune.o
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@ -36,13 +36,13 @@
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#include "amd_acpi.h"
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extern int cz_hwmgr_init(struct pp_hwmgr *hwmgr);
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extern int tonga_hwmgr_init(struct pp_hwmgr *hwmgr);
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extern int iceland_hwmgr_init(struct pp_hwmgr *hwmgr);
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static int polaris_set_asic_special_caps(struct pp_hwmgr *hwmgr);
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static void hwmgr_init_default_caps(struct pp_hwmgr *hwmgr);
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static int hwmgr_set_user_specify_caps(struct pp_hwmgr *hwmgr);
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static int fiji_set_asic_special_caps(struct pp_hwmgr *hwmgr);
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static int tonga_set_asic_special_caps(struct pp_hwmgr *hwmgr);
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uint8_t convert_to_vid(uint16_t vddc)
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{
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@ -82,9 +82,11 @@ int hwmgr_init(struct amd_pp_init *pp_init, struct pp_instance *handle)
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iceland_hwmgr_init(hwmgr);
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break;
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case CHIP_TONGA:
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tonga_hwmgr_init(hwmgr);
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smu7_hwmgr_init(hwmgr);
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tonga_set_asic_special_caps(hwmgr);
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hwmgr->feature_mask &= ~(PP_SMC_VOLTAGE_CONTROL_MASK |
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PP_VBI_TIME_SUPPORT_MASK);
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break;
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case CHIP_FIJI:
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smu7_hwmgr_init(hwmgr);
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fiji_set_asic_special_caps(hwmgr);
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@ -768,3 +770,27 @@ int fiji_set_asic_special_caps(struct pp_hwmgr *hwmgr)
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return 0;
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}
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int tonga_set_asic_special_caps(struct pp_hwmgr *hwmgr)
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{
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phm_cap_unset(hwmgr->platform_descriptor.platformCaps,
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PHM_PlatformCaps_SQRamping);
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phm_cap_unset(hwmgr->platform_descriptor.platformCaps,
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PHM_PlatformCaps_DBRamping);
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phm_cap_unset(hwmgr->platform_descriptor.platformCaps,
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PHM_PlatformCaps_TDRamping);
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phm_cap_unset(hwmgr->platform_descriptor.platformCaps,
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PHM_PlatformCaps_TCPRamping);
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phm_cap_unset(hwmgr->platform_descriptor.platformCaps,
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PHM_PlatformCaps_UVDPowerGating);
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phm_cap_unset(hwmgr->platform_descriptor.platformCaps,
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PHM_PlatformCaps_VCEPowerGating);
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phm_cap_set(hwmgr->platform_descriptor.platformCaps,
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PHM_PlatformCaps_TablelessHardwareInterface);
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phm_cap_set(hwmgr->platform_descriptor.platformCaps,
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PHM_PlatformCaps_CAC);
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return 0;
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}
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